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* [drm-msm:msm-next-staging 30/67] drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c:420:11: warning: variable 'parent_name' is uninitialized when used here
@ 2021-04-10  1:14 kernel test robot
  0 siblings, 0 replies; only message in thread
From: kernel test robot @ 2021-04-10  1:14 UTC (permalink / raw)
  To: kbuild-all

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tree:   https://gitlab.freedesktop.org/drm/msm.git msm-next-staging
head:   cdc93a6910b301c0f8f2d2b6a57faa2b330c56e8
commit: 5d13459650b3668edcd6d180787aac38d001c4ed [30/67] drm/msm/dsi: push provided clocks handling into a generic code
config: arm64-randconfig-r035-20210409 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project dd453a1389b6a7e6d9214b449d3c54981b1a89b6)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install arm64 cross compiling tool for clang build
        # apt-get install binutils-aarch64-linux-gnu
        git remote add drm-msm https://gitlab.freedesktop.org/drm/msm.git
        git fetch --no-tags drm-msm msm-next-staging
        git checkout 5d13459650b3668edcd6d180787aac38d001c4ed
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c:420:11: warning: variable 'parent_name' is uninitialized when used here [-Wuninitialized]
           snprintf(parent_name, 32, "dsi%dvco_clk", pll_28nm->id);
                    ^~~~~~~~~~~
   drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c:380:30: note: initialize the variable 'parent_name' to silence this warning
           char *clk_name, *parent_name, *vco_name;
                                       ^
                                        = NULL
   1 warning generated.


vim +/parent_name +420 drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c

d6d1439ec43808 Dmitry Baryshkov 2021-03-31  377  
5d13459650b366 Dmitry Baryshkov 2021-03-31  378  static int pll_28nm_register(struct dsi_pll_28nm *pll_28nm, struct clk_hw **provided_clocks)
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  379  {
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  380  	char *clk_name, *parent_name, *vco_name;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  381  	struct clk_init_data vco_init = {
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  382  		.parent_names = (const char *[]){ "pxo" },
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  383  		.num_parents = 1,
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  384  		.flags = CLK_IGNORE_UNUSED,
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  385  		.ops = &clk_ops_dsi_pll_28nm_vco,
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  386  	};
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  387  	struct device *dev = &pll_28nm->pdev->dev;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  388  	struct clk **clks = pll_28nm->clks;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  389  	struct clk_bytediv *bytediv;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  390  	struct clk_init_data bytediv_init = { };
5d13459650b366 Dmitry Baryshkov 2021-03-31  391  	int num = 0;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  392  
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  393  	DBG("%d", pll_28nm->id);
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  394  
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  395  	bytediv = devm_kzalloc(dev, sizeof(*bytediv), GFP_KERNEL);
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  396  	if (!bytediv)
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  397  		return -ENOMEM;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  398  
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  399  	vco_name = devm_kzalloc(dev, 32, GFP_KERNEL);
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  400  	if (!vco_name)
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  401  		return -ENOMEM;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  402  
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  403  	clk_name = devm_kzalloc(dev, 32, GFP_KERNEL);
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  404  	if (!clk_name)
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  405  		return -ENOMEM;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  406  
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  407  	pll_28nm->bytediv = bytediv;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  408  
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  409  	snprintf(vco_name, 32, "dsi%dvco_clk", pll_28nm->id);
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  410  	vco_init.name = vco_name;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  411  
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  412  	pll_28nm->base.clk_hw.init = &vco_init;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  413  
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  414  	clks[num++] = clk_register(dev, &pll_28nm->base.clk_hw);
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  415  
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  416  	/* prepare and register bytediv */
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  417  	bytediv->hw.init = &bytediv_init;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  418  	bytediv->reg = pll_28nm->mmio + REG_DSI_28nm_8960_PHY_PLL_CTRL_9;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  419  
d6d1439ec43808 Dmitry Baryshkov 2021-03-31 @420  	snprintf(parent_name, 32, "dsi%dvco_clk", pll_28nm->id);
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  421  	snprintf(clk_name, 32, "dsi%dpllbyte", pll_28nm->id);
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  422  
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  423  	bytediv_init.name = clk_name;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  424  	bytediv_init.ops = &clk_bytediv_ops;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  425  	bytediv_init.flags = CLK_SET_RATE_PARENT;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  426  	bytediv_init.parent_names = (const char * const *) &parent_name;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  427  	bytediv_init.num_parents = 1;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  428  
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  429  	/* DIV2 */
5d13459650b366 Dmitry Baryshkov 2021-03-31  430  	clks[num++] = clk_register(dev, &bytediv->hw);
5d13459650b366 Dmitry Baryshkov 2021-03-31  431  	provided_clocks[DSI_BYTE_PLL_CLK] = __clk_get_hw(clks[num - 1]);
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  432  
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  433  	snprintf(clk_name, 32, "dsi%dpll", pll_28nm->id);
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  434  	/* DIV3 */
5d13459650b366 Dmitry Baryshkov 2021-03-31  435  	clks[num++] = clk_register_divider(dev, clk_name,
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  436  				parent_name, 0, pll_28nm->mmio +
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  437  				REG_DSI_28nm_8960_PHY_PLL_CTRL_10,
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  438  				0, 8, 0, NULL);
5d13459650b366 Dmitry Baryshkov 2021-03-31  439  	provided_clocks[DSI_PIXEL_PLL_CLK] = __clk_get_hw(clks[num - 1]);
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  440  
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  441  	pll_28nm->num_clks = num;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  442  
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  443  	return 0;
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  444  }
d6d1439ec43808 Dmitry Baryshkov 2021-03-31  445  

:::::: The code at line 420 was first introduced by commit
:::::: d6d1439ec43808447d25ea5c17012ca713ef7c4e drm/msm/dsi: fuse dsi_pll_* code into dsi_phy_* code

:::::: TO: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
:::::: CC: Rob Clark <robdclark@chromium.org>

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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2021-04-10  1:14 [drm-msm:msm-next-staging 30/67] drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c:420:11: warning: variable 'parent_name' is uninitialized when used here kernel test robot

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