* [PATCH 0/2] Allwinner H6 USB3 device tree updates
@ 2021-04-21 4:28 ` Samuel Holland
0 siblings, 0 replies; 12+ messages in thread
From: Samuel Holland @ 2021-04-21 4:28 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai, Jernej Skrabec, Andre Przywara,
Greg Kroah-Hartman, Rob Herring
Cc: devicetree, linux-arm-kernel, linux-kernel, linux-sunxi, Samuel Holland
While implementing support for this USB controller in U-Boot, I noticed
that the reset line alsp affects they PHY. It looks like most platforms
use a separate glue node to represent this, and in fact there is already
a compatible for the H6 listed in drivers/usb/dwc3/dwc3-of-simple.c.
Since this layout matches the usual way of modeling this hardware, it
allows using the existing drivers without adding platform-specific code.
Samuel Holland (2):
dt-bindings: usb: Document the Allwinner H6 DWC3 glue
arm64: dts: allwinner: h6: Wrap DWC3 and PHY in glue layer
.../usb/allwinner,sun50i-h6-dwc3.yaml | 75 +++++++++++++++++++
.../dts/allwinner/sun50i-h6-beelink-gs1.dts | 6 +-
.../dts/allwinner/sun50i-h6-orangepi-3.dts | 6 +-
.../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 9 +--
.../dts/allwinner/sun50i-h6-tanix-tx6.dts | 6 +-
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 60 ++++++++-------
6 files changed, 115 insertions(+), 47 deletions(-)
create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
--
2.26.3
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 1/2] dt-bindings: usb: Document the Allwinner H6 DWC3 glue
2021-04-21 4:28 ` Samuel Holland
@ 2021-04-21 4:28 ` Samuel Holland
-1 siblings, 0 replies; 12+ messages in thread
From: Samuel Holland @ 2021-04-21 4:28 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai, Jernej Skrabec, Andre Przywara,
Greg Kroah-Hartman, Rob Herring
Cc: devicetree, linux-arm-kernel, linux-kernel, linux-sunxi, Samuel Holland
The RST_BUS_XHCI reset line in the H6 affects both the DWC3 core and the
USB3 PHY. This suggests the reset line controls the USB3 IP as a whole.
Represent this by attaching the reset line to a glue layer device.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
.../usb/allwinner,sun50i-h6-dwc3.yaml | 75 +++++++++++++++++++
1 file changed, 75 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
diff --git a/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml b/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
new file mode 100644
index 000000000000..86efd6d21ab4
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/allwinner,sun50i-h6-dwc3#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner H6 DWC3 USB controller
+
+maintainers:
+ - Chen-Yu Tsai <wens@csie.org>
+ - Maxime Ripard <mripard@kernel.org>
+
+properties:
+ compatible:
+ const: allwinner,sun50i-h6-dwc3
+
+ "#address-cells": true
+
+ "#size-cells": true
+
+ ranges: true
+
+ resets:
+ maxItems: 1
+
+# Required child node:
+
+patternProperties:
+ "^phy@[0-9a-f]+$":
+ $ref: allwinner,sun50i-h6-usb3-phy.yaml#
+
+ "^usb@[0-9a-f]+$":
+ $ref: snps,dwc3.yaml#
+
+required:
+ - compatible
+ - ranges
+ - resets
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/sun50i-h6-ccu.h>
+ #include <dt-bindings/reset/sun50i-h6-ccu.h>
+
+ usb3: usb@5200000 {
+ compatible = "allwinner,sun50i-h6-dwc3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ resets = <&ccu RST_BUS_XHCI>;
+
+ dwc3: usb@5200000 {
+ compatible = "snps,dwc3";
+ reg = <0x05200000 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_XHCI>,
+ <&ccu CLK_BUS_XHCI>,
+ <&rtc 0>;
+ clock-names = "ref", "bus_early", "suspend";
+ dr_mode = "host";
+ phys = <&usb3phy>;
+ phy-names = "usb3-phy";
+ };
+
+ usb3phy: phy@5210000 {
+ compatible = "allwinner,sun50i-h6-usb3-phy";
+ reg = <0x5210000 0x10000>;
+ clocks = <&ccu CLK_USB_PHY1>;
+ resets = <&ccu RST_USB_PHY1>;
+ #phy-cells = <0>;
+ };
+ };
--
2.26.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 1/2] dt-bindings: usb: Document the Allwinner H6 DWC3 glue
@ 2021-04-21 4:28 ` Samuel Holland
0 siblings, 0 replies; 12+ messages in thread
From: Samuel Holland @ 2021-04-21 4:28 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai, Jernej Skrabec, Andre Przywara,
Greg Kroah-Hartman, Rob Herring
Cc: devicetree, linux-arm-kernel, linux-kernel, linux-sunxi, Samuel Holland
The RST_BUS_XHCI reset line in the H6 affects both the DWC3 core and the
USB3 PHY. This suggests the reset line controls the USB3 IP as a whole.
Represent this by attaching the reset line to a glue layer device.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
.../usb/allwinner,sun50i-h6-dwc3.yaml | 75 +++++++++++++++++++
1 file changed, 75 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
diff --git a/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml b/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
new file mode 100644
index 000000000000..86efd6d21ab4
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/allwinner,sun50i-h6-dwc3#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner H6 DWC3 USB controller
+
+maintainers:
+ - Chen-Yu Tsai <wens@csie.org>
+ - Maxime Ripard <mripard@kernel.org>
+
+properties:
+ compatible:
+ const: allwinner,sun50i-h6-dwc3
+
+ "#address-cells": true
+
+ "#size-cells": true
+
+ ranges: true
+
+ resets:
+ maxItems: 1
+
+# Required child node:
+
+patternProperties:
+ "^phy@[0-9a-f]+$":
+ $ref: allwinner,sun50i-h6-usb3-phy.yaml#
+
+ "^usb@[0-9a-f]+$":
+ $ref: snps,dwc3.yaml#
+
+required:
+ - compatible
+ - ranges
+ - resets
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/sun50i-h6-ccu.h>
+ #include <dt-bindings/reset/sun50i-h6-ccu.h>
+
+ usb3: usb@5200000 {
+ compatible = "allwinner,sun50i-h6-dwc3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ resets = <&ccu RST_BUS_XHCI>;
+
+ dwc3: usb@5200000 {
+ compatible = "snps,dwc3";
+ reg = <0x05200000 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_XHCI>,
+ <&ccu CLK_BUS_XHCI>,
+ <&rtc 0>;
+ clock-names = "ref", "bus_early", "suspend";
+ dr_mode = "host";
+ phys = <&usb3phy>;
+ phy-names = "usb3-phy";
+ };
+
+ usb3phy: phy@5210000 {
+ compatible = "allwinner,sun50i-h6-usb3-phy";
+ reg = <0x5210000 0x10000>;
+ clocks = <&ccu CLK_USB_PHY1>;
+ resets = <&ccu RST_USB_PHY1>;
+ #phy-cells = <0>;
+ };
+ };
--
2.26.3
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 1/2] dt-bindings: usb: Document the Allwinner H6 DWC3 glue
2021-04-21 4:28 ` Samuel Holland
@ 2021-04-21 12:51 ` Rob Herring
-1 siblings, 0 replies; 12+ messages in thread
From: Rob Herring @ 2021-04-21 12:51 UTC (permalink / raw)
To: Samuel Holland
Cc: Chen-Yu Tsai, Maxime Ripard, Rob Herring, linux-sunxi,
Jernej Skrabec, Greg Kroah-Hartman, linux-arm-kernel, devicetree,
linux-kernel, Andre Przywara
On Tue, 20 Apr 2021 23:28:33 -0500, Samuel Holland wrote:
> The RST_BUS_XHCI reset line in the H6 affects both the DWC3 core and the
> USB3 PHY. This suggests the reset line controls the USB3 IP as a whole.
> Represent this by attaching the reset line to a glue layer device.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> .../usb/allwinner,sun50i-h6-dwc3.yaml | 75 +++++++++++++++++++
> 1 file changed, 75 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml: $id: 'http://devicetree.org/schemas/usb/allwinner,sun50i-h6-dwc3#' does not match 'http://devicetree.org/schemas/.*\\.yaml#'
Unknown file referenced: [Errno 2] No such file or directory: '/usr/local/lib/python3.8/dist-packages/dtschema/schemas/usb/allwinner,sun50i-h6-usb3-phy.yaml'
xargs: dt-doc-validate: exited with status 255; aborting
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml: ignoring, error in schema: $id
warning: no schema found in file: ./Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.example.dts:23.27-50.11: Warning (unit_address_vs_reg): /example-0/usb@5200000: node has a unit name, but no reg or ranges property
Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.example.dt.yaml:0:0: /example-0/usb@5200000: failed to match any schema with compatible: ['allwinner,sun50i-h6-dwc3']
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.example.dt.yaml: usb@5200000: phy-names:0: 'usb2-phy' was expected
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
See https://patchwork.ozlabs.org/patch/1468558
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/2] dt-bindings: usb: Document the Allwinner H6 DWC3 glue
@ 2021-04-21 12:51 ` Rob Herring
0 siblings, 0 replies; 12+ messages in thread
From: Rob Herring @ 2021-04-21 12:51 UTC (permalink / raw)
To: Samuel Holland
Cc: Chen-Yu Tsai, Maxime Ripard, Rob Herring, linux-sunxi,
Jernej Skrabec, Greg Kroah-Hartman, linux-arm-kernel, devicetree,
linux-kernel, Andre Przywara
On Tue, 20 Apr 2021 23:28:33 -0500, Samuel Holland wrote:
> The RST_BUS_XHCI reset line in the H6 affects both the DWC3 core and the
> USB3 PHY. This suggests the reset line controls the USB3 IP as a whole.
> Represent this by attaching the reset line to a glue layer device.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> .../usb/allwinner,sun50i-h6-dwc3.yaml | 75 +++++++++++++++++++
> 1 file changed, 75 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml: $id: 'http://devicetree.org/schemas/usb/allwinner,sun50i-h6-dwc3#' does not match 'http://devicetree.org/schemas/.*\\.yaml#'
Unknown file referenced: [Errno 2] No such file or directory: '/usr/local/lib/python3.8/dist-packages/dtschema/schemas/usb/allwinner,sun50i-h6-usb3-phy.yaml'
xargs: dt-doc-validate: exited with status 255; aborting
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml: ignoring, error in schema: $id
warning: no schema found in file: ./Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.example.dts:23.27-50.11: Warning (unit_address_vs_reg): /example-0/usb@5200000: node has a unit name, but no reg or ranges property
Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.example.dt.yaml:0:0: /example-0/usb@5200000: failed to match any schema with compatible: ['allwinner,sun50i-h6-dwc3']
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.example.dt.yaml: usb@5200000: phy-names:0: 'usb2-phy' was expected
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
See https://patchwork.ozlabs.org/patch/1468558
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/2] dt-bindings: usb: Document the Allwinner H6 DWC3 glue
2021-04-21 12:51 ` Rob Herring
@ 2021-04-22 7:42 ` Maxime Ripard
-1 siblings, 0 replies; 12+ messages in thread
From: Maxime Ripard @ 2021-04-22 7:42 UTC (permalink / raw)
To: Rob Herring
Cc: Samuel Holland, Chen-Yu Tsai, Rob Herring, linux-sunxi,
Jernej Skrabec, Greg Kroah-Hartman, linux-arm-kernel, devicetree,
linux-kernel, Andre Przywara
[-- Attachment #1: Type: text/plain, Size: 811 bytes --]
On Wed, Apr 21, 2021 at 07:51:48AM -0500, Rob Herring wrote:
> On Tue, 20 Apr 2021 23:28:33 -0500, Samuel Holland wrote:
> > The RST_BUS_XHCI reset line in the H6 affects both the DWC3 core and the
> > USB3 PHY. This suggests the reset line controls the USB3 IP as a whole.
> > Represent this by attaching the reset line to a glue layer device.
> >
> > Signed-off-by: Samuel Holland <samuel@sholland.org>
> > ---
> > .../usb/allwinner,sun50i-h6-dwc3.yaml | 75 +++++++++++++++++++
> > 1 file changed, 75 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
> >
>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
I dropped these patches then
Maxime
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/2] dt-bindings: usb: Document the Allwinner H6 DWC3 glue
@ 2021-04-22 7:42 ` Maxime Ripard
0 siblings, 0 replies; 12+ messages in thread
From: Maxime Ripard @ 2021-04-22 7:42 UTC (permalink / raw)
To: Rob Herring
Cc: Samuel Holland, Chen-Yu Tsai, Rob Herring, linux-sunxi,
Jernej Skrabec, Greg Kroah-Hartman, linux-arm-kernel, devicetree,
linux-kernel, Andre Przywara
[-- Attachment #1.1: Type: text/plain, Size: 811 bytes --]
On Wed, Apr 21, 2021 at 07:51:48AM -0500, Rob Herring wrote:
> On Tue, 20 Apr 2021 23:28:33 -0500, Samuel Holland wrote:
> > The RST_BUS_XHCI reset line in the H6 affects both the DWC3 core and the
> > USB3 PHY. This suggests the reset line controls the USB3 IP as a whole.
> > Represent this by attaching the reset line to a glue layer device.
> >
> > Signed-off-by: Samuel Holland <samuel@sholland.org>
> > ---
> > .../usb/allwinner,sun50i-h6-dwc3.yaml | 75 +++++++++++++++++++
> > 1 file changed, 75 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml
> >
>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
I dropped these patches then
Maxime
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/2] arm64: dts: allwinner: h6: Wrap DWC3 and PHY in glue layer
2021-04-21 4:28 ` Samuel Holland
@ 2021-04-21 4:28 ` Samuel Holland
-1 siblings, 0 replies; 12+ messages in thread
From: Samuel Holland @ 2021-04-21 4:28 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai, Jernej Skrabec, Andre Przywara,
Greg Kroah-Hartman, Rob Herring
Cc: devicetree, linux-arm-kernel, linux-kernel, linux-sunxi, Samuel Holland
The USB3 IP in the H6 is organized such that the reset line affects both
the DWC3 core and the PHY. To model that, following the example of
several other platforms, wrap those nodes in a glue layer node.
The inner nodes no longer need to be disabled, since the glue layer is
disabled by default to keep it in reset.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
.../dts/allwinner/sun50i-h6-beelink-gs1.dts | 6 +-
.../dts/allwinner/sun50i-h6-orangepi-3.dts | 6 +-
.../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 9 ++-
.../dts/allwinner/sun50i-h6-tanix-tx6.dts | 6 +-
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 60 ++++++++++---------
5 files changed, 40 insertions(+), 47 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
index 0dde972324e7..5bab12d81468 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
@@ -86,10 +86,6 @@ &de {
status = "okay";
};
-&dwc3 {
- status = "okay";
-};
-
&ehci0 {
status = "okay";
};
@@ -333,6 +329,6 @@ &usb2phy {
status = "okay";
};
-&usb3phy {
+&usb3 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
index 38c48130f079..baff16caedb5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -111,10 +111,6 @@ &de {
status = "okay";
};
-&dwc3 {
- status = "okay";
-};
-
&ehci0 {
status = "okay";
};
@@ -388,6 +384,6 @@ &usb2phy {
status = "okay";
};
-&usb3phy {
+&usb3 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
index 647669511381..fe4d74ade6e0 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
@@ -94,10 +94,6 @@ &de {
status = "okay";
};
-&dwc3 {
- status = "okay";
-};
-
&ehci0 {
status = "okay";
};
@@ -362,7 +358,10 @@ &usb2phy {
status = "okay";
};
+&usb3 {
+ status = "okay";
+};
+
&usb3phy {
phy-supply = <®_usb_vbus>;
- status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
index be81330db14f..8cb06df231ab 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
@@ -55,10 +55,6 @@ &de {
status = "okay";
};
-&dwc3 {
- status = "okay";
-};
-
&ehci0 {
status = "okay";
};
@@ -119,6 +115,6 @@ &usb2phy {
status = "okay";
};
-&usb3phy {
+&usb3 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 15b14ed566dc..c5eea8b50ef8 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -797,36 +797,42 @@ ohci0: usb@5101400 {
status = "disabled";
};
- dwc3: usb@5200000 {
- compatible = "snps,dwc3";
- reg = <0x05200000 0x10000>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_XHCI>,
- <&ccu CLK_BUS_XHCI>,
- <&rtc 0>;
- clock-names = "ref", "bus_early", "suspend";
+ usb3: usb@5200000 {
+ compatible = "allwinner,sun50i-h6-dwc3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
resets = <&ccu RST_BUS_XHCI>;
- /*
- * The datasheet of the chip doesn't declare the
- * peripheral function, and there's no boards known
- * to have a USB Type-B port routed to the port.
- * In addition, no one has tested the peripheral
- * function yet.
- * So set the dr_mode to "host" in the DTSI file.
- */
- dr_mode = "host";
- phys = <&usb3phy>;
- phy-names = "usb3-phy";
status = "disabled";
- };
- usb3phy: phy@5210000 {
- compatible = "allwinner,sun50i-h6-usb3-phy";
- reg = <0x5210000 0x10000>;
- clocks = <&ccu CLK_USB_PHY1>;
- resets = <&ccu RST_USB_PHY1>;
- #phy-cells = <0>;
- status = "disabled";
+ dwc3: usb@5200000 {
+ compatible = "snps,dwc3";
+ reg = <0x05200000 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_XHCI>,
+ <&ccu CLK_BUS_XHCI>,
+ <&rtc 0>;
+ clock-names = "ref", "bus_early", "suspend";
+ /*
+ * The datasheet of the chip doesn't declare the
+ * peripheral function, and there's no boards known
+ * to have a USB Type-B port routed to the port.
+ * In addition, no one has tested the peripheral
+ * function yet.
+ * So set the dr_mode to "host" in the DTSI file.
+ */
+ dr_mode = "host";
+ phys = <&usb3phy>;
+ phy-names = "usb3-phy";
+ };
+
+ usb3phy: phy@5210000 {
+ compatible = "allwinner,sun50i-h6-usb3-phy";
+ reg = <0x5210000 0x10000>;
+ clocks = <&ccu CLK_USB_PHY1>;
+ resets = <&ccu RST_USB_PHY1>;
+ #phy-cells = <0>;
+ };
};
ehci3: usb@5311000 {
--
2.26.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 2/2] arm64: dts: allwinner: h6: Wrap DWC3 and PHY in glue layer
@ 2021-04-21 4:28 ` Samuel Holland
0 siblings, 0 replies; 12+ messages in thread
From: Samuel Holland @ 2021-04-21 4:28 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai, Jernej Skrabec, Andre Przywara,
Greg Kroah-Hartman, Rob Herring
Cc: devicetree, linux-arm-kernel, linux-kernel, linux-sunxi, Samuel Holland
The USB3 IP in the H6 is organized such that the reset line affects both
the DWC3 core and the PHY. To model that, following the example of
several other platforms, wrap those nodes in a glue layer node.
The inner nodes no longer need to be disabled, since the glue layer is
disabled by default to keep it in reset.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
.../dts/allwinner/sun50i-h6-beelink-gs1.dts | 6 +-
.../dts/allwinner/sun50i-h6-orangepi-3.dts | 6 +-
.../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 9 ++-
.../dts/allwinner/sun50i-h6-tanix-tx6.dts | 6 +-
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 60 ++++++++++---------
5 files changed, 40 insertions(+), 47 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
index 0dde972324e7..5bab12d81468 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
@@ -86,10 +86,6 @@ &de {
status = "okay";
};
-&dwc3 {
- status = "okay";
-};
-
&ehci0 {
status = "okay";
};
@@ -333,6 +329,6 @@ &usb2phy {
status = "okay";
};
-&usb3phy {
+&usb3 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
index 38c48130f079..baff16caedb5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -111,10 +111,6 @@ &de {
status = "okay";
};
-&dwc3 {
- status = "okay";
-};
-
&ehci0 {
status = "okay";
};
@@ -388,6 +384,6 @@ &usb2phy {
status = "okay";
};
-&usb3phy {
+&usb3 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
index 647669511381..fe4d74ade6e0 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
@@ -94,10 +94,6 @@ &de {
status = "okay";
};
-&dwc3 {
- status = "okay";
-};
-
&ehci0 {
status = "okay";
};
@@ -362,7 +358,10 @@ &usb2phy {
status = "okay";
};
+&usb3 {
+ status = "okay";
+};
+
&usb3phy {
phy-supply = <®_usb_vbus>;
- status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
index be81330db14f..8cb06df231ab 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
@@ -55,10 +55,6 @@ &de {
status = "okay";
};
-&dwc3 {
- status = "okay";
-};
-
&ehci0 {
status = "okay";
};
@@ -119,6 +115,6 @@ &usb2phy {
status = "okay";
};
-&usb3phy {
+&usb3 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 15b14ed566dc..c5eea8b50ef8 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -797,36 +797,42 @@ ohci0: usb@5101400 {
status = "disabled";
};
- dwc3: usb@5200000 {
- compatible = "snps,dwc3";
- reg = <0x05200000 0x10000>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_XHCI>,
- <&ccu CLK_BUS_XHCI>,
- <&rtc 0>;
- clock-names = "ref", "bus_early", "suspend";
+ usb3: usb@5200000 {
+ compatible = "allwinner,sun50i-h6-dwc3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
resets = <&ccu RST_BUS_XHCI>;
- /*
- * The datasheet of the chip doesn't declare the
- * peripheral function, and there's no boards known
- * to have a USB Type-B port routed to the port.
- * In addition, no one has tested the peripheral
- * function yet.
- * So set the dr_mode to "host" in the DTSI file.
- */
- dr_mode = "host";
- phys = <&usb3phy>;
- phy-names = "usb3-phy";
status = "disabled";
- };
- usb3phy: phy@5210000 {
- compatible = "allwinner,sun50i-h6-usb3-phy";
- reg = <0x5210000 0x10000>;
- clocks = <&ccu CLK_USB_PHY1>;
- resets = <&ccu RST_USB_PHY1>;
- #phy-cells = <0>;
- status = "disabled";
+ dwc3: usb@5200000 {
+ compatible = "snps,dwc3";
+ reg = <0x05200000 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_XHCI>,
+ <&ccu CLK_BUS_XHCI>,
+ <&rtc 0>;
+ clock-names = "ref", "bus_early", "suspend";
+ /*
+ * The datasheet of the chip doesn't declare the
+ * peripheral function, and there's no boards known
+ * to have a USB Type-B port routed to the port.
+ * In addition, no one has tested the peripheral
+ * function yet.
+ * So set the dr_mode to "host" in the DTSI file.
+ */
+ dr_mode = "host";
+ phys = <&usb3phy>;
+ phy-names = "usb3-phy";
+ };
+
+ usb3phy: phy@5210000 {
+ compatible = "allwinner,sun50i-h6-usb3-phy";
+ reg = <0x5210000 0x10000>;
+ clocks = <&ccu CLK_USB_PHY1>;
+ resets = <&ccu RST_USB_PHY1>;
+ #phy-cells = <0>;
+ };
};
ehci3: usb@5311000 {
--
2.26.3
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 0/2] Allwinner H6 USB3 device tree updates
2021-04-21 4:28 ` Samuel Holland
@ 2021-04-21 9:27 ` Maxime Ripard
-1 siblings, 0 replies; 12+ messages in thread
From: Maxime Ripard @ 2021-04-21 9:27 UTC (permalink / raw)
To: Samuel Holland
Cc: Chen-Yu Tsai, Jernej Skrabec, Andre Przywara, Greg Kroah-Hartman,
Rob Herring, devicetree, linux-arm-kernel, linux-kernel,
linux-sunxi
[-- Attachment #1: Type: text/plain, Size: 710 bytes --]
Hi,
On Tue, Apr 20, 2021 at 11:28:32PM -0500, Samuel Holland wrote:
> While implementing support for this USB controller in U-Boot, I noticed
> that the reset line alsp affects they PHY. It looks like most platforms
> use a separate glue node to represent this, and in fact there is already
> a compatible for the H6 listed in drivers/usb/dwc3/dwc3-of-simple.c.
>
> Since this layout matches the usual way of modeling this hardware, it
> allows using the existing drivers without adding platform-specific code.
I'm not sure which branch you based this on, but the Pine H64 seems to
be missing the USB3 support in the first place. I've applied the rest of
the changes though, thanks!
Maxime
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/2] Allwinner H6 USB3 device tree updates
@ 2021-04-21 9:27 ` Maxime Ripard
0 siblings, 0 replies; 12+ messages in thread
From: Maxime Ripard @ 2021-04-21 9:27 UTC (permalink / raw)
To: Samuel Holland
Cc: Chen-Yu Tsai, Jernej Skrabec, Andre Przywara, Greg Kroah-Hartman,
Rob Herring, devicetree, linux-arm-kernel, linux-kernel,
linux-sunxi
[-- Attachment #1.1: Type: text/plain, Size: 710 bytes --]
Hi,
On Tue, Apr 20, 2021 at 11:28:32PM -0500, Samuel Holland wrote:
> While implementing support for this USB controller in U-Boot, I noticed
> that the reset line alsp affects they PHY. It looks like most platforms
> use a separate glue node to represent this, and in fact there is already
> a compatible for the H6 listed in drivers/usb/dwc3/dwc3-of-simple.c.
>
> Since this layout matches the usual way of modeling this hardware, it
> allows using the existing drivers without adding platform-specific code.
I'm not sure which branch you based this on, but the Pine H64 seems to
be missing the USB3 support in the first place. I've applied the rest of
the changes though, thanks!
Maxime
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread