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From: Adrian Larumbe <adrian.martinezlarumbe@imgtec.com>
To: <vkoul@kernel.org>, <dmaengine@vger.kernel.org>
Cc: <michal.simek@xilinx.com>, <linux-arm-kernel@lists.infradead.org>,
	<adrian.martinezlarumbe@imgtec.com>
Subject: [PATCH 2/4] dmaengine: xilinx_dma: Add channel configuration setting callback
Date: Fri, 23 Apr 2021 02:19:11 +0100	[thread overview]
Message-ID: <20210423011913.13122-3-adrian.martinezlarumbe@imgtec.com> (raw)
In-Reply-To: <20210423011913.13122-1-adrian.martinezlarumbe@imgtec.com>

This callback allows the DMA Engine API user to set a per-channel
configuration structure before calling dmaengine_prep_slave_sg.
This is a prerequisite for being able to do CDMA SG transfers, because
one of the transfer ends is meant to be a preconfigured contiguous
block of memory.

A later implementation of CDMA SG transfers will access this configuration
structure, and is therefore dependent on this change.

Signed-off-by: Adrian Larumbe <adrian.martinezlarumbe@imgtec.com>
---
 drivers/dma/xilinx/xilinx_dma.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 3f859de593dc..49c7093e2487 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -392,6 +392,7 @@ struct xilinx_dma_tx_descriptor {
  * @irq: Channel IRQ
  * @id: Channel ID
  * @direction: Transfer direction
+ * @cfg: DMA slave channel configuration
  * @num_frms: Number of frames
  * @has_sg: Support scatter transfers
  * @cyclic: Check for cyclic transfers.
@@ -429,6 +430,7 @@ struct xilinx_dma_chan {
 	int irq;
 	int id;
 	enum dma_transfer_direction direction;
+	struct dma_slave_config cfg;
 	int num_frms;
 	bool has_sg;
 	bool cyclic;
@@ -2565,6 +2567,21 @@ static void xilinx_dma_chan_remove(struct xilinx_dma_chan *chan)
 	list_del(&chan->common.device_node);
 }
 
+/**
+ * xilinx_dma_slave_config - Set the channel config
+ * @dchan: DMA channel
+ * @cfg: DMA slave channel configuration
+ */
+static int xilinx_dma_slave_config(struct dma_chan *dchan,
+				   struct dma_slave_config *cfg)
+{
+	struct xilinx_dma_chan *chan = to_xilinx_chan(dchan);
+
+	chan->cfg = *cfg;
+
+	return 0;
+}
+
 static int axidma_clk_init(struct platform_device *pdev, struct clk **axi_clk,
 			    struct clk **tx_clk, struct clk **rx_clk,
 			    struct clk **sg_clk, struct clk **tmp_clk)
@@ -3095,6 +3112,7 @@ static int xilinx_dma_probe(struct platform_device *pdev)
 	xdev->common.device_terminate_all = xilinx_dma_terminate_all;
 	xdev->common.device_tx_status = xilinx_dma_tx_status;
 	xdev->common.device_issue_pending = xilinx_dma_issue_pending;
+	xdev->common.device_config = xilinx_dma_slave_config;
 	if (xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) {
 		dma_cap_set(DMA_CYCLIC, xdev->common.cap_mask);
 		xdev->common.device_prep_slave_sg = xilinx_dma_prep_slave_sg;
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Adrian Larumbe <adrian.martinezlarumbe@imgtec.com>
To: <vkoul@kernel.org>, <dmaengine@vger.kernel.org>
Cc: <michal.simek@xilinx.com>, <linux-arm-kernel@lists.infradead.org>,
	<adrian.martinezlarumbe@imgtec.com>
Subject: [PATCH 2/4] dmaengine: xilinx_dma: Add channel configuration setting callback
Date: Fri, 23 Apr 2021 02:19:11 +0100	[thread overview]
Message-ID: <20210423011913.13122-3-adrian.martinezlarumbe@imgtec.com> (raw)
In-Reply-To: <20210423011913.13122-1-adrian.martinezlarumbe@imgtec.com>

This callback allows the DMA Engine API user to set a per-channel
configuration structure before calling dmaengine_prep_slave_sg.
This is a prerequisite for being able to do CDMA SG transfers, because
one of the transfer ends is meant to be a preconfigured contiguous
block of memory.

A later implementation of CDMA SG transfers will access this configuration
structure, and is therefore dependent on this change.

Signed-off-by: Adrian Larumbe <adrian.martinezlarumbe@imgtec.com>
---
 drivers/dma/xilinx/xilinx_dma.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 3f859de593dc..49c7093e2487 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -392,6 +392,7 @@ struct xilinx_dma_tx_descriptor {
  * @irq: Channel IRQ
  * @id: Channel ID
  * @direction: Transfer direction
+ * @cfg: DMA slave channel configuration
  * @num_frms: Number of frames
  * @has_sg: Support scatter transfers
  * @cyclic: Check for cyclic transfers.
@@ -429,6 +430,7 @@ struct xilinx_dma_chan {
 	int irq;
 	int id;
 	enum dma_transfer_direction direction;
+	struct dma_slave_config cfg;
 	int num_frms;
 	bool has_sg;
 	bool cyclic;
@@ -2565,6 +2567,21 @@ static void xilinx_dma_chan_remove(struct xilinx_dma_chan *chan)
 	list_del(&chan->common.device_node);
 }
 
+/**
+ * xilinx_dma_slave_config - Set the channel config
+ * @dchan: DMA channel
+ * @cfg: DMA slave channel configuration
+ */
+static int xilinx_dma_slave_config(struct dma_chan *dchan,
+				   struct dma_slave_config *cfg)
+{
+	struct xilinx_dma_chan *chan = to_xilinx_chan(dchan);
+
+	chan->cfg = *cfg;
+
+	return 0;
+}
+
 static int axidma_clk_init(struct platform_device *pdev, struct clk **axi_clk,
 			    struct clk **tx_clk, struct clk **rx_clk,
 			    struct clk **sg_clk, struct clk **tmp_clk)
@@ -3095,6 +3112,7 @@ static int xilinx_dma_probe(struct platform_device *pdev)
 	xdev->common.device_terminate_all = xilinx_dma_terminate_all;
 	xdev->common.device_tx_status = xilinx_dma_tx_status;
 	xdev->common.device_issue_pending = xilinx_dma_issue_pending;
+	xdev->common.device_config = xilinx_dma_slave_config;
 	if (xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) {
 		dma_cap_set(DMA_CYCLIC, xdev->common.cap_mask);
 		xdev->common.device_prep_slave_sg = xilinx_dma_prep_slave_sg;
-- 
2.17.1


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  parent reply	other threads:[~2021-04-23  1:30 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-23  1:19 [PATCH 0/4] Expand Xilinx CDMA functions Adrian Larumbe
2021-04-23  1:19 ` Adrian Larumbe
2021-04-23  1:19 ` [PATCH 1/4] dmaengine: xilinx_dma: Add extended address support in CDMA Adrian Larumbe
2021-04-23  1:19   ` Adrian Larumbe
2021-04-23  1:19 ` Adrian Larumbe [this message]
2021-04-23  1:19   ` [PATCH 2/4] dmaengine: xilinx_dma: Add channel configuration setting callback Adrian Larumbe
2021-04-23  1:19 ` [PATCH 3/4] dmaengine: xilinx_dma: Add CDMA SG transfer support Adrian Larumbe
2021-04-23  1:19   ` Adrian Larumbe
2021-04-23  1:19 ` [PATCH 4/4] dmaengine: xilinx_dma: Add device synchronisation callback Adrian Larumbe
2021-04-23  1:19   ` Adrian Larumbe
2021-04-23  6:33   ` Lars-Peter Clausen
2021-04-23  6:33     ` Lars-Peter Clausen
2021-04-23 11:49     ` [EXTERNAL] " Adrian Larumbe
2021-04-23 11:49       ` Adrian Larumbe
2021-04-23  9:17 ` [PATCH 0/4] Expand Xilinx CDMA functions Lars-Peter Clausen
2021-04-23  9:17   ` Lars-Peter Clausen
2021-04-23 11:38   ` [EXTERNAL] " Adrian Larumbe
2021-04-23 11:38     ` Adrian Larumbe
2021-04-23 13:24   ` Vinod Koul
2021-04-23 13:24     ` Vinod Koul
2021-04-23 13:51     ` Lars-Peter Clausen
2021-04-23 13:51       ` Lars-Peter Clausen
2021-04-23 14:36       ` [EXTERNAL] " Adrian Larumbe
2021-04-23 14:36         ` Adrian Larumbe
2021-04-23 17:20       ` Vinod Koul
2021-04-23 17:20         ` Vinod Koul
2021-06-01 10:29         ` radhey pandey
2021-06-01 10:29           ` radhey pandey
2021-07-02 14:23           ` [EXTERNAL] " Adrian Larumbe
2021-07-02 14:23             ` Adrian Larumbe
2021-07-05  3:53             ` Vinod Koul
2021-07-05  3:53               ` Vinod Koul

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