[PATCH 1/2] drm/amdgpu/pm: add documentation for pp_od_clock_voltage for APUs

[PATCH 1/2] drm/amdgpu/pm: add documentation for pp_od_clock_voltage for APUs

[Alex Deucher]

APUs only support adjusting the SCLK domain.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/pm/amdgpu_pm.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 4e459ef632ef..cbd38f2be958 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -735,6 +735,14 @@ static ssize_t amdgpu_set_pp_table(struct device *dev,
  * - a list of valid ranges for sclk, mclk, and voltage curve points
  *   labeled OD_RANGE
  *
+ * < For APUs >
+ *
+ * Reading the file will display:
+ *
+ * - minimum and maximum engine clock labeled OD_SCLK
+ *
+ * - a list of valid ranges for sclk labeled OD_RANGE
+ *
  * To manually adjust these settings:
  *
  * - First select manual using power_dpm_force_performance_level
-- 
2.30.2

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[PATCH 2/2] drm/amdgpu/pm: add documentation for pp_od_clock_voltage for vangogh

[Alex Deucher]

Vangogh follows other APUs, but also allows core clock adjustments.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/pm/amdgpu_pm.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index cbd38f2be958..082b01e872fe 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -743,6 +743,15 @@ static ssize_t amdgpu_set_pp_table(struct device *dev,
  *
  * - a list of valid ranges for sclk labeled OD_RANGE
  *
+ * < For VanGogh >
+ *
+ * Reading the file will display:
+ *
+ * - minimum and maximum engine clock labeled OD_SCLK
+ * - minimum and maximum core clocks labeled OD_CCLK
+ *
+ * - a list of valid ranges for sclk and cclk labeled OD_RANGE
+ *
  * To manually adjust these settings:
  *
  * - First select manual using power_dpm_force_performance_level
@@ -751,7 +760,10 @@ static ssize_t amdgpu_set_pp_table(struct device *dev,
  *   string that contains "s/m index clock" to the file. The index
  *   should be 0 if to set minimum clock. And 1 if to set maximum
  *   clock. E.g., "s 0 500" will update minimum sclk to be 500 MHz.
- *   "m 1 800" will update maximum mclk to be 800Mhz.
+ *   "m 1 800" will update maximum mclk to be 800Mhz. For core
+ *   clocks on VanGogh, the string contains "p core index clock".
+ *   E.g., "p 2 0 800" would set the minimum core clock on core
+ *   2 to 800Mhz.
  *
  *   For sclk voltage curve, enter the new values by writing a
  *   string that contains "vc point clock voltage" to the file. The
-- 
2.30.2

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RE: [PATCH 2/2] drm/amdgpu/pm: add documentation for pp_od_clock_voltage for vangogh

[Quan, Evan]

[AMD Public Use]

Series is reviewed-by: Evan Quan <evan.quan@amd.com>

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Alex
> Deucher
> Sent: Saturday, May 1, 2021 12:43 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>
> Subject: [PATCH 2/2] drm/amdgpu/pm: add documentation for
> pp_od_clock_voltage for vangogh
> 
> Vangogh follows other APUs, but also allows core clock adjustments.
> 
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>  drivers/gpu/drm/amd/pm/amdgpu_pm.c | 14 +++++++++++++-
>  1 file changed, 13 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> index cbd38f2be958..082b01e872fe 100644
> --- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> +++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> @@ -743,6 +743,15 @@ static ssize_t amdgpu_set_pp_table(struct device
> *dev,
>   *
>   * - a list of valid ranges for sclk labeled OD_RANGE
>   *
> + * < For VanGogh >
> + *
> + * Reading the file will display:
> + *
> + * - minimum and maximum engine clock labeled OD_SCLK
> + * - minimum and maximum core clocks labeled OD_CCLK
> + *
> + * - a list of valid ranges for sclk and cclk labeled OD_RANGE
> + *
>   * To manually adjust these settings:
>   *
>   * - First select manual using power_dpm_force_performance_level
> @@ -751,7 +760,10 @@ static ssize_t amdgpu_set_pp_table(struct device
> *dev,
>   *   string that contains "s/m index clock" to the file. The index
>   *   should be 0 if to set minimum clock. And 1 if to set maximum
>   *   clock. E.g., "s 0 500" will update minimum sclk to be 500 MHz.
> - *   "m 1 800" will update maximum mclk to be 800Mhz.
> + *   "m 1 800" will update maximum mclk to be 800Mhz. For core
> + *   clocks on VanGogh, the string contains "p core index clock".
> + *   E.g., "p 2 0 800" would set the minimum core clock on core
> + *   2 to 800Mhz.
>   *
>   *   For sclk voltage curve, enter the new values by writing a
>   *   string that contains "vc point clock voltage" to the file. The
> --
> 2.30.2
> 
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