All of lore.kernel.org
 help / color / mirror / Atom feed
From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [PATCH v2 04/10] net: mvpp2: remove redundant SMI address configuration
Date: Mon,  3 May 2021 08:08:47 +0200	[thread overview]
Message-ID: <20210503060853.3743626-5-sr@denx.de> (raw)
In-Reply-To: <20210503060853.3743626-1-sr@denx.de>

From: Marcin Wojtas <mw@semihalf.com>

Because the mvpp2 driver now relies on the PHYLIB and
the external MDIO driver, configuring low level
SMI bus settings is redundant.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
---

(no changes since v1)

 drivers/net/mvpp2.c | 12 ------------
 1 file changed, 12 deletions(-)

diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 847007d5b487..2043bdf10aa4 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -5292,14 +5292,6 @@ static int mvpp2_write_hwaddr(struct udevice *dev)
 	return mvpp2_prs_update_mac_da(port, port->dev_addr);
 }
 
-static int mvpp22_smi_phy_addr_cfg(struct mvpp2_port *port)
-{
-	writel(port->phyaddr, port->priv->iface_base +
-	       MVPP22_SMI_PHY_ADDR_REG(port->gop_id));
-
-	return 0;
-}
-
 static int mvpp2_base_probe(struct udevice *dev)
 {
 	struct mvpp2 *priv = dev_get_priv(dev);
@@ -5422,10 +5414,6 @@ static int mvpp2_probe(struct udevice *dev)
 		port->base = priv->iface_base + MVPP22_PORT_BASE +
 			port->gop_id * MVPP22_PORT_OFFSET;
 
-		/* Set phy address of the port */
-		if (port->phyaddr < PHY_MAX_ADDR)
-			mvpp22_smi_phy_addr_cfg(port);
-
 		/* GoP Init */
 		gop_port_init(port);
 	}
-- 
2.31.1

  parent reply	other threads:[~2021-05-03  6:08 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-03  6:08 [PATCH v2 00/10] net: mvpp2: Sync Marvell mvpp2 driver with Marvell version Stefan Roese
2021-05-03  6:08 ` [PATCH v2 01/10] phy: introduce 1000BaseX and 2500BaseX modes Stefan Roese
2021-05-03  6:08 ` [PATCH v2 02/10] net: mvpp2: add CP115 port1 10G/5G SFI support Stefan Roese
2021-05-03  6:08 ` [PATCH v2 03/10] net: mvpp2: add 1000BaseX and 2500BaseX ppv2 support Stefan Roese
2021-05-03 19:41   ` Ramon Fried
2021-05-03  6:08 ` Stefan Roese [this message]
2021-05-03 19:41   ` [PATCH v2 04/10] net: mvpp2: remove redundant SMI address configuration Ramon Fried
2021-05-03  6:08 ` [PATCH v2 05/10] net: mvpp2: Fix 2.5G GMII_SPEED configurations Stefan Roese
2021-05-03  6:08 ` [PATCH v2 06/10] net: mvpp2: AN Bypass in 1000 and 2500 basex mode Stefan Roese
2021-05-03  6:08 ` [PATCH v2 07/10] net: mvpp2: remove unused define MVPP22_SMI_PHY_ADDR_REG Stefan Roese
2021-05-03 19:41   ` Ramon Fried
2021-05-03  6:08 ` [PATCH v2 08/10] net: mvpp2: fix missing switch case break Stefan Roese
2021-05-03 19:41   ` Ramon Fried
2021-05-03  6:08 ` [PATCH v2 09/10] net: mvpp2: allow MDIO registration for fixed links Stefan Roese
2021-05-03  6:08 ` [PATCH v2 10/10] net: mvpp2: add explicit sgmii-2500 support Stefan Roese
2021-05-03 19:41   ` Ramon Fried

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210503060853.3743626-5-sr@denx.de \
    --to=sr@denx.de \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.