From: Maxime Ripard <maxime@cerno.tech> To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>, Thomas Zimmermann <tzimmermann@suse.de>, Maxime Ripard <maxime@cerno.tech>, dri-devel@lists.freedesktop.org, Daniel Vetter <daniel.vetter@intel.com>, David Airlie <airlied@linux.ie> Cc: Eric Anholt <eric@anholt.net>, Nicolas Saenz Julienne <nsaenz@kernel.org>, bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, Dave Stevenson <dave.stevenson@raspberrypi.com>, Phil Elwell <phil@raspberrypi.com>, Tim Gover <tim.gover@raspberrypi.com>, Dom Cobley <dom@raspberrypi.com>, linux-kernel@vger.kernel.org Subject: [PATCH v4 05/12] drm/vc4: crtc: Lookup the encoder from the register at boot Date: Fri, 7 May 2021 17:05:08 +0200 [thread overview] Message-ID: <20210507150515.257424-6-maxime@cerno.tech> (raw) In-Reply-To: <20210507150515.257424-1-maxime@cerno.tech> At boot, we can't rely on the vc4_get_crtc_encoder since we don't have a state yet and thus will not be able to figure out which connector is attached to our CRTC. However, we have a muxing bit in the CRTC register we can use to get the encoder currently connected to the pixelvalve. We can thus read that register, lookup the associated register through the vc4_pv_data structure, and then pass it to vc4_crtc_disable so that we can perform the proper operations. Fixes: 875a4d536842 ("drm/vc4: drv: Disable the CRTC at boot time") Signed-off-by: Maxime Ripard <maxime@cerno.tech> --- drivers/gpu/drm/vc4/vc4_crtc.c | 38 ++++++++++++++++++++++++++++++---- 1 file changed, 34 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c index 36ea684a349b..f715648f89dd 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c @@ -413,11 +413,10 @@ static void require_hvs_enabled(struct drm_device *dev) } static int vc4_crtc_disable(struct drm_crtc *crtc, + struct drm_encoder *encoder, struct drm_atomic_state *state, unsigned int channel) { - struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc, state, - drm_atomic_get_old_connector_state); struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder); struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); struct drm_device *dev = crtc->dev; @@ -458,10 +457,29 @@ static int vc4_crtc_disable(struct drm_crtc *crtc, return 0; } +static struct drm_encoder *vc4_crtc_get_encoder_by_type(struct drm_crtc *crtc, + enum vc4_encoder_type type) +{ + struct drm_encoder *encoder; + + drm_for_each_encoder(encoder, crtc->dev) { + struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder); + + if (vc4_encoder->type == type) + return encoder; + } + + return NULL; +} + int vc4_crtc_disable_at_boot(struct drm_crtc *crtc) { struct drm_device *drm = crtc->dev; struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); + enum vc4_encoder_type encoder_type; + const struct vc4_pv_data *pv_data; + struct drm_encoder *encoder; + unsigned encoder_sel; int channel; if (!(of_device_is_compatible(vc4_crtc->pdev->dev.of_node, @@ -480,7 +498,17 @@ int vc4_crtc_disable_at_boot(struct drm_crtc *crtc) if (channel < 0) return 0; - return vc4_crtc_disable(crtc, NULL, channel); + encoder_sel = VC4_GET_FIELD(CRTC_READ(PV_CONTROL), PV_CONTROL_CLK_SELECT); + if (WARN_ON(encoder_sel != 0)) + return 0; + + pv_data = vc4_crtc_to_vc4_pv_data(vc4_crtc); + encoder_type = pv_data->encoder_types[encoder_sel]; + encoder = vc4_crtc_get_encoder_by_type(crtc, encoder_type); + if (WARN_ON(!encoder)) + return 0; + + return vc4_crtc_disable(crtc, encoder, NULL, channel); } static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, @@ -489,6 +517,8 @@ static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc); struct vc4_crtc_state *old_vc4_state = to_vc4_crtc_state(old_state); + struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc, state, + drm_atomic_get_old_connector_state); struct drm_device *dev = crtc->dev; require_hvs_enabled(dev); @@ -496,7 +526,7 @@ static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, /* Disable vblank irq handling before crtc is disabled. */ drm_crtc_vblank_off(crtc); - vc4_crtc_disable(crtc, state, old_vc4_state->assigned_channel); + vc4_crtc_disable(crtc, encoder, state, old_vc4_state->assigned_channel); /* * Make sure we issue a vblank event after disabling the CRTC if -- 2.31.1
WARNING: multiple messages have this Message-ID (diff)
From: Maxime Ripard <maxime@cerno.tech> To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>, Thomas Zimmermann <tzimmermann@suse.de>, Maxime Ripard <maxime@cerno.tech>, dri-devel@lists.freedesktop.org, Daniel Vetter <daniel.vetter@intel.com>, David Airlie <airlied@linux.ie> Cc: Nicolas Saenz Julienne <nsaenz@kernel.org>, Dom Cobley <dom@raspberrypi.com>, Tim Gover <tim.gover@raspberrypi.com>, Dave Stevenson <dave.stevenson@raspberrypi.com>, linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, Phil Elwell <phil@raspberrypi.com> Subject: [PATCH v4 05/12] drm/vc4: crtc: Lookup the encoder from the register at boot Date: Fri, 7 May 2021 17:05:08 +0200 [thread overview] Message-ID: <20210507150515.257424-6-maxime@cerno.tech> (raw) In-Reply-To: <20210507150515.257424-1-maxime@cerno.tech> At boot, we can't rely on the vc4_get_crtc_encoder since we don't have a state yet and thus will not be able to figure out which connector is attached to our CRTC. However, we have a muxing bit in the CRTC register we can use to get the encoder currently connected to the pixelvalve. We can thus read that register, lookup the associated register through the vc4_pv_data structure, and then pass it to vc4_crtc_disable so that we can perform the proper operations. Fixes: 875a4d536842 ("drm/vc4: drv: Disable the CRTC at boot time") Signed-off-by: Maxime Ripard <maxime@cerno.tech> --- drivers/gpu/drm/vc4/vc4_crtc.c | 38 ++++++++++++++++++++++++++++++---- 1 file changed, 34 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c index 36ea684a349b..f715648f89dd 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c @@ -413,11 +413,10 @@ static void require_hvs_enabled(struct drm_device *dev) } static int vc4_crtc_disable(struct drm_crtc *crtc, + struct drm_encoder *encoder, struct drm_atomic_state *state, unsigned int channel) { - struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc, state, - drm_atomic_get_old_connector_state); struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder); struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); struct drm_device *dev = crtc->dev; @@ -458,10 +457,29 @@ static int vc4_crtc_disable(struct drm_crtc *crtc, return 0; } +static struct drm_encoder *vc4_crtc_get_encoder_by_type(struct drm_crtc *crtc, + enum vc4_encoder_type type) +{ + struct drm_encoder *encoder; + + drm_for_each_encoder(encoder, crtc->dev) { + struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder); + + if (vc4_encoder->type == type) + return encoder; + } + + return NULL; +} + int vc4_crtc_disable_at_boot(struct drm_crtc *crtc) { struct drm_device *drm = crtc->dev; struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); + enum vc4_encoder_type encoder_type; + const struct vc4_pv_data *pv_data; + struct drm_encoder *encoder; + unsigned encoder_sel; int channel; if (!(of_device_is_compatible(vc4_crtc->pdev->dev.of_node, @@ -480,7 +498,17 @@ int vc4_crtc_disable_at_boot(struct drm_crtc *crtc) if (channel < 0) return 0; - return vc4_crtc_disable(crtc, NULL, channel); + encoder_sel = VC4_GET_FIELD(CRTC_READ(PV_CONTROL), PV_CONTROL_CLK_SELECT); + if (WARN_ON(encoder_sel != 0)) + return 0; + + pv_data = vc4_crtc_to_vc4_pv_data(vc4_crtc); + encoder_type = pv_data->encoder_types[encoder_sel]; + encoder = vc4_crtc_get_encoder_by_type(crtc, encoder_type); + if (WARN_ON(!encoder)) + return 0; + + return vc4_crtc_disable(crtc, encoder, NULL, channel); } static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, @@ -489,6 +517,8 @@ static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc); struct vc4_crtc_state *old_vc4_state = to_vc4_crtc_state(old_state); + struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc, state, + drm_atomic_get_old_connector_state); struct drm_device *dev = crtc->dev; require_hvs_enabled(dev); @@ -496,7 +526,7 @@ static void vc4_crtc_atomic_disable(struct drm_crtc *crtc, /* Disable vblank irq handling before crtc is disabled. */ drm_crtc_vblank_off(crtc); - vc4_crtc_disable(crtc, state, old_vc4_state->assigned_channel); + vc4_crtc_disable(crtc, encoder, state, old_vc4_state->assigned_channel); /* * Make sure we issue a vblank event after disabling the CRTC if -- 2.31.1
next prev parent reply other threads:[~2021-05-07 15:05 UTC|newest] Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-07 15:05 [PATCH v4 00/12] drm/vc4: hdmi: Support the 4k @ 60Hz modes Maxime Ripard 2021-05-07 15:05 ` Maxime Ripard 2021-05-07 15:05 ` [PATCH v4 01/12] drm/vc4: txp: Properly set the possible_crtcs mask Maxime Ripard 2021-05-07 15:05 ` Maxime Ripard 2021-05-07 15:05 ` [PATCH v4 02/12] drm/vc4: crtc: Skip the TXP Maxime Ripard 2021-05-07 15:05 ` Maxime Ripard 2021-05-07 15:05 ` [PATCH v4 03/12] drm/vc4: crtc: Pass the drm_atomic_state to config_pv Maxime Ripard 2021-05-07 15:05 ` Maxime Ripard 2021-05-21 17:26 ` Dave Stevenson 2021-05-21 17:26 ` Dave Stevenson 2021-05-07 15:05 ` [PATCH v4 04/12] drm/vc4: crtc: Fix vc4_get_crtc_encoder logic Maxime Ripard 2021-05-07 15:05 ` Maxime Ripard 2021-05-21 17:54 ` Dave Stevenson 2021-05-21 17:54 ` Dave Stevenson 2021-05-07 15:05 ` Maxime Ripard [this message] 2021-05-07 15:05 ` [PATCH v4 05/12] drm/vc4: crtc: Lookup the encoder from the register at boot Maxime Ripard 2021-05-21 17:58 ` Dave Stevenson 2021-05-21 17:58 ` Dave Stevenson 2021-05-07 15:05 ` [PATCH v4 06/12] drm/vc4: hdmi: Prevent clock unbalance Maxime Ripard 2021-05-07 15:05 ` Maxime Ripard 2021-05-21 18:05 ` Dave Stevenson 2021-05-21 18:05 ` Dave Stevenson 2021-05-07 15:05 ` [PATCH v4 07/12] drm/vc4: hvs: Make the HVS bind first Maxime Ripard 2021-05-07 15:05 ` Maxime Ripard 2021-05-07 15:05 ` [PATCH v4 08/12] drm/vc4: hdmi: Properly compute the BVB clock rate Maxime Ripard 2021-05-07 15:05 ` Maxime Ripard 2021-05-07 15:05 ` [PATCH v4 09/12] drm/vc4: hdmi: Check and warn if we can't reach 4kp60 frequencies Maxime Ripard 2021-05-07 15:05 ` Maxime Ripard 2021-05-07 15:05 ` [PATCH v4 10/12] drm/vc4: hdmi: Enable the scrambler Maxime Ripard 2021-05-07 15:05 ` Maxime Ripard 2021-05-21 17:39 ` Dave Stevenson 2021-05-21 17:39 ` Dave Stevenson 2021-05-07 15:05 ` [PATCH v4 11/12] drm/vc4: hdmi: Add a workqueue to set scrambling Maxime Ripard 2021-05-07 15:05 ` Maxime Ripard 2021-05-21 17:43 ` Dave Stevenson 2021-05-21 17:43 ` Dave Stevenson 2021-05-07 15:05 ` [PATCH v4 12/12] drm/vc4: hdmi: Raise the maximum clock rate Maxime Ripard 2021-05-07 15:05 ` Maxime Ripard 2021-05-24 12:45 ` [PATCH v4 00/12] drm/vc4: hdmi: Support the 4k @ 60Hz modes Maxime Ripard 2021-05-24 12:45 ` Maxime Ripard
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