From: Yazen Ghannam <Yazen.Ghannam@amd.com>
To: linux-edac@vger.kernel.org
Cc: Yazen Ghannam <Yazen.Ghannam@amd.com>,
linux-kernel@vger.kernel.org, tony.luck@intel.com,
x86@kernel.org, Smita.KoralahalliChannabasappa@amd.com
Subject: [PATCH 00/25] AMD MCA Address Translation Updates
Date: Fri, 7 May 2021 15:01:15 -0400 [thread overview]
Message-ID: <20210507190140.18854-1-Yazen.Ghannam@amd.com> (raw)
From: Yazen Ghannam <yazen.ghannam@amd.com>
This patchset refactors the AMD MCA Address Translation code and adds
support for newer systems. This patchset was written from scratch
compared to previous patchsets.
The reference code was recently refactored in preparation for updates
for future systems. These patches try to follow the reference code as
closely as possible. I also tried to address comments from previous
patchset reviews.
Patches 1-24 do the refactor without adding new system support. The goal
is to break down the translation algorithm into smaller chunks. There
are some simple wrapper functions defined. These will be filled in when
supporting newer systems. The intention is that new system support can
be added without any major refactor. I tried to make a patch for each
logical change. There's a bit of churn so as to not break the build with
each change. I think many of these patches can be squashed together, if
desired. The top level function was split first, then the next level of
functions, etc. in a somewhat breadth-first approach.
Patch 25 adds support for systems with Data Fabric version 3 (Rome and
later).
Each patch was build tested individually. The entire set was
functionally tested with the following modes.
Naples:
No interleaving
Channel interleaving
Die interleaving
Socket interleaving
Rome:
No interleaving
Nodes-per-Socket 0 (NPS0)
Nodes-per-Socket 1 (NPS1)
Nodes-per-Socket 2 (NPS2)
Nodes-per-Socket 4 (NPS4)
NPS2 w/o hashing
NPS4 w/o hashing
Thanks,
Yazen
Link:
https://lkml.kernel.org/r/20200903200144.310991-1-Yazen.Ghannam@amd.com
Yazen Ghannam (25):
x86/MCE/AMD: Don't use naked values for DF registers
x86/MCE/AMD: Add context struct
x86/MCE/AMD: Define functions for DramOffset
x86/MCE/AMD: Define function to read DRAM address map registers
x86/MCE/AMD: Define function to find interleaving mode
x86/MCE/AMD: Define function to denormalize address
x86/MCE/AMD: Define function to add DRAM base and hole
x86/MCE/AMD: Define function to dehash address
x86/MCE/AMD: Define function to check DRAM limit address
x86/MCE/AMD: Remove goto statements
x86/MCE/AMD: Simplify function parameters
x86/MCE/AMD: Define function to get Interleave Address Bit
x86/MCE/AMD: Skip denormalization if no interleaving
x86/MCE/AMD: Define function to get number of interleaved channels
x86/MCE/AMD: Define function to get number of interleaved dies
x86/MCE/AMD: Define function to get number of interleaved sockets
x86/MCE/AMD: Remove unnecessary assert
x86/MCE/AMD: Define function to make space for CS ID
x86/MCE/AMD: Define function to calculate CS ID
x86/MCE/AMD: Define function to insert CS ID into address
x86/MCE/AMD: Define function to get CS Fabric ID
x86/MCE/AMD: Define function to find shift and mask values
x86/MCE/AMD: Update CS ID calculation to match reference code
x86/MCE/AMD: Match hash function to reference code
x86/MCE/AMD: Add support for address translation on DF3 systems
arch/x86/include/asm/amd_nb.h | 7 +-
arch/x86/include/asm/mce.h | 5 +-
arch/x86/kernel/amd_nb.c | 6 +-
arch/x86/kernel/cpu/mce/amd.c | 681 +++++++++++++++++++++++++++-------
drivers/edac/amd64_edac.c | 4 +-
5 files changed, 555 insertions(+), 148 deletions(-)
--
2.25.1
next reply other threads:[~2021-05-07 19:01 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-07 19:01 Yazen Ghannam [this message]
2021-05-07 19:01 ` [PATCH 01/25] x86/MCE/AMD: Don't use naked values for DF registers Yazen Ghannam
2021-05-07 19:01 ` [PATCH 02/25] x86/MCE/AMD: Add context struct Yazen Ghannam
2021-05-07 19:01 ` [PATCH 03/25] x86/MCE/AMD: Define functions for DramOffset Yazen Ghannam
2021-05-07 19:01 ` [PATCH 04/25] x86/MCE/AMD: Define function to read DRAM address map registers Yazen Ghannam
2021-05-07 19:01 ` [PATCH 05/25] x86/MCE/AMD: Define function to find interleaving mode Yazen Ghannam
2021-05-07 19:01 ` [PATCH 06/25] x86/MCE/AMD: Define function to denormalize address Yazen Ghannam
2021-05-07 19:01 ` [PATCH 07/25] x86/MCE/AMD: Define function to add DRAM base and hole Yazen Ghannam
2021-05-07 19:01 ` [PATCH 08/25] x86/MCE/AMD: Define function to dehash address Yazen Ghannam
2021-05-07 19:01 ` [PATCH 09/25] x86/MCE/AMD: Define function to check DRAM limit address Yazen Ghannam
2021-05-07 19:01 ` [PATCH 10/25] x86/MCE/AMD: Remove goto statements Yazen Ghannam
2021-05-07 19:01 ` [PATCH 11/25] x86/MCE/AMD: Simplify function parameters Yazen Ghannam
2021-05-07 19:01 ` [PATCH 12/25] x86/MCE/AMD: Define function to get Interleave Address Bit Yazen Ghannam
2021-05-07 19:01 ` [PATCH 13/25] x86/MCE/AMD: Skip denormalization if no interleaving Yazen Ghannam
2021-05-07 19:01 ` [PATCH 14/25] x86/MCE/AMD: Define function to get number of interleaved channels Yazen Ghannam
2021-05-07 19:01 ` [PATCH 15/25] x86/MCE/AMD: Define function to get number of interleaved dies Yazen Ghannam
2021-05-07 19:01 ` [PATCH 16/25] x86/MCE/AMD: Define function to get number of interleaved sockets Yazen Ghannam
2021-05-07 19:01 ` [PATCH 17/25] x86/MCE/AMD: Remove unnecessary assert Yazen Ghannam
2021-05-07 19:01 ` [PATCH 18/25] x86/MCE/AMD: Define function to make space for CS ID Yazen Ghannam
2021-05-07 19:01 ` [PATCH 19/25] x86/MCE/AMD: Define function to calculate " Yazen Ghannam
2021-05-07 19:01 ` [PATCH 20/25] x86/MCE/AMD: Define function to insert CS ID into address Yazen Ghannam
2021-05-07 19:01 ` [PATCH 21/25] x86/MCE/AMD: Define function to get CS Fabric ID Yazen Ghannam
2021-05-07 19:01 ` [PATCH 22/25] x86/MCE/AMD: Define function to find shift and mask values Yazen Ghannam
2021-05-07 19:01 ` [PATCH 23/25] x86/MCE/AMD: Update CS ID calculation to match reference code Yazen Ghannam
2021-05-07 19:01 ` [PATCH 24/25] x86/MCE/AMD: Match hash function to " Yazen Ghannam
2021-05-07 19:01 ` [PATCH 25/25] x86/MCE/AMD: Add support for address translation on DF3 systems Yazen Ghannam
2021-05-07 20:32 ` [PATCH 00/25] AMD MCA Address Translation Updates Randy Dunlap
2021-05-11 15:42 ` Yazen Ghannam
2021-05-11 16:13 ` Randy Dunlap
2021-05-11 16:28 ` Borislav Petkov
2021-05-17 12:57 ` Borislav Petkov
2021-05-19 3:52 ` Yazen Ghannam
2021-05-19 14:32 ` Borislav Petkov
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