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From: Yazen Ghannam <Yazen.Ghannam@amd.com>
To: linux-edac@vger.kernel.org
Cc: Yazen Ghannam <Yazen.Ghannam@amd.com>,
	linux-kernel@vger.kernel.org, tony.luck@intel.com,
	x86@kernel.org, Smita.KoralahalliChannabasappa@amd.com
Subject: [PATCH 19/25] x86/MCE/AMD: Define function to calculate CS ID
Date: Fri,  7 May 2021 15:01:34 -0400	[thread overview]
Message-ID: <20210507190140.18854-20-Yazen.Ghannam@amd.com> (raw)
In-Reply-To: <20210507190140.18854-1-Yazen.Ghannam@amd.com>

From: Yazen Ghannam <yazen.ghannam@amd.com>

Move code used to calculate the CS ID into a separate helper function.

Drop redundant code comment about reading DF register.

The "num_intlv_bits" variable is left uninitialized as it will be removed
in a later patch.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
 arch/x86/kernel/cpu/mce/amd.c | 97 +++++++++++++++++------------------
 1 file changed, 48 insertions(+), 49 deletions(-)

diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
index ba365901e39d..ae49cef4792f 100644
--- a/arch/x86/kernel/cpu/mce/amd.c
+++ b/arch/x86/kernel/cpu/mce/amd.c
@@ -892,12 +892,54 @@ static void make_space_for_cs_id(struct addr_ctx *ctx)
 	}
 }
 
-static int denormalize_addr(struct addr_ctx *ctx)
+static int calculate_cs_id(struct addr_ctx *ctx)
 {
+	u8 die_id_shift, die_id_mask, socket_id_shift, socket_id_mask;
+	u8 die_id_bit, sock_id_bit, cs_fabric_id, cs_mask = 0;
 	u32 tmp;
 
-	u8 die_id_shift, die_id_mask, socket_id_shift, socket_id_mask;
-	u8 num_intlv_bits, cs_mask = 0;
+	if (amd_df_indirect_read(ctx->nid, df_regs[FAB_BLK_INST_INFO_3], ctx->umc, &tmp))
+		return -EINVAL;
+
+	cs_fabric_id = (tmp >> 8) & 0xFF;
+	die_id_bit   = 0;
+
+	/* If interleaved over more than 1 channel: */
+	if (ctx->intlv_num_chan) {
+		die_id_bit = ctx->intlv_num_chan;
+		cs_mask	   = (1 << die_id_bit) - 1;
+		ctx->cs_id = cs_fabric_id & cs_mask;
+	}
+
+	sock_id_bit = die_id_bit;
+
+	if (ctx->intlv_num_dies || ctx->intlv_num_sockets)
+		if (amd_df_indirect_read(ctx->nid, df_regs[SYS_FAB_ID_MASK], ctx->umc, &tmp))
+			return -EINVAL;
+
+	/* If interleaved over more than 1 die: */
+	if (ctx->intlv_num_dies) {
+		sock_id_bit  = die_id_bit + ctx->intlv_num_dies;
+		die_id_shift = (tmp >> 24) & 0xF;
+		die_id_mask  = (tmp >> 8) & 0xFF;
+
+		ctx->cs_id |= ((cs_fabric_id & die_id_mask) >> die_id_shift) << die_id_bit;
+	}
+
+	/* If interleaved over more than 1 socket: */
+	if (ctx->intlv_num_sockets) {
+		socket_id_shift	= (tmp >> 28) & 0xF;
+		socket_id_mask	= (tmp >> 16) & 0xFF;
+
+		ctx->cs_id |= ((cs_fabric_id & socket_id_mask) >> socket_id_shift) << sock_id_bit;
+	}
+
+	return 0;
+}
+
+static int denormalize_addr(struct addr_ctx *ctx)
+{
+	u8 num_intlv_bits;
 
 	/* Return early if no interleaving. */
 	if (ctx->intlv_mode == NONE)
@@ -912,55 +954,12 @@ static int denormalize_addr(struct addr_ctx *ctx)
 
 	make_space_for_cs_id(ctx);
 
+	if (calculate_cs_id(ctx))
+		return -EINVAL;
+
 	if (num_intlv_bits > 0) {
-		u8 die_id_bit, sock_id_bit, cs_fabric_id;
 		u64 temp_addr_i;
 
-		/*
-		 * Read FabricBlockInstanceInformation3_CS[BlockFabricID].
-		 * This is the fabric id for this coherent slave. Use
-		 * umc/channel# as instance id of the coherent slave
-		 * for FICAA.
-		 */
-		if (amd_df_indirect_read(ctx->nid, df_regs[FAB_BLK_INST_INFO_3], ctx->umc, &tmp))
-			return -EINVAL;
-
-		cs_fabric_id = (tmp >> 8) & 0xFF;
-		die_id_bit   = 0;
-
-		/* If interleaved over more than 1 channel: */
-		if (ctx->intlv_num_chan) {
-			die_id_bit = ctx->intlv_num_chan;
-			cs_mask	   = (1 << die_id_bit) - 1;
-			ctx->cs_id = cs_fabric_id & cs_mask;
-		}
-
-		sock_id_bit = die_id_bit;
-
-		if (ctx->intlv_num_dies || ctx->intlv_num_sockets)
-			if (amd_df_indirect_read(ctx->nid, df_regs[SYS_FAB_ID_MASK],
-						 ctx->umc, &tmp))
-				return -EINVAL;
-
-		/* If interleaved over more than 1 die. */
-		if (ctx->intlv_num_dies) {
-			sock_id_bit  = die_id_bit + ctx->intlv_num_dies;
-			die_id_shift = (tmp >> 24) & 0xF;
-			die_id_mask  = (tmp >> 8) & 0xFF;
-
-			ctx->cs_id |= ((cs_fabric_id & die_id_mask)
-					>> die_id_shift) << die_id_bit;
-		}
-
-		/* If interleaved over more than 1 socket. */
-		if (ctx->intlv_num_sockets) {
-			socket_id_shift	= (tmp >> 28) & 0xF;
-			socket_id_mask	= (tmp >> 16) & 0xFF;
-
-			ctx->cs_id |= ((cs_fabric_id & socket_id_mask)
-					>> socket_id_shift) << sock_id_bit;
-		}
-
 		/*
 		 * The pre-interleaved address consists of XXXXXXIIIYYYYY
 		 * where III is the ID for this CS, and XXXXXXYYYYY are the
-- 
2.25.1


  parent reply	other threads:[~2021-05-07 19:03 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-07 19:01 [PATCH 00/25] AMD MCA Address Translation Updates Yazen Ghannam
2021-05-07 19:01 ` [PATCH 01/25] x86/MCE/AMD: Don't use naked values for DF registers Yazen Ghannam
2021-05-07 19:01 ` [PATCH 02/25] x86/MCE/AMD: Add context struct Yazen Ghannam
2021-05-07 19:01 ` [PATCH 03/25] x86/MCE/AMD: Define functions for DramOffset Yazen Ghannam
2021-05-07 19:01 ` [PATCH 04/25] x86/MCE/AMD: Define function to read DRAM address map registers Yazen Ghannam
2021-05-07 19:01 ` [PATCH 05/25] x86/MCE/AMD: Define function to find interleaving mode Yazen Ghannam
2021-05-07 19:01 ` [PATCH 06/25] x86/MCE/AMD: Define function to denormalize address Yazen Ghannam
2021-05-07 19:01 ` [PATCH 07/25] x86/MCE/AMD: Define function to add DRAM base and hole Yazen Ghannam
2021-05-07 19:01 ` [PATCH 08/25] x86/MCE/AMD: Define function to dehash address Yazen Ghannam
2021-05-07 19:01 ` [PATCH 09/25] x86/MCE/AMD: Define function to check DRAM limit address Yazen Ghannam
2021-05-07 19:01 ` [PATCH 10/25] x86/MCE/AMD: Remove goto statements Yazen Ghannam
2021-05-07 19:01 ` [PATCH 11/25] x86/MCE/AMD: Simplify function parameters Yazen Ghannam
2021-05-07 19:01 ` [PATCH 12/25] x86/MCE/AMD: Define function to get Interleave Address Bit Yazen Ghannam
2021-05-07 19:01 ` [PATCH 13/25] x86/MCE/AMD: Skip denormalization if no interleaving Yazen Ghannam
2021-05-07 19:01 ` [PATCH 14/25] x86/MCE/AMD: Define function to get number of interleaved channels Yazen Ghannam
2021-05-07 19:01 ` [PATCH 15/25] x86/MCE/AMD: Define function to get number of interleaved dies Yazen Ghannam
2021-05-07 19:01 ` [PATCH 16/25] x86/MCE/AMD: Define function to get number of interleaved sockets Yazen Ghannam
2021-05-07 19:01 ` [PATCH 17/25] x86/MCE/AMD: Remove unnecessary assert Yazen Ghannam
2021-05-07 19:01 ` [PATCH 18/25] x86/MCE/AMD: Define function to make space for CS ID Yazen Ghannam
2021-05-07 19:01 ` Yazen Ghannam [this message]
2021-05-07 19:01 ` [PATCH 20/25] x86/MCE/AMD: Define function to insert CS ID into address Yazen Ghannam
2021-05-07 19:01 ` [PATCH 21/25] x86/MCE/AMD: Define function to get CS Fabric ID Yazen Ghannam
2021-05-07 19:01 ` [PATCH 22/25] x86/MCE/AMD: Define function to find shift and mask values Yazen Ghannam
2021-05-07 19:01 ` [PATCH 23/25] x86/MCE/AMD: Update CS ID calculation to match reference code Yazen Ghannam
2021-05-07 19:01 ` [PATCH 24/25] x86/MCE/AMD: Match hash function to " Yazen Ghannam
2021-05-07 19:01 ` [PATCH 25/25] x86/MCE/AMD: Add support for address translation on DF3 systems Yazen Ghannam
2021-05-07 20:32 ` [PATCH 00/25] AMD MCA Address Translation Updates Randy Dunlap
2021-05-11 15:42   ` Yazen Ghannam
2021-05-11 16:13     ` Randy Dunlap
2021-05-11 16:28       ` Borislav Petkov
2021-05-17 12:57 ` Borislav Petkov
2021-05-19  3:52   ` Yazen Ghannam
2021-05-19 14:32     ` Borislav Petkov

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