* [igt-dev] [PATCH i-g-t 00/12] DG1/LMEM uAPI basics
@ 2021-05-11 16:51 ` Matthew Auld
0 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev; +Cc: thomas.hellstrom, intel-gfx, petri.latvala, daniel
Just the really basic stuff, which unlocks adding more interesting testcases
later, like gem_lmem_swapping.
On the kernel side we landed the uAPI bits[1] behind CONFIG_BROKEN, which is
already enabled in CI builds, so it should be possible to get some more BAT
testing(outside of just the selftests) on DG1 to the point where we can start to
exercise the LMEM paths with the new bits of uAPI.
[1] https://patchwork.freedesktop.org/series/89648/
Andrzej Turko (6):
lib/i915/gem_create: Add gem_create_ext
lib/i915/intel_memory_region: Add memory regions stubs
tests/i915/gem_exec_basic: Use memory region interface
tests/i915/gem_gpgpu_fill: Use memory region interface
tests/i915/gem_media_fill: Use memory region interface
Synchronize memory region uapi and tests with i915_drm.h
Dominik Grzegorzek (1):
tests/gem_gpgpu_fill: Convert from simple to standard igt_main
Kalamarz, Lukasz (1):
tests/i915/gem_exec_basic/dg1: Iterate over all memory regions
Lukasz Kalamarz (1):
lib/i915/intel_memory_region/dg1: Add new lib to query memory region
Matthew Auld (2):
i915_drm.h sync
tests/i915/gem_create: exercise placements extension
Zbigniew Kempczyński (1):
lib/i915/intel_memory_region: Add new macros and support for
igt_collection
benchmarks/gem_blt.c | 2 +-
benchmarks/gem_busy.c | 2 +-
benchmarks/gem_create.c | 2 +-
benchmarks/gem_exec_ctx.c | 2 +-
benchmarks/gem_exec_fault.c | 2 +-
benchmarks/gem_exec_nop.c | 2 +-
benchmarks/gem_exec_reloc.c | 2 +-
benchmarks/gem_exec_trace.c | 2 +-
benchmarks/gem_latency.c | 2 +-
benchmarks/gem_prw.c | 2 +-
benchmarks/gem_set_domain.c | 2 +-
benchmarks/gem_syslatency.c | 2 +-
benchmarks/gem_wsim.c | 2 +-
benchmarks/prime_lookup.c | 2 +-
include/drm-uapi/i915_drm.h | 394 +++++++++++++++++++--
lib/i915/gem.h | 3 -
lib/i915/gem_create.c | 43 ++-
lib/i915/gem_create.h | 19 +
lib/i915/gem_mman.c | 2 +-
lib/i915/gem_ring.c | 1 +
lib/i915/gem_submission.c | 1 +
lib/i915/intel_memory_region.c | 441 ++++++++++++++++++++++++
lib/i915/intel_memory_region.h | 130 +++++++
lib/igt_draw.c | 2 +-
lib/igt_dummyload.c | 2 +-
lib/igt_fb.c | 2 +-
lib/intel_batchbuffer.c | 2 +-
lib/intel_bufops.c | 2 +-
lib/ioctl_wrappers.c | 2 +-
lib/ioctl_wrappers.h | 1 +
lib/meson.build | 1 +
tests/amdgpu/amd_prime.c | 1 +
tests/core_hotunplug.c | 1 +
tests/i915/api_intel_allocator.c | 1 +
tests/i915/api_intel_bb.c | 1 +
tests/i915/gem_bad_reloc.c | 1 +
tests/i915/gem_basic.c | 2 +-
tests/i915/gem_blits.c | 1 +
tests/i915/gem_busy.c | 1 +
tests/i915/gem_close.c | 1 +
tests/i915/gem_close_race.c | 1 +
tests/i915/gem_concurrent_all.c | 1 +
tests/i915/gem_create.c | 189 ++++++++++
tests/i915/gem_cs_tlb.c | 1 +
tests/i915/gem_ctx_clone.c | 1 +
tests/i915/gem_ctx_create.c | 1 +
tests/i915/gem_ctx_engines.c | 1 +
tests/i915/gem_ctx_exec.c | 1 +
tests/i915/gem_ctx_isolation.c | 1 +
tests/i915/gem_ctx_param.c | 1 +
tests/i915/gem_ctx_shared.c | 1 +
tests/i915/gem_ctx_sseu.c | 1 +
tests/i915/gem_ctx_switch.c | 1 +
tests/i915/gem_eio.c | 1 +
tests/i915/gem_evict_alignment.c | 1 +
tests/i915/gem_evict_everything.c | 1 +
tests/i915/gem_exec_alignment.c | 1 +
tests/i915/gem_exec_async.c | 1 +
tests/i915/gem_exec_await.c | 1 +
tests/i915/gem_exec_balancer.c | 1 +
tests/i915/gem_exec_basic.c | 53 ++-
tests/i915/gem_exec_big.c | 1 +
tests/i915/gem_exec_capture.c | 1 +
tests/i915/gem_exec_create.c | 1 +
tests/i915/gem_exec_endless.c | 1 +
tests/i915/gem_exec_fair.c | 1 +
tests/i915/gem_exec_fence.c | 1 +
tests/i915/gem_exec_flush.c | 1 +
tests/i915/gem_exec_gttfill.c | 1 +
tests/i915/gem_exec_latency.c | 1 +
tests/i915/gem_exec_lut_handle.c | 1 +
tests/i915/gem_exec_nop.c | 1 +
tests/i915/gem_exec_parallel.c | 1 +
tests/i915/gem_exec_params.c | 1 +
tests/i915/gem_exec_reloc.c | 1 +
tests/i915/gem_exec_schedule.c | 1 +
tests/i915/gem_exec_store.c | 1 +
tests/i915/gem_exec_suspend.c | 1 +
tests/i915/gem_exec_whisper.c | 1 +
tests/i915/gem_fd_exhaustion.c | 2 +-
tests/i915/gem_fence_thrash.c | 2 +-
tests/i915/gem_fence_upload.c | 2 +-
tests/i915/gem_fenced_exec_thrash.c | 1 +
tests/i915/gem_flink_race.c | 2 +-
tests/i915/gem_gpgpu_fill.c | 61 +++-
tests/i915/gem_gtt_cpu_tlb.c | 2 +-
tests/i915/gem_gtt_hog.c | 1 +
tests/i915/gem_gtt_speed.c | 2 +-
tests/i915/gem_huc_copy.c | 1 +
tests/i915/gem_linear_blits.c | 1 +
tests/i915/gem_lut_handle.c | 2 +-
tests/i915/gem_madvise.c | 2 +-
tests/i915/gem_media_fill.c | 57 ++-
tests/i915/gem_mmap.c | 2 +-
tests/i915/gem_mmap_gtt.c | 1 +
tests/i915/gem_mmap_offset.c | 1 +
tests/i915/gem_mmap_wc.c | 2 +-
tests/i915/gem_ppgtt.c | 1 +
tests/i915/gem_pread.c | 2 +-
tests/i915/gem_pwrite.c | 2 +-
tests/i915/gem_readwrite.c | 2 +-
tests/i915/gem_reset_stats.c | 1 +
tests/i915/gem_ringfill.c | 1 +
tests/i915/gem_set_tiling_vs_gtt.c | 2 +-
tests/i915/gem_set_tiling_vs_pwrite.c | 2 +-
tests/i915/gem_shrink.c | 1 +
tests/i915/gem_softpin.c | 1 +
tests/i915/gem_streaming_writes.c | 1 +
tests/i915/gem_sync.c | 1 +
tests/i915/gem_tiled_fence_blits.c | 1 +
tests/i915/gem_tiled_pread_basic.c | 2 +-
tests/i915/gem_tiled_pread_pwrite.c | 2 +-
tests/i915/gem_tiled_swapping.c | 2 +-
tests/i915/gem_tiled_wb.c | 2 +-
tests/i915/gem_tiled_wc.c | 2 +-
tests/i915/gem_tiling_max_stride.c | 2 +-
tests/i915/gem_unfence_active_buffers.c | 1 +
tests/i915/gem_unref_active_buffers.c | 1 +
tests/i915/gem_userptr_blits.c | 1 +
tests/i915/gem_vm_create.c | 1 +
tests/i915/gem_wait.c | 1 +
tests/i915/gem_watchdog.c | 1 +
tests/i915/gem_workarounds.c | 1 +
tests/i915/gen3_mixed_blits.c | 1 +
tests/i915/gen3_render_linear_blits.c | 1 +
tests/i915/gen3_render_mixed_blits.c | 1 +
tests/i915/gen3_render_tiledx_blits.c | 1 +
tests/i915/gen3_render_tiledy_blits.c | 1 +
tests/i915/gen7_exec_parse.c | 1 +
tests/i915/gen9_exec_parse.c | 1 +
tests/i915/i915_hangman.c | 1 +
tests/i915/i915_module_load.c | 2 +-
tests/i915/i915_pm_rc6_residency.c | 1 +
tests/i915/i915_pm_rpm.c | 1 +
tests/i915/i915_suspend.c | 1 +
tests/i915/perf_pmu.c | 1 +
tests/i915/sysfs_clients.c | 1 +
tests/i915/sysfs_timeslice_duration.c | 1 +
tests/kms_big_fb.c | 2 +-
tests/kms_ccs.c | 2 +-
tests/kms_flip.c | 2 +-
tests/kms_frontbuffer_tracking.c | 1 +
tests/kms_getfb.c | 2 +-
tests/prime_busy.c | 1 +
tests/prime_mmap.c | 2 +-
tests/prime_mmap_kms.c | 2 +-
tests/prime_self_import.c | 2 +-
tests/prime_vgem.c | 1 +
tools/intel_reg.c | 2 +-
149 files changed, 1447 insertions(+), 134 deletions(-)
create mode 100644 lib/i915/gem_create.h
create mode 100644 lib/i915/intel_memory_region.c
create mode 100644 lib/i915/intel_memory_region.h
--
2.26.3
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^ permalink raw reply [flat|nested] 39+ messages in thread* [Intel-gfx] [PATCH i-g-t 01/12] lib/i915/gem_create: Add gem_create_ext
2021-05-11 16:51 ` [igt-dev] " Matthew Auld
@ 2021-05-11 16:51 ` Matthew Auld
-1 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev
Cc: thomas.hellstrom, Dominik Grzegorzek, intel-gfx, Chris P Wilson,
Andrzej Turko
From: Andrzej Turko <andrzej.turko@linux.intel.com>
Add a wrapper for gem_create_ext ioctl (a version of gem_create that
accepts extensions). In preparation for the driver change implementing it,
a local definition of its id and necessary structs have been added,
which are to be erased as soon as those definitions
appear in the i915_drm.h file.
The new ioctl wrapper is added to a separate file.
For consistency the wrapper of the old ioctl, gem_create
is moved from ioctl_wrappers to gem_create.
Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com>
Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Chris P Wilson <chris.p.wilson@intel.com>
---
benchmarks/gem_blt.c | 2 +-
benchmarks/gem_busy.c | 2 +-
benchmarks/gem_create.c | 2 +-
benchmarks/gem_exec_ctx.c | 2 +-
benchmarks/gem_exec_fault.c | 2 +-
benchmarks/gem_exec_nop.c | 2 +-
benchmarks/gem_exec_reloc.c | 2 +-
benchmarks/gem_exec_trace.c | 2 +-
benchmarks/gem_latency.c | 2 +-
benchmarks/gem_prw.c | 2 +-
benchmarks/gem_set_domain.c | 2 +-
benchmarks/gem_syslatency.c | 2 +-
benchmarks/gem_wsim.c | 2 +-
benchmarks/prime_lookup.c | 2 +-
lib/i915/gem.h | 3 -
lib/i915/gem_create.c | 43 +++++++-
lib/i915/gem_create.h | 125 ++++++++++++++++++++++++
lib/i915/gem_mman.c | 2 +-
lib/i915/gem_ring.c | 1 +
lib/i915/gem_submission.c | 1 +
lib/igt_draw.c | 2 +-
lib/igt_dummyload.c | 2 +-
lib/igt_fb.c | 2 +-
lib/intel_batchbuffer.c | 2 +-
lib/intel_bufops.c | 2 +-
lib/ioctl_wrappers.c | 2 +-
tests/amdgpu/amd_prime.c | 1 +
tests/core_hotunplug.c | 1 +
tests/i915/api_intel_allocator.c | 1 +
tests/i915/api_intel_bb.c | 1 +
tests/i915/gem_bad_reloc.c | 1 +
tests/i915/gem_basic.c | 2 +-
tests/i915/gem_blits.c | 1 +
tests/i915/gem_busy.c | 1 +
tests/i915/gem_close.c | 1 +
tests/i915/gem_close_race.c | 1 +
tests/i915/gem_concurrent_all.c | 1 +
tests/i915/gem_create.c | 1 +
tests/i915/gem_cs_tlb.c | 1 +
tests/i915/gem_ctx_clone.c | 1 +
tests/i915/gem_ctx_create.c | 1 +
tests/i915/gem_ctx_engines.c | 1 +
tests/i915/gem_ctx_exec.c | 1 +
tests/i915/gem_ctx_isolation.c | 1 +
tests/i915/gem_ctx_param.c | 1 +
tests/i915/gem_ctx_shared.c | 1 +
tests/i915/gem_ctx_sseu.c | 1 +
tests/i915/gem_ctx_switch.c | 1 +
tests/i915/gem_eio.c | 1 +
tests/i915/gem_evict_alignment.c | 1 +
tests/i915/gem_evict_everything.c | 1 +
tests/i915/gem_exec_alignment.c | 1 +
tests/i915/gem_exec_async.c | 1 +
tests/i915/gem_exec_await.c | 1 +
tests/i915/gem_exec_balancer.c | 1 +
tests/i915/gem_exec_basic.c | 2 +-
tests/i915/gem_exec_big.c | 1 +
tests/i915/gem_exec_capture.c | 1 +
tests/i915/gem_exec_create.c | 1 +
tests/i915/gem_exec_endless.c | 1 +
tests/i915/gem_exec_fair.c | 1 +
tests/i915/gem_exec_fence.c | 1 +
tests/i915/gem_exec_flush.c | 1 +
tests/i915/gem_exec_gttfill.c | 1 +
tests/i915/gem_exec_latency.c | 1 +
tests/i915/gem_exec_lut_handle.c | 1 +
tests/i915/gem_exec_nop.c | 1 +
tests/i915/gem_exec_parallel.c | 1 +
tests/i915/gem_exec_params.c | 1 +
tests/i915/gem_exec_reloc.c | 1 +
tests/i915/gem_exec_schedule.c | 1 +
tests/i915/gem_exec_store.c | 1 +
tests/i915/gem_exec_suspend.c | 1 +
tests/i915/gem_exec_whisper.c | 1 +
tests/i915/gem_fd_exhaustion.c | 2 +-
tests/i915/gem_fence_thrash.c | 2 +-
tests/i915/gem_fence_upload.c | 2 +-
tests/i915/gem_fenced_exec_thrash.c | 1 +
tests/i915/gem_flink_race.c | 2 +-
tests/i915/gem_gtt_cpu_tlb.c | 2 +-
tests/i915/gem_gtt_hog.c | 1 +
tests/i915/gem_gtt_speed.c | 2 +-
tests/i915/gem_huc_copy.c | 1 +
tests/i915/gem_linear_blits.c | 1 +
tests/i915/gem_lut_handle.c | 2 +-
tests/i915/gem_madvise.c | 2 +-
tests/i915/gem_mmap.c | 2 +-
tests/i915/gem_mmap_gtt.c | 1 +
tests/i915/gem_mmap_offset.c | 1 +
tests/i915/gem_mmap_wc.c | 2 +-
tests/i915/gem_ppgtt.c | 1 +
tests/i915/gem_pread.c | 2 +-
tests/i915/gem_pwrite.c | 2 +-
tests/i915/gem_readwrite.c | 2 +-
tests/i915/gem_reset_stats.c | 1 +
tests/i915/gem_ringfill.c | 1 +
tests/i915/gem_set_tiling_vs_gtt.c | 2 +-
tests/i915/gem_set_tiling_vs_pwrite.c | 2 +-
tests/i915/gem_shrink.c | 1 +
tests/i915/gem_softpin.c | 1 +
tests/i915/gem_streaming_writes.c | 1 +
tests/i915/gem_sync.c | 1 +
tests/i915/gem_tiled_fence_blits.c | 1 +
tests/i915/gem_tiled_pread_basic.c | 2 +-
tests/i915/gem_tiled_pread_pwrite.c | 2 +-
tests/i915/gem_tiled_swapping.c | 2 +-
tests/i915/gem_tiled_wb.c | 2 +-
tests/i915/gem_tiled_wc.c | 2 +-
tests/i915/gem_tiling_max_stride.c | 2 +-
tests/i915/gem_unfence_active_buffers.c | 1 +
tests/i915/gem_unref_active_buffers.c | 1 +
tests/i915/gem_userptr_blits.c | 1 +
tests/i915/gem_vm_create.c | 1 +
tests/i915/gem_wait.c | 1 +
tests/i915/gem_watchdog.c | 1 +
tests/i915/gem_workarounds.c | 1 +
tests/i915/gen3_mixed_blits.c | 1 +
tests/i915/gen3_render_linear_blits.c | 1 +
tests/i915/gen3_render_mixed_blits.c | 1 +
tests/i915/gen3_render_tiledx_blits.c | 1 +
tests/i915/gen3_render_tiledy_blits.c | 1 +
tests/i915/gen7_exec_parse.c | 1 +
tests/i915/gen9_exec_parse.c | 1 +
tests/i915/i915_hangman.c | 1 +
tests/i915/i915_module_load.c | 2 +-
tests/i915/i915_pm_rc6_residency.c | 1 +
tests/i915/i915_pm_rpm.c | 1 +
tests/i915/i915_suspend.c | 1 +
tests/i915/perf_pmu.c | 1 +
tests/i915/sysfs_clients.c | 1 +
tests/i915/sysfs_timeslice_duration.c | 1 +
tests/kms_big_fb.c | 2 +-
tests/kms_ccs.c | 2 +-
tests/kms_flip.c | 2 +-
tests/kms_frontbuffer_tracking.c | 1 +
tests/kms_getfb.c | 2 +-
tests/prime_busy.c | 1 +
tests/prime_mmap.c | 2 +-
tests/prime_mmap_kms.c | 2 +-
tests/prime_self_import.c | 2 +-
tests/prime_vgem.c | 1 +
tools/intel_reg.c | 2 +-
142 files changed, 306 insertions(+), 57 deletions(-)
create mode 100644 lib/i915/gem_create.h
diff --git a/benchmarks/gem_blt.c b/benchmarks/gem_blt.c
index 34b82a87..424ce8e7 100644
--- a/benchmarks/gem_blt.c
+++ b/benchmarks/gem_blt.c
@@ -41,7 +41,7 @@
#include <time.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#define COPY_BLT_CMD (2<<29|0x53<<22|0x6)
#define BLT_WRITE_ALPHA (1<<21)
diff --git a/benchmarks/gem_busy.c b/benchmarks/gem_busy.c
index 69be8c17..70885e25 100644
--- a/benchmarks/gem_busy.c
+++ b/benchmarks/gem_busy.c
@@ -45,7 +45,7 @@
#include "intel_chipset.h"
#include "intel_reg.h"
#include "igt_stats.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_mman.h"
#define ENGINE_FLAGS (I915_EXEC_RING_MASK | I915_EXEC_BSD_MASK)
diff --git a/benchmarks/gem_create.c b/benchmarks/gem_create.c
index d4e297ed..7808f43a 100644
--- a/benchmarks/gem_create.c
+++ b/benchmarks/gem_create.c
@@ -40,7 +40,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_aux.h"
#include "igt_stats.h"
#include "intel_reg.h"
diff --git a/benchmarks/gem_exec_ctx.c b/benchmarks/gem_exec_ctx.c
index b6f403fb..b0c62e4c 100644
--- a/benchmarks/gem_exec_ctx.c
+++ b/benchmarks/gem_exec_ctx.c
@@ -40,7 +40,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "intel_io.h"
#include "intel_reg.h"
#include "igt_stats.h"
diff --git a/benchmarks/gem_exec_fault.c b/benchmarks/gem_exec_fault.c
index a3a0992c..d53fab96 100644
--- a/benchmarks/gem_exec_fault.c
+++ b/benchmarks/gem_exec_fault.c
@@ -42,7 +42,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_stats.h"
#include "intel_io.h"
#include "intel_reg.h"
diff --git a/benchmarks/gem_exec_nop.c b/benchmarks/gem_exec_nop.c
index c44d3454..9f8634a7 100644
--- a/benchmarks/gem_exec_nop.c
+++ b/benchmarks/gem_exec_nop.c
@@ -40,7 +40,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_stats.h"
#include "intel_io.h"
#include "intel_reg.h"
diff --git a/benchmarks/gem_exec_reloc.c b/benchmarks/gem_exec_reloc.c
index abaf9345..dadc064f 100644
--- a/benchmarks/gem_exec_reloc.c
+++ b/benchmarks/gem_exec_reloc.c
@@ -38,7 +38,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_mman.h"
#include "igt_debugfs.h"
#include "intel_reg.h"
diff --git a/benchmarks/gem_exec_trace.c b/benchmarks/gem_exec_trace.c
index e37f6fb7..4263ccb0 100644
--- a/benchmarks/gem_exec_trace.c
+++ b/benchmarks/gem_exec_trace.c
@@ -41,7 +41,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_stats.h"
#include "intel_io.h"
#include "ioctl_wrappers.h"
diff --git a/benchmarks/gem_latency.c b/benchmarks/gem_latency.c
index 9b3d22b7..cc8b3de5 100644
--- a/benchmarks/gem_latency.c
+++ b/benchmarks/gem_latency.c
@@ -43,7 +43,7 @@
#include <sys/resource.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_device.h"
diff --git a/benchmarks/gem_prw.c b/benchmarks/gem_prw.c
index 5d3fda9a..c6f3e066 100644
--- a/benchmarks/gem_prw.c
+++ b/benchmarks/gem_prw.c
@@ -40,7 +40,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_aux.h"
#include "igt_stats.h"
#include "ioctl_wrappers.h"
diff --git a/benchmarks/gem_set_domain.c b/benchmarks/gem_set_domain.c
index 1c9d797c..c92beea4 100644
--- a/benchmarks/gem_set_domain.c
+++ b/benchmarks/gem_set_domain.c
@@ -40,7 +40,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_aux.h"
#include "ioctl_wrappers.h"
diff --git a/benchmarks/gem_syslatency.c b/benchmarks/gem_syslatency.c
index c10d4f50..035ee934 100644
--- a/benchmarks/gem_syslatency.c
+++ b/benchmarks/gem_syslatency.c
@@ -44,7 +44,7 @@
#include <linux/unistd.h>
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#define sigev_notify_thread_id _sigev_un._tid
diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index 1b66e63e..d1435222 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -56,7 +56,7 @@
#include "igt_perf.h"
#include "sw_sync.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_engine_topology.h"
#include "i915/gem_mman.h"
diff --git a/benchmarks/prime_lookup.c b/benchmarks/prime_lookup.c
index b1891756..9c885367 100644
--- a/benchmarks/prime_lookup.c
+++ b/benchmarks/prime_lookup.c
@@ -38,7 +38,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_rand.h"
#include "intel_io.h"
#include "ioctl_wrappers.h"
diff --git a/lib/i915/gem.h b/lib/i915/gem.h
index bd23a277..feabac8d 100644
--- a/lib/i915/gem.h
+++ b/lib/i915/gem.h
@@ -32,7 +32,4 @@ void gem_quiescent_gpu(int i915);
int gem_reopen_driver(int i915);
-int __gem_create(int fd, uint64_t *size, uint32_t *handle);
-uint32_t gem_create(int fd, uint64_t size);
-
#endif /* I915_GEM_H */
diff --git a/lib/i915/gem_create.c b/lib/i915/gem_create.c
index a8c1a581..530877cc 100644
--- a/lib/i915/gem_create.c
+++ b/lib/i915/gem_create.c
@@ -5,7 +5,7 @@
#include <errno.h>
-#include "gem.h"
+#include "gem_create.h"
#include "i915_drm.h"
#include "igt_core.h"
#include "ioctl_wrappers.h"
@@ -47,3 +47,44 @@ uint32_t gem_create(int fd, uint64_t size)
return handle;
}
+
+int __gem_create_ext(int fd, uint64_t *size, uint32_t *handle,
+ struct i915_user_extension *ext)
+{
+ struct local_drm_i915_gem_create_ext create = {
+ .size = *size,
+ .extensions = to_user_pointer(ext),
+ };
+ int err = 0;
+
+ if (igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_CREATE_EXT, &create) == 0) {
+ *handle = create.handle;
+ *size = create.size;
+ } else {
+ err = -errno;
+ igt_assume(err != 0);
+ }
+
+ errno = 0;
+ return err;
+}
+
+/**
+ * gem_create_ext:
+ * @fd: open i915 drm file descriptor
+ * @size: desired size of the buffer
+ * @ext: optional extensions chain
+ *
+ * This wraps the GEM_CREATE_EXT ioctl, which allocates a new gem buffer object
+ * of @size.
+ *
+ * Returns: The file-private handle of the created buffer object
+ */
+uint32_t gem_create_ext(int fd, uint64_t size, struct i915_user_extension *ext)
+{
+ uint32_t handle;
+
+ igt_assert_eq(__gem_create_ext(fd, &size, &handle, ext), 0);
+
+ return handle;
+}
diff --git a/lib/i915/gem_create.h b/lib/i915/gem_create.h
new file mode 100644
index 00000000..5a07c1c8
--- /dev/null
+++ b/lib/i915/gem_create.h
@@ -0,0 +1,125 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef GEM_CREATE_H
+#define GEM_CREATE_H
+
+#include <stdint.h>
+
+#include "i915_drm.h"
+
+/**
+ * struct drm_i915_gem_create_ext - Existing gem_create behaviour, with added
+ * extension support using struct i915_user_extension.
+ *
+ * Note that in the future we want to have our buffer flags here, at least for
+ * the stuff that is immutable. Previously we would have two ioctls, one to
+ * create the object with gem_create, and another to apply various parameters,
+ * however this creates some ambiguity for the params which are considered
+ * immutable. Also in general we're phasing out the various SET/GET ioctls.
+ */
+struct local_drm_i915_gem_create_ext {
+ /**
+ * @size: Requested size for the object.
+ *
+ * The (page-aligned) allocated size for the object will be returned.
+ *
+ * Note that for some devices we have might have further minimum
+ * page-size restrictions(larger than 4K), like for device local-memory.
+ * However in general the final size here should always reflect any
+ * rounding up, if for example using the I915_GEM_CREATE_EXT_MEMORY_REGIONS
+ * extension to place the object in device local-memory.
+ */
+ __u64 size;
+ /**
+ * @handle: Returned handle for the object.
+ *
+ * Object handles are nonzero.
+ */
+ __u32 handle;
+ /** @flags: MBZ */
+ __u32 flags;
+ /**
+ * @extensions: The chain of extensions to apply to this object.
+ *
+ * This will be useful in the future when we need to support several
+ * different extensions, and we need to apply more than one when
+ * creating the object. See struct i915_user_extension.
+ *
+ * If we don't supply any extensions then we get the same old gem_create
+ * behaviour.
+ *
+ * For I915_GEM_CREATE_EXT_MEMORY_REGIONS usage see
+ * struct drm_i915_gem_create_ext_memory_regions.
+ */
+#define LOCAL_I915_GEM_CREATE_EXT_MEMORY_REGIONS 0
+ __u64 extensions;
+};
+
+/**
+ * struct drm_i915_gem_create_ext_memory_regions - The
+ * I915_GEM_CREATE_EXT_MEMORY_REGIONS extension.
+ *
+ * Set the object with the desired set of placements/regions in priority
+ * order. Each entry must be unique and supported by the device.
+ *
+ * This is provided as an array of struct drm_i915_gem_memory_class_instance, or
+ * an equivalent layout of class:instance pair encodings. See struct
+ * drm_i915_query_memory_regions and DRM_I915_QUERY_MEMORY_REGIONS for how to
+ * query the supported regions for a device.
+ *
+ * As an example, on discrete devices, if we wish to set the placement as
+ * device local-memory we can do something like:
+ *
+ * .. code-block:: C
+ *
+ * struct drm_i915_gem_memory_class_instance region_lmem = {
+ * .memory_class = I915_MEMORY_CLASS_DEVICE,
+ * .memory_instance = 0,
+ * };
+ * struct drm_i915_gem_create_ext_memory_regions regions = {
+ * .base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
+ * .regions = (uintptr_t)®ion_lmem,
+ * .num_regions = 1,
+ * };
+ * struct drm_i915_gem_create_ext create_ext = {
+ * .size = 16 * PAGE_SIZE,
+ * .extensions = (uintptr_t)®ions,
+ * };
+ *
+ * int err = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE_EXT, &create_ext);
+ * if (err) ...
+ *
+ * At which point we get the object handle in &drm_i915_gem_create_ext.handle,
+ * along with the final object size in &drm_i915_gem_create_ext.size, which
+ * should account for any rounding up, if required.
+ */
+struct local_drm_i915_gem_create_ext_memory_regions {
+ /** @base: Extension link. See struct i915_user_extension. */
+ struct i915_user_extension base;
+
+ /** @pad: MBZ */
+ __u32 pad;
+ /** @num_regions: Number of elements in the @regions array. */
+ __u32 num_regions;
+ /**
+ * @regions: The regions/placements array.
+ *
+ * An array of struct drm_i915_gem_memory_class_instance.
+ */
+ __u64 regions;
+};
+
+#define LOCAL_DRM_I915_GEM_CREATE_EXT 0x3c
+#define LOCAL_DRM_IOCTL_I915_GEM_CREATE_EXT DRM_IOWR(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_CREATE_EXT, \
+ struct local_drm_i915_gem_create_ext)
+
+int __gem_create(int fd, uint64_t *size, uint32_t *handle);
+uint32_t gem_create(int fd, uint64_t size);
+int __gem_create_ext(int fd, uint64_t *size, uint32_t *handle,
+ struct i915_user_extension *ext);
+uint32_t gem_create_ext(int fd, uint64_t size, struct i915_user_extension *ext);
+
+#endif /* GEM_CREATE_H */
diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
index ab04cbec..300ca13d 100644
--- a/lib/i915/gem_mman.c
+++ b/lib/i915/gem_mman.c
@@ -31,7 +31,7 @@
#include "ioctl_wrappers.h"
#include "intel_chipset.h"
-#include "gem.h"
+#include "gem_create.h"
#include "gem_mman.h"
#ifdef HAVE_VALGRIND
diff --git a/lib/i915/gem_ring.c b/lib/i915/gem_ring.c
index f224e822..6d28b5d9 100644
--- a/lib/i915/gem_ring.c
+++ b/lib/i915/gem_ring.c
@@ -27,6 +27,7 @@
#include <sys/time.h>
#include "gem.h"
+#include "gem_create.h"
#include "gem_ring.h"
#include "gem_submission.h"
diff --git a/lib/i915/gem_submission.c b/lib/i915/gem_submission.c
index 051f9d04..bd4bbb3e 100644
--- a/lib/i915/gem_submission.c
+++ b/lib/i915/gem_submission.c
@@ -31,6 +31,7 @@
#include <i915_drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_engine_topology.h"
#include "i915/gem_submission.h"
diff --git a/lib/igt_draw.c b/lib/igt_draw.c
index 949c0d77..a3144b50 100644
--- a/lib/igt_draw.c
+++ b/lib/igt_draw.c
@@ -34,7 +34,7 @@
#include "igt_fb.h"
#include "ioctl_wrappers.h"
#include "i830_reg.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_mman.h"
#ifndef PAGE_ALIGN
diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index 34ad9221..1a3abb5d 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -31,7 +31,7 @@
#include <i915_drm.h>
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_engine_topology.h"
#include "i915/gem_mman.h"
#include "i915/gem_submission.h"
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index f8f02766..3e6841fd 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -33,7 +33,7 @@
#include <pixman.h>
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_mman.h"
#include "igt_aux.h"
#include "igt_color_encoding.h"
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 0b2c5b21..cc976a62 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -35,7 +35,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "intel_batchbuffer.h"
#include "intel_bufmgr.h"
#include "intel_bufops.h"
diff --git a/lib/intel_bufops.c b/lib/intel_bufops.c
index 5dece576..3ce68663 100644
--- a/lib/intel_bufops.c
+++ b/lib/intel_bufops.c
@@ -25,7 +25,7 @@
#include <sys/ioctl.h>
#include <cairo.h>
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_x86.h"
#include "intel_bufops.h"
diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 4440004c..0c1b5e32 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -49,7 +49,7 @@
#include "drmtest.h"
#include "i915_drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "intel_batchbuffer.h"
#include "intel_chipset.h"
#include "intel_io.h"
diff --git a/tests/amdgpu/amd_prime.c b/tests/amdgpu/amd_prime.c
index 537b0bcd..3e5cc1a7 100644
--- a/tests/amdgpu/amd_prime.c
+++ b/tests/amdgpu/amd_prime.c
@@ -27,6 +27,7 @@
#include <sys/poll.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_vgem.h"
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index e6079fa3..a639cfb4 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -31,6 +31,7 @@
#include <unistd.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/perf.h"
#include "igt.h"
#include "igt_device_scan.h"
diff --git a/tests/i915/api_intel_allocator.c b/tests/i915/api_intel_allocator.c
index 182d9ba7..ea4ba8bb 100644
--- a/tests/i915/api_intel_allocator.c
+++ b/tests/i915/api_intel_allocator.c
@@ -5,6 +5,7 @@
#include <stdatomic.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_aux.h"
#include "intel_allocator.h"
diff --git a/tests/i915/api_intel_bb.c b/tests/i915/api_intel_bb.c
index eafa856d..7ffe64fc 100644
--- a/tests/i915/api_intel_bb.c
+++ b/tests/i915/api_intel_bb.c
@@ -23,6 +23,7 @@
#include "igt.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include <unistd.h>
#include <stdlib.h>
#include <stdio.h>
diff --git a/tests/i915/gem_bad_reloc.c b/tests/i915/gem_bad_reloc.c
index 6acc1724..34c4c82b 100644
--- a/tests/i915/gem_bad_reloc.c
+++ b/tests/i915/gem_bad_reloc.c
@@ -39,6 +39,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Simulates SNA behaviour using negative self-relocations"
diff --git a/tests/i915/gem_basic.c b/tests/i915/gem_basic.c
index 984bdf60..13ecce52 100644
--- a/tests/i915/gem_basic.c
+++ b/tests/i915/gem_basic.c
@@ -37,7 +37,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
static void
test_bad_close(int fd)
diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
index 6ed9b60e..21dcee68 100644
--- a/tests/i915/gem_blits.c
+++ b/tests/i915/gem_blits.c
@@ -23,6 +23,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_x86.h"
diff --git a/tests/i915/gem_busy.c b/tests/i915/gem_busy.c
index 77a55101..dc481f3c 100644
--- a/tests/i915/gem_busy.c
+++ b/tests/i915/gem_busy.c
@@ -26,6 +26,7 @@
#include <sys/ioctl.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_rand.h"
#include "igt_vgem.h"
diff --git a/tests/i915/gem_close.c b/tests/i915/gem_close.c
index 58f2d4b3..ee2d690b 100644
--- a/tests/i915/gem_close.c
+++ b/tests/i915/gem_close.c
@@ -22,6 +22,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
static int batch_create(int fd)
diff --git a/tests/i915/gem_close_race.c b/tests/i915/gem_close_race.c
index 06b80100..ab444945 100644
--- a/tests/i915/gem_close_race.c
+++ b/tests/i915/gem_close_race.c
@@ -42,6 +42,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#define OBJECT_SIZE (256 * 1024)
diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c
index a422a449..d0f9b62e 100644
--- a/tests/i915/gem_concurrent_all.c
+++ b/tests/i915/gem_concurrent_all.c
@@ -49,6 +49,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_vgem.h"
diff --git a/tests/i915/gem_create.c b/tests/i915/gem_create.c
index ce985053..8acc2f52 100644
--- a/tests/i915/gem_create.c
+++ b/tests/i915/gem_create.c
@@ -54,6 +54,7 @@
#include "igt_dummyload.h"
#include "igt_x86.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_engine_topology.h"
#include "i915/gem_mman.h"
#include "i915_drm.h"
diff --git a/tests/i915/gem_cs_tlb.c b/tests/i915/gem_cs_tlb.c
index f72879c3..dec9c107 100644
--- a/tests/i915/gem_cs_tlb.c
+++ b/tests/i915/gem_cs_tlb.c
@@ -50,6 +50,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Check whether we correctly invalidate the cs tlb.");
diff --git a/tests/i915/gem_ctx_clone.c b/tests/i915/gem_ctx_clone.c
index b72269bc..225e801b 100644
--- a/tests/i915/gem_ctx_clone.c
+++ b/tests/i915/gem_ctx_clone.c
@@ -22,6 +22,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_vm.h"
#include "i915_drm.h"
#include "igt.h"
diff --git a/tests/i915/gem_ctx_create.c b/tests/i915/gem_ctx_create.c
index 9a512a03..5b14f7af 100644
--- a/tests/i915/gem_ctx_create.c
+++ b/tests/i915/gem_ctx_create.c
@@ -31,6 +31,7 @@
#include <time.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_rand.h"
#include "sw_sync.h"
diff --git a/tests/i915/gem_ctx_engines.c b/tests/i915/gem_ctx_engines.c
index 643a0b2f..02658c4f 100644
--- a/tests/i915/gem_ctx_engines.c
+++ b/tests/i915/gem_ctx_engines.c
@@ -39,6 +39,7 @@
#include "i915/gem.h"
#include "i915/gem_context.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "sw_sync.h"
diff --git a/tests/i915/gem_ctx_exec.c b/tests/i915/gem_ctx_exec.c
index 89776185..2e72bf71 100644
--- a/tests/i915/gem_ctx_exec.c
+++ b/tests/i915/gem_ctx_exec.c
@@ -41,6 +41,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_dummyload.h"
#include "igt_rand.h"
diff --git a/tests/i915/gem_ctx_isolation.c b/tests/i915/gem_ctx_isolation.c
index 4f174268..4277df34 100644
--- a/tests/i915/gem_ctx_isolation.c
+++ b/tests/i915/gem_ctx_isolation.c
@@ -22,6 +22,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_dummyload.h"
diff --git a/tests/i915/gem_ctx_param.c b/tests/i915/gem_ctx_param.c
index ab0e3007..c024fe60 100644
--- a/tests/i915/gem_ctx_param.c
+++ b/tests/i915/gem_ctx_param.c
@@ -29,6 +29,7 @@
#include "igt.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_vm.h"
IGT_TEST_DESCRIPTION("Basic test for context set/get param input validation.");
diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c
index 6b21994d..c7e957c4 100644
--- a/tests/i915/gem_ctx_shared.c
+++ b/tests/i915/gem_ctx_shared.c
@@ -38,6 +38,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_engine_topology.h"
#include "igt.h"
#include "igt_rand.h"
diff --git a/tests/i915/gem_ctx_sseu.c b/tests/i915/gem_ctx_sseu.c
index 749ce336..7685511f 100644
--- a/tests/i915/gem_ctx_sseu.c
+++ b/tests/i915/gem_ctx_sseu.c
@@ -37,6 +37,7 @@
#include <sys/wait.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt.h"
#include "igt_dummyload.h"
diff --git a/tests/i915/gem_ctx_switch.c b/tests/i915/gem_ctx_switch.c
index 6208dacd..44c659f0 100644
--- a/tests/i915/gem_ctx_switch.c
+++ b/tests/i915/gem_ctx_switch.c
@@ -41,6 +41,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#include "igt.h"
diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index d86ccf2b..25d109d6 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -43,6 +43,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#include "igt.h"
#include "igt_device.h"
diff --git a/tests/i915/gem_evict_alignment.c b/tests/i915/gem_evict_alignment.c
index d4a5877a..e5176b9b 100644
--- a/tests/i915/gem_evict_alignment.c
+++ b/tests/i915/gem_evict_alignment.c
@@ -45,6 +45,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Run a couple of big batches to force the unbind on"
diff --git a/tests/i915/gem_evict_everything.c b/tests/i915/gem_evict_everything.c
index 5d4d15c4..37343b53 100644
--- a/tests/i915/gem_evict_everything.c
+++ b/tests/i915/gem_evict_everything.c
@@ -44,6 +44,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "eviction_common.c"
diff --git a/tests/i915/gem_exec_alignment.c b/tests/i915/gem_exec_alignment.c
index 7bbd2a8f..c4611bd1 100644
--- a/tests/i915/gem_exec_alignment.c
+++ b/tests/i915/gem_exec_alignment.c
@@ -42,6 +42,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Exercises the basic execbuffer using object alignments");
diff --git a/tests/i915/gem_exec_async.c b/tests/i915/gem_exec_async.c
index 412ad737..bf8a856a 100644
--- a/tests/i915/gem_exec_async.c
+++ b/tests/i915/gem_exec_async.c
@@ -22,6 +22,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Check that we can issue concurrent writes across the engines.");
diff --git a/tests/i915/gem_exec_await.c b/tests/i915/gem_exec_await.c
index e64d2a94..6db30695 100644
--- a/tests/i915/gem_exec_await.c
+++ b/tests/i915/gem_exec_await.c
@@ -26,6 +26,7 @@
#include <sys/signal.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_rand.h"
#include "igt_sysfs.h"
diff --git a/tests/i915/gem_exec_balancer.c b/tests/i915/gem_exec_balancer.c
index 01db0e11..12cb55ab 100644
--- a/tests/i915/gem_exec_balancer.c
+++ b/tests/i915/gem_exec_balancer.c
@@ -27,6 +27,7 @@
#include <sys/signal.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_gt.h"
#include "igt_perf.h"
diff --git a/tests/i915/gem_exec_basic.c b/tests/i915/gem_exec_basic.c
index 31f6a234..5021852f 100644
--- a/tests/i915/gem_exec_basic.c
+++ b/tests/i915/gem_exec_basic.c
@@ -23,7 +23,7 @@
#include "igt.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Basic sanity check of execbuf-ioctl rings.");
diff --git a/tests/i915/gem_exec_big.c b/tests/i915/gem_exec_big.c
index 63de42d5..1f8c720b 100644
--- a/tests/i915/gem_exec_big.c
+++ b/tests/i915/gem_exec_big.c
@@ -46,6 +46,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Run a large nop batch to stress test the error capture"
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index 3da78d63..a6b3d987 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -25,6 +25,7 @@
#include <zlib.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_device.h"
#include "igt_rand.h"
diff --git a/tests/i915/gem_exec_create.c b/tests/i915/gem_exec_create.c
index 6529da7e..8556cb21 100644
--- a/tests/i915/gem_exec_create.c
+++ b/tests/i915/gem_exec_create.c
@@ -40,6 +40,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#include "igt.h"
diff --git a/tests/i915/gem_exec_endless.c b/tests/i915/gem_exec_endless.c
index 1b320d4c..e7d4b56c 100644
--- a/tests/i915/gem_exec_endless.c
+++ b/tests/i915/gem_exec_endless.c
@@ -24,6 +24,7 @@
#include <sys/ioctl.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_device.h"
#include "igt_sysfs.h"
diff --git a/tests/i915/gem_exec_fair.c b/tests/i915/gem_exec_fair.c
index c1a71f77..628f4df2 100644
--- a/tests/i915/gem_exec_fair.c
+++ b/tests/i915/gem_exec_fair.c
@@ -18,6 +18,7 @@
#include "sync_file.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_rand.h"
#include "igt_rapl.h"
diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index b7b3f8e3..70bb0011 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -26,6 +26,7 @@
#include <sys/signal.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_syncobj.h"
#include "igt_sysfs.h"
diff --git a/tests/i915/gem_exec_flush.c b/tests/i915/gem_exec_flush.c
index a2cac71a..629fdd7a 100644
--- a/tests/i915/gem_exec_flush.c
+++ b/tests/i915/gem_exec_flush.c
@@ -24,6 +24,7 @@
#include <time.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#include "igt.h"
#include "igt_x86.h"
diff --git a/tests/i915/gem_exec_gttfill.c b/tests/i915/gem_exec_gttfill.c
index c0e27c9b..e711576f 100644
--- a/tests/i915/gem_exec_gttfill.c
+++ b/tests/i915/gem_exec_gttfill.c
@@ -22,6 +22,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_rand.h"
diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index 8ba924b8..158faee5 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -47,6 +47,7 @@
#include "igt_stats.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#define ENGINE_FLAGS (I915_EXEC_RING_MASK | I915_EXEC_BSD_MASK)
diff --git a/tests/i915/gem_exec_lut_handle.c b/tests/i915/gem_exec_lut_handle.c
index e642686d..3c5c81f1 100644
--- a/tests/i915/gem_exec_lut_handle.c
+++ b/tests/i915/gem_exec_lut_handle.c
@@ -38,6 +38,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Exercises the basic execbuffer using the handle LUT"
diff --git a/tests/i915/gem_exec_nop.c b/tests/i915/gem_exec_nop.c
index 62554ecb..acdf6bde 100644
--- a/tests/i915/gem_exec_nop.c
+++ b/tests/i915/gem_exec_nop.c
@@ -41,6 +41,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_device.h"
#include "igt_rand.h"
diff --git a/tests/i915/gem_exec_parallel.c b/tests/i915/gem_exec_parallel.c
index c9cf9d7a..11cea5d7 100644
--- a/tests/i915/gem_exec_parallel.c
+++ b/tests/i915/gem_exec_parallel.c
@@ -30,6 +30,7 @@
#include <pthread.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_gt.h"
diff --git a/tests/i915/gem_exec_params.c b/tests/i915/gem_exec_params.c
index 6840cf40..6ab1ab11 100644
--- a/tests/i915/gem_exec_params.c
+++ b/tests/i915/gem_exec_params.c
@@ -39,6 +39,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#include "igt.h"
#include "igt_device.h"
diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index 397c335e..c79400fb 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -25,6 +25,7 @@
#include <sys/ioctl.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_device.h"
#include "igt_dummyload.h"
diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 9585059d..6147ff96 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -35,6 +35,7 @@
#include <unistd.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_rand.h"
#include "igt_rapl.h"
diff --git a/tests/i915/gem_exec_store.c b/tests/i915/gem_exec_store.c
index 771ee169..99ffc9ab 100644
--- a/tests/i915/gem_exec_store.c
+++ b/tests/i915/gem_exec_store.c
@@ -30,6 +30,7 @@
#include <strings.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_device.h"
#include "igt_gt.h"
diff --git a/tests/i915/gem_exec_suspend.c b/tests/i915/gem_exec_suspend.c
index b6558a14..d13c443e 100644
--- a/tests/i915/gem_exec_suspend.c
+++ b/tests/i915/gem_exec_suspend.c
@@ -31,6 +31,7 @@
#include <unistd.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_dummyload.h"
#include "igt_gt.h"
diff --git a/tests/i915/gem_exec_whisper.c b/tests/i915/gem_exec_whisper.c
index 71bd610c..a9d3fa05 100644
--- a/tests/i915/gem_exec_whisper.c
+++ b/tests/i915/gem_exec_whisper.c
@@ -28,6 +28,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_debugfs.h"
#include "igt_rapl.h"
diff --git a/tests/i915/gem_fd_exhaustion.c b/tests/i915/gem_fd_exhaustion.c
index 13e8a23a..a6463685 100644
--- a/tests/i915/gem_fd_exhaustion.c
+++ b/tests/i915/gem_fd_exhaustion.c
@@ -33,7 +33,7 @@
#include <fcntl.h>
#include <limits.h>
-#include "i915/gem.h"
+#include "i915/gem_create.h"
igt_simple_main
{
diff --git a/tests/i915/gem_fence_thrash.c b/tests/i915/gem_fence_thrash.c
index 872dc554..89a5ae29 100644
--- a/tests/i915/gem_fence_thrash.c
+++ b/tests/i915/gem_fence_thrash.c
@@ -40,7 +40,7 @@
#include <pthread.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_x86.h"
diff --git a/tests/i915/gem_fence_upload.c b/tests/i915/gem_fence_upload.c
index 87ed1edf..67487d67 100644
--- a/tests/i915/gem_fence_upload.c
+++ b/tests/i915/gem_fence_upload.c
@@ -40,7 +40,7 @@
#include "drm.h"
#include "i915_drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#define OBJECT_SIZE (1024*1024) /* restricted to 1MiB alignment on i915 fences */
diff --git a/tests/i915/gem_fenced_exec_thrash.c b/tests/i915/gem_fenced_exec_thrash.c
index b577a04f..13812bb7 100644
--- a/tests/i915/gem_fenced_exec_thrash.c
+++ b/tests/i915/gem_fenced_exec_thrash.c
@@ -31,6 +31,7 @@
#include <errno.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Test execbuf fence accounting.");
diff --git a/tests/i915/gem_flink_race.c b/tests/i915/gem_flink_race.c
index 58431b36..70e133d7 100644
--- a/tests/i915/gem_flink_race.c
+++ b/tests/i915/gem_flink_race.c
@@ -32,7 +32,7 @@
#include <pthread.h>
#include <errno.h>
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_stats.h"
diff --git a/tests/i915/gem_gtt_cpu_tlb.c b/tests/i915/gem_gtt_cpu_tlb.c
index 07f8f1a3..8000e58c 100644
--- a/tests/i915/gem_gtt_cpu_tlb.c
+++ b/tests/i915/gem_gtt_cpu_tlb.c
@@ -42,7 +42,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Check whether gtt tlbs for cpu access are correctly"
" invalidated.");
diff --git a/tests/i915/gem_gtt_hog.c b/tests/i915/gem_gtt_hog.c
index 1372245b..15a6139e 100644
--- a/tests/i915/gem_gtt_hog.c
+++ b/tests/i915/gem_gtt_hog.c
@@ -40,6 +40,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
static const uint32_t canary = 0xdeadbeef;
diff --git a/tests/i915/gem_gtt_speed.c b/tests/i915/gem_gtt_speed.c
index 644af3d3..272091fd 100644
--- a/tests/i915/gem_gtt_speed.c
+++ b/tests/i915/gem_gtt_speed.c
@@ -41,7 +41,7 @@
#include <sys/time.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#define OBJECT_SIZE 16384
diff --git a/tests/i915/gem_huc_copy.c b/tests/i915/gem_huc_copy.c
index 5954d34e..9a32893e 100644
--- a/tests/i915/gem_huc_copy.c
+++ b/tests/i915/gem_huc_copy.c
@@ -34,6 +34,7 @@
#include <sys/time.h>
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("A very simple workload for the HuC.");
diff --git a/tests/i915/gem_linear_blits.c b/tests/i915/gem_linear_blits.c
index 7b7cf05a..6504c9f2 100644
--- a/tests/i915/gem_linear_blits.c
+++ b/tests/i915/gem_linear_blits.c
@@ -45,6 +45,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Test doing many blits with a working set larger than the"
diff --git a/tests/i915/gem_lut_handle.c b/tests/i915/gem_lut_handle.c
index f14a9bda..64dbb87c 100644
--- a/tests/i915/gem_lut_handle.c
+++ b/tests/i915/gem_lut_handle.c
@@ -38,7 +38,7 @@
#include <sys/time.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Exercises the basic execbuffer using the handle LUT"
" interface.");
diff --git a/tests/i915/gem_madvise.c b/tests/i915/gem_madvise.c
index d772d3ab..d88747a9 100644
--- a/tests/i915/gem_madvise.c
+++ b/tests/i915/gem_madvise.c
@@ -37,7 +37,7 @@
#include <signal.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Checks that the kernel reports EFAULT when trying to use"
" purged bo.");
diff --git a/tests/i915/gem_mmap.c b/tests/i915/gem_mmap.c
index 7c36571c..d12a4c0b 100644
--- a/tests/i915/gem_mmap.c
+++ b/tests/i915/gem_mmap.c
@@ -37,7 +37,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#define OBJECT_SIZE 16384
#define PAGE_SIZE 4096
diff --git a/tests/i915/gem_mmap_gtt.c b/tests/i915/gem_mmap_gtt.c
index 528a7c72..cbfa222a 100644
--- a/tests/i915/gem_mmap_gtt.c
+++ b/tests/i915/gem_mmap_gtt.c
@@ -42,6 +42,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_sysfs.h"
#include "igt_x86.h"
diff --git a/tests/i915/gem_mmap_offset.c b/tests/i915/gem_mmap_offset.c
index 95c934db..f1ba67b7 100644
--- a/tests/i915/gem_mmap_offset.c
+++ b/tests/i915/gem_mmap_offset.c
@@ -32,6 +32,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_x86.h"
diff --git a/tests/i915/gem_mmap_wc.c b/tests/i915/gem_mmap_wc.c
index 4a2192b3..7130a510 100644
--- a/tests/i915/gem_mmap_wc.c
+++ b/tests/i915/gem_mmap_wc.c
@@ -38,7 +38,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
struct local_i915_gem_mmap_v2 {
uint32_t handle;
diff --git a/tests/i915/gem_ppgtt.c b/tests/i915/gem_ppgtt.c
index da83484a..4c9691e3 100644
--- a/tests/i915/gem_ppgtt.c
+++ b/tests/i915/gem_ppgtt.c
@@ -36,6 +36,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_debugfs.h"
diff --git a/tests/i915/gem_pread.c b/tests/i915/gem_pread.c
index ec9991ee..a8bf2b05 100644
--- a/tests/i915/gem_pread.c
+++ b/tests/i915/gem_pread.c
@@ -43,7 +43,7 @@
#include <pthread.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_vgem.h"
#define MiB(x) ((x) * 1024 * 1024)
diff --git a/tests/i915/gem_pwrite.c b/tests/i915/gem_pwrite.c
index 5fd15e6a..e8e8c7ad 100644
--- a/tests/i915/gem_pwrite.c
+++ b/tests/i915/gem_pwrite.c
@@ -42,7 +42,7 @@
#include <sys/time.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_rand.h"
#include "igt_vgem.h"
diff --git a/tests/i915/gem_readwrite.c b/tests/i915/gem_readwrite.c
index 8a958cc9..2d437dec 100644
--- a/tests/i915/gem_readwrite.c
+++ b/tests/i915/gem_readwrite.c
@@ -37,7 +37,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#define OBJECT_SIZE 16384
diff --git a/tests/i915/gem_reset_stats.c b/tests/i915/gem_reset_stats.c
index e1feecb6..627a10ab 100644
--- a/tests/i915/gem_reset_stats.c
+++ b/tests/i915/gem_reset_stats.c
@@ -41,6 +41,7 @@
#include <signal.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#include "igt.h"
#include "igt_sysfs.h"
diff --git a/tests/i915/gem_ringfill.c b/tests/i915/gem_ringfill.c
index 78903707..9ad97532 100644
--- a/tests/i915/gem_ringfill.c
+++ b/tests/i915/gem_ringfill.c
@@ -32,6 +32,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#include "igt.h"
#include "igt_device.h"
diff --git a/tests/i915/gem_set_tiling_vs_gtt.c b/tests/i915/gem_set_tiling_vs_gtt.c
index f09022c6..2f890e83 100644
--- a/tests/i915/gem_set_tiling_vs_gtt.c
+++ b/tests/i915/gem_set_tiling_vs_gtt.c
@@ -37,7 +37,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Check set_tiling vs gtt mmap coherency.");
diff --git a/tests/i915/gem_set_tiling_vs_pwrite.c b/tests/i915/gem_set_tiling_vs_pwrite.c
index 87909d3c..6bec7f27 100644
--- a/tests/i915/gem_set_tiling_vs_pwrite.c
+++ b/tests/i915/gem_set_tiling_vs_pwrite.c
@@ -37,7 +37,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Check set_tiling vs pwrite coherency.");
diff --git a/tests/i915/gem_shrink.c b/tests/i915/gem_shrink.c
index 2269da49..b6450a6f 100644
--- a/tests/i915/gem_shrink.c
+++ b/tests/i915/gem_shrink.c
@@ -28,6 +28,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_gt.h"
#include "igt_debugfs.h"
diff --git a/tests/i915/gem_softpin.c b/tests/i915/gem_softpin.c
index c3bfd10a..bdb04821 100644
--- a/tests/i915/gem_softpin.c
+++ b/tests/i915/gem_softpin.c
@@ -27,6 +27,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "intel_allocator.h"
diff --git a/tests/i915/gem_streaming_writes.c b/tests/i915/gem_streaming_writes.c
index b18ff848..c104792b 100644
--- a/tests/i915/gem_streaming_writes.c
+++ b/tests/i915/gem_streaming_writes.c
@@ -38,6 +38,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#define OBJECT_SIZE 1024*1024
diff --git a/tests/i915/gem_sync.c b/tests/i915/gem_sync.c
index 6ad31517..e1b3ab7d 100644
--- a/tests/i915/gem_sync.c
+++ b/tests/i915/gem_sync.c
@@ -25,6 +25,7 @@
#include <pthread.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#include "igt_debugfs.h"
#include "igt_dummyload.h"
diff --git a/tests/i915/gem_tiled_fence_blits.c b/tests/i915/gem_tiled_fence_blits.c
index 28beea89..6ce3a38d 100644
--- a/tests/i915/gem_tiled_fence_blits.c
+++ b/tests/i915/gem_tiled_fence_blits.c
@@ -42,6 +42,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_x86.h"
diff --git a/tests/i915/gem_tiled_pread_basic.c b/tests/i915/gem_tiled_pread_basic.c
index 186f630f..2b4cec6e 100644
--- a/tests/i915/gem_tiled_pread_basic.c
+++ b/tests/i915/gem_tiled_pread_basic.c
@@ -47,7 +47,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Test pread behavior on tiled objects with respect to the"
" reported swizzling value.");
diff --git a/tests/i915/gem_tiled_pread_pwrite.c b/tests/i915/gem_tiled_pread_pwrite.c
index ef1e1b3c..f77cd3bd 100644
--- a/tests/i915/gem_tiled_pread_pwrite.c
+++ b/tests/i915/gem_tiled_pread_pwrite.c
@@ -57,7 +57,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Test swizzling by testing pwrite does the inverse of"
" pread.");
diff --git a/tests/i915/gem_tiled_swapping.c b/tests/i915/gem_tiled_swapping.c
index 1bcf2fa4..d33b76db 100644
--- a/tests/i915/gem_tiled_swapping.c
+++ b/tests/i915/gem_tiled_swapping.c
@@ -57,7 +57,7 @@
#include <pthread.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Exercise swizzle code for swapping.");
diff --git a/tests/i915/gem_tiled_wb.c b/tests/i915/gem_tiled_wb.c
index 2ba424e8..e9efbdf2 100644
--- a/tests/i915/gem_tiled_wb.c
+++ b/tests/i915/gem_tiled_wb.c
@@ -44,7 +44,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("This is a test of write-combining mmap's behavior on"
" tiled objects with respect to the reported swizzling"
diff --git a/tests/i915/gem_tiled_wc.c b/tests/i915/gem_tiled_wc.c
index 898aad40..29ea700e 100644
--- a/tests/i915/gem_tiled_wc.c
+++ b/tests/i915/gem_tiled_wc.c
@@ -44,7 +44,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#define WIDTH 512
#define HEIGHT 512
diff --git a/tests/i915/gem_tiling_max_stride.c b/tests/i915/gem_tiling_max_stride.c
index 4a273441..513d579d 100644
--- a/tests/i915/gem_tiling_max_stride.c
+++ b/tests/i915/gem_tiling_max_stride.c
@@ -38,7 +38,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Check that max fence stride works.");
diff --git a/tests/i915/gem_unfence_active_buffers.c b/tests/i915/gem_unfence_active_buffers.c
index 887d6177..2c9cebb6 100644
--- a/tests/i915/gem_unfence_active_buffers.c
+++ b/tests/i915/gem_unfence_active_buffers.c
@@ -50,6 +50,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Check for use-after-free in the fence stealing code.");
diff --git a/tests/i915/gem_unref_active_buffers.c b/tests/i915/gem_unref_active_buffers.c
index e4a82360..731190b3 100644
--- a/tests/i915/gem_unref_active_buffers.c
+++ b/tests/i915/gem_unref_active_buffers.c
@@ -40,6 +40,7 @@
#include "igt.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Test unreferencing of active buffers.");
diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
index aad5f141..1d67b718 100644
--- a/tests/i915/gem_userptr_blits.c
+++ b/tests/i915/gem_userptr_blits.c
@@ -59,6 +59,7 @@
#include "i915_drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_sysfs.h"
#include "sw_sync.h"
diff --git a/tests/i915/gem_vm_create.c b/tests/i915/gem_vm_create.c
index 6d93c98a..5f982d4d 100644
--- a/tests/i915/gem_vm_create.c
+++ b/tests/i915/gem_vm_create.c
@@ -22,6 +22,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_vm.h"
#include "igt.h"
#include "igt_rand.h"
diff --git a/tests/i915/gem_wait.c b/tests/i915/gem_wait.c
index 7b2b1c2b..81ac25b5 100644
--- a/tests/i915/gem_wait.c
+++ b/tests/i915/gem_wait.c
@@ -28,6 +28,7 @@
#include <sys/poll.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_vgem.h"
diff --git a/tests/i915/gem_watchdog.c b/tests/i915/gem_watchdog.c
index 8f9fb177..286002bd 100644
--- a/tests/i915/gem_watchdog.c
+++ b/tests/i915/gem_watchdog.c
@@ -30,6 +30,7 @@
#include <sched.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_params.h"
#include "sw_sync.h"
diff --git a/tests/i915/gem_workarounds.c b/tests/i915/gem_workarounds.c
index 00b475c2..8312e20a 100644
--- a/tests/i915/gem_workarounds.c
+++ b/tests/i915/gem_workarounds.c
@@ -28,6 +28,7 @@
#include <fcntl.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_device.h"
diff --git a/tests/i915/gen3_mixed_blits.c b/tests/i915/gen3_mixed_blits.c
index 10a8cd3e..184effec 100644
--- a/tests/i915/gen3_mixed_blits.c
+++ b/tests/i915/gen3_mixed_blits.c
@@ -45,6 +45,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915_reg.h"
#include "igt.h"
diff --git a/tests/i915/gen3_render_linear_blits.c b/tests/i915/gen3_render_linear_blits.c
index d88a2c93..f01df69e 100644
--- a/tests/i915/gen3_render_linear_blits.c
+++ b/tests/i915/gen3_render_linear_blits.c
@@ -44,6 +44,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915_reg.h"
#include "igt.h"
diff --git a/tests/i915/gen3_render_mixed_blits.c b/tests/i915/gen3_render_mixed_blits.c
index cda175bd..9ebb93be 100644
--- a/tests/i915/gen3_render_mixed_blits.c
+++ b/tests/i915/gen3_render_mixed_blits.c
@@ -45,6 +45,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915_reg.h"
#include "igt.h"
diff --git a/tests/i915/gen3_render_tiledx_blits.c b/tests/i915/gen3_render_tiledx_blits.c
index 579205f3..b8aa0edc 100644
--- a/tests/i915/gen3_render_tiledx_blits.c
+++ b/tests/i915/gen3_render_tiledx_blits.c
@@ -45,6 +45,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915_reg.h"
#include "igt.h"
diff --git a/tests/i915/gen3_render_tiledy_blits.c b/tests/i915/gen3_render_tiledy_blits.c
index 931e91a3..2d1b2d8e 100644
--- a/tests/i915/gen3_render_tiledy_blits.c
+++ b/tests/i915/gen3_render_tiledy_blits.c
@@ -45,6 +45,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915_reg.h"
#include "igt.h"
diff --git a/tests/i915/gen7_exec_parse.c b/tests/i915/gen7_exec_parse.c
index f7201bb9..8326fd5c 100644
--- a/tests/i915/gen7_exec_parse.c
+++ b/tests/i915/gen7_exec_parse.c
@@ -32,6 +32,7 @@
#include "igt.h"
#include "igt_device.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "sw_sync.h"
#define DERRMR 0x44050
diff --git a/tests/i915/gen9_exec_parse.c b/tests/i915/gen9_exec_parse.c
index f9de90d2..e10c6ce9 100644
--- a/tests/i915/gen9_exec_parse.c
+++ b/tests/i915/gen9_exec_parse.c
@@ -29,6 +29,7 @@
#include <stdlib.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_submission.h"
#include "igt.h"
#include "sw_sync.h"
diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c
index 72e4d8b8..f6fac283 100644
--- a/tests/i915/i915_hangman.c
+++ b/tests/i915/i915_hangman.c
@@ -33,6 +33,7 @@
#include <fcntl.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_sysfs.h"
#include "igt_debugfs.h"
diff --git a/tests/i915/i915_module_load.c b/tests/i915/i915_module_load.c
index 03dec60d..281454a5 100644
--- a/tests/i915/i915_module_load.c
+++ b/tests/i915/i915_module_load.c
@@ -30,7 +30,7 @@
#include <sys/ioctl.h>
#include <fcntl.h>
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_debugfs.h"
#include "igt_aux.h"
#include "igt_kmod.h"
diff --git a/tests/i915/i915_pm_rc6_residency.c b/tests/i915/i915_pm_rc6_residency.c
index d484121e..bfbe4ab0 100644
--- a/tests/i915/i915_pm_rc6_residency.c
+++ b/tests/i915/i915_pm_rc6_residency.c
@@ -34,6 +34,7 @@
#include <time.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_perf.h"
#include "igt_rapl.h"
diff --git a/tests/i915/i915_pm_rpm.c b/tests/i915/i915_pm_rpm.c
index d9ec0388..da498ad6 100644
--- a/tests/i915/i915_pm_rpm.c
+++ b/tests/i915/i915_pm_rpm.c
@@ -46,6 +46,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_kmod.h"
#include "igt_sysfs.h"
diff --git a/tests/i915/i915_suspend.c b/tests/i915/i915_suspend.c
index 15340edc..da27ce09 100644
--- a/tests/i915/i915_suspend.c
+++ b/tests/i915/i915_suspend.c
@@ -39,6 +39,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_device.h"
diff --git a/tests/i915/perf_pmu.c b/tests/i915/perf_pmu.c
index 50b5c82b..172dd161 100644
--- a/tests/i915/perf_pmu.c
+++ b/tests/i915/perf_pmu.c
@@ -39,6 +39,7 @@
#include <sched.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_core.h"
#include "igt_device.h"
diff --git a/tests/i915/sysfs_clients.c b/tests/i915/sysfs_clients.c
index 0b7066c0..04636777 100644
--- a/tests/i915/sysfs_clients.c
+++ b/tests/i915/sysfs_clients.c
@@ -19,6 +19,7 @@
#include "drmtest.h"
#include "i915/gem.h"
#include "i915/gem_context.h"
+#include "i915/gem_create.h"
#include "i915/gem_engine_topology.h"
#include "i915/gem_mman.h"
#include "igt_aux.h"
diff --git a/tests/i915/sysfs_timeslice_duration.c b/tests/i915/sysfs_timeslice_duration.c
index 754b7ca6..05ab7966 100644
--- a/tests/i915/sysfs_timeslice_duration.c
+++ b/tests/i915/sysfs_timeslice_duration.c
@@ -32,6 +32,7 @@
#include "igt_params.h"
#include "drmtest.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_engine_topology.h"
#include "i915/gem_mman.h"
#include "igt_dummyload.h"
diff --git a/tests/kms_big_fb.c b/tests/kms_big_fb.c
index b2027b6b..b35727a0 100644
--- a/tests/kms_big_fb.c
+++ b/tests/kms_big_fb.c
@@ -27,7 +27,7 @@
#include <stdio.h>
#include <string.h>
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Test big framebuffers");
diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
index bba49fd8..01e3b979 100644
--- a/tests/kms_ccs.c
+++ b/tests/kms_ccs.c
@@ -24,7 +24,7 @@
#include "igt.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#define SDR_PLANE_BASE 3
diff --git a/tests/kms_flip.c b/tests/kms_flip.c
index 64907c2c..8f736652 100755
--- a/tests/kms_flip.c
+++ b/tests/kms_flip.c
@@ -42,7 +42,7 @@
#include <time.h>
#include <pthread.h>
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_stats.h"
#define TEST_DPMS (1 << 0)
diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index 2e74bec6..658c3976 100644
--- a/tests/kms_frontbuffer_tracking.c
+++ b/tests/kms_frontbuffer_tracking.c
@@ -31,6 +31,7 @@
#include <pthread.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_sysfs.h"
#include "igt_psr.h"
diff --git a/tests/kms_getfb.c b/tests/kms_getfb.c
index 5f4758c6..917b57bb 100644
--- a/tests/kms_getfb.c
+++ b/tests/kms_getfb.c
@@ -40,7 +40,7 @@
#include "drm.h"
#include "drm_fourcc.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_device.h"
IGT_TEST_DESCRIPTION("Tests GETFB and GETFB2 ioctls.");
diff --git a/tests/prime_busy.c b/tests/prime_busy.c
index aec76393..8bf50eaf 100644
--- a/tests/prime_busy.c
+++ b/tests/prime_busy.c
@@ -24,6 +24,7 @@
#include <sys/poll.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Basic check of polling for prime fences.");
diff --git a/tests/prime_mmap.c b/tests/prime_mmap.c
index cdf2d514..a4e4b4b6 100644
--- a/tests/prime_mmap.c
+++ b/tests/prime_mmap.c
@@ -43,7 +43,7 @@
#include "drm.h"
#include "drmtest.h"
#include "i915_drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_mman.h"
#include "igt_debugfs.h"
#include "ioctl_wrappers.h"
diff --git a/tests/prime_mmap_kms.c b/tests/prime_mmap_kms.c
index 6cc1db87..1575eeb1 100644
--- a/tests/prime_mmap_kms.c
+++ b/tests/prime_mmap_kms.c
@@ -32,7 +32,7 @@
#include "igt.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION(
"Efficiently sharing CPU and GPU buffers");
diff --git a/tests/prime_self_import.c b/tests/prime_self_import.c
index 4a0a9803..38a55439 100644
--- a/tests/prime_self_import.c
+++ b/tests/prime_self_import.c
@@ -44,7 +44,7 @@
#include <pthread.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Check whether prime import/export works on the same"
" device... but with different fds.");
diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
index 07ff69a2..aeff282b 100644
--- a/tests/prime_vgem.c
+++ b/tests/prime_vgem.c
@@ -26,6 +26,7 @@
#include <time.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_vgem.h"
#include "intel_batchbuffer.h" /* igt_blitter_src_copy() */
diff --git a/tools/intel_reg.c b/tools/intel_reg.c
index da1832be..584a2ccd 100644
--- a/tools/intel_reg.c
+++ b/tools/intel_reg.c
@@ -32,7 +32,7 @@
#include <sys/types.h>
#include <unistd.h>
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_gt.h"
#include "intel_io.h"
--
2.26.3
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^ permalink raw reply related [flat|nested] 39+ messages in thread* [igt-dev] [PATCH i-g-t 01/12] lib/i915/gem_create: Add gem_create_ext
@ 2021-05-11 16:51 ` Matthew Auld
0 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev
Cc: thomas.hellstrom, petri.latvala, intel-gfx, Chris P Wilson, daniel
From: Andrzej Turko <andrzej.turko@linux.intel.com>
Add a wrapper for gem_create_ext ioctl (a version of gem_create that
accepts extensions). In preparation for the driver change implementing it,
a local definition of its id and necessary structs have been added,
which are to be erased as soon as those definitions
appear in the i915_drm.h file.
The new ioctl wrapper is added to a separate file.
For consistency the wrapper of the old ioctl, gem_create
is moved from ioctl_wrappers to gem_create.
Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com>
Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Chris P Wilson <chris.p.wilson@intel.com>
---
benchmarks/gem_blt.c | 2 +-
benchmarks/gem_busy.c | 2 +-
benchmarks/gem_create.c | 2 +-
benchmarks/gem_exec_ctx.c | 2 +-
benchmarks/gem_exec_fault.c | 2 +-
benchmarks/gem_exec_nop.c | 2 +-
benchmarks/gem_exec_reloc.c | 2 +-
benchmarks/gem_exec_trace.c | 2 +-
benchmarks/gem_latency.c | 2 +-
benchmarks/gem_prw.c | 2 +-
benchmarks/gem_set_domain.c | 2 +-
benchmarks/gem_syslatency.c | 2 +-
benchmarks/gem_wsim.c | 2 +-
benchmarks/prime_lookup.c | 2 +-
lib/i915/gem.h | 3 -
lib/i915/gem_create.c | 43 +++++++-
lib/i915/gem_create.h | 125 ++++++++++++++++++++++++
lib/i915/gem_mman.c | 2 +-
lib/i915/gem_ring.c | 1 +
lib/i915/gem_submission.c | 1 +
lib/igt_draw.c | 2 +-
lib/igt_dummyload.c | 2 +-
lib/igt_fb.c | 2 +-
lib/intel_batchbuffer.c | 2 +-
lib/intel_bufops.c | 2 +-
lib/ioctl_wrappers.c | 2 +-
tests/amdgpu/amd_prime.c | 1 +
tests/core_hotunplug.c | 1 +
tests/i915/api_intel_allocator.c | 1 +
tests/i915/api_intel_bb.c | 1 +
tests/i915/gem_bad_reloc.c | 1 +
tests/i915/gem_basic.c | 2 +-
tests/i915/gem_blits.c | 1 +
tests/i915/gem_busy.c | 1 +
tests/i915/gem_close.c | 1 +
tests/i915/gem_close_race.c | 1 +
tests/i915/gem_concurrent_all.c | 1 +
tests/i915/gem_create.c | 1 +
tests/i915/gem_cs_tlb.c | 1 +
tests/i915/gem_ctx_clone.c | 1 +
tests/i915/gem_ctx_create.c | 1 +
tests/i915/gem_ctx_engines.c | 1 +
tests/i915/gem_ctx_exec.c | 1 +
tests/i915/gem_ctx_isolation.c | 1 +
tests/i915/gem_ctx_param.c | 1 +
tests/i915/gem_ctx_shared.c | 1 +
tests/i915/gem_ctx_sseu.c | 1 +
tests/i915/gem_ctx_switch.c | 1 +
tests/i915/gem_eio.c | 1 +
tests/i915/gem_evict_alignment.c | 1 +
tests/i915/gem_evict_everything.c | 1 +
tests/i915/gem_exec_alignment.c | 1 +
tests/i915/gem_exec_async.c | 1 +
tests/i915/gem_exec_await.c | 1 +
tests/i915/gem_exec_balancer.c | 1 +
tests/i915/gem_exec_basic.c | 2 +-
tests/i915/gem_exec_big.c | 1 +
tests/i915/gem_exec_capture.c | 1 +
tests/i915/gem_exec_create.c | 1 +
tests/i915/gem_exec_endless.c | 1 +
tests/i915/gem_exec_fair.c | 1 +
tests/i915/gem_exec_fence.c | 1 +
tests/i915/gem_exec_flush.c | 1 +
tests/i915/gem_exec_gttfill.c | 1 +
tests/i915/gem_exec_latency.c | 1 +
tests/i915/gem_exec_lut_handle.c | 1 +
tests/i915/gem_exec_nop.c | 1 +
tests/i915/gem_exec_parallel.c | 1 +
tests/i915/gem_exec_params.c | 1 +
tests/i915/gem_exec_reloc.c | 1 +
tests/i915/gem_exec_schedule.c | 1 +
tests/i915/gem_exec_store.c | 1 +
tests/i915/gem_exec_suspend.c | 1 +
tests/i915/gem_exec_whisper.c | 1 +
tests/i915/gem_fd_exhaustion.c | 2 +-
tests/i915/gem_fence_thrash.c | 2 +-
tests/i915/gem_fence_upload.c | 2 +-
tests/i915/gem_fenced_exec_thrash.c | 1 +
tests/i915/gem_flink_race.c | 2 +-
tests/i915/gem_gtt_cpu_tlb.c | 2 +-
tests/i915/gem_gtt_hog.c | 1 +
tests/i915/gem_gtt_speed.c | 2 +-
tests/i915/gem_huc_copy.c | 1 +
tests/i915/gem_linear_blits.c | 1 +
tests/i915/gem_lut_handle.c | 2 +-
tests/i915/gem_madvise.c | 2 +-
tests/i915/gem_mmap.c | 2 +-
tests/i915/gem_mmap_gtt.c | 1 +
tests/i915/gem_mmap_offset.c | 1 +
tests/i915/gem_mmap_wc.c | 2 +-
tests/i915/gem_ppgtt.c | 1 +
tests/i915/gem_pread.c | 2 +-
tests/i915/gem_pwrite.c | 2 +-
tests/i915/gem_readwrite.c | 2 +-
tests/i915/gem_reset_stats.c | 1 +
tests/i915/gem_ringfill.c | 1 +
tests/i915/gem_set_tiling_vs_gtt.c | 2 +-
tests/i915/gem_set_tiling_vs_pwrite.c | 2 +-
tests/i915/gem_shrink.c | 1 +
tests/i915/gem_softpin.c | 1 +
tests/i915/gem_streaming_writes.c | 1 +
tests/i915/gem_sync.c | 1 +
tests/i915/gem_tiled_fence_blits.c | 1 +
tests/i915/gem_tiled_pread_basic.c | 2 +-
tests/i915/gem_tiled_pread_pwrite.c | 2 +-
tests/i915/gem_tiled_swapping.c | 2 +-
tests/i915/gem_tiled_wb.c | 2 +-
tests/i915/gem_tiled_wc.c | 2 +-
tests/i915/gem_tiling_max_stride.c | 2 +-
tests/i915/gem_unfence_active_buffers.c | 1 +
tests/i915/gem_unref_active_buffers.c | 1 +
tests/i915/gem_userptr_blits.c | 1 +
tests/i915/gem_vm_create.c | 1 +
tests/i915/gem_wait.c | 1 +
tests/i915/gem_watchdog.c | 1 +
tests/i915/gem_workarounds.c | 1 +
tests/i915/gen3_mixed_blits.c | 1 +
tests/i915/gen3_render_linear_blits.c | 1 +
tests/i915/gen3_render_mixed_blits.c | 1 +
tests/i915/gen3_render_tiledx_blits.c | 1 +
tests/i915/gen3_render_tiledy_blits.c | 1 +
tests/i915/gen7_exec_parse.c | 1 +
tests/i915/gen9_exec_parse.c | 1 +
tests/i915/i915_hangman.c | 1 +
tests/i915/i915_module_load.c | 2 +-
tests/i915/i915_pm_rc6_residency.c | 1 +
tests/i915/i915_pm_rpm.c | 1 +
tests/i915/i915_suspend.c | 1 +
tests/i915/perf_pmu.c | 1 +
tests/i915/sysfs_clients.c | 1 +
tests/i915/sysfs_timeslice_duration.c | 1 +
tests/kms_big_fb.c | 2 +-
tests/kms_ccs.c | 2 +-
tests/kms_flip.c | 2 +-
tests/kms_frontbuffer_tracking.c | 1 +
tests/kms_getfb.c | 2 +-
tests/prime_busy.c | 1 +
tests/prime_mmap.c | 2 +-
tests/prime_mmap_kms.c | 2 +-
tests/prime_self_import.c | 2 +-
tests/prime_vgem.c | 1 +
tools/intel_reg.c | 2 +-
142 files changed, 306 insertions(+), 57 deletions(-)
create mode 100644 lib/i915/gem_create.h
diff --git a/benchmarks/gem_blt.c b/benchmarks/gem_blt.c
index 34b82a87..424ce8e7 100644
--- a/benchmarks/gem_blt.c
+++ b/benchmarks/gem_blt.c
@@ -41,7 +41,7 @@
#include <time.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#define COPY_BLT_CMD (2<<29|0x53<<22|0x6)
#define BLT_WRITE_ALPHA (1<<21)
diff --git a/benchmarks/gem_busy.c b/benchmarks/gem_busy.c
index 69be8c17..70885e25 100644
--- a/benchmarks/gem_busy.c
+++ b/benchmarks/gem_busy.c
@@ -45,7 +45,7 @@
#include "intel_chipset.h"
#include "intel_reg.h"
#include "igt_stats.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_mman.h"
#define ENGINE_FLAGS (I915_EXEC_RING_MASK | I915_EXEC_BSD_MASK)
diff --git a/benchmarks/gem_create.c b/benchmarks/gem_create.c
index d4e297ed..7808f43a 100644
--- a/benchmarks/gem_create.c
+++ b/benchmarks/gem_create.c
@@ -40,7 +40,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_aux.h"
#include "igt_stats.h"
#include "intel_reg.h"
diff --git a/benchmarks/gem_exec_ctx.c b/benchmarks/gem_exec_ctx.c
index b6f403fb..b0c62e4c 100644
--- a/benchmarks/gem_exec_ctx.c
+++ b/benchmarks/gem_exec_ctx.c
@@ -40,7 +40,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "intel_io.h"
#include "intel_reg.h"
#include "igt_stats.h"
diff --git a/benchmarks/gem_exec_fault.c b/benchmarks/gem_exec_fault.c
index a3a0992c..d53fab96 100644
--- a/benchmarks/gem_exec_fault.c
+++ b/benchmarks/gem_exec_fault.c
@@ -42,7 +42,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_stats.h"
#include "intel_io.h"
#include "intel_reg.h"
diff --git a/benchmarks/gem_exec_nop.c b/benchmarks/gem_exec_nop.c
index c44d3454..9f8634a7 100644
--- a/benchmarks/gem_exec_nop.c
+++ b/benchmarks/gem_exec_nop.c
@@ -40,7 +40,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_stats.h"
#include "intel_io.h"
#include "intel_reg.h"
diff --git a/benchmarks/gem_exec_reloc.c b/benchmarks/gem_exec_reloc.c
index abaf9345..dadc064f 100644
--- a/benchmarks/gem_exec_reloc.c
+++ b/benchmarks/gem_exec_reloc.c
@@ -38,7 +38,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_mman.h"
#include "igt_debugfs.h"
#include "intel_reg.h"
diff --git a/benchmarks/gem_exec_trace.c b/benchmarks/gem_exec_trace.c
index e37f6fb7..4263ccb0 100644
--- a/benchmarks/gem_exec_trace.c
+++ b/benchmarks/gem_exec_trace.c
@@ -41,7 +41,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_stats.h"
#include "intel_io.h"
#include "ioctl_wrappers.h"
diff --git a/benchmarks/gem_latency.c b/benchmarks/gem_latency.c
index 9b3d22b7..cc8b3de5 100644
--- a/benchmarks/gem_latency.c
+++ b/benchmarks/gem_latency.c
@@ -43,7 +43,7 @@
#include <sys/resource.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_device.h"
diff --git a/benchmarks/gem_prw.c b/benchmarks/gem_prw.c
index 5d3fda9a..c6f3e066 100644
--- a/benchmarks/gem_prw.c
+++ b/benchmarks/gem_prw.c
@@ -40,7 +40,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_aux.h"
#include "igt_stats.h"
#include "ioctl_wrappers.h"
diff --git a/benchmarks/gem_set_domain.c b/benchmarks/gem_set_domain.c
index 1c9d797c..c92beea4 100644
--- a/benchmarks/gem_set_domain.c
+++ b/benchmarks/gem_set_domain.c
@@ -40,7 +40,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_aux.h"
#include "ioctl_wrappers.h"
diff --git a/benchmarks/gem_syslatency.c b/benchmarks/gem_syslatency.c
index c10d4f50..035ee934 100644
--- a/benchmarks/gem_syslatency.c
+++ b/benchmarks/gem_syslatency.c
@@ -44,7 +44,7 @@
#include <linux/unistd.h>
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#define sigev_notify_thread_id _sigev_un._tid
diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index 1b66e63e..d1435222 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -56,7 +56,7 @@
#include "igt_perf.h"
#include "sw_sync.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_engine_topology.h"
#include "i915/gem_mman.h"
diff --git a/benchmarks/prime_lookup.c b/benchmarks/prime_lookup.c
index b1891756..9c885367 100644
--- a/benchmarks/prime_lookup.c
+++ b/benchmarks/prime_lookup.c
@@ -38,7 +38,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_rand.h"
#include "intel_io.h"
#include "ioctl_wrappers.h"
diff --git a/lib/i915/gem.h b/lib/i915/gem.h
index bd23a277..feabac8d 100644
--- a/lib/i915/gem.h
+++ b/lib/i915/gem.h
@@ -32,7 +32,4 @@ void gem_quiescent_gpu(int i915);
int gem_reopen_driver(int i915);
-int __gem_create(int fd, uint64_t *size, uint32_t *handle);
-uint32_t gem_create(int fd, uint64_t size);
-
#endif /* I915_GEM_H */
diff --git a/lib/i915/gem_create.c b/lib/i915/gem_create.c
index a8c1a581..530877cc 100644
--- a/lib/i915/gem_create.c
+++ b/lib/i915/gem_create.c
@@ -5,7 +5,7 @@
#include <errno.h>
-#include "gem.h"
+#include "gem_create.h"
#include "i915_drm.h"
#include "igt_core.h"
#include "ioctl_wrappers.h"
@@ -47,3 +47,44 @@ uint32_t gem_create(int fd, uint64_t size)
return handle;
}
+
+int __gem_create_ext(int fd, uint64_t *size, uint32_t *handle,
+ struct i915_user_extension *ext)
+{
+ struct local_drm_i915_gem_create_ext create = {
+ .size = *size,
+ .extensions = to_user_pointer(ext),
+ };
+ int err = 0;
+
+ if (igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_CREATE_EXT, &create) == 0) {
+ *handle = create.handle;
+ *size = create.size;
+ } else {
+ err = -errno;
+ igt_assume(err != 0);
+ }
+
+ errno = 0;
+ return err;
+}
+
+/**
+ * gem_create_ext:
+ * @fd: open i915 drm file descriptor
+ * @size: desired size of the buffer
+ * @ext: optional extensions chain
+ *
+ * This wraps the GEM_CREATE_EXT ioctl, which allocates a new gem buffer object
+ * of @size.
+ *
+ * Returns: The file-private handle of the created buffer object
+ */
+uint32_t gem_create_ext(int fd, uint64_t size, struct i915_user_extension *ext)
+{
+ uint32_t handle;
+
+ igt_assert_eq(__gem_create_ext(fd, &size, &handle, ext), 0);
+
+ return handle;
+}
diff --git a/lib/i915/gem_create.h b/lib/i915/gem_create.h
new file mode 100644
index 00000000..5a07c1c8
--- /dev/null
+++ b/lib/i915/gem_create.h
@@ -0,0 +1,125 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef GEM_CREATE_H
+#define GEM_CREATE_H
+
+#include <stdint.h>
+
+#include "i915_drm.h"
+
+/**
+ * struct drm_i915_gem_create_ext - Existing gem_create behaviour, with added
+ * extension support using struct i915_user_extension.
+ *
+ * Note that in the future we want to have our buffer flags here, at least for
+ * the stuff that is immutable. Previously we would have two ioctls, one to
+ * create the object with gem_create, and another to apply various parameters,
+ * however this creates some ambiguity for the params which are considered
+ * immutable. Also in general we're phasing out the various SET/GET ioctls.
+ */
+struct local_drm_i915_gem_create_ext {
+ /**
+ * @size: Requested size for the object.
+ *
+ * The (page-aligned) allocated size for the object will be returned.
+ *
+ * Note that for some devices we have might have further minimum
+ * page-size restrictions(larger than 4K), like for device local-memory.
+ * However in general the final size here should always reflect any
+ * rounding up, if for example using the I915_GEM_CREATE_EXT_MEMORY_REGIONS
+ * extension to place the object in device local-memory.
+ */
+ __u64 size;
+ /**
+ * @handle: Returned handle for the object.
+ *
+ * Object handles are nonzero.
+ */
+ __u32 handle;
+ /** @flags: MBZ */
+ __u32 flags;
+ /**
+ * @extensions: The chain of extensions to apply to this object.
+ *
+ * This will be useful in the future when we need to support several
+ * different extensions, and we need to apply more than one when
+ * creating the object. See struct i915_user_extension.
+ *
+ * If we don't supply any extensions then we get the same old gem_create
+ * behaviour.
+ *
+ * For I915_GEM_CREATE_EXT_MEMORY_REGIONS usage see
+ * struct drm_i915_gem_create_ext_memory_regions.
+ */
+#define LOCAL_I915_GEM_CREATE_EXT_MEMORY_REGIONS 0
+ __u64 extensions;
+};
+
+/**
+ * struct drm_i915_gem_create_ext_memory_regions - The
+ * I915_GEM_CREATE_EXT_MEMORY_REGIONS extension.
+ *
+ * Set the object with the desired set of placements/regions in priority
+ * order. Each entry must be unique and supported by the device.
+ *
+ * This is provided as an array of struct drm_i915_gem_memory_class_instance, or
+ * an equivalent layout of class:instance pair encodings. See struct
+ * drm_i915_query_memory_regions and DRM_I915_QUERY_MEMORY_REGIONS for how to
+ * query the supported regions for a device.
+ *
+ * As an example, on discrete devices, if we wish to set the placement as
+ * device local-memory we can do something like:
+ *
+ * .. code-block:: C
+ *
+ * struct drm_i915_gem_memory_class_instance region_lmem = {
+ * .memory_class = I915_MEMORY_CLASS_DEVICE,
+ * .memory_instance = 0,
+ * };
+ * struct drm_i915_gem_create_ext_memory_regions regions = {
+ * .base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
+ * .regions = (uintptr_t)®ion_lmem,
+ * .num_regions = 1,
+ * };
+ * struct drm_i915_gem_create_ext create_ext = {
+ * .size = 16 * PAGE_SIZE,
+ * .extensions = (uintptr_t)®ions,
+ * };
+ *
+ * int err = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE_EXT, &create_ext);
+ * if (err) ...
+ *
+ * At which point we get the object handle in &drm_i915_gem_create_ext.handle,
+ * along with the final object size in &drm_i915_gem_create_ext.size, which
+ * should account for any rounding up, if required.
+ */
+struct local_drm_i915_gem_create_ext_memory_regions {
+ /** @base: Extension link. See struct i915_user_extension. */
+ struct i915_user_extension base;
+
+ /** @pad: MBZ */
+ __u32 pad;
+ /** @num_regions: Number of elements in the @regions array. */
+ __u32 num_regions;
+ /**
+ * @regions: The regions/placements array.
+ *
+ * An array of struct drm_i915_gem_memory_class_instance.
+ */
+ __u64 regions;
+};
+
+#define LOCAL_DRM_I915_GEM_CREATE_EXT 0x3c
+#define LOCAL_DRM_IOCTL_I915_GEM_CREATE_EXT DRM_IOWR(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_CREATE_EXT, \
+ struct local_drm_i915_gem_create_ext)
+
+int __gem_create(int fd, uint64_t *size, uint32_t *handle);
+uint32_t gem_create(int fd, uint64_t size);
+int __gem_create_ext(int fd, uint64_t *size, uint32_t *handle,
+ struct i915_user_extension *ext);
+uint32_t gem_create_ext(int fd, uint64_t size, struct i915_user_extension *ext);
+
+#endif /* GEM_CREATE_H */
diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
index ab04cbec..300ca13d 100644
--- a/lib/i915/gem_mman.c
+++ b/lib/i915/gem_mman.c
@@ -31,7 +31,7 @@
#include "ioctl_wrappers.h"
#include "intel_chipset.h"
-#include "gem.h"
+#include "gem_create.h"
#include "gem_mman.h"
#ifdef HAVE_VALGRIND
diff --git a/lib/i915/gem_ring.c b/lib/i915/gem_ring.c
index f224e822..6d28b5d9 100644
--- a/lib/i915/gem_ring.c
+++ b/lib/i915/gem_ring.c
@@ -27,6 +27,7 @@
#include <sys/time.h>
#include "gem.h"
+#include "gem_create.h"
#include "gem_ring.h"
#include "gem_submission.h"
diff --git a/lib/i915/gem_submission.c b/lib/i915/gem_submission.c
index 051f9d04..bd4bbb3e 100644
--- a/lib/i915/gem_submission.c
+++ b/lib/i915/gem_submission.c
@@ -31,6 +31,7 @@
#include <i915_drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_engine_topology.h"
#include "i915/gem_submission.h"
diff --git a/lib/igt_draw.c b/lib/igt_draw.c
index 949c0d77..a3144b50 100644
--- a/lib/igt_draw.c
+++ b/lib/igt_draw.c
@@ -34,7 +34,7 @@
#include "igt_fb.h"
#include "ioctl_wrappers.h"
#include "i830_reg.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_mman.h"
#ifndef PAGE_ALIGN
diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index 34ad9221..1a3abb5d 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -31,7 +31,7 @@
#include <i915_drm.h>
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_engine_topology.h"
#include "i915/gem_mman.h"
#include "i915/gem_submission.h"
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index f8f02766..3e6841fd 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -33,7 +33,7 @@
#include <pixman.h>
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_mman.h"
#include "igt_aux.h"
#include "igt_color_encoding.h"
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 0b2c5b21..cc976a62 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -35,7 +35,7 @@
#include "drm.h"
#include "drmtest.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "intel_batchbuffer.h"
#include "intel_bufmgr.h"
#include "intel_bufops.h"
diff --git a/lib/intel_bufops.c b/lib/intel_bufops.c
index 5dece576..3ce68663 100644
--- a/lib/intel_bufops.c
+++ b/lib/intel_bufops.c
@@ -25,7 +25,7 @@
#include <sys/ioctl.h>
#include <cairo.h>
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_x86.h"
#include "intel_bufops.h"
diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 4440004c..0c1b5e32 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -49,7 +49,7 @@
#include "drmtest.h"
#include "i915_drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "intel_batchbuffer.h"
#include "intel_chipset.h"
#include "intel_io.h"
diff --git a/tests/amdgpu/amd_prime.c b/tests/amdgpu/amd_prime.c
index 537b0bcd..3e5cc1a7 100644
--- a/tests/amdgpu/amd_prime.c
+++ b/tests/amdgpu/amd_prime.c
@@ -27,6 +27,7 @@
#include <sys/poll.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_vgem.h"
diff --git a/tests/core_hotunplug.c b/tests/core_hotunplug.c
index e6079fa3..a639cfb4 100644
--- a/tests/core_hotunplug.c
+++ b/tests/core_hotunplug.c
@@ -31,6 +31,7 @@
#include <unistd.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/perf.h"
#include "igt.h"
#include "igt_device_scan.h"
diff --git a/tests/i915/api_intel_allocator.c b/tests/i915/api_intel_allocator.c
index 182d9ba7..ea4ba8bb 100644
--- a/tests/i915/api_intel_allocator.c
+++ b/tests/i915/api_intel_allocator.c
@@ -5,6 +5,7 @@
#include <stdatomic.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_aux.h"
#include "intel_allocator.h"
diff --git a/tests/i915/api_intel_bb.c b/tests/i915/api_intel_bb.c
index eafa856d..7ffe64fc 100644
--- a/tests/i915/api_intel_bb.c
+++ b/tests/i915/api_intel_bb.c
@@ -23,6 +23,7 @@
#include "igt.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include <unistd.h>
#include <stdlib.h>
#include <stdio.h>
diff --git a/tests/i915/gem_bad_reloc.c b/tests/i915/gem_bad_reloc.c
index 6acc1724..34c4c82b 100644
--- a/tests/i915/gem_bad_reloc.c
+++ b/tests/i915/gem_bad_reloc.c
@@ -39,6 +39,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Simulates SNA behaviour using negative self-relocations"
diff --git a/tests/i915/gem_basic.c b/tests/i915/gem_basic.c
index 984bdf60..13ecce52 100644
--- a/tests/i915/gem_basic.c
+++ b/tests/i915/gem_basic.c
@@ -37,7 +37,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
static void
test_bad_close(int fd)
diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
index 6ed9b60e..21dcee68 100644
--- a/tests/i915/gem_blits.c
+++ b/tests/i915/gem_blits.c
@@ -23,6 +23,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_x86.h"
diff --git a/tests/i915/gem_busy.c b/tests/i915/gem_busy.c
index 77a55101..dc481f3c 100644
--- a/tests/i915/gem_busy.c
+++ b/tests/i915/gem_busy.c
@@ -26,6 +26,7 @@
#include <sys/ioctl.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_rand.h"
#include "igt_vgem.h"
diff --git a/tests/i915/gem_close.c b/tests/i915/gem_close.c
index 58f2d4b3..ee2d690b 100644
--- a/tests/i915/gem_close.c
+++ b/tests/i915/gem_close.c
@@ -22,6 +22,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
static int batch_create(int fd)
diff --git a/tests/i915/gem_close_race.c b/tests/i915/gem_close_race.c
index 06b80100..ab444945 100644
--- a/tests/i915/gem_close_race.c
+++ b/tests/i915/gem_close_race.c
@@ -42,6 +42,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#define OBJECT_SIZE (256 * 1024)
diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c
index a422a449..d0f9b62e 100644
--- a/tests/i915/gem_concurrent_all.c
+++ b/tests/i915/gem_concurrent_all.c
@@ -49,6 +49,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_vgem.h"
diff --git a/tests/i915/gem_create.c b/tests/i915/gem_create.c
index ce985053..8acc2f52 100644
--- a/tests/i915/gem_create.c
+++ b/tests/i915/gem_create.c
@@ -54,6 +54,7 @@
#include "igt_dummyload.h"
#include "igt_x86.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_engine_topology.h"
#include "i915/gem_mman.h"
#include "i915_drm.h"
diff --git a/tests/i915/gem_cs_tlb.c b/tests/i915/gem_cs_tlb.c
index f72879c3..dec9c107 100644
--- a/tests/i915/gem_cs_tlb.c
+++ b/tests/i915/gem_cs_tlb.c
@@ -50,6 +50,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Check whether we correctly invalidate the cs tlb.");
diff --git a/tests/i915/gem_ctx_clone.c b/tests/i915/gem_ctx_clone.c
index b72269bc..225e801b 100644
--- a/tests/i915/gem_ctx_clone.c
+++ b/tests/i915/gem_ctx_clone.c
@@ -22,6 +22,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_vm.h"
#include "i915_drm.h"
#include "igt.h"
diff --git a/tests/i915/gem_ctx_create.c b/tests/i915/gem_ctx_create.c
index 9a512a03..5b14f7af 100644
--- a/tests/i915/gem_ctx_create.c
+++ b/tests/i915/gem_ctx_create.c
@@ -31,6 +31,7 @@
#include <time.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_rand.h"
#include "sw_sync.h"
diff --git a/tests/i915/gem_ctx_engines.c b/tests/i915/gem_ctx_engines.c
index 643a0b2f..02658c4f 100644
--- a/tests/i915/gem_ctx_engines.c
+++ b/tests/i915/gem_ctx_engines.c
@@ -39,6 +39,7 @@
#include "i915/gem.h"
#include "i915/gem_context.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "sw_sync.h"
diff --git a/tests/i915/gem_ctx_exec.c b/tests/i915/gem_ctx_exec.c
index 89776185..2e72bf71 100644
--- a/tests/i915/gem_ctx_exec.c
+++ b/tests/i915/gem_ctx_exec.c
@@ -41,6 +41,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_dummyload.h"
#include "igt_rand.h"
diff --git a/tests/i915/gem_ctx_isolation.c b/tests/i915/gem_ctx_isolation.c
index 4f174268..4277df34 100644
--- a/tests/i915/gem_ctx_isolation.c
+++ b/tests/i915/gem_ctx_isolation.c
@@ -22,6 +22,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_dummyload.h"
diff --git a/tests/i915/gem_ctx_param.c b/tests/i915/gem_ctx_param.c
index ab0e3007..c024fe60 100644
--- a/tests/i915/gem_ctx_param.c
+++ b/tests/i915/gem_ctx_param.c
@@ -29,6 +29,7 @@
#include "igt.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_vm.h"
IGT_TEST_DESCRIPTION("Basic test for context set/get param input validation.");
diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c
index 6b21994d..c7e957c4 100644
--- a/tests/i915/gem_ctx_shared.c
+++ b/tests/i915/gem_ctx_shared.c
@@ -38,6 +38,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_engine_topology.h"
#include "igt.h"
#include "igt_rand.h"
diff --git a/tests/i915/gem_ctx_sseu.c b/tests/i915/gem_ctx_sseu.c
index 749ce336..7685511f 100644
--- a/tests/i915/gem_ctx_sseu.c
+++ b/tests/i915/gem_ctx_sseu.c
@@ -37,6 +37,7 @@
#include <sys/wait.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt.h"
#include "igt_dummyload.h"
diff --git a/tests/i915/gem_ctx_switch.c b/tests/i915/gem_ctx_switch.c
index 6208dacd..44c659f0 100644
--- a/tests/i915/gem_ctx_switch.c
+++ b/tests/i915/gem_ctx_switch.c
@@ -41,6 +41,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#include "igt.h"
diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index d86ccf2b..25d109d6 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -43,6 +43,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#include "igt.h"
#include "igt_device.h"
diff --git a/tests/i915/gem_evict_alignment.c b/tests/i915/gem_evict_alignment.c
index d4a5877a..e5176b9b 100644
--- a/tests/i915/gem_evict_alignment.c
+++ b/tests/i915/gem_evict_alignment.c
@@ -45,6 +45,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Run a couple of big batches to force the unbind on"
diff --git a/tests/i915/gem_evict_everything.c b/tests/i915/gem_evict_everything.c
index 5d4d15c4..37343b53 100644
--- a/tests/i915/gem_evict_everything.c
+++ b/tests/i915/gem_evict_everything.c
@@ -44,6 +44,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "eviction_common.c"
diff --git a/tests/i915/gem_exec_alignment.c b/tests/i915/gem_exec_alignment.c
index 7bbd2a8f..c4611bd1 100644
--- a/tests/i915/gem_exec_alignment.c
+++ b/tests/i915/gem_exec_alignment.c
@@ -42,6 +42,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Exercises the basic execbuffer using object alignments");
diff --git a/tests/i915/gem_exec_async.c b/tests/i915/gem_exec_async.c
index 412ad737..bf8a856a 100644
--- a/tests/i915/gem_exec_async.c
+++ b/tests/i915/gem_exec_async.c
@@ -22,6 +22,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Check that we can issue concurrent writes across the engines.");
diff --git a/tests/i915/gem_exec_await.c b/tests/i915/gem_exec_await.c
index e64d2a94..6db30695 100644
--- a/tests/i915/gem_exec_await.c
+++ b/tests/i915/gem_exec_await.c
@@ -26,6 +26,7 @@
#include <sys/signal.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_rand.h"
#include "igt_sysfs.h"
diff --git a/tests/i915/gem_exec_balancer.c b/tests/i915/gem_exec_balancer.c
index 01db0e11..12cb55ab 100644
--- a/tests/i915/gem_exec_balancer.c
+++ b/tests/i915/gem_exec_balancer.c
@@ -27,6 +27,7 @@
#include <sys/signal.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_gt.h"
#include "igt_perf.h"
diff --git a/tests/i915/gem_exec_basic.c b/tests/i915/gem_exec_basic.c
index 31f6a234..5021852f 100644
--- a/tests/i915/gem_exec_basic.c
+++ b/tests/i915/gem_exec_basic.c
@@ -23,7 +23,7 @@
#include "igt.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Basic sanity check of execbuf-ioctl rings.");
diff --git a/tests/i915/gem_exec_big.c b/tests/i915/gem_exec_big.c
index 63de42d5..1f8c720b 100644
--- a/tests/i915/gem_exec_big.c
+++ b/tests/i915/gem_exec_big.c
@@ -46,6 +46,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Run a large nop batch to stress test the error capture"
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index 3da78d63..a6b3d987 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -25,6 +25,7 @@
#include <zlib.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_device.h"
#include "igt_rand.h"
diff --git a/tests/i915/gem_exec_create.c b/tests/i915/gem_exec_create.c
index 6529da7e..8556cb21 100644
--- a/tests/i915/gem_exec_create.c
+++ b/tests/i915/gem_exec_create.c
@@ -40,6 +40,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#include "igt.h"
diff --git a/tests/i915/gem_exec_endless.c b/tests/i915/gem_exec_endless.c
index 1b320d4c..e7d4b56c 100644
--- a/tests/i915/gem_exec_endless.c
+++ b/tests/i915/gem_exec_endless.c
@@ -24,6 +24,7 @@
#include <sys/ioctl.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_device.h"
#include "igt_sysfs.h"
diff --git a/tests/i915/gem_exec_fair.c b/tests/i915/gem_exec_fair.c
index c1a71f77..628f4df2 100644
--- a/tests/i915/gem_exec_fair.c
+++ b/tests/i915/gem_exec_fair.c
@@ -18,6 +18,7 @@
#include "sync_file.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_rand.h"
#include "igt_rapl.h"
diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index b7b3f8e3..70bb0011 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -26,6 +26,7 @@
#include <sys/signal.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_syncobj.h"
#include "igt_sysfs.h"
diff --git a/tests/i915/gem_exec_flush.c b/tests/i915/gem_exec_flush.c
index a2cac71a..629fdd7a 100644
--- a/tests/i915/gem_exec_flush.c
+++ b/tests/i915/gem_exec_flush.c
@@ -24,6 +24,7 @@
#include <time.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#include "igt.h"
#include "igt_x86.h"
diff --git a/tests/i915/gem_exec_gttfill.c b/tests/i915/gem_exec_gttfill.c
index c0e27c9b..e711576f 100644
--- a/tests/i915/gem_exec_gttfill.c
+++ b/tests/i915/gem_exec_gttfill.c
@@ -22,6 +22,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_rand.h"
diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index 8ba924b8..158faee5 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -47,6 +47,7 @@
#include "igt_stats.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#define ENGINE_FLAGS (I915_EXEC_RING_MASK | I915_EXEC_BSD_MASK)
diff --git a/tests/i915/gem_exec_lut_handle.c b/tests/i915/gem_exec_lut_handle.c
index e642686d..3c5c81f1 100644
--- a/tests/i915/gem_exec_lut_handle.c
+++ b/tests/i915/gem_exec_lut_handle.c
@@ -38,6 +38,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Exercises the basic execbuffer using the handle LUT"
diff --git a/tests/i915/gem_exec_nop.c b/tests/i915/gem_exec_nop.c
index 62554ecb..acdf6bde 100644
--- a/tests/i915/gem_exec_nop.c
+++ b/tests/i915/gem_exec_nop.c
@@ -41,6 +41,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_device.h"
#include "igt_rand.h"
diff --git a/tests/i915/gem_exec_parallel.c b/tests/i915/gem_exec_parallel.c
index c9cf9d7a..11cea5d7 100644
--- a/tests/i915/gem_exec_parallel.c
+++ b/tests/i915/gem_exec_parallel.c
@@ -30,6 +30,7 @@
#include <pthread.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_gt.h"
diff --git a/tests/i915/gem_exec_params.c b/tests/i915/gem_exec_params.c
index 6840cf40..6ab1ab11 100644
--- a/tests/i915/gem_exec_params.c
+++ b/tests/i915/gem_exec_params.c
@@ -39,6 +39,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#include "igt.h"
#include "igt_device.h"
diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index 397c335e..c79400fb 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -25,6 +25,7 @@
#include <sys/ioctl.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_device.h"
#include "igt_dummyload.h"
diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 9585059d..6147ff96 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -35,6 +35,7 @@
#include <unistd.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_rand.h"
#include "igt_rapl.h"
diff --git a/tests/i915/gem_exec_store.c b/tests/i915/gem_exec_store.c
index 771ee169..99ffc9ab 100644
--- a/tests/i915/gem_exec_store.c
+++ b/tests/i915/gem_exec_store.c
@@ -30,6 +30,7 @@
#include <strings.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_device.h"
#include "igt_gt.h"
diff --git a/tests/i915/gem_exec_suspend.c b/tests/i915/gem_exec_suspend.c
index b6558a14..d13c443e 100644
--- a/tests/i915/gem_exec_suspend.c
+++ b/tests/i915/gem_exec_suspend.c
@@ -31,6 +31,7 @@
#include <unistd.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_dummyload.h"
#include "igt_gt.h"
diff --git a/tests/i915/gem_exec_whisper.c b/tests/i915/gem_exec_whisper.c
index 71bd610c..a9d3fa05 100644
--- a/tests/i915/gem_exec_whisper.c
+++ b/tests/i915/gem_exec_whisper.c
@@ -28,6 +28,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_debugfs.h"
#include "igt_rapl.h"
diff --git a/tests/i915/gem_fd_exhaustion.c b/tests/i915/gem_fd_exhaustion.c
index 13e8a23a..a6463685 100644
--- a/tests/i915/gem_fd_exhaustion.c
+++ b/tests/i915/gem_fd_exhaustion.c
@@ -33,7 +33,7 @@
#include <fcntl.h>
#include <limits.h>
-#include "i915/gem.h"
+#include "i915/gem_create.h"
igt_simple_main
{
diff --git a/tests/i915/gem_fence_thrash.c b/tests/i915/gem_fence_thrash.c
index 872dc554..89a5ae29 100644
--- a/tests/i915/gem_fence_thrash.c
+++ b/tests/i915/gem_fence_thrash.c
@@ -40,7 +40,7 @@
#include <pthread.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_x86.h"
diff --git a/tests/i915/gem_fence_upload.c b/tests/i915/gem_fence_upload.c
index 87ed1edf..67487d67 100644
--- a/tests/i915/gem_fence_upload.c
+++ b/tests/i915/gem_fence_upload.c
@@ -40,7 +40,7 @@
#include "drm.h"
#include "i915_drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#define OBJECT_SIZE (1024*1024) /* restricted to 1MiB alignment on i915 fences */
diff --git a/tests/i915/gem_fenced_exec_thrash.c b/tests/i915/gem_fenced_exec_thrash.c
index b577a04f..13812bb7 100644
--- a/tests/i915/gem_fenced_exec_thrash.c
+++ b/tests/i915/gem_fenced_exec_thrash.c
@@ -31,6 +31,7 @@
#include <errno.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Test execbuf fence accounting.");
diff --git a/tests/i915/gem_flink_race.c b/tests/i915/gem_flink_race.c
index 58431b36..70e133d7 100644
--- a/tests/i915/gem_flink_race.c
+++ b/tests/i915/gem_flink_race.c
@@ -32,7 +32,7 @@
#include <pthread.h>
#include <errno.h>
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_stats.h"
diff --git a/tests/i915/gem_gtt_cpu_tlb.c b/tests/i915/gem_gtt_cpu_tlb.c
index 07f8f1a3..8000e58c 100644
--- a/tests/i915/gem_gtt_cpu_tlb.c
+++ b/tests/i915/gem_gtt_cpu_tlb.c
@@ -42,7 +42,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Check whether gtt tlbs for cpu access are correctly"
" invalidated.");
diff --git a/tests/i915/gem_gtt_hog.c b/tests/i915/gem_gtt_hog.c
index 1372245b..15a6139e 100644
--- a/tests/i915/gem_gtt_hog.c
+++ b/tests/i915/gem_gtt_hog.c
@@ -40,6 +40,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
static const uint32_t canary = 0xdeadbeef;
diff --git a/tests/i915/gem_gtt_speed.c b/tests/i915/gem_gtt_speed.c
index 644af3d3..272091fd 100644
--- a/tests/i915/gem_gtt_speed.c
+++ b/tests/i915/gem_gtt_speed.c
@@ -41,7 +41,7 @@
#include <sys/time.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#define OBJECT_SIZE 16384
diff --git a/tests/i915/gem_huc_copy.c b/tests/i915/gem_huc_copy.c
index 5954d34e..9a32893e 100644
--- a/tests/i915/gem_huc_copy.c
+++ b/tests/i915/gem_huc_copy.c
@@ -34,6 +34,7 @@
#include <sys/time.h>
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("A very simple workload for the HuC.");
diff --git a/tests/i915/gem_linear_blits.c b/tests/i915/gem_linear_blits.c
index 7b7cf05a..6504c9f2 100644
--- a/tests/i915/gem_linear_blits.c
+++ b/tests/i915/gem_linear_blits.c
@@ -45,6 +45,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Test doing many blits with a working set larger than the"
diff --git a/tests/i915/gem_lut_handle.c b/tests/i915/gem_lut_handle.c
index f14a9bda..64dbb87c 100644
--- a/tests/i915/gem_lut_handle.c
+++ b/tests/i915/gem_lut_handle.c
@@ -38,7 +38,7 @@
#include <sys/time.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Exercises the basic execbuffer using the handle LUT"
" interface.");
diff --git a/tests/i915/gem_madvise.c b/tests/i915/gem_madvise.c
index d772d3ab..d88747a9 100644
--- a/tests/i915/gem_madvise.c
+++ b/tests/i915/gem_madvise.c
@@ -37,7 +37,7 @@
#include <signal.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Checks that the kernel reports EFAULT when trying to use"
" purged bo.");
diff --git a/tests/i915/gem_mmap.c b/tests/i915/gem_mmap.c
index 7c36571c..d12a4c0b 100644
--- a/tests/i915/gem_mmap.c
+++ b/tests/i915/gem_mmap.c
@@ -37,7 +37,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#define OBJECT_SIZE 16384
#define PAGE_SIZE 4096
diff --git a/tests/i915/gem_mmap_gtt.c b/tests/i915/gem_mmap_gtt.c
index 528a7c72..cbfa222a 100644
--- a/tests/i915/gem_mmap_gtt.c
+++ b/tests/i915/gem_mmap_gtt.c
@@ -42,6 +42,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_sysfs.h"
#include "igt_x86.h"
diff --git a/tests/i915/gem_mmap_offset.c b/tests/i915/gem_mmap_offset.c
index 95c934db..f1ba67b7 100644
--- a/tests/i915/gem_mmap_offset.c
+++ b/tests/i915/gem_mmap_offset.c
@@ -32,6 +32,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_x86.h"
diff --git a/tests/i915/gem_mmap_wc.c b/tests/i915/gem_mmap_wc.c
index 4a2192b3..7130a510 100644
--- a/tests/i915/gem_mmap_wc.c
+++ b/tests/i915/gem_mmap_wc.c
@@ -38,7 +38,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
struct local_i915_gem_mmap_v2 {
uint32_t handle;
diff --git a/tests/i915/gem_ppgtt.c b/tests/i915/gem_ppgtt.c
index da83484a..4c9691e3 100644
--- a/tests/i915/gem_ppgtt.c
+++ b/tests/i915/gem_ppgtt.c
@@ -36,6 +36,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_debugfs.h"
diff --git a/tests/i915/gem_pread.c b/tests/i915/gem_pread.c
index ec9991ee..a8bf2b05 100644
--- a/tests/i915/gem_pread.c
+++ b/tests/i915/gem_pread.c
@@ -43,7 +43,7 @@
#include <pthread.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_vgem.h"
#define MiB(x) ((x) * 1024 * 1024)
diff --git a/tests/i915/gem_pwrite.c b/tests/i915/gem_pwrite.c
index 5fd15e6a..e8e8c7ad 100644
--- a/tests/i915/gem_pwrite.c
+++ b/tests/i915/gem_pwrite.c
@@ -42,7 +42,7 @@
#include <sys/time.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_rand.h"
#include "igt_vgem.h"
diff --git a/tests/i915/gem_readwrite.c b/tests/i915/gem_readwrite.c
index 8a958cc9..2d437dec 100644
--- a/tests/i915/gem_readwrite.c
+++ b/tests/i915/gem_readwrite.c
@@ -37,7 +37,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#define OBJECT_SIZE 16384
diff --git a/tests/i915/gem_reset_stats.c b/tests/i915/gem_reset_stats.c
index e1feecb6..627a10ab 100644
--- a/tests/i915/gem_reset_stats.c
+++ b/tests/i915/gem_reset_stats.c
@@ -41,6 +41,7 @@
#include <signal.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#include "igt.h"
#include "igt_sysfs.h"
diff --git a/tests/i915/gem_ringfill.c b/tests/i915/gem_ringfill.c
index 78903707..9ad97532 100644
--- a/tests/i915/gem_ringfill.c
+++ b/tests/i915/gem_ringfill.c
@@ -32,6 +32,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#include "igt.h"
#include "igt_device.h"
diff --git a/tests/i915/gem_set_tiling_vs_gtt.c b/tests/i915/gem_set_tiling_vs_gtt.c
index f09022c6..2f890e83 100644
--- a/tests/i915/gem_set_tiling_vs_gtt.c
+++ b/tests/i915/gem_set_tiling_vs_gtt.c
@@ -37,7 +37,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Check set_tiling vs gtt mmap coherency.");
diff --git a/tests/i915/gem_set_tiling_vs_pwrite.c b/tests/i915/gem_set_tiling_vs_pwrite.c
index 87909d3c..6bec7f27 100644
--- a/tests/i915/gem_set_tiling_vs_pwrite.c
+++ b/tests/i915/gem_set_tiling_vs_pwrite.c
@@ -37,7 +37,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Check set_tiling vs pwrite coherency.");
diff --git a/tests/i915/gem_shrink.c b/tests/i915/gem_shrink.c
index 2269da49..b6450a6f 100644
--- a/tests/i915/gem_shrink.c
+++ b/tests/i915/gem_shrink.c
@@ -28,6 +28,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_gt.h"
#include "igt_debugfs.h"
diff --git a/tests/i915/gem_softpin.c b/tests/i915/gem_softpin.c
index c3bfd10a..bdb04821 100644
--- a/tests/i915/gem_softpin.c
+++ b/tests/i915/gem_softpin.c
@@ -27,6 +27,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "intel_allocator.h"
diff --git a/tests/i915/gem_streaming_writes.c b/tests/i915/gem_streaming_writes.c
index b18ff848..c104792b 100644
--- a/tests/i915/gem_streaming_writes.c
+++ b/tests/i915/gem_streaming_writes.c
@@ -38,6 +38,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#define OBJECT_SIZE 1024*1024
diff --git a/tests/i915/gem_sync.c b/tests/i915/gem_sync.c
index 6ad31517..e1b3ab7d 100644
--- a/tests/i915/gem_sync.c
+++ b/tests/i915/gem_sync.c
@@ -25,6 +25,7 @@
#include <pthread.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_ring.h"
#include "igt_debugfs.h"
#include "igt_dummyload.h"
diff --git a/tests/i915/gem_tiled_fence_blits.c b/tests/i915/gem_tiled_fence_blits.c
index 28beea89..6ce3a38d 100644
--- a/tests/i915/gem_tiled_fence_blits.c
+++ b/tests/i915/gem_tiled_fence_blits.c
@@ -42,6 +42,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_x86.h"
diff --git a/tests/i915/gem_tiled_pread_basic.c b/tests/i915/gem_tiled_pread_basic.c
index 186f630f..2b4cec6e 100644
--- a/tests/i915/gem_tiled_pread_basic.c
+++ b/tests/i915/gem_tiled_pread_basic.c
@@ -47,7 +47,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Test pread behavior on tiled objects with respect to the"
" reported swizzling value.");
diff --git a/tests/i915/gem_tiled_pread_pwrite.c b/tests/i915/gem_tiled_pread_pwrite.c
index ef1e1b3c..f77cd3bd 100644
--- a/tests/i915/gem_tiled_pread_pwrite.c
+++ b/tests/i915/gem_tiled_pread_pwrite.c
@@ -57,7 +57,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Test swizzling by testing pwrite does the inverse of"
" pread.");
diff --git a/tests/i915/gem_tiled_swapping.c b/tests/i915/gem_tiled_swapping.c
index 1bcf2fa4..d33b76db 100644
--- a/tests/i915/gem_tiled_swapping.c
+++ b/tests/i915/gem_tiled_swapping.c
@@ -57,7 +57,7 @@
#include <pthread.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Exercise swizzle code for swapping.");
diff --git a/tests/i915/gem_tiled_wb.c b/tests/i915/gem_tiled_wb.c
index 2ba424e8..e9efbdf2 100644
--- a/tests/i915/gem_tiled_wb.c
+++ b/tests/i915/gem_tiled_wb.c
@@ -44,7 +44,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("This is a test of write-combining mmap's behavior on"
" tiled objects with respect to the reported swizzling"
diff --git a/tests/i915/gem_tiled_wc.c b/tests/i915/gem_tiled_wc.c
index 898aad40..29ea700e 100644
--- a/tests/i915/gem_tiled_wc.c
+++ b/tests/i915/gem_tiled_wc.c
@@ -44,7 +44,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#define WIDTH 512
#define HEIGHT 512
diff --git a/tests/i915/gem_tiling_max_stride.c b/tests/i915/gem_tiling_max_stride.c
index 4a273441..513d579d 100644
--- a/tests/i915/gem_tiling_max_stride.c
+++ b/tests/i915/gem_tiling_max_stride.c
@@ -38,7 +38,7 @@
#include <sys/ioctl.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Check that max fence stride works.");
diff --git a/tests/i915/gem_unfence_active_buffers.c b/tests/i915/gem_unfence_active_buffers.c
index 887d6177..2c9cebb6 100644
--- a/tests/i915/gem_unfence_active_buffers.c
+++ b/tests/i915/gem_unfence_active_buffers.c
@@ -50,6 +50,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Check for use-after-free in the fence stealing code.");
diff --git a/tests/i915/gem_unref_active_buffers.c b/tests/i915/gem_unref_active_buffers.c
index e4a82360..731190b3 100644
--- a/tests/i915/gem_unref_active_buffers.c
+++ b/tests/i915/gem_unref_active_buffers.c
@@ -40,6 +40,7 @@
#include "igt.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Test unreferencing of active buffers.");
diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
index aad5f141..1d67b718 100644
--- a/tests/i915/gem_userptr_blits.c
+++ b/tests/i915/gem_userptr_blits.c
@@ -59,6 +59,7 @@
#include "i915_drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_sysfs.h"
#include "sw_sync.h"
diff --git a/tests/i915/gem_vm_create.c b/tests/i915/gem_vm_create.c
index 6d93c98a..5f982d4d 100644
--- a/tests/i915/gem_vm_create.c
+++ b/tests/i915/gem_vm_create.c
@@ -22,6 +22,7 @@
*/
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_vm.h"
#include "igt.h"
#include "igt_rand.h"
diff --git a/tests/i915/gem_wait.c b/tests/i915/gem_wait.c
index 7b2b1c2b..81ac25b5 100644
--- a/tests/i915/gem_wait.c
+++ b/tests/i915/gem_wait.c
@@ -28,6 +28,7 @@
#include <sys/poll.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_vgem.h"
diff --git a/tests/i915/gem_watchdog.c b/tests/i915/gem_watchdog.c
index 8f9fb177..286002bd 100644
--- a/tests/i915/gem_watchdog.c
+++ b/tests/i915/gem_watchdog.c
@@ -30,6 +30,7 @@
#include <sched.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_params.h"
#include "sw_sync.h"
diff --git a/tests/i915/gem_workarounds.c b/tests/i915/gem_workarounds.c
index 00b475c2..8312e20a 100644
--- a/tests/i915/gem_workarounds.c
+++ b/tests/i915/gem_workarounds.c
@@ -28,6 +28,7 @@
#include <fcntl.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_device.h"
diff --git a/tests/i915/gen3_mixed_blits.c b/tests/i915/gen3_mixed_blits.c
index 10a8cd3e..184effec 100644
--- a/tests/i915/gen3_mixed_blits.c
+++ b/tests/i915/gen3_mixed_blits.c
@@ -45,6 +45,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915_reg.h"
#include "igt.h"
diff --git a/tests/i915/gen3_render_linear_blits.c b/tests/i915/gen3_render_linear_blits.c
index d88a2c93..f01df69e 100644
--- a/tests/i915/gen3_render_linear_blits.c
+++ b/tests/i915/gen3_render_linear_blits.c
@@ -44,6 +44,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915_reg.h"
#include "igt.h"
diff --git a/tests/i915/gen3_render_mixed_blits.c b/tests/i915/gen3_render_mixed_blits.c
index cda175bd..9ebb93be 100644
--- a/tests/i915/gen3_render_mixed_blits.c
+++ b/tests/i915/gen3_render_mixed_blits.c
@@ -45,6 +45,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915_reg.h"
#include "igt.h"
diff --git a/tests/i915/gen3_render_tiledx_blits.c b/tests/i915/gen3_render_tiledx_blits.c
index 579205f3..b8aa0edc 100644
--- a/tests/i915/gen3_render_tiledx_blits.c
+++ b/tests/i915/gen3_render_tiledx_blits.c
@@ -45,6 +45,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915_reg.h"
#include "igt.h"
diff --git a/tests/i915/gen3_render_tiledy_blits.c b/tests/i915/gen3_render_tiledy_blits.c
index 931e91a3..2d1b2d8e 100644
--- a/tests/i915/gen3_render_tiledy_blits.c
+++ b/tests/i915/gen3_render_tiledy_blits.c
@@ -45,6 +45,7 @@
#include "drm.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915_reg.h"
#include "igt.h"
diff --git a/tests/i915/gen7_exec_parse.c b/tests/i915/gen7_exec_parse.c
index f7201bb9..8326fd5c 100644
--- a/tests/i915/gen7_exec_parse.c
+++ b/tests/i915/gen7_exec_parse.c
@@ -32,6 +32,7 @@
#include "igt.h"
#include "igt_device.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "sw_sync.h"
#define DERRMR 0x44050
diff --git a/tests/i915/gen9_exec_parse.c b/tests/i915/gen9_exec_parse.c
index f9de90d2..e10c6ce9 100644
--- a/tests/i915/gen9_exec_parse.c
+++ b/tests/i915/gen9_exec_parse.c
@@ -29,6 +29,7 @@
#include <stdlib.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_submission.h"
#include "igt.h"
#include "sw_sync.h"
diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c
index 72e4d8b8..f6fac283 100644
--- a/tests/i915/i915_hangman.c
+++ b/tests/i915/i915_hangman.c
@@ -33,6 +33,7 @@
#include <fcntl.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_sysfs.h"
#include "igt_debugfs.h"
diff --git a/tests/i915/i915_module_load.c b/tests/i915/i915_module_load.c
index 03dec60d..281454a5 100644
--- a/tests/i915/i915_module_load.c
+++ b/tests/i915/i915_module_load.c
@@ -30,7 +30,7 @@
#include <sys/ioctl.h>
#include <fcntl.h>
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_debugfs.h"
#include "igt_aux.h"
#include "igt_kmod.h"
diff --git a/tests/i915/i915_pm_rc6_residency.c b/tests/i915/i915_pm_rc6_residency.c
index d484121e..bfbe4ab0 100644
--- a/tests/i915/i915_pm_rc6_residency.c
+++ b/tests/i915/i915_pm_rc6_residency.c
@@ -34,6 +34,7 @@
#include <time.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_perf.h"
#include "igt_rapl.h"
diff --git a/tests/i915/i915_pm_rpm.c b/tests/i915/i915_pm_rpm.c
index d9ec0388..da498ad6 100644
--- a/tests/i915/i915_pm_rpm.c
+++ b/tests/i915/i915_pm_rpm.c
@@ -46,6 +46,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_kmod.h"
#include "igt_sysfs.h"
diff --git a/tests/i915/i915_suspend.c b/tests/i915/i915_suspend.c
index 15340edc..da27ce09 100644
--- a/tests/i915/i915_suspend.c
+++ b/tests/i915/i915_suspend.c
@@ -39,6 +39,7 @@
#include <drm.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_device.h"
diff --git a/tests/i915/perf_pmu.c b/tests/i915/perf_pmu.c
index 50b5c82b..172dd161 100644
--- a/tests/i915/perf_pmu.c
+++ b/tests/i915/perf_pmu.c
@@ -39,6 +39,7 @@
#include <sched.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_core.h"
#include "igt_device.h"
diff --git a/tests/i915/sysfs_clients.c b/tests/i915/sysfs_clients.c
index 0b7066c0..04636777 100644
--- a/tests/i915/sysfs_clients.c
+++ b/tests/i915/sysfs_clients.c
@@ -19,6 +19,7 @@
#include "drmtest.h"
#include "i915/gem.h"
#include "i915/gem_context.h"
+#include "i915/gem_create.h"
#include "i915/gem_engine_topology.h"
#include "i915/gem_mman.h"
#include "igt_aux.h"
diff --git a/tests/i915/sysfs_timeslice_duration.c b/tests/i915/sysfs_timeslice_duration.c
index 754b7ca6..05ab7966 100644
--- a/tests/i915/sysfs_timeslice_duration.c
+++ b/tests/i915/sysfs_timeslice_duration.c
@@ -32,6 +32,7 @@
#include "igt_params.h"
#include "drmtest.h"
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_engine_topology.h"
#include "i915/gem_mman.h"
#include "igt_dummyload.h"
diff --git a/tests/kms_big_fb.c b/tests/kms_big_fb.c
index b2027b6b..b35727a0 100644
--- a/tests/kms_big_fb.c
+++ b/tests/kms_big_fb.c
@@ -27,7 +27,7 @@
#include <stdio.h>
#include <string.h>
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Test big framebuffers");
diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
index bba49fd8..01e3b979 100644
--- a/tests/kms_ccs.c
+++ b/tests/kms_ccs.c
@@ -24,7 +24,7 @@
#include "igt.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#define SDR_PLANE_BASE 3
diff --git a/tests/kms_flip.c b/tests/kms_flip.c
index 64907c2c..8f736652 100755
--- a/tests/kms_flip.c
+++ b/tests/kms_flip.c
@@ -42,7 +42,7 @@
#include <time.h>
#include <pthread.h>
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_stats.h"
#define TEST_DPMS (1 << 0)
diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index 2e74bec6..658c3976 100644
--- a/tests/kms_frontbuffer_tracking.c
+++ b/tests/kms_frontbuffer_tracking.c
@@ -31,6 +31,7 @@
#include <pthread.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_sysfs.h"
#include "igt_psr.h"
diff --git a/tests/kms_getfb.c b/tests/kms_getfb.c
index 5f4758c6..917b57bb 100644
--- a/tests/kms_getfb.c
+++ b/tests/kms_getfb.c
@@ -40,7 +40,7 @@
#include "drm.h"
#include "drm_fourcc.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt_device.h"
IGT_TEST_DESCRIPTION("Tests GETFB and GETFB2 ioctls.");
diff --git a/tests/prime_busy.c b/tests/prime_busy.c
index aec76393..8bf50eaf 100644
--- a/tests/prime_busy.c
+++ b/tests/prime_busy.c
@@ -24,6 +24,7 @@
#include <sys/poll.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
IGT_TEST_DESCRIPTION("Basic check of polling for prime fences.");
diff --git a/tests/prime_mmap.c b/tests/prime_mmap.c
index cdf2d514..a4e4b4b6 100644
--- a/tests/prime_mmap.c
+++ b/tests/prime_mmap.c
@@ -43,7 +43,7 @@
#include "drm.h"
#include "drmtest.h"
#include "i915_drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "i915/gem_mman.h"
#include "igt_debugfs.h"
#include "ioctl_wrappers.h"
diff --git a/tests/prime_mmap_kms.c b/tests/prime_mmap_kms.c
index 6cc1db87..1575eeb1 100644
--- a/tests/prime_mmap_kms.c
+++ b/tests/prime_mmap_kms.c
@@ -32,7 +32,7 @@
#include "igt.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION(
"Efficiently sharing CPU and GPU buffers");
diff --git a/tests/prime_self_import.c b/tests/prime_self_import.c
index 4a0a9803..38a55439 100644
--- a/tests/prime_self_import.c
+++ b/tests/prime_self_import.c
@@ -44,7 +44,7 @@
#include <pthread.h>
#include "drm.h"
-#include "i915/gem.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Check whether prime import/export works on the same"
" device... but with different fds.");
diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
index 07ff69a2..aeff282b 100644
--- a/tests/prime_vgem.c
+++ b/tests/prime_vgem.c
@@ -26,6 +26,7 @@
#include <time.h>
#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_vgem.h"
#include "intel_batchbuffer.h" /* igt_blitter_src_copy() */
diff --git a/tools/intel_reg.c b/tools/intel_reg.c
index da1832be..584a2ccd 100644
--- a/tools/intel_reg.c
+++ b/tools/intel_reg.c
@@ -32,7 +32,7 @@
#include <sys/types.h>
#include <unistd.h>
-#include "i915/gem.h"
+#include "i915/gem_create.h"
#include "igt.h"
#include "igt_gt.h"
#include "intel_io.h"
--
2.26.3
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [Intel-gfx] [PATCH i-g-t 02/12] lib/i915/intel_memory_region: Add memory regions stubs
2021-05-11 16:51 ` [igt-dev] " Matthew Auld
(?)
(?)
@ 2021-05-11 16:51 ` Matthew Auld
-1 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev; +Cc: thomas.hellstrom, Dominik Grzegorzek, intel-gfx, Andrzej Turko
From: Andrzej Turko <andrzej.turko@linux.intel.com>
Added stubs for memory regions to make upstreaming of tests which are
using this interface possible.
The memory region uapi implementation in the driver is not stable yet.
Thus, the full memory region interface cannot be used in lib. This
commit adds stubs for this uapi to be used in tests. This way future
introduction of the full memory regions uapi will trigger
much smaller changes in tests.
Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com>
Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
---
lib/i915/intel_memory_region.c | 399 +++++++++++++++++++++++++++++++++
lib/i915/intel_memory_region.h | 220 ++++++++++++++++++
lib/ioctl_wrappers.h | 1 +
lib/meson.build | 1 +
4 files changed, 621 insertions(+)
create mode 100644 lib/i915/intel_memory_region.c
create mode 100644 lib/i915/intel_memory_region.h
diff --git a/lib/i915/intel_memory_region.c b/lib/i915/intel_memory_region.c
new file mode 100644
index 00000000..5452dd8e
--- /dev/null
+++ b/lib/i915/intel_memory_region.c
@@ -0,0 +1,399 @@
+/*
+ * Copyright © 2020 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include <linux/limits.h>
+#include <signal.h>
+#include <sys/ioctl.h>
+#include <sys/time.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/sysinfo.h>
+#include <fcntl.h>
+
+#include "i915/gem_create.h"
+#include "intel_reg.h"
+#include "drmtest.h"
+#include "ioctl_wrappers.h"
+#include "igt_dummyload.h"
+#include "igt_gt.h"
+#include "igt_params.h"
+#include "igt_sysfs.h"
+#include "intel_chipset.h"
+#include "igt_collection.h"
+#include "igt_device.h"
+#include "igt_aux.h"
+
+#include "i915/intel_memory_region.h"
+
+const char *get_memory_region_name(uint32_t region)
+{
+ uint16_t class = MEMORY_TYPE_FROM_REGION(region);
+
+ if (class == LOCAL_I915_MEMORY_CLASS_SYSTEM)
+ return "smem";
+
+ igt_assert_f(false, "Unknown memory region");
+}
+
+/**
+ * gem_get_batch_size:
+ * @fd: open i915 drm file descriptor
+ * @mem_region_type: used memory_region type
+ */
+uint32_t gem_get_batch_size(int fd, uint8_t mem_region_type)
+{
+ /* temporary solution, to be erased later */
+ (void) fd;
+ (void) mem_region_type;
+
+ return 4096;
+}
+
+static uint64_t __get_meminfo(const char *info, const char *tag)
+{
+ const char *str;
+ unsigned long val;
+
+ str = strstr(info, tag);
+ if (str && sscanf(str + strlen(tag), " %lu", &val) == 1)
+ return (uint64_t)val << 10;
+
+ igt_warn("Unrecognized /proc/meminfo field: '%s'\n", tag);
+ return 0;
+}
+
+static uint64_t __get_available_smem(int fd)
+{
+ uint64_t retval;
+ char *info;
+ int proc_fd;
+
+ intel_purge_vm_caches(fd);
+
+ proc_fd = open("/proc", O_RDONLY);
+ info = igt_sysfs_get(proc_fd, "meminfo");
+ close(proc_fd);
+
+ if (info) {
+ retval = __get_meminfo(info, "MemAvailable:");
+ } else {
+ struct sysinfo sysinf;
+
+ igt_assert(sysinfo(&sysinf) == 0);
+ retval = sysinf.freeram;
+ retval *= sysinf.mem_unit;
+ }
+
+ return retval;
+}
+
+/**
+ * gem_get_query_memory_regions:
+ * @fd: open i915 drm file descriptor
+ *
+ * This function is prepared as a wrapper for the upcoming memory
+ * regions implementation.
+ *
+ * Returns: Filled struct with available memory regions.
+ */
+struct local_drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd)
+{
+ struct local_drm_i915_query_memory_regions *query_info;
+
+ query_info = calloc(1, sizeof(struct local_drm_i915_query_memory_regions)
+ + sizeof(struct local_drm_i915_memory_region_info));
+
+ query_info->num_regions = 1;
+ query_info->regions[0].region.memory_class = LOCAL_I915_MEMORY_CLASS_SYSTEM;
+ query_info->regions[0].probed_size = intel_get_total_ram_mb() << 20;
+ query_info->regions[0].unallocated_size = __get_available_smem(fd);
+
+ return query_info;
+}
+
+/* A version of gem_create_in_memory_region_list which can be allowed to
+ fail so that the object creation can be retried */
+int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t size,
+ struct local_drm_i915_gem_memory_class_instance *mem_regions,
+ int num_regions)
+{
+ /* a temporary solution, to be removed when these arguments will be used */
+ (void) mem_regions;
+ (void) num_regions;
+
+ return __gem_create(fd, &size, handle);
+}
+
+/* gem_create_in_memory_region_list:
+ * @fd: opened i915 drm file descriptor
+ * @size: requested size of the buffer
+ * @mem_regions: memory regions array (priority list)
+ * @num_regions: @mem_regions length
+ */
+uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
+ struct local_drm_i915_gem_memory_class_instance *mem_regions,
+ int num_regions)
+{
+ uint32_t handle;
+ int ret = __gem_create_in_memory_region_list(fd, &handle, size,
+ mem_regions, num_regions);
+ igt_assert_eq(ret, 0);
+ return handle;
+}
+
+static bool __region_belongs_to_regions_type(struct local_drm_i915_gem_memory_class_instance region,
+ uint32_t *mem_regions_type,
+ int num_regions)
+{
+ for (int i = 0; i < num_regions; i++)
+ if (mem_regions_type[i] == region.memory_class)
+ return true;
+ return false;
+}
+
+struct igt_collection *
+__get_memory_region_set(struct local_drm_i915_query_memory_regions *regions,
+ uint32_t *mem_regions_type,
+ int num_regions)
+{
+ struct local_drm_i915_gem_memory_class_instance region;
+ struct igt_collection *set;
+ int count = 0, pos = 0;
+
+ for (int i = 0; i < regions->num_regions; i++) {
+ region = regions->regions[i].region;
+ if (__region_belongs_to_regions_type(region,
+ mem_regions_type,
+ num_regions))
+ count++;
+ }
+
+ set = igt_collection_create(count);
+
+ for (int i = 0; i < regions->num_regions; i++) {
+ region = regions->regions[i].region;
+ if (__region_belongs_to_regions_type(region,
+ mem_regions_type,
+ num_regions))
+ igt_collection_set_value(set, pos++,
+ INTEL_MEMORY_REGION_ID(region.memory_class,
+ region.memory_instance));
+ }
+
+ igt_assert(count == pos);
+
+ return set;
+}
+
+/**
+ * memregion_dynamic_subtest_name:
+ * @igt_collection: memory region collection
+ *
+ * Function iterates over all memory regions inside the collection (keeped
+ * in the value field) and generates the name which can be used during dynamic
+ * subtest creation.
+ *
+ * Returns: newly allocated string, has to be freed by caller. Asserts if
+ * caller tries to create a name using empty collection.
+ */
+char *memregion_dynamic_subtest_name(struct igt_collection *set)
+{
+ struct igt_collection_data *data;
+ char *name, *p;
+ uint32_t region, len;
+
+ igt_assert(set && set->size);
+ /* enough for "name%d-" * n */
+ len = set->size * 8;
+ p = name = malloc(len);
+ igt_assert(name);
+
+ for_each_collection_data(data, set) {
+ int r;
+
+ region = data->value;
+
+ r = snprintf(p, len, "%s-", get_memory_region_name(region));
+
+ igt_assert(r > 0);
+ p += r;
+ len -= r;
+ }
+
+ /* remove last '-' */
+ *(p - 1) = 0;
+
+ return name;
+}
+
+/**
+ * intel_dump_gpu_meminfo:
+ * @info: pointer to drm_i915_query_memory_regions structure
+ *
+ * Outputs memory regions and their sizes.
+ */
+void intel_dump_gpu_meminfo(struct local_drm_i915_query_memory_regions *info)
+{
+ int i;
+
+ igt_assert(info);
+
+ igt_info("GPU meminfo:\n");
+
+ for (i = 0; i < info->num_regions; i++) {
+ uint32_t region = INTEL_MEMORY_REGION_ID(info->regions[i].region.memory_class,
+ info->regions[i].region.memory_instance);
+ const char *name = get_memory_region_name(region);
+
+ igt_info("- %s [%d] memory [size: 0x%llx, available: 0x%llx]\n",
+ name, info->regions[i].region.memory_instance,
+ info->regions[i].probed_size,
+ info->regions[i].unallocated_size);
+ }
+}
+
+/**
+ * gpu_meminfo_region_count:
+ * @info: pointer to drm_i915_query_memory_regions structure
+ * @memory_class: memory region class
+ *
+ * Returns: number of regions for type @memory_class
+ */
+uint32_t gpu_meminfo_region_count(struct local_drm_i915_query_memory_regions *info,
+ uint16_t memory_class)
+{
+ uint32_t num = 0;
+ int i;
+
+ igt_assert(info);
+
+ for (i = 0; i < info->num_regions; i++)
+ if (info->regions[i].region.memory_class == memory_class)
+ num++;
+
+ return num;
+}
+
+/**
+ * gpu_meminfo_region_total_size:
+ * @info: pointer to drm_i915_query_memory_regions structure
+ * @memory_class: memory region class
+ *
+ * Returns: total size of all regions which are type @memory_class, -1 when the
+ * size of at least one region is unknown
+ */
+uint64_t gpu_meminfo_region_total_size(struct local_drm_i915_query_memory_regions *info,
+ uint16_t memory_class)
+{
+ uint64_t total = 0;
+ int i;
+
+ igt_assert(info);
+
+ for (i = 0; i < info->num_regions; i++)
+ if (info->regions[i].region.memory_class == memory_class) {
+ if (info->regions[i].probed_size == -1)
+ return -1;
+
+ total += info->regions[i].probed_size;
+ }
+
+ return total;
+}
+
+/**
+ * gpu_meminfo_region_total_available:
+ * @info: pointer to drm_i915_query_memory_regions structure
+ * @memory_class: memory region class
+ *
+ * Returns: available size of all regions which are type @memory_class, -1 when
+ * the size of at least one region cannot be estimated
+ */
+uint64_t gpu_meminfo_region_total_available(struct local_drm_i915_query_memory_regions *info,
+ uint16_t memory_class)
+{
+ uint64_t avail = 0;
+ int i;
+
+ igt_assert(info);
+
+ for (i = 0; i < info->num_regions; i++)
+ if (info->regions[i].region.memory_class == memory_class) {
+ if (info->regions[i].unallocated_size == -1)
+ return -1;
+
+ avail += info->regions[i].unallocated_size;
+ }
+
+ return avail;
+}
+
+/**
+ * gpu_meminfo_region_size:
+ * @info: pointer to drm_i915_query_memory_regions structure
+ * @memory_class: memory region class
+ * @memory_instance: memory region instance
+ *
+ * Returns: available size of @memory_instance which type is @memory_class, -1
+ * when the size is unknown
+ */
+uint64_t gpu_meminfo_region_size(struct local_drm_i915_query_memory_regions *info,
+ uint16_t memory_class,
+ uint16_t memory_instance)
+{
+ int i;
+
+ igt_assert(info);
+
+ for (i = 0; i < info->num_regions; i++)
+ if (info->regions[i].region.memory_class == memory_class &&
+ info->regions[i].region.memory_instance == memory_instance)
+ return info->regions[i].probed_size;
+
+ return 0;
+}
+
+/**
+ * gpu_meminfo_region_available:
+ * @info: pointer to drm_i915_query_memory_regions structure
+ * @memory_class: memory region class
+ * @memory_instance: memory region instance
+ *
+ * Returns: available size of @memory_instance region which type is
+ * @memory_class, -1 when the size cannot be estimated
+ */
+uint64_t gpu_meminfo_region_available(struct local_drm_i915_query_memory_regions *info,
+ uint16_t memory_class,
+ uint16_t memory_instance)
+{
+ int i;
+
+ igt_assert(info);
+
+ for (i = 0; i < info->num_regions; i++)
+ if (info->regions[i].region.memory_class == memory_class &&
+ info->regions[i].region.memory_instance == memory_instance)
+ return info->regions[i].unallocated_size;
+
+ return 0;
+}
diff --git a/lib/i915/intel_memory_region.h b/lib/i915/intel_memory_region.h
new file mode 100644
index 00000000..b8ea22b5
--- /dev/null
+++ b/lib/i915/intel_memory_region.h
@@ -0,0 +1,220 @@
+/*
+ * Copyright © 2020 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+#include "igt_collection.h"
+
+#ifndef INTEL_MEMORY_REGION_H
+#define INTEL_MEMORY_REGION_H
+
+#define I915_SYSTEM_MEMORY LOCAL_I915_MEMORY_CLASS_SYSTEM
+
+#define INTEL_MEMORY_REGION_ID(type, instance) ((type) << 16u | (instance))
+#define MEMORY_TYPE_FROM_REGION(r) ((r) >> 16u)
+#define MEMORY_INSTANCE_FROM_REGION(r) ((r) & 0xffff)
+
+#define IS_MEMORY_REGION_TYPE(region, type) \
+ (MEMORY_TYPE_FROM_REGION(region) == type)
+
+#define IS_SYSTEM_MEMORY_REGION(region) \
+ IS_MEMORY_REGION_TYPE(region, LOCAL_I915_MEMORY_CLASS_SYSTEM)
+
+#define REGION_SMEM INTEL_MEMORY_REGION_ID(LOCAL_I915_MEMORY_CLASS_SYSTEM, 0)
+
+/**
+ * enum drm_i915_gem_memory_class - Supported memory classes
+ */
+enum local_drm_i915_gem_memory_class {
+ /** @I915_MEMORY_CLASS_SYSTEM: System memory */
+ LOCAL_I915_MEMORY_CLASS_SYSTEM = 0,
+ /** @I915_MEMORY_CLASS_DEVICE: Device local-memory */
+ LOCAL_I915_MEMORY_CLASS_DEVICE,
+};
+
+/**
+ * struct drm_i915_gem_memory_class_instance - Identify particular memory region
+ */
+struct local_drm_i915_gem_memory_class_instance {
+ /** @memory_class: See enum drm_i915_gem_memory_class */
+ __u16 memory_class;
+
+ /** @memory_instance: Which instance */
+ __u16 memory_instance;
+};
+
+/**
+ * struct drm_i915_memory_region_info - Describes one region as known to the
+ * driver.
+ *
+ * Note that we reserve some stuff here for potential future work. As an example
+ * we might want expose the capabilities(see @caps) for a given region, which
+ * could include things like if the region is CPU mappable/accessible, what are
+ * the supported mapping types etc.
+ *
+ * Note this is using both struct drm_i915_query_item and struct drm_i915_query.
+ * For this new query we are adding the new query id DRM_I915_QUERY_MEMORY_REGIONS
+ * at &drm_i915_query_item.query_id.
+ */
+struct local_drm_i915_memory_region_info {
+ /** @region: The class:instance pair encoding */
+ struct local_drm_i915_gem_memory_class_instance region;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ /** @caps: MBZ */
+ __u64 caps;
+
+ /** @probed_size: Memory probed by the driver (-1 = unknown) */
+ __u64 probed_size;
+
+ /** @unallocated_size: Estimate of memory remaining (-1 = unknown) */
+ __u64 unallocated_size;
+};
+
+/**
+ * struct drm_i915_query_memory_regions
+ *
+ * The region info query enumerates all regions known to the driver by filling
+ * in an array of struct drm_i915_memory_region_info structures.
+ *
+ * Example for getting the list of supported regions:
+ *
+ * .. code-block:: C
+ *
+ * struct drm_i915_query_memory_regions *info;
+ * struct drm_i915_query_item item = {
+ * .query_id = DRM_I915_QUERY_MEMORY_REGIONS;
+ * };
+ * struct drm_i915_query query = {
+ * .num_items = 1,
+ * .items_ptr = (uintptr_t)&item,
+ * };
+ * int err, i;
+ *
+ * // First query the size of the blob we need, this needs to be large
+ * // enough to hold our array of regions. The kernel will fill out the
+ * // item.length for us, which is the number of bytes we need.
+ * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
+ * if (err) ...
+ *
+ * info = calloc(1, item.length);
+ * // Now that we allocated the required number of bytes, we call the ioctl
+ * // again, this time with the data_ptr pointing to our newly allocated
+ * // blob, which the kernel can then populate with the all the region info.
+ * item.data_ptr = (uintptr_t)&info,
+ *
+ * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
+ * if (err) ...
+ *
+ * // We can now access each region in the array
+ * for (i = 0; i < info->num_regions; i++) {
+ * struct drm_i915_memory_region_info mr = info->regions[i];
+ * u16 class = mr.region.class;
+ * u16 instance = mr.region.instance;
+ *
+ * ....
+ * }
+ *
+ * free(info);
+ */
+struct local_drm_i915_query_memory_regions {
+ /** @num_regions: Number of supported regions */
+ __u32 num_regions;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ /** @regions: Info about each supported region */
+ struct local_drm_i915_memory_region_info regions[];
+};
+
+const char *get_memory_region_name(uint32_t region);
+uint32_t gem_get_batch_size(int fd, uint8_t mem_region_type);
+
+struct local_drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd);
+
+
+int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t size,
+ struct local_drm_i915_gem_memory_class_instance *mem_regions,
+ int num_regions);
+
+uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
+ struct local_drm_i915_gem_memory_class_instance *mem_regions,
+ int num_regions);
+
+/*
+ * XXX: the whole converting to class_instance thing is meant as a temporary
+ * stop gap which should keep everything working, such that we don't have to
+ * rewrite the world in one go to fit the new uAPI.
+ */
+#define __gem_create_in_memory_regions(fd, handle, size, regions...) ({ \
+ unsigned int arr__[] = { regions }; \
+ struct local_drm_i915_gem_memory_class_instance arr_query__[ARRAY_SIZE(arr__)]; \
+ for (int i__ = 0; i__ < ARRAY_SIZE(arr_query__); ++i__) { \
+ arr_query__[i__].memory_class = MEMORY_TYPE_FROM_REGION(arr__[i__]); \
+ arr_query__[i__].memory_instance = MEMORY_INSTANCE_FROM_REGION(arr__[i__]); \
+ } \
+ __gem_create_in_memory_region_list(fd, handle, size, arr_query__, ARRAY_SIZE(arr_query__)); \
+})
+#define gem_create_in_memory_regions(fd, size, regions...) ({ \
+ unsigned int arr__[] = { regions }; \
+ struct local_drm_i915_gem_memory_class_instance arr_query__[ARRAY_SIZE(arr__)]; \
+ for (int i__ = 0; i__ < ARRAY_SIZE(arr_query__); ++i__) { \
+ arr_query__[i__].memory_class = MEMORY_TYPE_FROM_REGION(arr__[i__]); \
+ arr_query__[i__].memory_instance = MEMORY_INSTANCE_FROM_REGION(arr__[i__]); \
+ } \
+ gem_create_in_memory_region_list(fd, size, arr_query__, ARRAY_SIZE(arr_query__)); \
+})
+
+struct igt_collection *
+__get_memory_region_set(struct local_drm_i915_query_memory_regions *regions,
+ uint32_t *mem_regions_type,
+ int num_regions);
+
+/*
+ * Helper macro to create igt_collection which contains all memory regions
+ * which matches mem_region_types array.
+ */
+#define get_memory_region_set(regions, mem_region_types...) ({ \
+ unsigned int arr__[] = { mem_region_types }; \
+ __get_memory_region_set(regions, arr__, ARRAY_SIZE(arr__)); \
+})
+
+char *memregion_dynamic_subtest_name(struct igt_collection *set);
+
+void intel_dump_gpu_meminfo(struct local_drm_i915_query_memory_regions *info);
+
+uint32_t gpu_meminfo_region_count(struct local_drm_i915_query_memory_regions *info,
+ uint16_t region_class);
+uint64_t gpu_meminfo_region_total_size(struct local_drm_i915_query_memory_regions *info,
+ uint16_t region_class);
+uint64_t gpu_meminfo_region_total_available(struct local_drm_i915_query_memory_regions *info,
+ uint16_t region_type);
+
+uint64_t gpu_meminfo_region_size(struct local_drm_i915_query_memory_regions *info,
+ uint16_t memory_class,
+ uint16_t memory_instance);
+uint64_t gpu_meminfo_region_available(struct local_drm_i915_query_memory_regions *info,
+ uint16_t memory_class,
+ uint16_t memory_instance);
+
+#endif /* INTEL_MEMORY_REGION_H */
diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
index 9ea67365..36640e30 100644
--- a/lib/ioctl_wrappers.h
+++ b/lib/ioctl_wrappers.h
@@ -38,6 +38,7 @@
#include "i915/gem_context.h"
#include "i915/gem_scheduler.h"
+#include "i915/intel_memory_region.h"
/**
* igt_ioctl:
diff --git a/lib/meson.build b/lib/meson.build
index 9929520e..7c94a7ea 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -10,6 +10,7 @@ lib_sources = [
'i915/gem_ring.c',
'i915/gem_mman.c',
'i915/gem_vm.c',
+ 'i915/intel_memory_region.c',
'igt_collection.c',
'igt_color_encoding.c',
'igt_debugfs.c',
--
2.26.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 39+ messages in thread* [Intel-gfx] [PATCH i-g-t 03/12] tests/gem_gpgpu_fill: Convert from simple to standard igt_main
2021-05-11 16:51 ` [igt-dev] " Matthew Auld
@ 2021-05-11 16:51 ` Matthew Auld
-1 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev
Cc: thomas.hellstrom, Dominik Grzegorzek, intel-gfx,
Zbigniew Kempczyński
From: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
As we need to add new test variants, convert the code to standard
igt_main format so those variants can be easily accommodated.
Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@linux.intel.com>
---
tests/i915/gem_gpgpu_fill.c | 25 ++++++++++++++++---------
1 file changed, 16 insertions(+), 9 deletions(-)
diff --git a/tests/i915/gem_gpgpu_fill.c b/tests/i915/gem_gpgpu_fill.c
index c605629f..5b11fb35 100644
--- a/tests/i915/gem_gpgpu_fill.c
+++ b/tests/i915/gem_gpgpu_fill.c
@@ -123,20 +123,27 @@ static void gpgpu_fill(data_t *data, igt_fillfunc_t fill)
munmap(ptr, buf->surface[0].size);
}
-
-igt_simple_main
+igt_main
{
data_t data = {0, };
igt_fillfunc_t fill_fn = NULL;
- data.drm_fd = drm_open_driver_render(DRIVER_INTEL);
- data.devid = intel_get_drm_devid(data.drm_fd);
- igt_require_gem(data.drm_fd);
- data.bops = buf_ops_create(data.drm_fd);
+ igt_fixture {
+ data.drm_fd = drm_open_driver_render(DRIVER_INTEL);
+ data.devid = intel_get_drm_devid(data.drm_fd);
+ igt_require_gem(data.drm_fd);
+ data.bops = buf_ops_create(data.drm_fd);
+
+ fill_fn = igt_get_gpgpu_fillfunc(data.devid);
+
+ igt_require_f(fill_fn, "no gpgpu-fill function\n");
- fill_fn = igt_get_gpgpu_fillfunc(data.devid);
+ }
- igt_require_f(fill_fn, "no gpgpu-fill function\n");
+ igt_subtest("basic")
+ gpgpu_fill(&data, fill_fn);
- gpgpu_fill(&data, fill_fn);
+ igt_fixture {
+ buf_ops_destroy(data.bops);
+ }
}
--
2.26.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 39+ messages in thread* [igt-dev] [PATCH i-g-t 03/12] tests/gem_gpgpu_fill: Convert from simple to standard igt_main
@ 2021-05-11 16:51 ` Matthew Auld
0 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev
Cc: thomas.hellstrom, petri.latvala, intel-gfx,
Zbigniew Kempczyński, daniel
From: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
As we need to add new test variants, convert the code to standard
igt_main format so those variants can be easily accommodated.
Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@linux.intel.com>
---
tests/i915/gem_gpgpu_fill.c | 25 ++++++++++++++++---------
1 file changed, 16 insertions(+), 9 deletions(-)
diff --git a/tests/i915/gem_gpgpu_fill.c b/tests/i915/gem_gpgpu_fill.c
index c605629f..5b11fb35 100644
--- a/tests/i915/gem_gpgpu_fill.c
+++ b/tests/i915/gem_gpgpu_fill.c
@@ -123,20 +123,27 @@ static void gpgpu_fill(data_t *data, igt_fillfunc_t fill)
munmap(ptr, buf->surface[0].size);
}
-
-igt_simple_main
+igt_main
{
data_t data = {0, };
igt_fillfunc_t fill_fn = NULL;
- data.drm_fd = drm_open_driver_render(DRIVER_INTEL);
- data.devid = intel_get_drm_devid(data.drm_fd);
- igt_require_gem(data.drm_fd);
- data.bops = buf_ops_create(data.drm_fd);
+ igt_fixture {
+ data.drm_fd = drm_open_driver_render(DRIVER_INTEL);
+ data.devid = intel_get_drm_devid(data.drm_fd);
+ igt_require_gem(data.drm_fd);
+ data.bops = buf_ops_create(data.drm_fd);
+
+ fill_fn = igt_get_gpgpu_fillfunc(data.devid);
+
+ igt_require_f(fill_fn, "no gpgpu-fill function\n");
- fill_fn = igt_get_gpgpu_fillfunc(data.devid);
+ }
- igt_require_f(fill_fn, "no gpgpu-fill function\n");
+ igt_subtest("basic")
+ gpgpu_fill(&data, fill_fn);
- gpgpu_fill(&data, fill_fn);
+ igt_fixture {
+ buf_ops_destroy(data.bops);
+ }
}
--
2.26.3
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [Intel-gfx] [PATCH i-g-t 04/12] tests/i915/gem_exec_basic: Use memory region interface
2021-05-11 16:51 ` [igt-dev] " Matthew Auld
` (3 preceding siblings ...)
(?)
@ 2021-05-11 16:51 ` Matthew Auld
-1 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev; +Cc: thomas.hellstrom, Dominik Grzegorzek, intel-gfx, Andrzej Turko
From: Andrzej Turko <andrzej.turko@linux.intel.com>
Converted the test gem_exec_basic to use the memory region uapi.
Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com>
Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
---
tests/i915/gem_exec_basic.c | 50 +++++++++++++++++++++++++------------
1 file changed, 34 insertions(+), 16 deletions(-)
diff --git a/tests/i915/gem_exec_basic.c b/tests/i915/gem_exec_basic.c
index 5021852f..d1569781 100644
--- a/tests/i915/gem_exec_basic.c
+++ b/tests/i915/gem_exec_basic.c
@@ -22,17 +22,18 @@
*/
#include "igt.h"
+#include "igt_collection.h"
#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Basic sanity check of execbuf-ioctl rings.");
-static uint32_t batch_create(int fd)
+static uint32_t batch_create(int fd, uint32_t batch_size, uint32_t region)
{
const uint32_t bbe = MI_BATCH_BUFFER_END;
uint32_t handle;
- handle = gem_create(fd, 4096);
+ handle = gem_create_in_memory_regions(fd, batch_size, region);
gem_write(fd, handle, 0, &bbe, sizeof(bbe));
return handle;
@@ -41,36 +42,53 @@ static uint32_t batch_create(int fd)
igt_main
{
const struct intel_execution_engine2 *e;
+ struct local_drm_i915_query_memory_regions *query_info;
+ struct igt_collection *regions, *set;
+ uint32_t batch_size;
int fd = -1;
igt_fixture {
fd = drm_open_driver(DRIVER_INTEL);
/* igt_require_gem(fd); // test is mandatory */
igt_fork_hang_detector(fd);
+
+ query_info = gem_get_query_memory_regions(fd);
+ igt_assert(query_info);
+
+ set = get_memory_region_set(query_info,
+ I915_SYSTEM_MEMORY);
}
igt_subtest_with_dynamic("basic") {
- struct drm_i915_gem_exec_object2 exec = {
- .handle = batch_create(fd),
- };
+ for_each_combination(regions, 1, set) {
+ char *sub_name = memregion_dynamic_subtest_name(regions);
+ struct drm_i915_gem_exec_object2 exec;
+ uint32_t region = igt_collection_get_value(regions, 0);
- __for_each_physical_engine(fd, e) {
- igt_dynamic_f("%s", e->name) {
- struct drm_i915_gem_execbuffer2 execbuf = {
- .buffers_ptr = to_user_pointer(&exec),
- .buffer_count = 1,
- .flags = e->flags,
- };
+ batch_size = gem_get_batch_size(fd, MEMORY_TYPE_FROM_REGION(region));
+ memset(&exec, 0, sizeof(exec));
+ exec.handle = batch_create(fd, batch_size, region);
- gem_execbuf(fd, &execbuf);
+ __for_each_physical_engine(fd, e) {
+ igt_dynamic_f("%s-%s", e->name, sub_name) {
+ struct drm_i915_gem_execbuffer2 execbuf = {
+ .buffers_ptr = to_user_pointer(&exec),
+ .buffer_count = 1,
+ .flags = e->flags,
+ };
+
+ gem_execbuf(fd, &execbuf);
+ }
}
+ gem_sync(fd, exec.handle); /* catch any GPU hang */
+ gem_close(fd, exec.handle);
+ free(sub_name);
}
-
- gem_sync(fd, exec.handle); /* catch any GPU hang */
- gem_close(fd, exec.handle);
}
igt_fixture {
+ free(query_info);
+ igt_collection_destroy(set);
igt_stop_hang_detector();
close(fd);
}
--
2.26.3
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 39+ messages in thread* [Intel-gfx] [PATCH i-g-t 05/12] tests/i915/gem_gpgpu_fill: Use memory region interface
2021-05-11 16:51 ` [igt-dev] " Matthew Auld
@ 2021-05-11 16:51 ` Matthew Auld
-1 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev; +Cc: thomas.hellstrom, Dominik Grzegorzek, intel-gfx, Andrzej Turko
From: Andrzej Turko <andrzej.turko@linux.intel.com>
Converted the test gem_gpgpu_fill to use memory region uapi.
Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com>
Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
---
tests/i915/gem_gpgpu_fill.c | 42 ++++++++++++++++++++++++++++++-------
1 file changed, 34 insertions(+), 8 deletions(-)
diff --git a/tests/i915/gem_gpgpu_fill.c b/tests/i915/gem_gpgpu_fill.c
index 5b11fb35..a6da3bce 100644
--- a/tests/i915/gem_gpgpu_fill.c
+++ b/tests/i915/gem_gpgpu_fill.c
@@ -45,13 +45,14 @@
#include "drm.h"
#include "i915/gem.h"
#include "igt.h"
+#include "igt_collection.h"
#include "intel_bufops.h"
+#include "i915/intel_memory_region.h"
#define WIDTH 64
#define HEIGHT 64
#define STRIDE (WIDTH)
#define SIZE (HEIGHT*STRIDE)
-
#define COLOR_C4 0xc4
#define COLOR_4C 0x4c
@@ -62,10 +63,11 @@ typedef struct {
} data_t;
static struct intel_buf *
-create_buf(data_t *data, int width, int height, uint8_t color)
+create_buf(data_t *data, int width, int height, uint8_t color, uint32_t region)
{
struct intel_buf *buf;
uint8_t *ptr;
+ uint32_t handle;
int i;
buf = calloc(1, sizeof(*buf));
@@ -75,8 +77,10 @@ create_buf(data_t *data, int width, int height, uint8_t color)
* Legacy code uses 32 bpp after buffer creation.
* Let's do the same due to keep shader intact.
*/
- intel_buf_init(data->bops, buf, width/4, height, 32, 0,
- I915_TILING_NONE, 0);
+ handle = gem_create_in_memory_regions(data->drm_fd, SIZE, region);
+ intel_buf_init_using_handle(data->bops, handle, buf,
+ width/4, height, 32, 0,
+ I915_TILING_NONE, 0);
ptr = gem_mmap__cpu_coherent(data->drm_fd, buf->handle, 0,
buf->surface[0].size, PROT_WRITE);
@@ -99,15 +103,16 @@ static void buf_check(uint8_t *ptr, int x, int y, uint8_t color)
color, val, x, y);
}
-static void gpgpu_fill(data_t *data, igt_fillfunc_t fill)
+static void gpgpu_fill(data_t *data, igt_fillfunc_t fill, uint32_t region)
{
struct intel_buf *buf;
uint8_t *ptr;
int i, j;
- buf = create_buf(data, WIDTH, HEIGHT, COLOR_C4);
+ buf = create_buf(data, WIDTH, HEIGHT, COLOR_C4, region);
ptr = gem_mmap__device_coherent(data->drm_fd, buf->handle, 0,
buf->surface[0].size, PROT_READ);
+
for (i = 0; i < WIDTH; i++)
for (j = 0; j < HEIGHT; j++)
buf_check(ptr, i, j, COLOR_C4);
@@ -123,10 +128,13 @@ static void gpgpu_fill(data_t *data, igt_fillfunc_t fill)
munmap(ptr, buf->surface[0].size);
}
+
igt_main
{
data_t data = {0, };
igt_fillfunc_t fill_fn = NULL;
+ struct local_drm_i915_query_memory_regions *region_info;
+ struct igt_collection *region_set;
igt_fixture {
data.drm_fd = drm_open_driver_render(DRIVER_INTEL);
@@ -138,12 +146,30 @@ igt_main
igt_require_f(fill_fn, "no gpgpu-fill function\n");
+ region_info = gem_get_query_memory_regions(data.drm_fd);
+ igt_assert(region_info);
+
+ region_set = get_memory_region_set(region_info,
+ I915_SYSTEM_MEMORY);
}
- igt_subtest("basic")
- gpgpu_fill(&data, fill_fn);
+ igt_subtest_with_dynamic("basic") {
+ struct igt_collection *region;
+
+ for_each_combination(region, 1, region_set) {
+ char *name = memregion_dynamic_subtest_name(region);
+ uint32_t id = igt_collection_get_value(region, 0);
+
+ igt_dynamic(name)
+ gpgpu_fill(&data, fill_fn, id);
+
+ free(name);
+ }
+ }
igt_fixture {
+ igt_collection_destroy(region_set);
+ free(region_info);
buf_ops_destroy(data.bops);
}
}
--
2.26.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 39+ messages in thread* [igt-dev] [PATCH i-g-t 05/12] tests/i915/gem_gpgpu_fill: Use memory region interface
@ 2021-05-11 16:51 ` Matthew Auld
0 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev; +Cc: thomas.hellstrom, petri.latvala, intel-gfx, daniel
From: Andrzej Turko <andrzej.turko@linux.intel.com>
Converted the test gem_gpgpu_fill to use memory region uapi.
Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com>
Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
---
tests/i915/gem_gpgpu_fill.c | 42 ++++++++++++++++++++++++++++++-------
1 file changed, 34 insertions(+), 8 deletions(-)
diff --git a/tests/i915/gem_gpgpu_fill.c b/tests/i915/gem_gpgpu_fill.c
index 5b11fb35..a6da3bce 100644
--- a/tests/i915/gem_gpgpu_fill.c
+++ b/tests/i915/gem_gpgpu_fill.c
@@ -45,13 +45,14 @@
#include "drm.h"
#include "i915/gem.h"
#include "igt.h"
+#include "igt_collection.h"
#include "intel_bufops.h"
+#include "i915/intel_memory_region.h"
#define WIDTH 64
#define HEIGHT 64
#define STRIDE (WIDTH)
#define SIZE (HEIGHT*STRIDE)
-
#define COLOR_C4 0xc4
#define COLOR_4C 0x4c
@@ -62,10 +63,11 @@ typedef struct {
} data_t;
static struct intel_buf *
-create_buf(data_t *data, int width, int height, uint8_t color)
+create_buf(data_t *data, int width, int height, uint8_t color, uint32_t region)
{
struct intel_buf *buf;
uint8_t *ptr;
+ uint32_t handle;
int i;
buf = calloc(1, sizeof(*buf));
@@ -75,8 +77,10 @@ create_buf(data_t *data, int width, int height, uint8_t color)
* Legacy code uses 32 bpp after buffer creation.
* Let's do the same due to keep shader intact.
*/
- intel_buf_init(data->bops, buf, width/4, height, 32, 0,
- I915_TILING_NONE, 0);
+ handle = gem_create_in_memory_regions(data->drm_fd, SIZE, region);
+ intel_buf_init_using_handle(data->bops, handle, buf,
+ width/4, height, 32, 0,
+ I915_TILING_NONE, 0);
ptr = gem_mmap__cpu_coherent(data->drm_fd, buf->handle, 0,
buf->surface[0].size, PROT_WRITE);
@@ -99,15 +103,16 @@ static void buf_check(uint8_t *ptr, int x, int y, uint8_t color)
color, val, x, y);
}
-static void gpgpu_fill(data_t *data, igt_fillfunc_t fill)
+static void gpgpu_fill(data_t *data, igt_fillfunc_t fill, uint32_t region)
{
struct intel_buf *buf;
uint8_t *ptr;
int i, j;
- buf = create_buf(data, WIDTH, HEIGHT, COLOR_C4);
+ buf = create_buf(data, WIDTH, HEIGHT, COLOR_C4, region);
ptr = gem_mmap__device_coherent(data->drm_fd, buf->handle, 0,
buf->surface[0].size, PROT_READ);
+
for (i = 0; i < WIDTH; i++)
for (j = 0; j < HEIGHT; j++)
buf_check(ptr, i, j, COLOR_C4);
@@ -123,10 +128,13 @@ static void gpgpu_fill(data_t *data, igt_fillfunc_t fill)
munmap(ptr, buf->surface[0].size);
}
+
igt_main
{
data_t data = {0, };
igt_fillfunc_t fill_fn = NULL;
+ struct local_drm_i915_query_memory_regions *region_info;
+ struct igt_collection *region_set;
igt_fixture {
data.drm_fd = drm_open_driver_render(DRIVER_INTEL);
@@ -138,12 +146,30 @@ igt_main
igt_require_f(fill_fn, "no gpgpu-fill function\n");
+ region_info = gem_get_query_memory_regions(data.drm_fd);
+ igt_assert(region_info);
+
+ region_set = get_memory_region_set(region_info,
+ I915_SYSTEM_MEMORY);
}
- igt_subtest("basic")
- gpgpu_fill(&data, fill_fn);
+ igt_subtest_with_dynamic("basic") {
+ struct igt_collection *region;
+
+ for_each_combination(region, 1, region_set) {
+ char *name = memregion_dynamic_subtest_name(region);
+ uint32_t id = igt_collection_get_value(region, 0);
+
+ igt_dynamic(name)
+ gpgpu_fill(&data, fill_fn, id);
+
+ free(name);
+ }
+ }
igt_fixture {
+ igt_collection_destroy(region_set);
+ free(region_info);
buf_ops_destroy(data.bops);
}
}
--
2.26.3
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [Intel-gfx] [PATCH i-g-t 06/12] tests/i915/gem_media_fill: Use memory region interface
2021-05-11 16:51 ` [igt-dev] " Matthew Auld
@ 2021-05-11 16:51 ` Matthew Auld
-1 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev; +Cc: thomas.hellstrom, Dominik Grzegorzek, intel-gfx, Andrzej Turko
From: Andrzej Turko <andrzej.turko@linux.intel.com>
Converted the test gem_media_fill to use memory region uapi.
Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com>
Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
---
tests/i915/gem_media_fill.c | 57 ++++++++++++++++++++++++++++---------
1 file changed, 44 insertions(+), 13 deletions(-)
diff --git a/tests/i915/gem_media_fill.c b/tests/i915/gem_media_fill.c
index 24d17fab..bbd2110f 100644
--- a/tests/i915/gem_media_fill.c
+++ b/tests/i915/gem_media_fill.c
@@ -64,21 +64,24 @@ typedef struct {
} data_t;
static struct intel_buf *
-create_buf(data_t *data, int width, int height, uint8_t color)
+create_buf(data_t *data, int width, int height, uint8_t color, uint32_t region)
{
struct intel_buf *buf;
+ uint32_t handle;
uint8_t *ptr;
int i;
buf = calloc(1, sizeof(*buf));
igt_assert(buf);
+ handle = gem_create_in_memory_regions(data->drm_fd, SIZE, region);
+
/*
* Legacy code uses 32 bpp after buffer creation.
* Let's do the same due to keep shader intact.
*/
- intel_buf_init(data->bops, buf, width/4, height, 32, 0,
- I915_TILING_NONE, 0);
+ intel_buf_init_using_handle(data->bops, handle, buf, width/4,
+ height, 32, 0, I915_TILING_NONE, 0);
ptr = gem_mmap__cpu_coherent(data->drm_fd, buf->handle, 0,
buf->surface[0].size, PROT_WRITE);
@@ -101,13 +104,16 @@ static void buf_check(uint8_t *ptr, int x, int y, uint8_t color)
color, val, x, y);
}
-static void media_fill(data_t *data, igt_fillfunc_t fill)
+static void media_fill(data_t *data, igt_fillfunc_t fill,
+ struct igt_collection *memregion_set)
{
struct intel_buf *buf;
+ uint32_t region;
uint8_t *ptr;
int i, j;
- buf = create_buf(data, WIDTH, HEIGHT, COLOR_C4);
+ region = igt_collection_get_value(memregion_set, 0);
+ buf = create_buf(data, WIDTH, HEIGHT, COLOR_C4, region);
ptr = gem_mmap__device_coherent(data->drm_fd, buf->handle,
0, buf->surface[0].size, PROT_READ);
for (i = 0; i < WIDTH; i++)
@@ -126,20 +132,45 @@ static void media_fill(data_t *data, igt_fillfunc_t fill)
munmap(ptr, buf->surface[0].size);
}
-igt_simple_main
+igt_main
{
data_t data = {0, };
igt_fillfunc_t fill_fn = NULL;
+ struct local_drm_i915_query_memory_regions *query_info;
+ struct igt_collection *set, *region_set;
+
+ igt_fixture {
+ data.drm_fd = drm_open_driver_render(DRIVER_INTEL);
+ igt_require_gem(data.drm_fd);
+
+ data.devid = intel_get_drm_devid(data.drm_fd);
+ data.bops = buf_ops_create(data.drm_fd);
+
+ fill_fn = igt_get_media_fillfunc(data.devid);
+
+ igt_require_f(fill_fn, "no media-fill function\n");
+
+ query_info = gem_get_query_memory_regions(data.drm_fd);
+ igt_assert(query_info);
+
+ set = get_memory_region_set(query_info,
+ I915_SYSTEM_MEMORY);
- data.drm_fd = drm_open_driver_render(DRIVER_INTEL);
- igt_require_gem(data.drm_fd);
+ igt_fork_hang_detector(data.drm_fd);
+ }
- data.devid = intel_get_drm_devid(data.drm_fd);
- data.bops = buf_ops_create(data.drm_fd);
+ igt_subtest_with_dynamic("media-fill")
+ for_each_combination(region_set, 1, set) {
+ char *sub_name = memregion_dynamic_subtest_name(region_set);
- fill_fn = igt_get_media_fillfunc(data.devid);
+ igt_dynamic_f("%s", sub_name)
+ media_fill(&data, fill_fn, region_set);
- igt_require_f(fill_fn, "no media-fill function\n");
+ free(sub_name);
+ }
- media_fill(&data, fill_fn);
+ igt_fixture {
+ igt_collection_destroy(set);
+ igt_stop_hang_detector();
+ }
}
--
2.26.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 39+ messages in thread* [igt-dev] [PATCH i-g-t 06/12] tests/i915/gem_media_fill: Use memory region interface
@ 2021-05-11 16:51 ` Matthew Auld
0 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev; +Cc: thomas.hellstrom, petri.latvala, intel-gfx, daniel
From: Andrzej Turko <andrzej.turko@linux.intel.com>
Converted the test gem_media_fill to use memory region uapi.
Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com>
Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
---
tests/i915/gem_media_fill.c | 57 ++++++++++++++++++++++++++++---------
1 file changed, 44 insertions(+), 13 deletions(-)
diff --git a/tests/i915/gem_media_fill.c b/tests/i915/gem_media_fill.c
index 24d17fab..bbd2110f 100644
--- a/tests/i915/gem_media_fill.c
+++ b/tests/i915/gem_media_fill.c
@@ -64,21 +64,24 @@ typedef struct {
} data_t;
static struct intel_buf *
-create_buf(data_t *data, int width, int height, uint8_t color)
+create_buf(data_t *data, int width, int height, uint8_t color, uint32_t region)
{
struct intel_buf *buf;
+ uint32_t handle;
uint8_t *ptr;
int i;
buf = calloc(1, sizeof(*buf));
igt_assert(buf);
+ handle = gem_create_in_memory_regions(data->drm_fd, SIZE, region);
+
/*
* Legacy code uses 32 bpp after buffer creation.
* Let's do the same due to keep shader intact.
*/
- intel_buf_init(data->bops, buf, width/4, height, 32, 0,
- I915_TILING_NONE, 0);
+ intel_buf_init_using_handle(data->bops, handle, buf, width/4,
+ height, 32, 0, I915_TILING_NONE, 0);
ptr = gem_mmap__cpu_coherent(data->drm_fd, buf->handle, 0,
buf->surface[0].size, PROT_WRITE);
@@ -101,13 +104,16 @@ static void buf_check(uint8_t *ptr, int x, int y, uint8_t color)
color, val, x, y);
}
-static void media_fill(data_t *data, igt_fillfunc_t fill)
+static void media_fill(data_t *data, igt_fillfunc_t fill,
+ struct igt_collection *memregion_set)
{
struct intel_buf *buf;
+ uint32_t region;
uint8_t *ptr;
int i, j;
- buf = create_buf(data, WIDTH, HEIGHT, COLOR_C4);
+ region = igt_collection_get_value(memregion_set, 0);
+ buf = create_buf(data, WIDTH, HEIGHT, COLOR_C4, region);
ptr = gem_mmap__device_coherent(data->drm_fd, buf->handle,
0, buf->surface[0].size, PROT_READ);
for (i = 0; i < WIDTH; i++)
@@ -126,20 +132,45 @@ static void media_fill(data_t *data, igt_fillfunc_t fill)
munmap(ptr, buf->surface[0].size);
}
-igt_simple_main
+igt_main
{
data_t data = {0, };
igt_fillfunc_t fill_fn = NULL;
+ struct local_drm_i915_query_memory_regions *query_info;
+ struct igt_collection *set, *region_set;
+
+ igt_fixture {
+ data.drm_fd = drm_open_driver_render(DRIVER_INTEL);
+ igt_require_gem(data.drm_fd);
+
+ data.devid = intel_get_drm_devid(data.drm_fd);
+ data.bops = buf_ops_create(data.drm_fd);
+
+ fill_fn = igt_get_media_fillfunc(data.devid);
+
+ igt_require_f(fill_fn, "no media-fill function\n");
+
+ query_info = gem_get_query_memory_regions(data.drm_fd);
+ igt_assert(query_info);
+
+ set = get_memory_region_set(query_info,
+ I915_SYSTEM_MEMORY);
- data.drm_fd = drm_open_driver_render(DRIVER_INTEL);
- igt_require_gem(data.drm_fd);
+ igt_fork_hang_detector(data.drm_fd);
+ }
- data.devid = intel_get_drm_devid(data.drm_fd);
- data.bops = buf_ops_create(data.drm_fd);
+ igt_subtest_with_dynamic("media-fill")
+ for_each_combination(region_set, 1, set) {
+ char *sub_name = memregion_dynamic_subtest_name(region_set);
- fill_fn = igt_get_media_fillfunc(data.devid);
+ igt_dynamic_f("%s", sub_name)
+ media_fill(&data, fill_fn, region_set);
- igt_require_f(fill_fn, "no media-fill function\n");
+ free(sub_name);
+ }
- media_fill(&data, fill_fn);
+ igt_fixture {
+ igt_collection_destroy(set);
+ igt_stop_hang_detector();
+ }
}
--
2.26.3
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [Intel-gfx] [PATCH i-g-t 07/12] i915_drm.h sync
2021-05-11 16:51 ` [igt-dev] " Matthew Auld
@ 2021-05-11 16:51 ` Matthew Auld
-1 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev; +Cc: thomas.hellstrom, intel-gfx
Sync to get gem_create_ext and the regions query stuff.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
include/drm-uapi/i915_drm.h | 394 ++++++++++++++++++++++++++++++++----
1 file changed, 360 insertions(+), 34 deletions(-)
diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index bf9ea471..a1c0030c 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -62,8 +62,8 @@ extern "C" {
#define I915_ERROR_UEVENT "ERROR"
#define I915_RESET_UEVENT "RESET"
-/*
- * i915_user_extension: Base class for defining a chain of extensions
+/**
+ * struct i915_user_extension - Base class for defining a chain of extensions
*
* Many interfaces need to grow over time. In most cases we can simply
* extend the struct and have userspace pass in more data. Another option,
@@ -76,12 +76,58 @@ extern "C" {
* increasing complexity, and for large parts of that interface to be
* entirely optional. The downside is more pointer chasing; chasing across
* the boundary with pointers encapsulated inside u64.
+ *
+ * Example chaining:
+ *
+ * .. code-block:: C
+ *
+ * struct i915_user_extension ext3 {
+ * .next_extension = 0, // end
+ * .name = ...,
+ * };
+ * struct i915_user_extension ext2 {
+ * .next_extension = (uintptr_t)&ext3,
+ * .name = ...,
+ * };
+ * struct i915_user_extension ext1 {
+ * .next_extension = (uintptr_t)&ext2,
+ * .name = ...,
+ * };
+ *
+ * Typically the struct i915_user_extension would be embedded in some uAPI
+ * struct, and in this case we would feed it the head of the chain(i.e ext1),
+ * which would then apply all of the above extensions.
+ *
*/
struct i915_user_extension {
+ /**
+ * @next_extension:
+ *
+ * Pointer to the next struct i915_user_extension, or zero if the end.
+ */
__u64 next_extension;
+ /**
+ * @name: Name of the extension.
+ *
+ * Note that the name here is just some integer.
+ *
+ * Also note that the name space for this is not global for the whole
+ * driver, but rather its scope/meaning is limited to the specific piece
+ * of uAPI which has embedded the struct i915_user_extension.
+ */
__u32 name;
- __u32 flags; /* All undefined bits must be zero. */
- __u32 rsvd[4]; /* Reserved for future use; must be zero. */
+ /**
+ * @flags: MBZ
+ *
+ * All undefined bits must be zero.
+ */
+ __u32 flags;
+ /**
+ * @rsvd: MBZ
+ *
+ * Reserved for future use; must be zero.
+ */
+ __u32 rsvd[4];
};
/*
@@ -360,6 +406,7 @@ typedef struct _drm_i915_sarea {
#define DRM_I915_QUERY 0x39
#define DRM_I915_GEM_VM_CREATE 0x3a
#define DRM_I915_GEM_VM_DESTROY 0x3b
+#define DRM_I915_GEM_CREATE_EXT 0x3c
/* Must be kept compact -- no holes */
#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
@@ -392,6 +439,7 @@ typedef struct _drm_i915_sarea {
#define DRM_IOCTL_I915_GEM_ENTERVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT)
#define DRM_IOCTL_I915_GEM_LEAVEVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT)
#define DRM_IOCTL_I915_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct drm_i915_gem_create)
+#define DRM_IOCTL_I915_GEM_CREATE_EXT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE_EXT, struct drm_i915_gem_create_ext)
#define DRM_IOCTL_I915_GEM_PREAD DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PREAD, struct drm_i915_gem_pread)
#define DRM_IOCTL_I915_GEM_PWRITE DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PWRITE, struct drm_i915_gem_pwrite)
#define DRM_IOCTL_I915_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct drm_i915_gem_mmap)
@@ -943,6 +991,7 @@ struct drm_i915_gem_exec_object {
__u64 offset;
};
+/* DRM_IOCTL_I915_GEM_EXECBUFFER was removed in Linux 5.13 */
struct drm_i915_gem_execbuffer {
/**
* List of buffers to be validated with their relocations to be
@@ -1053,12 +1102,12 @@ struct drm_i915_gem_exec_fence {
__u32 flags;
};
-/**
+/*
* See drm_i915_gem_execbuffer_ext_timeline_fences.
*/
#define DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES 0
-/**
+/*
* This structure describes an array of drm_syncobj and associated points for
* timeline variants of drm_syncobj. It is invalid to append this structure to
* the execbuf if I915_EXEC_FENCE_ARRAY is set.
@@ -1699,7 +1748,7 @@ struct drm_i915_gem_context_param {
__u64 value;
};
-/**
+/*
* Context SSEU programming
*
* It may be necessary for either functional or performance reason to configure
@@ -2066,7 +2115,7 @@ struct drm_i915_perf_open_param {
__u64 properties_ptr;
};
-/**
+/*
* Enable data capture for a stream that was either opened in a disabled state
* via I915_PERF_FLAG_DISABLED or was later disabled via
* I915_PERF_IOCTL_DISABLE.
@@ -2080,7 +2129,7 @@ struct drm_i915_perf_open_param {
*/
#define I915_PERF_IOCTL_ENABLE _IO('i', 0x0)
-/**
+/*
* Disable data capture for a stream.
*
* It is an error to try and read a stream that is disabled.
@@ -2089,7 +2138,7 @@ struct drm_i915_perf_open_param {
*/
#define I915_PERF_IOCTL_DISABLE _IO('i', 0x1)
-/**
+/*
* Change metrics_set captured by a stream.
*
* If the stream is bound to a specific context, the configuration change
@@ -2102,7 +2151,7 @@ struct drm_i915_perf_open_param {
*/
#define I915_PERF_IOCTL_CONFIG _IO('i', 0x2)
-/**
+/*
* Common to all i915 perf records
*/
struct drm_i915_perf_record_header {
@@ -2150,7 +2199,7 @@ enum drm_i915_perf_record_type {
DRM_I915_PERF_RECORD_MAX /* non-ABI */
};
-/**
+/*
* Structure to upload perf dynamic configuration into the kernel.
*/
struct drm_i915_perf_oa_config {
@@ -2171,53 +2220,95 @@ struct drm_i915_perf_oa_config {
__u64 flex_regs_ptr;
};
+/**
+ * struct drm_i915_query_item - An individual query for the kernel to process.
+ *
+ * The behaviour is determined by the @query_id. Note that exactly what
+ * @data_ptr is also depends on the specific @query_id.
+ */
struct drm_i915_query_item {
+ /** @query_id: The id for this query */
__u64 query_id;
#define DRM_I915_QUERY_TOPOLOGY_INFO 1
#define DRM_I915_QUERY_ENGINE_INFO 2
#define DRM_I915_QUERY_PERF_CONFIG 3
+#define DRM_I915_QUERY_MEMORY_REGIONS 4
/* Must be kept compact -- no holes and well documented */
- /*
+ /**
+ * @length:
+ *
* When set to zero by userspace, this is filled with the size of the
- * data to be written at the data_ptr pointer. The kernel sets this
+ * data to be written at the @data_ptr pointer. The kernel sets this
* value to a negative value to signal an error on a particular query
* item.
*/
__s32 length;
- /*
+ /**
+ * @flags:
+ *
* When query_id == DRM_I915_QUERY_TOPOLOGY_INFO, must be 0.
*
* When query_id == DRM_I915_QUERY_PERF_CONFIG, must be one of the
- * following :
- * - DRM_I915_QUERY_PERF_CONFIG_LIST
- * - DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID
- * - DRM_I915_QUERY_PERF_CONFIG_FOR_UUID
+ * following:
+ *
+ * - DRM_I915_QUERY_PERF_CONFIG_LIST
+ * - DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID
+ * - DRM_I915_QUERY_PERF_CONFIG_FOR_UUID
*/
__u32 flags;
#define DRM_I915_QUERY_PERF_CONFIG_LIST 1
#define DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID 2
#define DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_ID 3
- /*
- * Data will be written at the location pointed by data_ptr when the
- * value of length matches the length of the data to be written by the
+ /**
+ * @data_ptr:
+ *
+ * Data will be written at the location pointed by @data_ptr when the
+ * value of @length matches the length of the data to be written by the
* kernel.
*/
__u64 data_ptr;
};
+/**
+ * struct drm_i915_query - Supply an array of struct drm_i915_query_item for the
+ * kernel to fill out.
+ *
+ * Note that this is generally a two step process for each struct
+ * drm_i915_query_item in the array:
+ *
+ * 1. Call the DRM_IOCTL_I915_QUERY, giving it our array of struct
+ * drm_i915_query_item, with &drm_i915_query_item.length set to zero. The
+ * kernel will then fill in the size, in bytes, which tells userspace how
+ * memory it needs to allocate for the blob(say for an array of properties).
+ *
+ * 2. Next we call DRM_IOCTL_I915_QUERY again, this time with the
+ * &drm_i915_query_item.data_ptr equal to our newly allocated blob. Note that
+ * the &drm_i915_query_item.length should still be the same as what the
+ * kernel previously set. At this point the kernel can fill in the blob.
+ *
+ * Note that for some query items it can make sense for userspace to just pass
+ * in a buffer/blob equal to or larger than the required size. In this case only
+ * a single ioctl call is needed. For some smaller query items this can work
+ * quite well.
+ *
+ */
struct drm_i915_query {
+ /** @num_items: The number of elements in the @items_ptr array */
__u32 num_items;
- /*
- * Unused for now. Must be cleared to zero.
+ /**
+ * @flags: Unused for now. Must be cleared to zero.
*/
__u32 flags;
- /*
- * This points to an array of num_items drm_i915_query_item structures.
+ /**
+ * @items_ptr:
+ *
+ * Pointer to an array of struct drm_i915_query_item. The number of
+ * array elements is @num_items.
*/
__u64 items_ptr;
};
@@ -2291,21 +2382,21 @@ struct drm_i915_query_topology_info {
* Describes one engine and it's capabilities as known to the driver.
*/
struct drm_i915_engine_info {
- /** Engine class and instance. */
+ /** @engine: Engine class and instance. */
struct i915_engine_class_instance engine;
- /** Reserved field. */
+ /** @rsvd0: Reserved field. */
__u32 rsvd0;
- /** Engine flags. */
+ /** @flags: Engine flags. */
__u64 flags;
- /** Capabilities of this engine. */
+ /** @capabilities: Capabilities of this engine. */
__u64 capabilities;
#define I915_VIDEO_CLASS_CAPABILITY_HEVC (1 << 0)
#define I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC (1 << 1)
- /** Reserved fields. */
+ /** @rsvd1: Reserved fields. */
__u64 rsvd1[4];
};
@@ -2316,13 +2407,13 @@ struct drm_i915_engine_info {
* an array of struct drm_i915_engine_info structures.
*/
struct drm_i915_query_engine_info {
- /** Number of struct drm_i915_engine_info structs following. */
+ /** @num_engines: Number of struct drm_i915_engine_info structs following. */
__u32 num_engines;
- /** MBZ */
+ /** @rsvd: MBZ */
__u32 rsvd[3];
- /** Marker for drm_i915_engine_info structures. */
+ /** @engines: Marker for drm_i915_engine_info structures. */
struct drm_i915_engine_info engines[];
};
@@ -2376,6 +2467,241 @@ struct drm_i915_query_perf_config {
__u8 data[];
};
+/**
+ * enum drm_i915_gem_memory_class - Supported memory classes
+ */
+enum drm_i915_gem_memory_class {
+ /** @I915_MEMORY_CLASS_SYSTEM: System memory */
+ I915_MEMORY_CLASS_SYSTEM = 0,
+ /** @I915_MEMORY_CLASS_DEVICE: Device local-memory */
+ I915_MEMORY_CLASS_DEVICE,
+};
+
+/**
+ * struct drm_i915_gem_memory_class_instance - Identify particular memory region
+ */
+struct drm_i915_gem_memory_class_instance {
+ /** @memory_class: See enum drm_i915_gem_memory_class */
+ __u16 memory_class;
+
+ /** @memory_instance: Which instance */
+ __u16 memory_instance;
+};
+
+/**
+ * struct drm_i915_memory_region_info - Describes one region as known to the
+ * driver.
+ *
+ * Note that we reserve some stuff here for potential future work. As an example
+ * we might want expose the capabilities for a given region, which could include
+ * things like if the region is CPU mappable/accessible, what are the supported
+ * mapping types etc.
+ *
+ * Note that to extend struct drm_i915_memory_region_info and struct
+ * drm_i915_query_memory_regions in the future the plan is to do the following:
+ *
+ * .. code-block:: C
+ *
+ * struct drm_i915_memory_region_info {
+ * struct drm_i915_gem_memory_class_instance region;
+ * union {
+ * __u32 rsvd0;
+ * __u32 new_thing1;
+ * };
+ * ...
+ * union {
+ * __u64 rsvd1[8];
+ * struct {
+ * __u64 new_thing2;
+ * __u64 new_thing3;
+ * ...
+ * };
+ * };
+ * };
+ *
+ * With this things should remain source compatible between versions for
+ * userspace, even as we add new fields.
+ *
+ * Note this is using both struct drm_i915_query_item and struct drm_i915_query.
+ * For this new query we are adding the new query id DRM_I915_QUERY_MEMORY_REGIONS
+ * at &drm_i915_query_item.query_id.
+ */
+struct drm_i915_memory_region_info {
+ /** @region: The class:instance pair encoding */
+ struct drm_i915_gem_memory_class_instance region;
+
+ /** @rsvd0: MBZ */
+ __u32 rsvd0;
+
+ /** @probed_size: Memory probed by the driver (-1 = unknown) */
+ __u64 probed_size;
+
+ /** @unallocated_size: Estimate of memory remaining (-1 = unknown) */
+ __u64 unallocated_size;
+
+ /** @rsvd1: MBZ */
+ __u64 rsvd1[8];
+};
+
+/**
+ * struct drm_i915_query_memory_regions
+ *
+ * The region info query enumerates all regions known to the driver by filling
+ * in an array of struct drm_i915_memory_region_info structures.
+ *
+ * Example for getting the list of supported regions:
+ *
+ * .. code-block:: C
+ *
+ * struct drm_i915_query_memory_regions *info;
+ * struct drm_i915_query_item item = {
+ * .query_id = DRM_I915_QUERY_MEMORY_REGIONS;
+ * };
+ * struct drm_i915_query query = {
+ * .num_items = 1,
+ * .items_ptr = (uintptr_t)&item,
+ * };
+ * int err, i;
+ *
+ * // First query the size of the blob we need, this needs to be large
+ * // enough to hold our array of regions. The kernel will fill out the
+ * // item.length for us, which is the number of bytes we need.
+ * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
+ * if (err) ...
+ *
+ * info = calloc(1, item.length);
+ * // Now that we allocated the required number of bytes, we call the ioctl
+ * // again, this time with the data_ptr pointing to our newly allocated
+ * // blob, which the kernel can then populate with the all the region info.
+ * item.data_ptr = (uintptr_t)&info,
+ *
+ * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
+ * if (err) ...
+ *
+ * // We can now access each region in the array
+ * for (i = 0; i < info->num_regions; i++) {
+ * struct drm_i915_memory_region_info mr = info->regions[i];
+ * u16 class = mr.region.class;
+ * u16 instance = mr.region.instance;
+ *
+ * ....
+ * }
+ *
+ * free(info);
+ */
+struct drm_i915_query_memory_regions {
+ /** @num_regions: Number of supported regions */
+ __u32 num_regions;
+
+ /** @rsvd: MBZ */
+ __u32 rsvd[3];
+
+ /** @regions: Info about each supported region */
+ struct drm_i915_memory_region_info regions[];
+};
+
+/**
+ * struct drm_i915_gem_create_ext - Existing gem_create behaviour, with added
+ * extension support using struct i915_user_extension.
+ *
+ * Note that in the future we want to have our buffer flags here, at least for
+ * the stuff that is immutable. Previously we would have two ioctls, one to
+ * create the object with gem_create, and another to apply various parameters,
+ * however this creates some ambiguity for the params which are considered
+ * immutable. Also in general we're phasing out the various SET/GET ioctls.
+ */
+struct drm_i915_gem_create_ext {
+ /**
+ * @size: Requested size for the object.
+ *
+ * The (page-aligned) allocated size for the object will be returned.
+ *
+ * Note that for some devices we have might have further minimum
+ * page-size restrictions(larger than 4K), like for device local-memory.
+ * However in general the final size here should always reflect any
+ * rounding up, if for example using the I915_GEM_CREATE_EXT_MEMORY_REGIONS
+ * extension to place the object in device local-memory.
+ */
+ __u64 size;
+ /**
+ * @handle: Returned handle for the object.
+ *
+ * Object handles are nonzero.
+ */
+ __u32 handle;
+ /** @flags: MBZ */
+ __u32 flags;
+ /**
+ * @extensions: The chain of extensions to apply to this object.
+ *
+ * This will be useful in the future when we need to support several
+ * different extensions, and we need to apply more than one when
+ * creating the object. See struct i915_user_extension.
+ *
+ * If we don't supply any extensions then we get the same old gem_create
+ * behaviour.
+ *
+ * For I915_GEM_CREATE_EXT_MEMORY_REGIONS usage see
+ * struct drm_i915_gem_create_ext_memory_regions.
+ */
+#define I915_GEM_CREATE_EXT_MEMORY_REGIONS 0
+ __u64 extensions;
+};
+
+/**
+ * struct drm_i915_gem_create_ext_memory_regions - The
+ * I915_GEM_CREATE_EXT_MEMORY_REGIONS extension.
+ *
+ * Set the object with the desired set of placements/regions in priority
+ * order. Each entry must be unique and supported by the device.
+ *
+ * This is provided as an array of struct drm_i915_gem_memory_class_instance, or
+ * an equivalent layout of class:instance pair encodings. See struct
+ * drm_i915_query_memory_regions and DRM_I915_QUERY_MEMORY_REGIONS for how to
+ * query the supported regions for a device.
+ *
+ * As an example, on discrete devices, if we wish to set the placement as
+ * device local-memory we can do something like:
+ *
+ * .. code-block:: C
+ *
+ * struct drm_i915_gem_memory_class_instance region_lmem = {
+ * .memory_class = I915_MEMORY_CLASS_DEVICE,
+ * .memory_instance = 0,
+ * };
+ * struct drm_i915_gem_create_ext_memory_regions regions = {
+ * .base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
+ * .regions = (uintptr_t)®ion_lmem,
+ * .num_regions = 1,
+ * };
+ * struct drm_i915_gem_create_ext create_ext = {
+ * .size = 16 * PAGE_SIZE,
+ * .extensions = (uintptr_t)®ions,
+ * };
+ *
+ * int err = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE_EXT, &create_ext);
+ * if (err) ...
+ *
+ * At which point we get the object handle in &drm_i915_gem_create_ext.handle,
+ * along with the final object size in &drm_i915_gem_create_ext.size, which
+ * should account for any rounding up, if required.
+ */
+struct drm_i915_gem_create_ext_memory_regions {
+ /** @base: Extension link. See struct i915_user_extension. */
+ struct i915_user_extension base;
+
+ /** @pad: MBZ */
+ __u32 pad;
+ /** @num_regions: Number of elements in the @regions array. */
+ __u32 num_regions;
+ /**
+ * @regions: The regions/placements array.
+ *
+ * An array of struct drm_i915_gem_memory_class_instance.
+ */
+ __u64 regions;
+};
+
#if defined(__cplusplus)
}
#endif
--
2.26.3
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^ permalink raw reply related [flat|nested] 39+ messages in thread* [igt-dev] [PATCH i-g-t 07/12] i915_drm.h sync
@ 2021-05-11 16:51 ` Matthew Auld
0 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev; +Cc: thomas.hellstrom, intel-gfx, petri.latvala, daniel
Sync to get gem_create_ext and the regions query stuff.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
include/drm-uapi/i915_drm.h | 394 ++++++++++++++++++++++++++++++++----
1 file changed, 360 insertions(+), 34 deletions(-)
diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index bf9ea471..a1c0030c 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -62,8 +62,8 @@ extern "C" {
#define I915_ERROR_UEVENT "ERROR"
#define I915_RESET_UEVENT "RESET"
-/*
- * i915_user_extension: Base class for defining a chain of extensions
+/**
+ * struct i915_user_extension - Base class for defining a chain of extensions
*
* Many interfaces need to grow over time. In most cases we can simply
* extend the struct and have userspace pass in more data. Another option,
@@ -76,12 +76,58 @@ extern "C" {
* increasing complexity, and for large parts of that interface to be
* entirely optional. The downside is more pointer chasing; chasing across
* the boundary with pointers encapsulated inside u64.
+ *
+ * Example chaining:
+ *
+ * .. code-block:: C
+ *
+ * struct i915_user_extension ext3 {
+ * .next_extension = 0, // end
+ * .name = ...,
+ * };
+ * struct i915_user_extension ext2 {
+ * .next_extension = (uintptr_t)&ext3,
+ * .name = ...,
+ * };
+ * struct i915_user_extension ext1 {
+ * .next_extension = (uintptr_t)&ext2,
+ * .name = ...,
+ * };
+ *
+ * Typically the struct i915_user_extension would be embedded in some uAPI
+ * struct, and in this case we would feed it the head of the chain(i.e ext1),
+ * which would then apply all of the above extensions.
+ *
*/
struct i915_user_extension {
+ /**
+ * @next_extension:
+ *
+ * Pointer to the next struct i915_user_extension, or zero if the end.
+ */
__u64 next_extension;
+ /**
+ * @name: Name of the extension.
+ *
+ * Note that the name here is just some integer.
+ *
+ * Also note that the name space for this is not global for the whole
+ * driver, but rather its scope/meaning is limited to the specific piece
+ * of uAPI which has embedded the struct i915_user_extension.
+ */
__u32 name;
- __u32 flags; /* All undefined bits must be zero. */
- __u32 rsvd[4]; /* Reserved for future use; must be zero. */
+ /**
+ * @flags: MBZ
+ *
+ * All undefined bits must be zero.
+ */
+ __u32 flags;
+ /**
+ * @rsvd: MBZ
+ *
+ * Reserved for future use; must be zero.
+ */
+ __u32 rsvd[4];
};
/*
@@ -360,6 +406,7 @@ typedef struct _drm_i915_sarea {
#define DRM_I915_QUERY 0x39
#define DRM_I915_GEM_VM_CREATE 0x3a
#define DRM_I915_GEM_VM_DESTROY 0x3b
+#define DRM_I915_GEM_CREATE_EXT 0x3c
/* Must be kept compact -- no holes */
#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
@@ -392,6 +439,7 @@ typedef struct _drm_i915_sarea {
#define DRM_IOCTL_I915_GEM_ENTERVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT)
#define DRM_IOCTL_I915_GEM_LEAVEVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT)
#define DRM_IOCTL_I915_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct drm_i915_gem_create)
+#define DRM_IOCTL_I915_GEM_CREATE_EXT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE_EXT, struct drm_i915_gem_create_ext)
#define DRM_IOCTL_I915_GEM_PREAD DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PREAD, struct drm_i915_gem_pread)
#define DRM_IOCTL_I915_GEM_PWRITE DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PWRITE, struct drm_i915_gem_pwrite)
#define DRM_IOCTL_I915_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct drm_i915_gem_mmap)
@@ -943,6 +991,7 @@ struct drm_i915_gem_exec_object {
__u64 offset;
};
+/* DRM_IOCTL_I915_GEM_EXECBUFFER was removed in Linux 5.13 */
struct drm_i915_gem_execbuffer {
/**
* List of buffers to be validated with their relocations to be
@@ -1053,12 +1102,12 @@ struct drm_i915_gem_exec_fence {
__u32 flags;
};
-/**
+/*
* See drm_i915_gem_execbuffer_ext_timeline_fences.
*/
#define DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES 0
-/**
+/*
* This structure describes an array of drm_syncobj and associated points for
* timeline variants of drm_syncobj. It is invalid to append this structure to
* the execbuf if I915_EXEC_FENCE_ARRAY is set.
@@ -1699,7 +1748,7 @@ struct drm_i915_gem_context_param {
__u64 value;
};
-/**
+/*
* Context SSEU programming
*
* It may be necessary for either functional or performance reason to configure
@@ -2066,7 +2115,7 @@ struct drm_i915_perf_open_param {
__u64 properties_ptr;
};
-/**
+/*
* Enable data capture for a stream that was either opened in a disabled state
* via I915_PERF_FLAG_DISABLED or was later disabled via
* I915_PERF_IOCTL_DISABLE.
@@ -2080,7 +2129,7 @@ struct drm_i915_perf_open_param {
*/
#define I915_PERF_IOCTL_ENABLE _IO('i', 0x0)
-/**
+/*
* Disable data capture for a stream.
*
* It is an error to try and read a stream that is disabled.
@@ -2089,7 +2138,7 @@ struct drm_i915_perf_open_param {
*/
#define I915_PERF_IOCTL_DISABLE _IO('i', 0x1)
-/**
+/*
* Change metrics_set captured by a stream.
*
* If the stream is bound to a specific context, the configuration change
@@ -2102,7 +2151,7 @@ struct drm_i915_perf_open_param {
*/
#define I915_PERF_IOCTL_CONFIG _IO('i', 0x2)
-/**
+/*
* Common to all i915 perf records
*/
struct drm_i915_perf_record_header {
@@ -2150,7 +2199,7 @@ enum drm_i915_perf_record_type {
DRM_I915_PERF_RECORD_MAX /* non-ABI */
};
-/**
+/*
* Structure to upload perf dynamic configuration into the kernel.
*/
struct drm_i915_perf_oa_config {
@@ -2171,53 +2220,95 @@ struct drm_i915_perf_oa_config {
__u64 flex_regs_ptr;
};
+/**
+ * struct drm_i915_query_item - An individual query for the kernel to process.
+ *
+ * The behaviour is determined by the @query_id. Note that exactly what
+ * @data_ptr is also depends on the specific @query_id.
+ */
struct drm_i915_query_item {
+ /** @query_id: The id for this query */
__u64 query_id;
#define DRM_I915_QUERY_TOPOLOGY_INFO 1
#define DRM_I915_QUERY_ENGINE_INFO 2
#define DRM_I915_QUERY_PERF_CONFIG 3
+#define DRM_I915_QUERY_MEMORY_REGIONS 4
/* Must be kept compact -- no holes and well documented */
- /*
+ /**
+ * @length:
+ *
* When set to zero by userspace, this is filled with the size of the
- * data to be written at the data_ptr pointer. The kernel sets this
+ * data to be written at the @data_ptr pointer. The kernel sets this
* value to a negative value to signal an error on a particular query
* item.
*/
__s32 length;
- /*
+ /**
+ * @flags:
+ *
* When query_id == DRM_I915_QUERY_TOPOLOGY_INFO, must be 0.
*
* When query_id == DRM_I915_QUERY_PERF_CONFIG, must be one of the
- * following :
- * - DRM_I915_QUERY_PERF_CONFIG_LIST
- * - DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID
- * - DRM_I915_QUERY_PERF_CONFIG_FOR_UUID
+ * following:
+ *
+ * - DRM_I915_QUERY_PERF_CONFIG_LIST
+ * - DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID
+ * - DRM_I915_QUERY_PERF_CONFIG_FOR_UUID
*/
__u32 flags;
#define DRM_I915_QUERY_PERF_CONFIG_LIST 1
#define DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID 2
#define DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_ID 3
- /*
- * Data will be written at the location pointed by data_ptr when the
- * value of length matches the length of the data to be written by the
+ /**
+ * @data_ptr:
+ *
+ * Data will be written at the location pointed by @data_ptr when the
+ * value of @length matches the length of the data to be written by the
* kernel.
*/
__u64 data_ptr;
};
+/**
+ * struct drm_i915_query - Supply an array of struct drm_i915_query_item for the
+ * kernel to fill out.
+ *
+ * Note that this is generally a two step process for each struct
+ * drm_i915_query_item in the array:
+ *
+ * 1. Call the DRM_IOCTL_I915_QUERY, giving it our array of struct
+ * drm_i915_query_item, with &drm_i915_query_item.length set to zero. The
+ * kernel will then fill in the size, in bytes, which tells userspace how
+ * memory it needs to allocate for the blob(say for an array of properties).
+ *
+ * 2. Next we call DRM_IOCTL_I915_QUERY again, this time with the
+ * &drm_i915_query_item.data_ptr equal to our newly allocated blob. Note that
+ * the &drm_i915_query_item.length should still be the same as what the
+ * kernel previously set. At this point the kernel can fill in the blob.
+ *
+ * Note that for some query items it can make sense for userspace to just pass
+ * in a buffer/blob equal to or larger than the required size. In this case only
+ * a single ioctl call is needed. For some smaller query items this can work
+ * quite well.
+ *
+ */
struct drm_i915_query {
+ /** @num_items: The number of elements in the @items_ptr array */
__u32 num_items;
- /*
- * Unused for now. Must be cleared to zero.
+ /**
+ * @flags: Unused for now. Must be cleared to zero.
*/
__u32 flags;
- /*
- * This points to an array of num_items drm_i915_query_item structures.
+ /**
+ * @items_ptr:
+ *
+ * Pointer to an array of struct drm_i915_query_item. The number of
+ * array elements is @num_items.
*/
__u64 items_ptr;
};
@@ -2291,21 +2382,21 @@ struct drm_i915_query_topology_info {
* Describes one engine and it's capabilities as known to the driver.
*/
struct drm_i915_engine_info {
- /** Engine class and instance. */
+ /** @engine: Engine class and instance. */
struct i915_engine_class_instance engine;
- /** Reserved field. */
+ /** @rsvd0: Reserved field. */
__u32 rsvd0;
- /** Engine flags. */
+ /** @flags: Engine flags. */
__u64 flags;
- /** Capabilities of this engine. */
+ /** @capabilities: Capabilities of this engine. */
__u64 capabilities;
#define I915_VIDEO_CLASS_CAPABILITY_HEVC (1 << 0)
#define I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC (1 << 1)
- /** Reserved fields. */
+ /** @rsvd1: Reserved fields. */
__u64 rsvd1[4];
};
@@ -2316,13 +2407,13 @@ struct drm_i915_engine_info {
* an array of struct drm_i915_engine_info structures.
*/
struct drm_i915_query_engine_info {
- /** Number of struct drm_i915_engine_info structs following. */
+ /** @num_engines: Number of struct drm_i915_engine_info structs following. */
__u32 num_engines;
- /** MBZ */
+ /** @rsvd: MBZ */
__u32 rsvd[3];
- /** Marker for drm_i915_engine_info structures. */
+ /** @engines: Marker for drm_i915_engine_info structures. */
struct drm_i915_engine_info engines[];
};
@@ -2376,6 +2467,241 @@ struct drm_i915_query_perf_config {
__u8 data[];
};
+/**
+ * enum drm_i915_gem_memory_class - Supported memory classes
+ */
+enum drm_i915_gem_memory_class {
+ /** @I915_MEMORY_CLASS_SYSTEM: System memory */
+ I915_MEMORY_CLASS_SYSTEM = 0,
+ /** @I915_MEMORY_CLASS_DEVICE: Device local-memory */
+ I915_MEMORY_CLASS_DEVICE,
+};
+
+/**
+ * struct drm_i915_gem_memory_class_instance - Identify particular memory region
+ */
+struct drm_i915_gem_memory_class_instance {
+ /** @memory_class: See enum drm_i915_gem_memory_class */
+ __u16 memory_class;
+
+ /** @memory_instance: Which instance */
+ __u16 memory_instance;
+};
+
+/**
+ * struct drm_i915_memory_region_info - Describes one region as known to the
+ * driver.
+ *
+ * Note that we reserve some stuff here for potential future work. As an example
+ * we might want expose the capabilities for a given region, which could include
+ * things like if the region is CPU mappable/accessible, what are the supported
+ * mapping types etc.
+ *
+ * Note that to extend struct drm_i915_memory_region_info and struct
+ * drm_i915_query_memory_regions in the future the plan is to do the following:
+ *
+ * .. code-block:: C
+ *
+ * struct drm_i915_memory_region_info {
+ * struct drm_i915_gem_memory_class_instance region;
+ * union {
+ * __u32 rsvd0;
+ * __u32 new_thing1;
+ * };
+ * ...
+ * union {
+ * __u64 rsvd1[8];
+ * struct {
+ * __u64 new_thing2;
+ * __u64 new_thing3;
+ * ...
+ * };
+ * };
+ * };
+ *
+ * With this things should remain source compatible between versions for
+ * userspace, even as we add new fields.
+ *
+ * Note this is using both struct drm_i915_query_item and struct drm_i915_query.
+ * For this new query we are adding the new query id DRM_I915_QUERY_MEMORY_REGIONS
+ * at &drm_i915_query_item.query_id.
+ */
+struct drm_i915_memory_region_info {
+ /** @region: The class:instance pair encoding */
+ struct drm_i915_gem_memory_class_instance region;
+
+ /** @rsvd0: MBZ */
+ __u32 rsvd0;
+
+ /** @probed_size: Memory probed by the driver (-1 = unknown) */
+ __u64 probed_size;
+
+ /** @unallocated_size: Estimate of memory remaining (-1 = unknown) */
+ __u64 unallocated_size;
+
+ /** @rsvd1: MBZ */
+ __u64 rsvd1[8];
+};
+
+/**
+ * struct drm_i915_query_memory_regions
+ *
+ * The region info query enumerates all regions known to the driver by filling
+ * in an array of struct drm_i915_memory_region_info structures.
+ *
+ * Example for getting the list of supported regions:
+ *
+ * .. code-block:: C
+ *
+ * struct drm_i915_query_memory_regions *info;
+ * struct drm_i915_query_item item = {
+ * .query_id = DRM_I915_QUERY_MEMORY_REGIONS;
+ * };
+ * struct drm_i915_query query = {
+ * .num_items = 1,
+ * .items_ptr = (uintptr_t)&item,
+ * };
+ * int err, i;
+ *
+ * // First query the size of the blob we need, this needs to be large
+ * // enough to hold our array of regions. The kernel will fill out the
+ * // item.length for us, which is the number of bytes we need.
+ * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
+ * if (err) ...
+ *
+ * info = calloc(1, item.length);
+ * // Now that we allocated the required number of bytes, we call the ioctl
+ * // again, this time with the data_ptr pointing to our newly allocated
+ * // blob, which the kernel can then populate with the all the region info.
+ * item.data_ptr = (uintptr_t)&info,
+ *
+ * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
+ * if (err) ...
+ *
+ * // We can now access each region in the array
+ * for (i = 0; i < info->num_regions; i++) {
+ * struct drm_i915_memory_region_info mr = info->regions[i];
+ * u16 class = mr.region.class;
+ * u16 instance = mr.region.instance;
+ *
+ * ....
+ * }
+ *
+ * free(info);
+ */
+struct drm_i915_query_memory_regions {
+ /** @num_regions: Number of supported regions */
+ __u32 num_regions;
+
+ /** @rsvd: MBZ */
+ __u32 rsvd[3];
+
+ /** @regions: Info about each supported region */
+ struct drm_i915_memory_region_info regions[];
+};
+
+/**
+ * struct drm_i915_gem_create_ext - Existing gem_create behaviour, with added
+ * extension support using struct i915_user_extension.
+ *
+ * Note that in the future we want to have our buffer flags here, at least for
+ * the stuff that is immutable. Previously we would have two ioctls, one to
+ * create the object with gem_create, and another to apply various parameters,
+ * however this creates some ambiguity for the params which are considered
+ * immutable. Also in general we're phasing out the various SET/GET ioctls.
+ */
+struct drm_i915_gem_create_ext {
+ /**
+ * @size: Requested size for the object.
+ *
+ * The (page-aligned) allocated size for the object will be returned.
+ *
+ * Note that for some devices we have might have further minimum
+ * page-size restrictions(larger than 4K), like for device local-memory.
+ * However in general the final size here should always reflect any
+ * rounding up, if for example using the I915_GEM_CREATE_EXT_MEMORY_REGIONS
+ * extension to place the object in device local-memory.
+ */
+ __u64 size;
+ /**
+ * @handle: Returned handle for the object.
+ *
+ * Object handles are nonzero.
+ */
+ __u32 handle;
+ /** @flags: MBZ */
+ __u32 flags;
+ /**
+ * @extensions: The chain of extensions to apply to this object.
+ *
+ * This will be useful in the future when we need to support several
+ * different extensions, and we need to apply more than one when
+ * creating the object. See struct i915_user_extension.
+ *
+ * If we don't supply any extensions then we get the same old gem_create
+ * behaviour.
+ *
+ * For I915_GEM_CREATE_EXT_MEMORY_REGIONS usage see
+ * struct drm_i915_gem_create_ext_memory_regions.
+ */
+#define I915_GEM_CREATE_EXT_MEMORY_REGIONS 0
+ __u64 extensions;
+};
+
+/**
+ * struct drm_i915_gem_create_ext_memory_regions - The
+ * I915_GEM_CREATE_EXT_MEMORY_REGIONS extension.
+ *
+ * Set the object with the desired set of placements/regions in priority
+ * order. Each entry must be unique and supported by the device.
+ *
+ * This is provided as an array of struct drm_i915_gem_memory_class_instance, or
+ * an equivalent layout of class:instance pair encodings. See struct
+ * drm_i915_query_memory_regions and DRM_I915_QUERY_MEMORY_REGIONS for how to
+ * query the supported regions for a device.
+ *
+ * As an example, on discrete devices, if we wish to set the placement as
+ * device local-memory we can do something like:
+ *
+ * .. code-block:: C
+ *
+ * struct drm_i915_gem_memory_class_instance region_lmem = {
+ * .memory_class = I915_MEMORY_CLASS_DEVICE,
+ * .memory_instance = 0,
+ * };
+ * struct drm_i915_gem_create_ext_memory_regions regions = {
+ * .base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
+ * .regions = (uintptr_t)®ion_lmem,
+ * .num_regions = 1,
+ * };
+ * struct drm_i915_gem_create_ext create_ext = {
+ * .size = 16 * PAGE_SIZE,
+ * .extensions = (uintptr_t)®ions,
+ * };
+ *
+ * int err = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE_EXT, &create_ext);
+ * if (err) ...
+ *
+ * At which point we get the object handle in &drm_i915_gem_create_ext.handle,
+ * along with the final object size in &drm_i915_gem_create_ext.size, which
+ * should account for any rounding up, if required.
+ */
+struct drm_i915_gem_create_ext_memory_regions {
+ /** @base: Extension link. See struct i915_user_extension. */
+ struct i915_user_extension base;
+
+ /** @pad: MBZ */
+ __u32 pad;
+ /** @num_regions: Number of elements in the @regions array. */
+ __u32 num_regions;
+ /**
+ * @regions: The regions/placements array.
+ *
+ * An array of struct drm_i915_gem_memory_class_instance.
+ */
+ __u64 regions;
+};
+
#if defined(__cplusplus)
}
#endif
--
2.26.3
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^ permalink raw reply related [flat|nested] 39+ messages in thread* Re: [Intel-gfx] [PATCH i-g-t 07/12] i915_drm.h sync
2021-05-11 16:51 ` [igt-dev] " Matthew Auld
@ 2021-05-19 8:19 ` Petri Latvala
-1 siblings, 0 replies; 39+ messages in thread
From: Petri Latvala @ 2021-05-19 8:19 UTC (permalink / raw)
To: Matthew Auld; +Cc: igt-dev, thomas.hellstrom, intel-gfx
On Tue, May 11, 2021 at 05:51:12PM +0100, Matthew Auld wrote:
> Sync to get gem_create_ext and the regions query stuff.
Kernel commit sha in commit message please.
--
Petri Latvala
>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> ---
> include/drm-uapi/i915_drm.h | 394 ++++++++++++++++++++++++++++++++----
> 1 file changed, 360 insertions(+), 34 deletions(-)
>
> diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
> index bf9ea471..a1c0030c 100644
> --- a/include/drm-uapi/i915_drm.h
> +++ b/include/drm-uapi/i915_drm.h
> @@ -62,8 +62,8 @@ extern "C" {
> #define I915_ERROR_UEVENT "ERROR"
> #define I915_RESET_UEVENT "RESET"
>
> -/*
> - * i915_user_extension: Base class for defining a chain of extensions
> +/**
> + * struct i915_user_extension - Base class for defining a chain of extensions
> *
> * Many interfaces need to grow over time. In most cases we can simply
> * extend the struct and have userspace pass in more data. Another option,
> @@ -76,12 +76,58 @@ extern "C" {
> * increasing complexity, and for large parts of that interface to be
> * entirely optional. The downside is more pointer chasing; chasing across
> * the boundary with pointers encapsulated inside u64.
> + *
> + * Example chaining:
> + *
> + * .. code-block:: C
> + *
> + * struct i915_user_extension ext3 {
> + * .next_extension = 0, // end
> + * .name = ...,
> + * };
> + * struct i915_user_extension ext2 {
> + * .next_extension = (uintptr_t)&ext3,
> + * .name = ...,
> + * };
> + * struct i915_user_extension ext1 {
> + * .next_extension = (uintptr_t)&ext2,
> + * .name = ...,
> + * };
> + *
> + * Typically the struct i915_user_extension would be embedded in some uAPI
> + * struct, and in this case we would feed it the head of the chain(i.e ext1),
> + * which would then apply all of the above extensions.
> + *
> */
> struct i915_user_extension {
> + /**
> + * @next_extension:
> + *
> + * Pointer to the next struct i915_user_extension, or zero if the end.
> + */
> __u64 next_extension;
> + /**
> + * @name: Name of the extension.
> + *
> + * Note that the name here is just some integer.
> + *
> + * Also note that the name space for this is not global for the whole
> + * driver, but rather its scope/meaning is limited to the specific piece
> + * of uAPI which has embedded the struct i915_user_extension.
> + */
> __u32 name;
> - __u32 flags; /* All undefined bits must be zero. */
> - __u32 rsvd[4]; /* Reserved for future use; must be zero. */
> + /**
> + * @flags: MBZ
> + *
> + * All undefined bits must be zero.
> + */
> + __u32 flags;
> + /**
> + * @rsvd: MBZ
> + *
> + * Reserved for future use; must be zero.
> + */
> + __u32 rsvd[4];
> };
>
> /*
> @@ -360,6 +406,7 @@ typedef struct _drm_i915_sarea {
> #define DRM_I915_QUERY 0x39
> #define DRM_I915_GEM_VM_CREATE 0x3a
> #define DRM_I915_GEM_VM_DESTROY 0x3b
> +#define DRM_I915_GEM_CREATE_EXT 0x3c
> /* Must be kept compact -- no holes */
>
> #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
> @@ -392,6 +439,7 @@ typedef struct _drm_i915_sarea {
> #define DRM_IOCTL_I915_GEM_ENTERVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT)
> #define DRM_IOCTL_I915_GEM_LEAVEVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT)
> #define DRM_IOCTL_I915_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct drm_i915_gem_create)
> +#define DRM_IOCTL_I915_GEM_CREATE_EXT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE_EXT, struct drm_i915_gem_create_ext)
> #define DRM_IOCTL_I915_GEM_PREAD DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PREAD, struct drm_i915_gem_pread)
> #define DRM_IOCTL_I915_GEM_PWRITE DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PWRITE, struct drm_i915_gem_pwrite)
> #define DRM_IOCTL_I915_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct drm_i915_gem_mmap)
> @@ -943,6 +991,7 @@ struct drm_i915_gem_exec_object {
> __u64 offset;
> };
>
> +/* DRM_IOCTL_I915_GEM_EXECBUFFER was removed in Linux 5.13 */
> struct drm_i915_gem_execbuffer {
> /**
> * List of buffers to be validated with their relocations to be
> @@ -1053,12 +1102,12 @@ struct drm_i915_gem_exec_fence {
> __u32 flags;
> };
>
> -/**
> +/*
> * See drm_i915_gem_execbuffer_ext_timeline_fences.
> */
> #define DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES 0
>
> -/**
> +/*
> * This structure describes an array of drm_syncobj and associated points for
> * timeline variants of drm_syncobj. It is invalid to append this structure to
> * the execbuf if I915_EXEC_FENCE_ARRAY is set.
> @@ -1699,7 +1748,7 @@ struct drm_i915_gem_context_param {
> __u64 value;
> };
>
> -/**
> +/*
> * Context SSEU programming
> *
> * It may be necessary for either functional or performance reason to configure
> @@ -2066,7 +2115,7 @@ struct drm_i915_perf_open_param {
> __u64 properties_ptr;
> };
>
> -/**
> +/*
> * Enable data capture for a stream that was either opened in a disabled state
> * via I915_PERF_FLAG_DISABLED or was later disabled via
> * I915_PERF_IOCTL_DISABLE.
> @@ -2080,7 +2129,7 @@ struct drm_i915_perf_open_param {
> */
> #define I915_PERF_IOCTL_ENABLE _IO('i', 0x0)
>
> -/**
> +/*
> * Disable data capture for a stream.
> *
> * It is an error to try and read a stream that is disabled.
> @@ -2089,7 +2138,7 @@ struct drm_i915_perf_open_param {
> */
> #define I915_PERF_IOCTL_DISABLE _IO('i', 0x1)
>
> -/**
> +/*
> * Change metrics_set captured by a stream.
> *
> * If the stream is bound to a specific context, the configuration change
> @@ -2102,7 +2151,7 @@ struct drm_i915_perf_open_param {
> */
> #define I915_PERF_IOCTL_CONFIG _IO('i', 0x2)
>
> -/**
> +/*
> * Common to all i915 perf records
> */
> struct drm_i915_perf_record_header {
> @@ -2150,7 +2199,7 @@ enum drm_i915_perf_record_type {
> DRM_I915_PERF_RECORD_MAX /* non-ABI */
> };
>
> -/**
> +/*
> * Structure to upload perf dynamic configuration into the kernel.
> */
> struct drm_i915_perf_oa_config {
> @@ -2171,53 +2220,95 @@ struct drm_i915_perf_oa_config {
> __u64 flex_regs_ptr;
> };
>
> +/**
> + * struct drm_i915_query_item - An individual query for the kernel to process.
> + *
> + * The behaviour is determined by the @query_id. Note that exactly what
> + * @data_ptr is also depends on the specific @query_id.
> + */
> struct drm_i915_query_item {
> + /** @query_id: The id for this query */
> __u64 query_id;
> #define DRM_I915_QUERY_TOPOLOGY_INFO 1
> #define DRM_I915_QUERY_ENGINE_INFO 2
> #define DRM_I915_QUERY_PERF_CONFIG 3
> +#define DRM_I915_QUERY_MEMORY_REGIONS 4
> /* Must be kept compact -- no holes and well documented */
>
> - /*
> + /**
> + * @length:
> + *
> * When set to zero by userspace, this is filled with the size of the
> - * data to be written at the data_ptr pointer. The kernel sets this
> + * data to be written at the @data_ptr pointer. The kernel sets this
> * value to a negative value to signal an error on a particular query
> * item.
> */
> __s32 length;
>
> - /*
> + /**
> + * @flags:
> + *
> * When query_id == DRM_I915_QUERY_TOPOLOGY_INFO, must be 0.
> *
> * When query_id == DRM_I915_QUERY_PERF_CONFIG, must be one of the
> - * following :
> - * - DRM_I915_QUERY_PERF_CONFIG_LIST
> - * - DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID
> - * - DRM_I915_QUERY_PERF_CONFIG_FOR_UUID
> + * following:
> + *
> + * - DRM_I915_QUERY_PERF_CONFIG_LIST
> + * - DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID
> + * - DRM_I915_QUERY_PERF_CONFIG_FOR_UUID
> */
> __u32 flags;
> #define DRM_I915_QUERY_PERF_CONFIG_LIST 1
> #define DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID 2
> #define DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_ID 3
>
> - /*
> - * Data will be written at the location pointed by data_ptr when the
> - * value of length matches the length of the data to be written by the
> + /**
> + * @data_ptr:
> + *
> + * Data will be written at the location pointed by @data_ptr when the
> + * value of @length matches the length of the data to be written by the
> * kernel.
> */
> __u64 data_ptr;
> };
>
> +/**
> + * struct drm_i915_query - Supply an array of struct drm_i915_query_item for the
> + * kernel to fill out.
> + *
> + * Note that this is generally a two step process for each struct
> + * drm_i915_query_item in the array:
> + *
> + * 1. Call the DRM_IOCTL_I915_QUERY, giving it our array of struct
> + * drm_i915_query_item, with &drm_i915_query_item.length set to zero. The
> + * kernel will then fill in the size, in bytes, which tells userspace how
> + * memory it needs to allocate for the blob(say for an array of properties).
> + *
> + * 2. Next we call DRM_IOCTL_I915_QUERY again, this time with the
> + * &drm_i915_query_item.data_ptr equal to our newly allocated blob. Note that
> + * the &drm_i915_query_item.length should still be the same as what the
> + * kernel previously set. At this point the kernel can fill in the blob.
> + *
> + * Note that for some query items it can make sense for userspace to just pass
> + * in a buffer/blob equal to or larger than the required size. In this case only
> + * a single ioctl call is needed. For some smaller query items this can work
> + * quite well.
> + *
> + */
> struct drm_i915_query {
> + /** @num_items: The number of elements in the @items_ptr array */
> __u32 num_items;
>
> - /*
> - * Unused for now. Must be cleared to zero.
> + /**
> + * @flags: Unused for now. Must be cleared to zero.
> */
> __u32 flags;
>
> - /*
> - * This points to an array of num_items drm_i915_query_item structures.
> + /**
> + * @items_ptr:
> + *
> + * Pointer to an array of struct drm_i915_query_item. The number of
> + * array elements is @num_items.
> */
> __u64 items_ptr;
> };
> @@ -2291,21 +2382,21 @@ struct drm_i915_query_topology_info {
> * Describes one engine and it's capabilities as known to the driver.
> */
> struct drm_i915_engine_info {
> - /** Engine class and instance. */
> + /** @engine: Engine class and instance. */
> struct i915_engine_class_instance engine;
>
> - /** Reserved field. */
> + /** @rsvd0: Reserved field. */
> __u32 rsvd0;
>
> - /** Engine flags. */
> + /** @flags: Engine flags. */
> __u64 flags;
>
> - /** Capabilities of this engine. */
> + /** @capabilities: Capabilities of this engine. */
> __u64 capabilities;
> #define I915_VIDEO_CLASS_CAPABILITY_HEVC (1 << 0)
> #define I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC (1 << 1)
>
> - /** Reserved fields. */
> + /** @rsvd1: Reserved fields. */
> __u64 rsvd1[4];
> };
>
> @@ -2316,13 +2407,13 @@ struct drm_i915_engine_info {
> * an array of struct drm_i915_engine_info structures.
> */
> struct drm_i915_query_engine_info {
> - /** Number of struct drm_i915_engine_info structs following. */
> + /** @num_engines: Number of struct drm_i915_engine_info structs following. */
> __u32 num_engines;
>
> - /** MBZ */
> + /** @rsvd: MBZ */
> __u32 rsvd[3];
>
> - /** Marker for drm_i915_engine_info structures. */
> + /** @engines: Marker for drm_i915_engine_info structures. */
> struct drm_i915_engine_info engines[];
> };
>
> @@ -2376,6 +2467,241 @@ struct drm_i915_query_perf_config {
> __u8 data[];
> };
>
> +/**
> + * enum drm_i915_gem_memory_class - Supported memory classes
> + */
> +enum drm_i915_gem_memory_class {
> + /** @I915_MEMORY_CLASS_SYSTEM: System memory */
> + I915_MEMORY_CLASS_SYSTEM = 0,
> + /** @I915_MEMORY_CLASS_DEVICE: Device local-memory */
> + I915_MEMORY_CLASS_DEVICE,
> +};
> +
> +/**
> + * struct drm_i915_gem_memory_class_instance - Identify particular memory region
> + */
> +struct drm_i915_gem_memory_class_instance {
> + /** @memory_class: See enum drm_i915_gem_memory_class */
> + __u16 memory_class;
> +
> + /** @memory_instance: Which instance */
> + __u16 memory_instance;
> +};
> +
> +/**
> + * struct drm_i915_memory_region_info - Describes one region as known to the
> + * driver.
> + *
> + * Note that we reserve some stuff here for potential future work. As an example
> + * we might want expose the capabilities for a given region, which could include
> + * things like if the region is CPU mappable/accessible, what are the supported
> + * mapping types etc.
> + *
> + * Note that to extend struct drm_i915_memory_region_info and struct
> + * drm_i915_query_memory_regions in the future the plan is to do the following:
> + *
> + * .. code-block:: C
> + *
> + * struct drm_i915_memory_region_info {
> + * struct drm_i915_gem_memory_class_instance region;
> + * union {
> + * __u32 rsvd0;
> + * __u32 new_thing1;
> + * };
> + * ...
> + * union {
> + * __u64 rsvd1[8];
> + * struct {
> + * __u64 new_thing2;
> + * __u64 new_thing3;
> + * ...
> + * };
> + * };
> + * };
> + *
> + * With this things should remain source compatible between versions for
> + * userspace, even as we add new fields.
> + *
> + * Note this is using both struct drm_i915_query_item and struct drm_i915_query.
> + * For this new query we are adding the new query id DRM_I915_QUERY_MEMORY_REGIONS
> + * at &drm_i915_query_item.query_id.
> + */
> +struct drm_i915_memory_region_info {
> + /** @region: The class:instance pair encoding */
> + struct drm_i915_gem_memory_class_instance region;
> +
> + /** @rsvd0: MBZ */
> + __u32 rsvd0;
> +
> + /** @probed_size: Memory probed by the driver (-1 = unknown) */
> + __u64 probed_size;
> +
> + /** @unallocated_size: Estimate of memory remaining (-1 = unknown) */
> + __u64 unallocated_size;
> +
> + /** @rsvd1: MBZ */
> + __u64 rsvd1[8];
> +};
> +
> +/**
> + * struct drm_i915_query_memory_regions
> + *
> + * The region info query enumerates all regions known to the driver by filling
> + * in an array of struct drm_i915_memory_region_info structures.
> + *
> + * Example for getting the list of supported regions:
> + *
> + * .. code-block:: C
> + *
> + * struct drm_i915_query_memory_regions *info;
> + * struct drm_i915_query_item item = {
> + * .query_id = DRM_I915_QUERY_MEMORY_REGIONS;
> + * };
> + * struct drm_i915_query query = {
> + * .num_items = 1,
> + * .items_ptr = (uintptr_t)&item,
> + * };
> + * int err, i;
> + *
> + * // First query the size of the blob we need, this needs to be large
> + * // enough to hold our array of regions. The kernel will fill out the
> + * // item.length for us, which is the number of bytes we need.
> + * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
> + * if (err) ...
> + *
> + * info = calloc(1, item.length);
> + * // Now that we allocated the required number of bytes, we call the ioctl
> + * // again, this time with the data_ptr pointing to our newly allocated
> + * // blob, which the kernel can then populate with the all the region info.
> + * item.data_ptr = (uintptr_t)&info,
> + *
> + * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
> + * if (err) ...
> + *
> + * // We can now access each region in the array
> + * for (i = 0; i < info->num_regions; i++) {
> + * struct drm_i915_memory_region_info mr = info->regions[i];
> + * u16 class = mr.region.class;
> + * u16 instance = mr.region.instance;
> + *
> + * ....
> + * }
> + *
> + * free(info);
> + */
> +struct drm_i915_query_memory_regions {
> + /** @num_regions: Number of supported regions */
> + __u32 num_regions;
> +
> + /** @rsvd: MBZ */
> + __u32 rsvd[3];
> +
> + /** @regions: Info about each supported region */
> + struct drm_i915_memory_region_info regions[];
> +};
> +
> +/**
> + * struct drm_i915_gem_create_ext - Existing gem_create behaviour, with added
> + * extension support using struct i915_user_extension.
> + *
> + * Note that in the future we want to have our buffer flags here, at least for
> + * the stuff that is immutable. Previously we would have two ioctls, one to
> + * create the object with gem_create, and another to apply various parameters,
> + * however this creates some ambiguity for the params which are considered
> + * immutable. Also in general we're phasing out the various SET/GET ioctls.
> + */
> +struct drm_i915_gem_create_ext {
> + /**
> + * @size: Requested size for the object.
> + *
> + * The (page-aligned) allocated size for the object will be returned.
> + *
> + * Note that for some devices we have might have further minimum
> + * page-size restrictions(larger than 4K), like for device local-memory.
> + * However in general the final size here should always reflect any
> + * rounding up, if for example using the I915_GEM_CREATE_EXT_MEMORY_REGIONS
> + * extension to place the object in device local-memory.
> + */
> + __u64 size;
> + /**
> + * @handle: Returned handle for the object.
> + *
> + * Object handles are nonzero.
> + */
> + __u32 handle;
> + /** @flags: MBZ */
> + __u32 flags;
> + /**
> + * @extensions: The chain of extensions to apply to this object.
> + *
> + * This will be useful in the future when we need to support several
> + * different extensions, and we need to apply more than one when
> + * creating the object. See struct i915_user_extension.
> + *
> + * If we don't supply any extensions then we get the same old gem_create
> + * behaviour.
> + *
> + * For I915_GEM_CREATE_EXT_MEMORY_REGIONS usage see
> + * struct drm_i915_gem_create_ext_memory_regions.
> + */
> +#define I915_GEM_CREATE_EXT_MEMORY_REGIONS 0
> + __u64 extensions;
> +};
> +
> +/**
> + * struct drm_i915_gem_create_ext_memory_regions - The
> + * I915_GEM_CREATE_EXT_MEMORY_REGIONS extension.
> + *
> + * Set the object with the desired set of placements/regions in priority
> + * order. Each entry must be unique and supported by the device.
> + *
> + * This is provided as an array of struct drm_i915_gem_memory_class_instance, or
> + * an equivalent layout of class:instance pair encodings. See struct
> + * drm_i915_query_memory_regions and DRM_I915_QUERY_MEMORY_REGIONS for how to
> + * query the supported regions for a device.
> + *
> + * As an example, on discrete devices, if we wish to set the placement as
> + * device local-memory we can do something like:
> + *
> + * .. code-block:: C
> + *
> + * struct drm_i915_gem_memory_class_instance region_lmem = {
> + * .memory_class = I915_MEMORY_CLASS_DEVICE,
> + * .memory_instance = 0,
> + * };
> + * struct drm_i915_gem_create_ext_memory_regions regions = {
> + * .base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
> + * .regions = (uintptr_t)®ion_lmem,
> + * .num_regions = 1,
> + * };
> + * struct drm_i915_gem_create_ext create_ext = {
> + * .size = 16 * PAGE_SIZE,
> + * .extensions = (uintptr_t)®ions,
> + * };
> + *
> + * int err = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE_EXT, &create_ext);
> + * if (err) ...
> + *
> + * At which point we get the object handle in &drm_i915_gem_create_ext.handle,
> + * along with the final object size in &drm_i915_gem_create_ext.size, which
> + * should account for any rounding up, if required.
> + */
> +struct drm_i915_gem_create_ext_memory_regions {
> + /** @base: Extension link. See struct i915_user_extension. */
> + struct i915_user_extension base;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> + /** @num_regions: Number of elements in the @regions array. */
> + __u32 num_regions;
> + /**
> + * @regions: The regions/placements array.
> + *
> + * An array of struct drm_i915_gem_memory_class_instance.
> + */
> + __u64 regions;
> +};
> +
> #if defined(__cplusplus)
> }
> #endif
> --
> 2.26.3
>
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^ permalink raw reply [flat|nested] 39+ messages in thread* Re: [igt-dev] [PATCH i-g-t 07/12] i915_drm.h sync
@ 2021-05-19 8:19 ` Petri Latvala
0 siblings, 0 replies; 39+ messages in thread
From: Petri Latvala @ 2021-05-19 8:19 UTC (permalink / raw)
To: Matthew Auld; +Cc: igt-dev, thomas.hellstrom, intel-gfx, daniel
On Tue, May 11, 2021 at 05:51:12PM +0100, Matthew Auld wrote:
> Sync to get gem_create_ext and the regions query stuff.
Kernel commit sha in commit message please.
--
Petri Latvala
>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> ---
> include/drm-uapi/i915_drm.h | 394 ++++++++++++++++++++++++++++++++----
> 1 file changed, 360 insertions(+), 34 deletions(-)
>
> diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
> index bf9ea471..a1c0030c 100644
> --- a/include/drm-uapi/i915_drm.h
> +++ b/include/drm-uapi/i915_drm.h
> @@ -62,8 +62,8 @@ extern "C" {
> #define I915_ERROR_UEVENT "ERROR"
> #define I915_RESET_UEVENT "RESET"
>
> -/*
> - * i915_user_extension: Base class for defining a chain of extensions
> +/**
> + * struct i915_user_extension - Base class for defining a chain of extensions
> *
> * Many interfaces need to grow over time. In most cases we can simply
> * extend the struct and have userspace pass in more data. Another option,
> @@ -76,12 +76,58 @@ extern "C" {
> * increasing complexity, and for large parts of that interface to be
> * entirely optional. The downside is more pointer chasing; chasing across
> * the boundary with pointers encapsulated inside u64.
> + *
> + * Example chaining:
> + *
> + * .. code-block:: C
> + *
> + * struct i915_user_extension ext3 {
> + * .next_extension = 0, // end
> + * .name = ...,
> + * };
> + * struct i915_user_extension ext2 {
> + * .next_extension = (uintptr_t)&ext3,
> + * .name = ...,
> + * };
> + * struct i915_user_extension ext1 {
> + * .next_extension = (uintptr_t)&ext2,
> + * .name = ...,
> + * };
> + *
> + * Typically the struct i915_user_extension would be embedded in some uAPI
> + * struct, and in this case we would feed it the head of the chain(i.e ext1),
> + * which would then apply all of the above extensions.
> + *
> */
> struct i915_user_extension {
> + /**
> + * @next_extension:
> + *
> + * Pointer to the next struct i915_user_extension, or zero if the end.
> + */
> __u64 next_extension;
> + /**
> + * @name: Name of the extension.
> + *
> + * Note that the name here is just some integer.
> + *
> + * Also note that the name space for this is not global for the whole
> + * driver, but rather its scope/meaning is limited to the specific piece
> + * of uAPI which has embedded the struct i915_user_extension.
> + */
> __u32 name;
> - __u32 flags; /* All undefined bits must be zero. */
> - __u32 rsvd[4]; /* Reserved for future use; must be zero. */
> + /**
> + * @flags: MBZ
> + *
> + * All undefined bits must be zero.
> + */
> + __u32 flags;
> + /**
> + * @rsvd: MBZ
> + *
> + * Reserved for future use; must be zero.
> + */
> + __u32 rsvd[4];
> };
>
> /*
> @@ -360,6 +406,7 @@ typedef struct _drm_i915_sarea {
> #define DRM_I915_QUERY 0x39
> #define DRM_I915_GEM_VM_CREATE 0x3a
> #define DRM_I915_GEM_VM_DESTROY 0x3b
> +#define DRM_I915_GEM_CREATE_EXT 0x3c
> /* Must be kept compact -- no holes */
>
> #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
> @@ -392,6 +439,7 @@ typedef struct _drm_i915_sarea {
> #define DRM_IOCTL_I915_GEM_ENTERVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT)
> #define DRM_IOCTL_I915_GEM_LEAVEVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT)
> #define DRM_IOCTL_I915_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct drm_i915_gem_create)
> +#define DRM_IOCTL_I915_GEM_CREATE_EXT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE_EXT, struct drm_i915_gem_create_ext)
> #define DRM_IOCTL_I915_GEM_PREAD DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PREAD, struct drm_i915_gem_pread)
> #define DRM_IOCTL_I915_GEM_PWRITE DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PWRITE, struct drm_i915_gem_pwrite)
> #define DRM_IOCTL_I915_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct drm_i915_gem_mmap)
> @@ -943,6 +991,7 @@ struct drm_i915_gem_exec_object {
> __u64 offset;
> };
>
> +/* DRM_IOCTL_I915_GEM_EXECBUFFER was removed in Linux 5.13 */
> struct drm_i915_gem_execbuffer {
> /**
> * List of buffers to be validated with their relocations to be
> @@ -1053,12 +1102,12 @@ struct drm_i915_gem_exec_fence {
> __u32 flags;
> };
>
> -/**
> +/*
> * See drm_i915_gem_execbuffer_ext_timeline_fences.
> */
> #define DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES 0
>
> -/**
> +/*
> * This structure describes an array of drm_syncobj and associated points for
> * timeline variants of drm_syncobj. It is invalid to append this structure to
> * the execbuf if I915_EXEC_FENCE_ARRAY is set.
> @@ -1699,7 +1748,7 @@ struct drm_i915_gem_context_param {
> __u64 value;
> };
>
> -/**
> +/*
> * Context SSEU programming
> *
> * It may be necessary for either functional or performance reason to configure
> @@ -2066,7 +2115,7 @@ struct drm_i915_perf_open_param {
> __u64 properties_ptr;
> };
>
> -/**
> +/*
> * Enable data capture for a stream that was either opened in a disabled state
> * via I915_PERF_FLAG_DISABLED or was later disabled via
> * I915_PERF_IOCTL_DISABLE.
> @@ -2080,7 +2129,7 @@ struct drm_i915_perf_open_param {
> */
> #define I915_PERF_IOCTL_ENABLE _IO('i', 0x0)
>
> -/**
> +/*
> * Disable data capture for a stream.
> *
> * It is an error to try and read a stream that is disabled.
> @@ -2089,7 +2138,7 @@ struct drm_i915_perf_open_param {
> */
> #define I915_PERF_IOCTL_DISABLE _IO('i', 0x1)
>
> -/**
> +/*
> * Change metrics_set captured by a stream.
> *
> * If the stream is bound to a specific context, the configuration change
> @@ -2102,7 +2151,7 @@ struct drm_i915_perf_open_param {
> */
> #define I915_PERF_IOCTL_CONFIG _IO('i', 0x2)
>
> -/**
> +/*
> * Common to all i915 perf records
> */
> struct drm_i915_perf_record_header {
> @@ -2150,7 +2199,7 @@ enum drm_i915_perf_record_type {
> DRM_I915_PERF_RECORD_MAX /* non-ABI */
> };
>
> -/**
> +/*
> * Structure to upload perf dynamic configuration into the kernel.
> */
> struct drm_i915_perf_oa_config {
> @@ -2171,53 +2220,95 @@ struct drm_i915_perf_oa_config {
> __u64 flex_regs_ptr;
> };
>
> +/**
> + * struct drm_i915_query_item - An individual query for the kernel to process.
> + *
> + * The behaviour is determined by the @query_id. Note that exactly what
> + * @data_ptr is also depends on the specific @query_id.
> + */
> struct drm_i915_query_item {
> + /** @query_id: The id for this query */
> __u64 query_id;
> #define DRM_I915_QUERY_TOPOLOGY_INFO 1
> #define DRM_I915_QUERY_ENGINE_INFO 2
> #define DRM_I915_QUERY_PERF_CONFIG 3
> +#define DRM_I915_QUERY_MEMORY_REGIONS 4
> /* Must be kept compact -- no holes and well documented */
>
> - /*
> + /**
> + * @length:
> + *
> * When set to zero by userspace, this is filled with the size of the
> - * data to be written at the data_ptr pointer. The kernel sets this
> + * data to be written at the @data_ptr pointer. The kernel sets this
> * value to a negative value to signal an error on a particular query
> * item.
> */
> __s32 length;
>
> - /*
> + /**
> + * @flags:
> + *
> * When query_id == DRM_I915_QUERY_TOPOLOGY_INFO, must be 0.
> *
> * When query_id == DRM_I915_QUERY_PERF_CONFIG, must be one of the
> - * following :
> - * - DRM_I915_QUERY_PERF_CONFIG_LIST
> - * - DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID
> - * - DRM_I915_QUERY_PERF_CONFIG_FOR_UUID
> + * following:
> + *
> + * - DRM_I915_QUERY_PERF_CONFIG_LIST
> + * - DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID
> + * - DRM_I915_QUERY_PERF_CONFIG_FOR_UUID
> */
> __u32 flags;
> #define DRM_I915_QUERY_PERF_CONFIG_LIST 1
> #define DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID 2
> #define DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_ID 3
>
> - /*
> - * Data will be written at the location pointed by data_ptr when the
> - * value of length matches the length of the data to be written by the
> + /**
> + * @data_ptr:
> + *
> + * Data will be written at the location pointed by @data_ptr when the
> + * value of @length matches the length of the data to be written by the
> * kernel.
> */
> __u64 data_ptr;
> };
>
> +/**
> + * struct drm_i915_query - Supply an array of struct drm_i915_query_item for the
> + * kernel to fill out.
> + *
> + * Note that this is generally a two step process for each struct
> + * drm_i915_query_item in the array:
> + *
> + * 1. Call the DRM_IOCTL_I915_QUERY, giving it our array of struct
> + * drm_i915_query_item, with &drm_i915_query_item.length set to zero. The
> + * kernel will then fill in the size, in bytes, which tells userspace how
> + * memory it needs to allocate for the blob(say for an array of properties).
> + *
> + * 2. Next we call DRM_IOCTL_I915_QUERY again, this time with the
> + * &drm_i915_query_item.data_ptr equal to our newly allocated blob. Note that
> + * the &drm_i915_query_item.length should still be the same as what the
> + * kernel previously set. At this point the kernel can fill in the blob.
> + *
> + * Note that for some query items it can make sense for userspace to just pass
> + * in a buffer/blob equal to or larger than the required size. In this case only
> + * a single ioctl call is needed. For some smaller query items this can work
> + * quite well.
> + *
> + */
> struct drm_i915_query {
> + /** @num_items: The number of elements in the @items_ptr array */
> __u32 num_items;
>
> - /*
> - * Unused for now. Must be cleared to zero.
> + /**
> + * @flags: Unused for now. Must be cleared to zero.
> */
> __u32 flags;
>
> - /*
> - * This points to an array of num_items drm_i915_query_item structures.
> + /**
> + * @items_ptr:
> + *
> + * Pointer to an array of struct drm_i915_query_item. The number of
> + * array elements is @num_items.
> */
> __u64 items_ptr;
> };
> @@ -2291,21 +2382,21 @@ struct drm_i915_query_topology_info {
> * Describes one engine and it's capabilities as known to the driver.
> */
> struct drm_i915_engine_info {
> - /** Engine class and instance. */
> + /** @engine: Engine class and instance. */
> struct i915_engine_class_instance engine;
>
> - /** Reserved field. */
> + /** @rsvd0: Reserved field. */
> __u32 rsvd0;
>
> - /** Engine flags. */
> + /** @flags: Engine flags. */
> __u64 flags;
>
> - /** Capabilities of this engine. */
> + /** @capabilities: Capabilities of this engine. */
> __u64 capabilities;
> #define I915_VIDEO_CLASS_CAPABILITY_HEVC (1 << 0)
> #define I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC (1 << 1)
>
> - /** Reserved fields. */
> + /** @rsvd1: Reserved fields. */
> __u64 rsvd1[4];
> };
>
> @@ -2316,13 +2407,13 @@ struct drm_i915_engine_info {
> * an array of struct drm_i915_engine_info structures.
> */
> struct drm_i915_query_engine_info {
> - /** Number of struct drm_i915_engine_info structs following. */
> + /** @num_engines: Number of struct drm_i915_engine_info structs following. */
> __u32 num_engines;
>
> - /** MBZ */
> + /** @rsvd: MBZ */
> __u32 rsvd[3];
>
> - /** Marker for drm_i915_engine_info structures. */
> + /** @engines: Marker for drm_i915_engine_info structures. */
> struct drm_i915_engine_info engines[];
> };
>
> @@ -2376,6 +2467,241 @@ struct drm_i915_query_perf_config {
> __u8 data[];
> };
>
> +/**
> + * enum drm_i915_gem_memory_class - Supported memory classes
> + */
> +enum drm_i915_gem_memory_class {
> + /** @I915_MEMORY_CLASS_SYSTEM: System memory */
> + I915_MEMORY_CLASS_SYSTEM = 0,
> + /** @I915_MEMORY_CLASS_DEVICE: Device local-memory */
> + I915_MEMORY_CLASS_DEVICE,
> +};
> +
> +/**
> + * struct drm_i915_gem_memory_class_instance - Identify particular memory region
> + */
> +struct drm_i915_gem_memory_class_instance {
> + /** @memory_class: See enum drm_i915_gem_memory_class */
> + __u16 memory_class;
> +
> + /** @memory_instance: Which instance */
> + __u16 memory_instance;
> +};
> +
> +/**
> + * struct drm_i915_memory_region_info - Describes one region as known to the
> + * driver.
> + *
> + * Note that we reserve some stuff here for potential future work. As an example
> + * we might want expose the capabilities for a given region, which could include
> + * things like if the region is CPU mappable/accessible, what are the supported
> + * mapping types etc.
> + *
> + * Note that to extend struct drm_i915_memory_region_info and struct
> + * drm_i915_query_memory_regions in the future the plan is to do the following:
> + *
> + * .. code-block:: C
> + *
> + * struct drm_i915_memory_region_info {
> + * struct drm_i915_gem_memory_class_instance region;
> + * union {
> + * __u32 rsvd0;
> + * __u32 new_thing1;
> + * };
> + * ...
> + * union {
> + * __u64 rsvd1[8];
> + * struct {
> + * __u64 new_thing2;
> + * __u64 new_thing3;
> + * ...
> + * };
> + * };
> + * };
> + *
> + * With this things should remain source compatible between versions for
> + * userspace, even as we add new fields.
> + *
> + * Note this is using both struct drm_i915_query_item and struct drm_i915_query.
> + * For this new query we are adding the new query id DRM_I915_QUERY_MEMORY_REGIONS
> + * at &drm_i915_query_item.query_id.
> + */
> +struct drm_i915_memory_region_info {
> + /** @region: The class:instance pair encoding */
> + struct drm_i915_gem_memory_class_instance region;
> +
> + /** @rsvd0: MBZ */
> + __u32 rsvd0;
> +
> + /** @probed_size: Memory probed by the driver (-1 = unknown) */
> + __u64 probed_size;
> +
> + /** @unallocated_size: Estimate of memory remaining (-1 = unknown) */
> + __u64 unallocated_size;
> +
> + /** @rsvd1: MBZ */
> + __u64 rsvd1[8];
> +};
> +
> +/**
> + * struct drm_i915_query_memory_regions
> + *
> + * The region info query enumerates all regions known to the driver by filling
> + * in an array of struct drm_i915_memory_region_info structures.
> + *
> + * Example for getting the list of supported regions:
> + *
> + * .. code-block:: C
> + *
> + * struct drm_i915_query_memory_regions *info;
> + * struct drm_i915_query_item item = {
> + * .query_id = DRM_I915_QUERY_MEMORY_REGIONS;
> + * };
> + * struct drm_i915_query query = {
> + * .num_items = 1,
> + * .items_ptr = (uintptr_t)&item,
> + * };
> + * int err, i;
> + *
> + * // First query the size of the blob we need, this needs to be large
> + * // enough to hold our array of regions. The kernel will fill out the
> + * // item.length for us, which is the number of bytes we need.
> + * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
> + * if (err) ...
> + *
> + * info = calloc(1, item.length);
> + * // Now that we allocated the required number of bytes, we call the ioctl
> + * // again, this time with the data_ptr pointing to our newly allocated
> + * // blob, which the kernel can then populate with the all the region info.
> + * item.data_ptr = (uintptr_t)&info,
> + *
> + * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
> + * if (err) ...
> + *
> + * // We can now access each region in the array
> + * for (i = 0; i < info->num_regions; i++) {
> + * struct drm_i915_memory_region_info mr = info->regions[i];
> + * u16 class = mr.region.class;
> + * u16 instance = mr.region.instance;
> + *
> + * ....
> + * }
> + *
> + * free(info);
> + */
> +struct drm_i915_query_memory_regions {
> + /** @num_regions: Number of supported regions */
> + __u32 num_regions;
> +
> + /** @rsvd: MBZ */
> + __u32 rsvd[3];
> +
> + /** @regions: Info about each supported region */
> + struct drm_i915_memory_region_info regions[];
> +};
> +
> +/**
> + * struct drm_i915_gem_create_ext - Existing gem_create behaviour, with added
> + * extension support using struct i915_user_extension.
> + *
> + * Note that in the future we want to have our buffer flags here, at least for
> + * the stuff that is immutable. Previously we would have two ioctls, one to
> + * create the object with gem_create, and another to apply various parameters,
> + * however this creates some ambiguity for the params which are considered
> + * immutable. Also in general we're phasing out the various SET/GET ioctls.
> + */
> +struct drm_i915_gem_create_ext {
> + /**
> + * @size: Requested size for the object.
> + *
> + * The (page-aligned) allocated size for the object will be returned.
> + *
> + * Note that for some devices we have might have further minimum
> + * page-size restrictions(larger than 4K), like for device local-memory.
> + * However in general the final size here should always reflect any
> + * rounding up, if for example using the I915_GEM_CREATE_EXT_MEMORY_REGIONS
> + * extension to place the object in device local-memory.
> + */
> + __u64 size;
> + /**
> + * @handle: Returned handle for the object.
> + *
> + * Object handles are nonzero.
> + */
> + __u32 handle;
> + /** @flags: MBZ */
> + __u32 flags;
> + /**
> + * @extensions: The chain of extensions to apply to this object.
> + *
> + * This will be useful in the future when we need to support several
> + * different extensions, and we need to apply more than one when
> + * creating the object. See struct i915_user_extension.
> + *
> + * If we don't supply any extensions then we get the same old gem_create
> + * behaviour.
> + *
> + * For I915_GEM_CREATE_EXT_MEMORY_REGIONS usage see
> + * struct drm_i915_gem_create_ext_memory_regions.
> + */
> +#define I915_GEM_CREATE_EXT_MEMORY_REGIONS 0
> + __u64 extensions;
> +};
> +
> +/**
> + * struct drm_i915_gem_create_ext_memory_regions - The
> + * I915_GEM_CREATE_EXT_MEMORY_REGIONS extension.
> + *
> + * Set the object with the desired set of placements/regions in priority
> + * order. Each entry must be unique and supported by the device.
> + *
> + * This is provided as an array of struct drm_i915_gem_memory_class_instance, or
> + * an equivalent layout of class:instance pair encodings. See struct
> + * drm_i915_query_memory_regions and DRM_I915_QUERY_MEMORY_REGIONS for how to
> + * query the supported regions for a device.
> + *
> + * As an example, on discrete devices, if we wish to set the placement as
> + * device local-memory we can do something like:
> + *
> + * .. code-block:: C
> + *
> + * struct drm_i915_gem_memory_class_instance region_lmem = {
> + * .memory_class = I915_MEMORY_CLASS_DEVICE,
> + * .memory_instance = 0,
> + * };
> + * struct drm_i915_gem_create_ext_memory_regions regions = {
> + * .base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
> + * .regions = (uintptr_t)®ion_lmem,
> + * .num_regions = 1,
> + * };
> + * struct drm_i915_gem_create_ext create_ext = {
> + * .size = 16 * PAGE_SIZE,
> + * .extensions = (uintptr_t)®ions,
> + * };
> + *
> + * int err = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE_EXT, &create_ext);
> + * if (err) ...
> + *
> + * At which point we get the object handle in &drm_i915_gem_create_ext.handle,
> + * along with the final object size in &drm_i915_gem_create_ext.size, which
> + * should account for any rounding up, if required.
> + */
> +struct drm_i915_gem_create_ext_memory_regions {
> + /** @base: Extension link. See struct i915_user_extension. */
> + struct i915_user_extension base;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> + /** @num_regions: Number of elements in the @regions array. */
> + __u32 num_regions;
> + /**
> + * @regions: The regions/placements array.
> + *
> + * An array of struct drm_i915_gem_memory_class_instance.
> + */
> + __u64 regions;
> +};
> +
> #if defined(__cplusplus)
> }
> #endif
> --
> 2.26.3
>
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 39+ messages in thread* Re: [Intel-gfx] [PATCH i-g-t 07/12] i915_drm.h sync
2021-05-19 8:19 ` [igt-dev] " Petri Latvala
@ 2021-05-19 8:25 ` Jani Nikula
-1 siblings, 0 replies; 39+ messages in thread
From: Jani Nikula @ 2021-05-19 8:25 UTC (permalink / raw)
To: Petri Latvala, Matthew Auld; +Cc: igt-dev, thomas.hellstrom, intel-gfx
On Wed, 19 May 2021, Petri Latvala <petri.latvala@intel.com> wrote:
> On Tue, May 11, 2021 at 05:51:12PM +0100, Matthew Auld wrote:
>> Sync to get gem_create_ext and the regions query stuff.
>
> Kernel commit sha in commit message please.
Might be nice to have a script or a build target to update a file from
kernel, with the proper commit message.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [igt-dev] [Intel-gfx] [PATCH i-g-t 07/12] i915_drm.h sync
@ 2021-05-19 8:25 ` Jani Nikula
0 siblings, 0 replies; 39+ messages in thread
From: Jani Nikula @ 2021-05-19 8:25 UTC (permalink / raw)
To: Petri Latvala, Matthew Auld; +Cc: igt-dev, thomas.hellstrom, intel-gfx
On Wed, 19 May 2021, Petri Latvala <petri.latvala@intel.com> wrote:
> On Tue, May 11, 2021 at 05:51:12PM +0100, Matthew Auld wrote:
>> Sync to get gem_create_ext and the regions query stuff.
>
> Kernel commit sha in commit message please.
Might be nice to have a script or a build target to update a file from
kernel, with the proper commit message.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 39+ messages in thread
* [Intel-gfx] [PATCH i-g-t 08/12] Synchronize memory region uapi and tests with i915_drm.h
2021-05-11 16:51 ` [igt-dev] " Matthew Auld
@ 2021-05-11 16:51 ` Matthew Auld
-1 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev; +Cc: thomas.hellstrom, Dominik Grzegorzek, intel-gfx, Andrzej Turko
From: Andrzej Turko <andrzej.turko@linux.intel.com>
Erase definitions from intel_memory_region.h and change the procedures
to operate on objects defined in i915_drm.h instead. Those objects
were defined in intel_memory_region.h in order to upstream memory region
stubs before the original definitions from i915_drm.h.
Modify tests using the memory region uapi in order to adapt them to the
changes in lib/i915/intel_memory_region.* files.
Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com>
Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
---
lib/i915/gem_create.c | 4 +-
lib/i915/gem_create.h | 106 -------------------------
lib/i915/intel_memory_region.c | 34 ++++----
lib/i915/intel_memory_region.h | 138 ++++-----------------------------
tests/i915/gem_exec_basic.c | 2 +-
tests/i915/gem_gpgpu_fill.c | 2 +-
tests/i915/gem_media_fill.c | 2 +-
7 files changed, 37 insertions(+), 251 deletions(-)
diff --git a/lib/i915/gem_create.c b/lib/i915/gem_create.c
index 530877cc..b2e8d559 100644
--- a/lib/i915/gem_create.c
+++ b/lib/i915/gem_create.c
@@ -51,13 +51,13 @@ uint32_t gem_create(int fd, uint64_t size)
int __gem_create_ext(int fd, uint64_t *size, uint32_t *handle,
struct i915_user_extension *ext)
{
- struct local_drm_i915_gem_create_ext create = {
+ struct drm_i915_gem_create_ext create = {
.size = *size,
.extensions = to_user_pointer(ext),
};
int err = 0;
- if (igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_CREATE_EXT, &create) == 0) {
+ if (igt_ioctl(fd, DRM_IOCTL_I915_GEM_CREATE_EXT, &create) == 0) {
*handle = create.handle;
*size = create.size;
} else {
diff --git a/lib/i915/gem_create.h b/lib/i915/gem_create.h
index 5a07c1c8..c2b531b4 100644
--- a/lib/i915/gem_create.h
+++ b/lib/i915/gem_create.h
@@ -10,112 +10,6 @@
#include "i915_drm.h"
-/**
- * struct drm_i915_gem_create_ext - Existing gem_create behaviour, with added
- * extension support using struct i915_user_extension.
- *
- * Note that in the future we want to have our buffer flags here, at least for
- * the stuff that is immutable. Previously we would have two ioctls, one to
- * create the object with gem_create, and another to apply various parameters,
- * however this creates some ambiguity for the params which are considered
- * immutable. Also in general we're phasing out the various SET/GET ioctls.
- */
-struct local_drm_i915_gem_create_ext {
- /**
- * @size: Requested size for the object.
- *
- * The (page-aligned) allocated size for the object will be returned.
- *
- * Note that for some devices we have might have further minimum
- * page-size restrictions(larger than 4K), like for device local-memory.
- * However in general the final size here should always reflect any
- * rounding up, if for example using the I915_GEM_CREATE_EXT_MEMORY_REGIONS
- * extension to place the object in device local-memory.
- */
- __u64 size;
- /**
- * @handle: Returned handle for the object.
- *
- * Object handles are nonzero.
- */
- __u32 handle;
- /** @flags: MBZ */
- __u32 flags;
- /**
- * @extensions: The chain of extensions to apply to this object.
- *
- * This will be useful in the future when we need to support several
- * different extensions, and we need to apply more than one when
- * creating the object. See struct i915_user_extension.
- *
- * If we don't supply any extensions then we get the same old gem_create
- * behaviour.
- *
- * For I915_GEM_CREATE_EXT_MEMORY_REGIONS usage see
- * struct drm_i915_gem_create_ext_memory_regions.
- */
-#define LOCAL_I915_GEM_CREATE_EXT_MEMORY_REGIONS 0
- __u64 extensions;
-};
-
-/**
- * struct drm_i915_gem_create_ext_memory_regions - The
- * I915_GEM_CREATE_EXT_MEMORY_REGIONS extension.
- *
- * Set the object with the desired set of placements/regions in priority
- * order. Each entry must be unique and supported by the device.
- *
- * This is provided as an array of struct drm_i915_gem_memory_class_instance, or
- * an equivalent layout of class:instance pair encodings. See struct
- * drm_i915_query_memory_regions and DRM_I915_QUERY_MEMORY_REGIONS for how to
- * query the supported regions for a device.
- *
- * As an example, on discrete devices, if we wish to set the placement as
- * device local-memory we can do something like:
- *
- * .. code-block:: C
- *
- * struct drm_i915_gem_memory_class_instance region_lmem = {
- * .memory_class = I915_MEMORY_CLASS_DEVICE,
- * .memory_instance = 0,
- * };
- * struct drm_i915_gem_create_ext_memory_regions regions = {
- * .base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
- * .regions = (uintptr_t)®ion_lmem,
- * .num_regions = 1,
- * };
- * struct drm_i915_gem_create_ext create_ext = {
- * .size = 16 * PAGE_SIZE,
- * .extensions = (uintptr_t)®ions,
- * };
- *
- * int err = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE_EXT, &create_ext);
- * if (err) ...
- *
- * At which point we get the object handle in &drm_i915_gem_create_ext.handle,
- * along with the final object size in &drm_i915_gem_create_ext.size, which
- * should account for any rounding up, if required.
- */
-struct local_drm_i915_gem_create_ext_memory_regions {
- /** @base: Extension link. See struct i915_user_extension. */
- struct i915_user_extension base;
-
- /** @pad: MBZ */
- __u32 pad;
- /** @num_regions: Number of elements in the @regions array. */
- __u32 num_regions;
- /**
- * @regions: The regions/placements array.
- *
- * An array of struct drm_i915_gem_memory_class_instance.
- */
- __u64 regions;
-};
-
-#define LOCAL_DRM_I915_GEM_CREATE_EXT 0x3c
-#define LOCAL_DRM_IOCTL_I915_GEM_CREATE_EXT DRM_IOWR(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_CREATE_EXT, \
- struct local_drm_i915_gem_create_ext)
-
int __gem_create(int fd, uint64_t *size, uint32_t *handle);
uint32_t gem_create(int fd, uint64_t size);
int __gem_create_ext(int fd, uint64_t *size, uint32_t *handle,
diff --git a/lib/i915/intel_memory_region.c b/lib/i915/intel_memory_region.c
index 5452dd8e..412367e4 100644
--- a/lib/i915/intel_memory_region.c
+++ b/lib/i915/intel_memory_region.c
@@ -49,7 +49,7 @@ const char *get_memory_region_name(uint32_t region)
{
uint16_t class = MEMORY_TYPE_FROM_REGION(region);
- if (class == LOCAL_I915_MEMORY_CLASS_SYSTEM)
+ if (class == I915_MEMORY_CLASS_SYSTEM)
return "smem";
igt_assert_f(false, "Unknown memory region");
@@ -116,15 +116,15 @@ static uint64_t __get_available_smem(int fd)
*
* Returns: Filled struct with available memory regions.
*/
-struct local_drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd)
+struct drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd)
{
- struct local_drm_i915_query_memory_regions *query_info;
+ struct drm_i915_query_memory_regions *query_info;
- query_info = calloc(1, sizeof(struct local_drm_i915_query_memory_regions)
- + sizeof(struct local_drm_i915_memory_region_info));
+ query_info = calloc(1, sizeof(struct drm_i915_query_memory_regions)
+ + sizeof(struct drm_i915_memory_region_info));
query_info->num_regions = 1;
- query_info->regions[0].region.memory_class = LOCAL_I915_MEMORY_CLASS_SYSTEM;
+ query_info->regions[0].region.memory_class = I915_MEMORY_CLASS_SYSTEM;
query_info->regions[0].probed_size = intel_get_total_ram_mb() << 20;
query_info->regions[0].unallocated_size = __get_available_smem(fd);
@@ -134,7 +134,7 @@ struct local_drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd)
/* A version of gem_create_in_memory_region_list which can be allowed to
fail so that the object creation can be retried */
int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t size,
- struct local_drm_i915_gem_memory_class_instance *mem_regions,
+ struct drm_i915_gem_memory_class_instance *mem_regions,
int num_regions)
{
/* a temporary solution, to be removed when these arguments will be used */
@@ -151,7 +151,7 @@ int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t size,
* @num_regions: @mem_regions length
*/
uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
- struct local_drm_i915_gem_memory_class_instance *mem_regions,
+ struct drm_i915_gem_memory_class_instance *mem_regions,
int num_regions)
{
uint32_t handle;
@@ -161,7 +161,7 @@ uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
return handle;
}
-static bool __region_belongs_to_regions_type(struct local_drm_i915_gem_memory_class_instance region,
+static bool __region_belongs_to_regions_type(struct drm_i915_gem_memory_class_instance region,
uint32_t *mem_regions_type,
int num_regions)
{
@@ -172,11 +172,11 @@ static bool __region_belongs_to_regions_type(struct local_drm_i915_gem_memory_cl
}
struct igt_collection *
-__get_memory_region_set(struct local_drm_i915_query_memory_regions *regions,
+__get_memory_region_set(struct drm_i915_query_memory_regions *regions,
uint32_t *mem_regions_type,
int num_regions)
{
- struct local_drm_i915_gem_memory_class_instance region;
+ struct drm_i915_gem_memory_class_instance region;
struct igt_collection *set;
int count = 0, pos = 0;
@@ -252,7 +252,7 @@ char *memregion_dynamic_subtest_name(struct igt_collection *set)
*
* Outputs memory regions and their sizes.
*/
-void intel_dump_gpu_meminfo(struct local_drm_i915_query_memory_regions *info)
+void intel_dump_gpu_meminfo(struct drm_i915_query_memory_regions *info)
{
int i;
@@ -279,7 +279,7 @@ void intel_dump_gpu_meminfo(struct local_drm_i915_query_memory_regions *info)
*
* Returns: number of regions for type @memory_class
*/
-uint32_t gpu_meminfo_region_count(struct local_drm_i915_query_memory_regions *info,
+uint32_t gpu_meminfo_region_count(struct drm_i915_query_memory_regions *info,
uint16_t memory_class)
{
uint32_t num = 0;
@@ -302,7 +302,7 @@ uint32_t gpu_meminfo_region_count(struct local_drm_i915_query_memory_regions *in
* Returns: total size of all regions which are type @memory_class, -1 when the
* size of at least one region is unknown
*/
-uint64_t gpu_meminfo_region_total_size(struct local_drm_i915_query_memory_regions *info,
+uint64_t gpu_meminfo_region_total_size(struct drm_i915_query_memory_regions *info,
uint16_t memory_class)
{
uint64_t total = 0;
@@ -329,7 +329,7 @@ uint64_t gpu_meminfo_region_total_size(struct local_drm_i915_query_memory_region
* Returns: available size of all regions which are type @memory_class, -1 when
* the size of at least one region cannot be estimated
*/
-uint64_t gpu_meminfo_region_total_available(struct local_drm_i915_query_memory_regions *info,
+uint64_t gpu_meminfo_region_total_available(struct drm_i915_query_memory_regions *info,
uint16_t memory_class)
{
uint64_t avail = 0;
@@ -357,7 +357,7 @@ uint64_t gpu_meminfo_region_total_available(struct local_drm_i915_query_memory_r
* Returns: available size of @memory_instance which type is @memory_class, -1
* when the size is unknown
*/
-uint64_t gpu_meminfo_region_size(struct local_drm_i915_query_memory_regions *info,
+uint64_t gpu_meminfo_region_size(struct drm_i915_query_memory_regions *info,
uint16_t memory_class,
uint16_t memory_instance)
{
@@ -382,7 +382,7 @@ uint64_t gpu_meminfo_region_size(struct local_drm_i915_query_memory_regions *inf
* Returns: available size of @memory_instance region which type is
* @memory_class, -1 when the size cannot be estimated
*/
-uint64_t gpu_meminfo_region_available(struct local_drm_i915_query_memory_regions *info,
+uint64_t gpu_meminfo_region_available(struct drm_i915_query_memory_regions *info,
uint16_t memory_class,
uint16_t memory_instance)
{
diff --git a/lib/i915/intel_memory_region.h b/lib/i915/intel_memory_region.h
index b8ea22b5..0ddc9f98 100644
--- a/lib/i915/intel_memory_region.h
+++ b/lib/i915/intel_memory_region.h
@@ -25,7 +25,7 @@
#ifndef INTEL_MEMORY_REGION_H
#define INTEL_MEMORY_REGION_H
-#define I915_SYSTEM_MEMORY LOCAL_I915_MEMORY_CLASS_SYSTEM
+#define I915_SYSTEM_MEMORY I915_MEMORY_CLASS_SYSTEM
#define INTEL_MEMORY_REGION_ID(type, instance) ((type) << 16u | (instance))
#define MEMORY_TYPE_FROM_REGION(r) ((r) >> 16u)
@@ -35,130 +35,22 @@
(MEMORY_TYPE_FROM_REGION(region) == type)
#define IS_SYSTEM_MEMORY_REGION(region) \
- IS_MEMORY_REGION_TYPE(region, LOCAL_I915_MEMORY_CLASS_SYSTEM)
+ IS_MEMORY_REGION_TYPE(region, I915_MEMORY_CLASS_SYSTEM)
-#define REGION_SMEM INTEL_MEMORY_REGION_ID(LOCAL_I915_MEMORY_CLASS_SYSTEM, 0)
-
-/**
- * enum drm_i915_gem_memory_class - Supported memory classes
- */
-enum local_drm_i915_gem_memory_class {
- /** @I915_MEMORY_CLASS_SYSTEM: System memory */
- LOCAL_I915_MEMORY_CLASS_SYSTEM = 0,
- /** @I915_MEMORY_CLASS_DEVICE: Device local-memory */
- LOCAL_I915_MEMORY_CLASS_DEVICE,
-};
-
-/**
- * struct drm_i915_gem_memory_class_instance - Identify particular memory region
- */
-struct local_drm_i915_gem_memory_class_instance {
- /** @memory_class: See enum drm_i915_gem_memory_class */
- __u16 memory_class;
-
- /** @memory_instance: Which instance */
- __u16 memory_instance;
-};
-
-/**
- * struct drm_i915_memory_region_info - Describes one region as known to the
- * driver.
- *
- * Note that we reserve some stuff here for potential future work. As an example
- * we might want expose the capabilities(see @caps) for a given region, which
- * could include things like if the region is CPU mappable/accessible, what are
- * the supported mapping types etc.
- *
- * Note this is using both struct drm_i915_query_item and struct drm_i915_query.
- * For this new query we are adding the new query id DRM_I915_QUERY_MEMORY_REGIONS
- * at &drm_i915_query_item.query_id.
- */
-struct local_drm_i915_memory_region_info {
- /** @region: The class:instance pair encoding */
- struct local_drm_i915_gem_memory_class_instance region;
-
- /** @pad: MBZ */
- __u32 pad;
-
- /** @caps: MBZ */
- __u64 caps;
-
- /** @probed_size: Memory probed by the driver (-1 = unknown) */
- __u64 probed_size;
-
- /** @unallocated_size: Estimate of memory remaining (-1 = unknown) */
- __u64 unallocated_size;
-};
-
-/**
- * struct drm_i915_query_memory_regions
- *
- * The region info query enumerates all regions known to the driver by filling
- * in an array of struct drm_i915_memory_region_info structures.
- *
- * Example for getting the list of supported regions:
- *
- * .. code-block:: C
- *
- * struct drm_i915_query_memory_regions *info;
- * struct drm_i915_query_item item = {
- * .query_id = DRM_I915_QUERY_MEMORY_REGIONS;
- * };
- * struct drm_i915_query query = {
- * .num_items = 1,
- * .items_ptr = (uintptr_t)&item,
- * };
- * int err, i;
- *
- * // First query the size of the blob we need, this needs to be large
- * // enough to hold our array of regions. The kernel will fill out the
- * // item.length for us, which is the number of bytes we need.
- * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
- * if (err) ...
- *
- * info = calloc(1, item.length);
- * // Now that we allocated the required number of bytes, we call the ioctl
- * // again, this time with the data_ptr pointing to our newly allocated
- * // blob, which the kernel can then populate with the all the region info.
- * item.data_ptr = (uintptr_t)&info,
- *
- * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
- * if (err) ...
- *
- * // We can now access each region in the array
- * for (i = 0; i < info->num_regions; i++) {
- * struct drm_i915_memory_region_info mr = info->regions[i];
- * u16 class = mr.region.class;
- * u16 instance = mr.region.instance;
- *
- * ....
- * }
- *
- * free(info);
- */
-struct local_drm_i915_query_memory_regions {
- /** @num_regions: Number of supported regions */
- __u32 num_regions;
-
- /** @pad: MBZ */
- __u32 pad;
-
- /** @regions: Info about each supported region */
- struct local_drm_i915_memory_region_info regions[];
-};
+#define REGION_SMEM INTEL_MEMORY_REGION_ID(I915_MEMORY_CLASS_SYSTEM, 0)
const char *get_memory_region_name(uint32_t region);
uint32_t gem_get_batch_size(int fd, uint8_t mem_region_type);
-struct local_drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd);
+struct drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd);
int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t size,
- struct local_drm_i915_gem_memory_class_instance *mem_regions,
+ struct drm_i915_gem_memory_class_instance *mem_regions,
int num_regions);
uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
- struct local_drm_i915_gem_memory_class_instance *mem_regions,
+ struct drm_i915_gem_memory_class_instance *mem_regions,
int num_regions);
/*
@@ -168,7 +60,7 @@ uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
*/
#define __gem_create_in_memory_regions(fd, handle, size, regions...) ({ \
unsigned int arr__[] = { regions }; \
- struct local_drm_i915_gem_memory_class_instance arr_query__[ARRAY_SIZE(arr__)]; \
+ struct drm_i915_gem_memory_class_instance arr_query__[ARRAY_SIZE(arr__)]; \
for (int i__ = 0; i__ < ARRAY_SIZE(arr_query__); ++i__) { \
arr_query__[i__].memory_class = MEMORY_TYPE_FROM_REGION(arr__[i__]); \
arr_query__[i__].memory_instance = MEMORY_INSTANCE_FROM_REGION(arr__[i__]); \
@@ -177,7 +69,7 @@ uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
})
#define gem_create_in_memory_regions(fd, size, regions...) ({ \
unsigned int arr__[] = { regions }; \
- struct local_drm_i915_gem_memory_class_instance arr_query__[ARRAY_SIZE(arr__)]; \
+ struct drm_i915_gem_memory_class_instance arr_query__[ARRAY_SIZE(arr__)]; \
for (int i__ = 0; i__ < ARRAY_SIZE(arr_query__); ++i__) { \
arr_query__[i__].memory_class = MEMORY_TYPE_FROM_REGION(arr__[i__]); \
arr_query__[i__].memory_instance = MEMORY_INSTANCE_FROM_REGION(arr__[i__]); \
@@ -186,7 +78,7 @@ uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
})
struct igt_collection *
-__get_memory_region_set(struct local_drm_i915_query_memory_regions *regions,
+__get_memory_region_set(struct drm_i915_query_memory_regions *regions,
uint32_t *mem_regions_type,
int num_regions);
@@ -201,19 +93,19 @@ __get_memory_region_set(struct local_drm_i915_query_memory_regions *regions,
char *memregion_dynamic_subtest_name(struct igt_collection *set);
-void intel_dump_gpu_meminfo(struct local_drm_i915_query_memory_regions *info);
+void intel_dump_gpu_meminfo(struct drm_i915_query_memory_regions *info);
-uint32_t gpu_meminfo_region_count(struct local_drm_i915_query_memory_regions *info,
+uint32_t gpu_meminfo_region_count(struct drm_i915_query_memory_regions *info,
uint16_t region_class);
-uint64_t gpu_meminfo_region_total_size(struct local_drm_i915_query_memory_regions *info,
+uint64_t gpu_meminfo_region_total_size(struct drm_i915_query_memory_regions *info,
uint16_t region_class);
-uint64_t gpu_meminfo_region_total_available(struct local_drm_i915_query_memory_regions *info,
+uint64_t gpu_meminfo_region_total_available(struct drm_i915_query_memory_regions *info,
uint16_t region_type);
-uint64_t gpu_meminfo_region_size(struct local_drm_i915_query_memory_regions *info,
+uint64_t gpu_meminfo_region_size(struct drm_i915_query_memory_regions *info,
uint16_t memory_class,
uint16_t memory_instance);
-uint64_t gpu_meminfo_region_available(struct local_drm_i915_query_memory_regions *info,
+uint64_t gpu_meminfo_region_available(struct drm_i915_query_memory_regions *info,
uint16_t memory_class,
uint16_t memory_instance);
diff --git a/tests/i915/gem_exec_basic.c b/tests/i915/gem_exec_basic.c
index d1569781..8bc4dc52 100644
--- a/tests/i915/gem_exec_basic.c
+++ b/tests/i915/gem_exec_basic.c
@@ -42,7 +42,7 @@ static uint32_t batch_create(int fd, uint32_t batch_size, uint32_t region)
igt_main
{
const struct intel_execution_engine2 *e;
- struct local_drm_i915_query_memory_regions *query_info;
+ struct drm_i915_query_memory_regions *query_info;
struct igt_collection *regions, *set;
uint32_t batch_size;
int fd = -1;
diff --git a/tests/i915/gem_gpgpu_fill.c b/tests/i915/gem_gpgpu_fill.c
index a6da3bce..1fcd42e2 100644
--- a/tests/i915/gem_gpgpu_fill.c
+++ b/tests/i915/gem_gpgpu_fill.c
@@ -133,7 +133,7 @@ igt_main
{
data_t data = {0, };
igt_fillfunc_t fill_fn = NULL;
- struct local_drm_i915_query_memory_regions *region_info;
+ struct drm_i915_query_memory_regions *region_info;
struct igt_collection *region_set;
igt_fixture {
diff --git a/tests/i915/gem_media_fill.c b/tests/i915/gem_media_fill.c
index bbd2110f..28c18e79 100644
--- a/tests/i915/gem_media_fill.c
+++ b/tests/i915/gem_media_fill.c
@@ -136,7 +136,7 @@ igt_main
{
data_t data = {0, };
igt_fillfunc_t fill_fn = NULL;
- struct local_drm_i915_query_memory_regions *query_info;
+ struct drm_i915_query_memory_regions *query_info;
struct igt_collection *set, *region_set;
igt_fixture {
--
2.26.3
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^ permalink raw reply related [flat|nested] 39+ messages in thread* [igt-dev] [PATCH i-g-t 08/12] Synchronize memory region uapi and tests with i915_drm.h
@ 2021-05-11 16:51 ` Matthew Auld
0 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev; +Cc: thomas.hellstrom, petri.latvala, intel-gfx, daniel
From: Andrzej Turko <andrzej.turko@linux.intel.com>
Erase definitions from intel_memory_region.h and change the procedures
to operate on objects defined in i915_drm.h instead. Those objects
were defined in intel_memory_region.h in order to upstream memory region
stubs before the original definitions from i915_drm.h.
Modify tests using the memory region uapi in order to adapt them to the
changes in lib/i915/intel_memory_region.* files.
Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com>
Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
---
lib/i915/gem_create.c | 4 +-
lib/i915/gem_create.h | 106 -------------------------
lib/i915/intel_memory_region.c | 34 ++++----
lib/i915/intel_memory_region.h | 138 ++++-----------------------------
tests/i915/gem_exec_basic.c | 2 +-
tests/i915/gem_gpgpu_fill.c | 2 +-
tests/i915/gem_media_fill.c | 2 +-
7 files changed, 37 insertions(+), 251 deletions(-)
diff --git a/lib/i915/gem_create.c b/lib/i915/gem_create.c
index 530877cc..b2e8d559 100644
--- a/lib/i915/gem_create.c
+++ b/lib/i915/gem_create.c
@@ -51,13 +51,13 @@ uint32_t gem_create(int fd, uint64_t size)
int __gem_create_ext(int fd, uint64_t *size, uint32_t *handle,
struct i915_user_extension *ext)
{
- struct local_drm_i915_gem_create_ext create = {
+ struct drm_i915_gem_create_ext create = {
.size = *size,
.extensions = to_user_pointer(ext),
};
int err = 0;
- if (igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_CREATE_EXT, &create) == 0) {
+ if (igt_ioctl(fd, DRM_IOCTL_I915_GEM_CREATE_EXT, &create) == 0) {
*handle = create.handle;
*size = create.size;
} else {
diff --git a/lib/i915/gem_create.h b/lib/i915/gem_create.h
index 5a07c1c8..c2b531b4 100644
--- a/lib/i915/gem_create.h
+++ b/lib/i915/gem_create.h
@@ -10,112 +10,6 @@
#include "i915_drm.h"
-/**
- * struct drm_i915_gem_create_ext - Existing gem_create behaviour, with added
- * extension support using struct i915_user_extension.
- *
- * Note that in the future we want to have our buffer flags here, at least for
- * the stuff that is immutable. Previously we would have two ioctls, one to
- * create the object with gem_create, and another to apply various parameters,
- * however this creates some ambiguity for the params which are considered
- * immutable. Also in general we're phasing out the various SET/GET ioctls.
- */
-struct local_drm_i915_gem_create_ext {
- /**
- * @size: Requested size for the object.
- *
- * The (page-aligned) allocated size for the object will be returned.
- *
- * Note that for some devices we have might have further minimum
- * page-size restrictions(larger than 4K), like for device local-memory.
- * However in general the final size here should always reflect any
- * rounding up, if for example using the I915_GEM_CREATE_EXT_MEMORY_REGIONS
- * extension to place the object in device local-memory.
- */
- __u64 size;
- /**
- * @handle: Returned handle for the object.
- *
- * Object handles are nonzero.
- */
- __u32 handle;
- /** @flags: MBZ */
- __u32 flags;
- /**
- * @extensions: The chain of extensions to apply to this object.
- *
- * This will be useful in the future when we need to support several
- * different extensions, and we need to apply more than one when
- * creating the object. See struct i915_user_extension.
- *
- * If we don't supply any extensions then we get the same old gem_create
- * behaviour.
- *
- * For I915_GEM_CREATE_EXT_MEMORY_REGIONS usage see
- * struct drm_i915_gem_create_ext_memory_regions.
- */
-#define LOCAL_I915_GEM_CREATE_EXT_MEMORY_REGIONS 0
- __u64 extensions;
-};
-
-/**
- * struct drm_i915_gem_create_ext_memory_regions - The
- * I915_GEM_CREATE_EXT_MEMORY_REGIONS extension.
- *
- * Set the object with the desired set of placements/regions in priority
- * order. Each entry must be unique and supported by the device.
- *
- * This is provided as an array of struct drm_i915_gem_memory_class_instance, or
- * an equivalent layout of class:instance pair encodings. See struct
- * drm_i915_query_memory_regions and DRM_I915_QUERY_MEMORY_REGIONS for how to
- * query the supported regions for a device.
- *
- * As an example, on discrete devices, if we wish to set the placement as
- * device local-memory we can do something like:
- *
- * .. code-block:: C
- *
- * struct drm_i915_gem_memory_class_instance region_lmem = {
- * .memory_class = I915_MEMORY_CLASS_DEVICE,
- * .memory_instance = 0,
- * };
- * struct drm_i915_gem_create_ext_memory_regions regions = {
- * .base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
- * .regions = (uintptr_t)®ion_lmem,
- * .num_regions = 1,
- * };
- * struct drm_i915_gem_create_ext create_ext = {
- * .size = 16 * PAGE_SIZE,
- * .extensions = (uintptr_t)®ions,
- * };
- *
- * int err = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE_EXT, &create_ext);
- * if (err) ...
- *
- * At which point we get the object handle in &drm_i915_gem_create_ext.handle,
- * along with the final object size in &drm_i915_gem_create_ext.size, which
- * should account for any rounding up, if required.
- */
-struct local_drm_i915_gem_create_ext_memory_regions {
- /** @base: Extension link. See struct i915_user_extension. */
- struct i915_user_extension base;
-
- /** @pad: MBZ */
- __u32 pad;
- /** @num_regions: Number of elements in the @regions array. */
- __u32 num_regions;
- /**
- * @regions: The regions/placements array.
- *
- * An array of struct drm_i915_gem_memory_class_instance.
- */
- __u64 regions;
-};
-
-#define LOCAL_DRM_I915_GEM_CREATE_EXT 0x3c
-#define LOCAL_DRM_IOCTL_I915_GEM_CREATE_EXT DRM_IOWR(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_CREATE_EXT, \
- struct local_drm_i915_gem_create_ext)
-
int __gem_create(int fd, uint64_t *size, uint32_t *handle);
uint32_t gem_create(int fd, uint64_t size);
int __gem_create_ext(int fd, uint64_t *size, uint32_t *handle,
diff --git a/lib/i915/intel_memory_region.c b/lib/i915/intel_memory_region.c
index 5452dd8e..412367e4 100644
--- a/lib/i915/intel_memory_region.c
+++ b/lib/i915/intel_memory_region.c
@@ -49,7 +49,7 @@ const char *get_memory_region_name(uint32_t region)
{
uint16_t class = MEMORY_TYPE_FROM_REGION(region);
- if (class == LOCAL_I915_MEMORY_CLASS_SYSTEM)
+ if (class == I915_MEMORY_CLASS_SYSTEM)
return "smem";
igt_assert_f(false, "Unknown memory region");
@@ -116,15 +116,15 @@ static uint64_t __get_available_smem(int fd)
*
* Returns: Filled struct with available memory regions.
*/
-struct local_drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd)
+struct drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd)
{
- struct local_drm_i915_query_memory_regions *query_info;
+ struct drm_i915_query_memory_regions *query_info;
- query_info = calloc(1, sizeof(struct local_drm_i915_query_memory_regions)
- + sizeof(struct local_drm_i915_memory_region_info));
+ query_info = calloc(1, sizeof(struct drm_i915_query_memory_regions)
+ + sizeof(struct drm_i915_memory_region_info));
query_info->num_regions = 1;
- query_info->regions[0].region.memory_class = LOCAL_I915_MEMORY_CLASS_SYSTEM;
+ query_info->regions[0].region.memory_class = I915_MEMORY_CLASS_SYSTEM;
query_info->regions[0].probed_size = intel_get_total_ram_mb() << 20;
query_info->regions[0].unallocated_size = __get_available_smem(fd);
@@ -134,7 +134,7 @@ struct local_drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd)
/* A version of gem_create_in_memory_region_list which can be allowed to
fail so that the object creation can be retried */
int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t size,
- struct local_drm_i915_gem_memory_class_instance *mem_regions,
+ struct drm_i915_gem_memory_class_instance *mem_regions,
int num_regions)
{
/* a temporary solution, to be removed when these arguments will be used */
@@ -151,7 +151,7 @@ int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t size,
* @num_regions: @mem_regions length
*/
uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
- struct local_drm_i915_gem_memory_class_instance *mem_regions,
+ struct drm_i915_gem_memory_class_instance *mem_regions,
int num_regions)
{
uint32_t handle;
@@ -161,7 +161,7 @@ uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
return handle;
}
-static bool __region_belongs_to_regions_type(struct local_drm_i915_gem_memory_class_instance region,
+static bool __region_belongs_to_regions_type(struct drm_i915_gem_memory_class_instance region,
uint32_t *mem_regions_type,
int num_regions)
{
@@ -172,11 +172,11 @@ static bool __region_belongs_to_regions_type(struct local_drm_i915_gem_memory_cl
}
struct igt_collection *
-__get_memory_region_set(struct local_drm_i915_query_memory_regions *regions,
+__get_memory_region_set(struct drm_i915_query_memory_regions *regions,
uint32_t *mem_regions_type,
int num_regions)
{
- struct local_drm_i915_gem_memory_class_instance region;
+ struct drm_i915_gem_memory_class_instance region;
struct igt_collection *set;
int count = 0, pos = 0;
@@ -252,7 +252,7 @@ char *memregion_dynamic_subtest_name(struct igt_collection *set)
*
* Outputs memory regions and their sizes.
*/
-void intel_dump_gpu_meminfo(struct local_drm_i915_query_memory_regions *info)
+void intel_dump_gpu_meminfo(struct drm_i915_query_memory_regions *info)
{
int i;
@@ -279,7 +279,7 @@ void intel_dump_gpu_meminfo(struct local_drm_i915_query_memory_regions *info)
*
* Returns: number of regions for type @memory_class
*/
-uint32_t gpu_meminfo_region_count(struct local_drm_i915_query_memory_regions *info,
+uint32_t gpu_meminfo_region_count(struct drm_i915_query_memory_regions *info,
uint16_t memory_class)
{
uint32_t num = 0;
@@ -302,7 +302,7 @@ uint32_t gpu_meminfo_region_count(struct local_drm_i915_query_memory_regions *in
* Returns: total size of all regions which are type @memory_class, -1 when the
* size of at least one region is unknown
*/
-uint64_t gpu_meminfo_region_total_size(struct local_drm_i915_query_memory_regions *info,
+uint64_t gpu_meminfo_region_total_size(struct drm_i915_query_memory_regions *info,
uint16_t memory_class)
{
uint64_t total = 0;
@@ -329,7 +329,7 @@ uint64_t gpu_meminfo_region_total_size(struct local_drm_i915_query_memory_region
* Returns: available size of all regions which are type @memory_class, -1 when
* the size of at least one region cannot be estimated
*/
-uint64_t gpu_meminfo_region_total_available(struct local_drm_i915_query_memory_regions *info,
+uint64_t gpu_meminfo_region_total_available(struct drm_i915_query_memory_regions *info,
uint16_t memory_class)
{
uint64_t avail = 0;
@@ -357,7 +357,7 @@ uint64_t gpu_meminfo_region_total_available(struct local_drm_i915_query_memory_r
* Returns: available size of @memory_instance which type is @memory_class, -1
* when the size is unknown
*/
-uint64_t gpu_meminfo_region_size(struct local_drm_i915_query_memory_regions *info,
+uint64_t gpu_meminfo_region_size(struct drm_i915_query_memory_regions *info,
uint16_t memory_class,
uint16_t memory_instance)
{
@@ -382,7 +382,7 @@ uint64_t gpu_meminfo_region_size(struct local_drm_i915_query_memory_regions *inf
* Returns: available size of @memory_instance region which type is
* @memory_class, -1 when the size cannot be estimated
*/
-uint64_t gpu_meminfo_region_available(struct local_drm_i915_query_memory_regions *info,
+uint64_t gpu_meminfo_region_available(struct drm_i915_query_memory_regions *info,
uint16_t memory_class,
uint16_t memory_instance)
{
diff --git a/lib/i915/intel_memory_region.h b/lib/i915/intel_memory_region.h
index b8ea22b5..0ddc9f98 100644
--- a/lib/i915/intel_memory_region.h
+++ b/lib/i915/intel_memory_region.h
@@ -25,7 +25,7 @@
#ifndef INTEL_MEMORY_REGION_H
#define INTEL_MEMORY_REGION_H
-#define I915_SYSTEM_MEMORY LOCAL_I915_MEMORY_CLASS_SYSTEM
+#define I915_SYSTEM_MEMORY I915_MEMORY_CLASS_SYSTEM
#define INTEL_MEMORY_REGION_ID(type, instance) ((type) << 16u | (instance))
#define MEMORY_TYPE_FROM_REGION(r) ((r) >> 16u)
@@ -35,130 +35,22 @@
(MEMORY_TYPE_FROM_REGION(region) == type)
#define IS_SYSTEM_MEMORY_REGION(region) \
- IS_MEMORY_REGION_TYPE(region, LOCAL_I915_MEMORY_CLASS_SYSTEM)
+ IS_MEMORY_REGION_TYPE(region, I915_MEMORY_CLASS_SYSTEM)
-#define REGION_SMEM INTEL_MEMORY_REGION_ID(LOCAL_I915_MEMORY_CLASS_SYSTEM, 0)
-
-/**
- * enum drm_i915_gem_memory_class - Supported memory classes
- */
-enum local_drm_i915_gem_memory_class {
- /** @I915_MEMORY_CLASS_SYSTEM: System memory */
- LOCAL_I915_MEMORY_CLASS_SYSTEM = 0,
- /** @I915_MEMORY_CLASS_DEVICE: Device local-memory */
- LOCAL_I915_MEMORY_CLASS_DEVICE,
-};
-
-/**
- * struct drm_i915_gem_memory_class_instance - Identify particular memory region
- */
-struct local_drm_i915_gem_memory_class_instance {
- /** @memory_class: See enum drm_i915_gem_memory_class */
- __u16 memory_class;
-
- /** @memory_instance: Which instance */
- __u16 memory_instance;
-};
-
-/**
- * struct drm_i915_memory_region_info - Describes one region as known to the
- * driver.
- *
- * Note that we reserve some stuff here for potential future work. As an example
- * we might want expose the capabilities(see @caps) for a given region, which
- * could include things like if the region is CPU mappable/accessible, what are
- * the supported mapping types etc.
- *
- * Note this is using both struct drm_i915_query_item and struct drm_i915_query.
- * For this new query we are adding the new query id DRM_I915_QUERY_MEMORY_REGIONS
- * at &drm_i915_query_item.query_id.
- */
-struct local_drm_i915_memory_region_info {
- /** @region: The class:instance pair encoding */
- struct local_drm_i915_gem_memory_class_instance region;
-
- /** @pad: MBZ */
- __u32 pad;
-
- /** @caps: MBZ */
- __u64 caps;
-
- /** @probed_size: Memory probed by the driver (-1 = unknown) */
- __u64 probed_size;
-
- /** @unallocated_size: Estimate of memory remaining (-1 = unknown) */
- __u64 unallocated_size;
-};
-
-/**
- * struct drm_i915_query_memory_regions
- *
- * The region info query enumerates all regions known to the driver by filling
- * in an array of struct drm_i915_memory_region_info structures.
- *
- * Example for getting the list of supported regions:
- *
- * .. code-block:: C
- *
- * struct drm_i915_query_memory_regions *info;
- * struct drm_i915_query_item item = {
- * .query_id = DRM_I915_QUERY_MEMORY_REGIONS;
- * };
- * struct drm_i915_query query = {
- * .num_items = 1,
- * .items_ptr = (uintptr_t)&item,
- * };
- * int err, i;
- *
- * // First query the size of the blob we need, this needs to be large
- * // enough to hold our array of regions. The kernel will fill out the
- * // item.length for us, which is the number of bytes we need.
- * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
- * if (err) ...
- *
- * info = calloc(1, item.length);
- * // Now that we allocated the required number of bytes, we call the ioctl
- * // again, this time with the data_ptr pointing to our newly allocated
- * // blob, which the kernel can then populate with the all the region info.
- * item.data_ptr = (uintptr_t)&info,
- *
- * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
- * if (err) ...
- *
- * // We can now access each region in the array
- * for (i = 0; i < info->num_regions; i++) {
- * struct drm_i915_memory_region_info mr = info->regions[i];
- * u16 class = mr.region.class;
- * u16 instance = mr.region.instance;
- *
- * ....
- * }
- *
- * free(info);
- */
-struct local_drm_i915_query_memory_regions {
- /** @num_regions: Number of supported regions */
- __u32 num_regions;
-
- /** @pad: MBZ */
- __u32 pad;
-
- /** @regions: Info about each supported region */
- struct local_drm_i915_memory_region_info regions[];
-};
+#define REGION_SMEM INTEL_MEMORY_REGION_ID(I915_MEMORY_CLASS_SYSTEM, 0)
const char *get_memory_region_name(uint32_t region);
uint32_t gem_get_batch_size(int fd, uint8_t mem_region_type);
-struct local_drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd);
+struct drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd);
int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t size,
- struct local_drm_i915_gem_memory_class_instance *mem_regions,
+ struct drm_i915_gem_memory_class_instance *mem_regions,
int num_regions);
uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
- struct local_drm_i915_gem_memory_class_instance *mem_regions,
+ struct drm_i915_gem_memory_class_instance *mem_regions,
int num_regions);
/*
@@ -168,7 +60,7 @@ uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
*/
#define __gem_create_in_memory_regions(fd, handle, size, regions...) ({ \
unsigned int arr__[] = { regions }; \
- struct local_drm_i915_gem_memory_class_instance arr_query__[ARRAY_SIZE(arr__)]; \
+ struct drm_i915_gem_memory_class_instance arr_query__[ARRAY_SIZE(arr__)]; \
for (int i__ = 0; i__ < ARRAY_SIZE(arr_query__); ++i__) { \
arr_query__[i__].memory_class = MEMORY_TYPE_FROM_REGION(arr__[i__]); \
arr_query__[i__].memory_instance = MEMORY_INSTANCE_FROM_REGION(arr__[i__]); \
@@ -177,7 +69,7 @@ uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
})
#define gem_create_in_memory_regions(fd, size, regions...) ({ \
unsigned int arr__[] = { regions }; \
- struct local_drm_i915_gem_memory_class_instance arr_query__[ARRAY_SIZE(arr__)]; \
+ struct drm_i915_gem_memory_class_instance arr_query__[ARRAY_SIZE(arr__)]; \
for (int i__ = 0; i__ < ARRAY_SIZE(arr_query__); ++i__) { \
arr_query__[i__].memory_class = MEMORY_TYPE_FROM_REGION(arr__[i__]); \
arr_query__[i__].memory_instance = MEMORY_INSTANCE_FROM_REGION(arr__[i__]); \
@@ -186,7 +78,7 @@ uint32_t gem_create_in_memory_region_list(int fd, uint64_t size,
})
struct igt_collection *
-__get_memory_region_set(struct local_drm_i915_query_memory_regions *regions,
+__get_memory_region_set(struct drm_i915_query_memory_regions *regions,
uint32_t *mem_regions_type,
int num_regions);
@@ -201,19 +93,19 @@ __get_memory_region_set(struct local_drm_i915_query_memory_regions *regions,
char *memregion_dynamic_subtest_name(struct igt_collection *set);
-void intel_dump_gpu_meminfo(struct local_drm_i915_query_memory_regions *info);
+void intel_dump_gpu_meminfo(struct drm_i915_query_memory_regions *info);
-uint32_t gpu_meminfo_region_count(struct local_drm_i915_query_memory_regions *info,
+uint32_t gpu_meminfo_region_count(struct drm_i915_query_memory_regions *info,
uint16_t region_class);
-uint64_t gpu_meminfo_region_total_size(struct local_drm_i915_query_memory_regions *info,
+uint64_t gpu_meminfo_region_total_size(struct drm_i915_query_memory_regions *info,
uint16_t region_class);
-uint64_t gpu_meminfo_region_total_available(struct local_drm_i915_query_memory_regions *info,
+uint64_t gpu_meminfo_region_total_available(struct drm_i915_query_memory_regions *info,
uint16_t region_type);
-uint64_t gpu_meminfo_region_size(struct local_drm_i915_query_memory_regions *info,
+uint64_t gpu_meminfo_region_size(struct drm_i915_query_memory_regions *info,
uint16_t memory_class,
uint16_t memory_instance);
-uint64_t gpu_meminfo_region_available(struct local_drm_i915_query_memory_regions *info,
+uint64_t gpu_meminfo_region_available(struct drm_i915_query_memory_regions *info,
uint16_t memory_class,
uint16_t memory_instance);
diff --git a/tests/i915/gem_exec_basic.c b/tests/i915/gem_exec_basic.c
index d1569781..8bc4dc52 100644
--- a/tests/i915/gem_exec_basic.c
+++ b/tests/i915/gem_exec_basic.c
@@ -42,7 +42,7 @@ static uint32_t batch_create(int fd, uint32_t batch_size, uint32_t region)
igt_main
{
const struct intel_execution_engine2 *e;
- struct local_drm_i915_query_memory_regions *query_info;
+ struct drm_i915_query_memory_regions *query_info;
struct igt_collection *regions, *set;
uint32_t batch_size;
int fd = -1;
diff --git a/tests/i915/gem_gpgpu_fill.c b/tests/i915/gem_gpgpu_fill.c
index a6da3bce..1fcd42e2 100644
--- a/tests/i915/gem_gpgpu_fill.c
+++ b/tests/i915/gem_gpgpu_fill.c
@@ -133,7 +133,7 @@ igt_main
{
data_t data = {0, };
igt_fillfunc_t fill_fn = NULL;
- struct local_drm_i915_query_memory_regions *region_info;
+ struct drm_i915_query_memory_regions *region_info;
struct igt_collection *region_set;
igt_fixture {
diff --git a/tests/i915/gem_media_fill.c b/tests/i915/gem_media_fill.c
index bbd2110f..28c18e79 100644
--- a/tests/i915/gem_media_fill.c
+++ b/tests/i915/gem_media_fill.c
@@ -136,7 +136,7 @@ igt_main
{
data_t data = {0, };
igt_fillfunc_t fill_fn = NULL;
- struct local_drm_i915_query_memory_regions *query_info;
+ struct drm_i915_query_memory_regions *query_info;
struct igt_collection *set, *region_set;
igt_fixture {
--
2.26.3
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [Intel-gfx] [PATCH i-g-t 09/12] lib/i915/intel_memory_region/dg1: Add new lib to query memory region
2021-05-11 16:51 ` [igt-dev] " Matthew Auld
@ 2021-05-11 16:51 ` Matthew Auld
-1 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev
Cc: Vanshidhar Konda, thomas.hellstrom, Michal Winiarski,
Janulgue Abdiel, intel-gfx, Lukasz Kalamarz
From: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
With an introduction of Local Memory concept we should be able to
allocate object in specific memory region. This patch implements
helper functions that allow this.
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Janulgue Abdiel <abdiel.janulgue@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Vanshidhar Konda <vanshidhar.r.konda@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
---
lib/i915/intel_memory_region.c | 130 ++++++++++++++++++++-------------
lib/i915/intel_memory_region.h | 5 ++
2 files changed, 86 insertions(+), 49 deletions(-)
diff --git a/lib/i915/intel_memory_region.c b/lib/i915/intel_memory_region.c
index 412367e4..91d3ef18 100644
--- a/lib/i915/intel_memory_region.c
+++ b/lib/i915/intel_memory_region.c
@@ -27,7 +27,6 @@
#include <sys/time.h>
#include <sys/types.h>
#include <sys/stat.h>
-#include <sys/sysinfo.h>
#include <fcntl.h>
#include "i915/gem_create.h"
@@ -41,10 +40,42 @@
#include "intel_chipset.h"
#include "igt_collection.h"
#include "igt_device.h"
-#include "igt_aux.h"
#include "i915/intel_memory_region.h"
+#define i915_query_items(fd, items, n_items) do { \
+ igt_assert_eq(__i915_query_items(fd, items, n_items), 0); \
+ errno = 0; \
+ } while (0)
+#define i915_query_items_err(fd, items, n_items, err) do { \
+ igt_assert_eq(__i915_query_items(fd, items, n_items), -err); \
+ } while (0)
+
+static int
+__i915_query(int fd, struct drm_i915_query *q)
+{
+ if (igt_ioctl(fd, DRM_IOCTL_I915_QUERY, q))
+ return -errno;
+ return 0;
+}
+
+static int
+__i915_query_items(int fd, struct drm_i915_query_item *items, uint32_t n_items)
+{
+ struct drm_i915_query q = {
+ .num_items = n_items,
+ .items_ptr = to_user_pointer(items),
+ };
+ return __i915_query(fd, &q);
+}
+
+bool gem_has_query_support(int fd)
+{
+ struct drm_i915_query query = {};
+
+ return __i915_query(fd, &query) == 0;
+}
+
const char *get_memory_region_name(uint32_t region)
{
uint16_t class = MEMORY_TYPE_FROM_REGION(region);
@@ -59,76 +90,77 @@ const char *get_memory_region_name(uint32_t region)
* gem_get_batch_size:
* @fd: open i915 drm file descriptor
* @mem_region_type: used memory_region type
+ *
+ * With introduction of LMEM we observe different page sizes for those two
+ * memory regions. Without this helper funtion we may be prone to forget
+ * about setting proper page size.
*/
uint32_t gem_get_batch_size(int fd, uint8_t mem_region_type)
{
- /* temporary solution, to be erased later */
- (void) fd;
- (void) mem_region_type;
-
- return 4096;
+ return (mem_region_type == I915_MEMORY_CLASS_DEVICE) ? 65536 : 4096;
}
-static uint64_t __get_meminfo(const char *info, const char *tag)
+/**
+ * gem_get_query_memory_regions:
+ * @fd: open i915 drm file descriptor
+ *
+ * This function wraps query mechanism for memory regions.
+ *
+ * Returns: Filled struct with available memory regions.
+ */
+struct drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd)
{
- const char *str;
- unsigned long val;
+ struct drm_i915_query_item item;
+ struct drm_i915_query_memory_regions *query_info;
- str = strstr(info, tag);
- if (str && sscanf(str + strlen(tag), " %lu", &val) == 1)
- return (uint64_t)val << 10;
+ memset(&item, 0, sizeof(item));
+ item.query_id = DRM_I915_QUERY_MEMORY_REGIONS;
+ i915_query_items(fd, &item, 1);
- igt_warn("Unrecognized /proc/meminfo field: '%s'\n", tag);
- return 0;
-}
+ query_info = calloc(1, item.length);
-static uint64_t __get_available_smem(int fd)
-{
- uint64_t retval;
- char *info;
- int proc_fd;
+ item.data_ptr = to_user_pointer(query_info);
+ i915_query_items(fd, &item, 1);
- intel_purge_vm_caches(fd);
+ return query_info;
+}
- proc_fd = open("/proc", O_RDONLY);
- info = igt_sysfs_get(proc_fd, "meminfo");
- close(proc_fd);
+/**
+ * gem_get_lmem_region_count:
+ * @fd: open i915 drm file descriptor
+ *
+ * Helper function to check how many lmem regions are available on device.
+ *
+ * Returns: Number of found lmem regions.
+ */
+uint8_t gem_get_lmem_region_count(int fd)
+{
+ struct drm_i915_query_memory_regions *query_info;
+ uint8_t num_regions;
+ uint8_t lmem_regions = 0;
- if (info) {
- retval = __get_meminfo(info, "MemAvailable:");
- } else {
- struct sysinfo sysinf;
+ query_info = gem_get_query_memory_regions(fd);
+ num_regions = query_info->num_regions;
- igt_assert(sysinfo(&sysinf) == 0);
- retval = sysinf.freeram;
- retval *= sysinf.mem_unit;
+ for (int i = 0; i < num_regions; i++) {
+ if (query_info->regions[i].region.memory_class == I915_MEMORY_CLASS_DEVICE)
+ lmem_regions += 1;
}
- return retval;
+ return lmem_regions;
}
/**
- * gem_get_query_memory_regions:
+ * gem_has_lmem:
* @fd: open i915 drm file descriptor
*
- * This function is prepared as a wrapper for the upcoming memory
- * regions implementation.
+ * Helper function to check if lmem is available on device.
*
- * Returns: Filled struct with available memory regions.
+ * Returns: True if at least one lmem region was found.
*/
-struct drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd)
+bool gem_has_lmem(int fd)
{
- struct drm_i915_query_memory_regions *query_info;
-
- query_info = calloc(1, sizeof(struct drm_i915_query_memory_regions)
- + sizeof(struct drm_i915_memory_region_info));
-
- query_info->num_regions = 1;
- query_info->regions[0].region.memory_class = I915_MEMORY_CLASS_SYSTEM;
- query_info->regions[0].probed_size = intel_get_total_ram_mb() << 20;
- query_info->regions[0].unallocated_size = __get_available_smem(fd);
-
- return query_info;
+ return gem_get_lmem_region_count(fd) > 0;
}
/* A version of gem_create_in_memory_region_list which can be allowed to
diff --git a/lib/i915/intel_memory_region.h b/lib/i915/intel_memory_region.h
index 0ddc9f98..3e53d8de 100644
--- a/lib/i915/intel_memory_region.h
+++ b/lib/i915/intel_memory_region.h
@@ -39,11 +39,16 @@
#define REGION_SMEM INTEL_MEMORY_REGION_ID(I915_MEMORY_CLASS_SYSTEM, 0)
+bool gem_has_query_support(int fd);
+
const char *get_memory_region_name(uint32_t region);
uint32_t gem_get_batch_size(int fd, uint8_t mem_region_type);
struct drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd);
+uint8_t gem_get_lmem_region_count(int fd);
+
+bool gem_has_lmem(int fd);
int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t size,
struct drm_i915_gem_memory_class_instance *mem_regions,
--
2.26.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 39+ messages in thread* [igt-dev] [PATCH i-g-t 09/12] lib/i915/intel_memory_region/dg1: Add new lib to query memory region
@ 2021-05-11 16:51 ` Matthew Auld
0 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev
Cc: Vanshidhar Konda, thomas.hellstrom, Michal Winiarski,
petri.latvala, Janulgue Abdiel, intel-gfx, Lukasz Kalamarz,
daniel
From: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
With an introduction of Local Memory concept we should be able to
allocate object in specific memory region. This patch implements
helper functions that allow this.
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Janulgue Abdiel <abdiel.janulgue@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Vanshidhar Konda <vanshidhar.r.konda@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
---
lib/i915/intel_memory_region.c | 130 ++++++++++++++++++++-------------
lib/i915/intel_memory_region.h | 5 ++
2 files changed, 86 insertions(+), 49 deletions(-)
diff --git a/lib/i915/intel_memory_region.c b/lib/i915/intel_memory_region.c
index 412367e4..91d3ef18 100644
--- a/lib/i915/intel_memory_region.c
+++ b/lib/i915/intel_memory_region.c
@@ -27,7 +27,6 @@
#include <sys/time.h>
#include <sys/types.h>
#include <sys/stat.h>
-#include <sys/sysinfo.h>
#include <fcntl.h>
#include "i915/gem_create.h"
@@ -41,10 +40,42 @@
#include "intel_chipset.h"
#include "igt_collection.h"
#include "igt_device.h"
-#include "igt_aux.h"
#include "i915/intel_memory_region.h"
+#define i915_query_items(fd, items, n_items) do { \
+ igt_assert_eq(__i915_query_items(fd, items, n_items), 0); \
+ errno = 0; \
+ } while (0)
+#define i915_query_items_err(fd, items, n_items, err) do { \
+ igt_assert_eq(__i915_query_items(fd, items, n_items), -err); \
+ } while (0)
+
+static int
+__i915_query(int fd, struct drm_i915_query *q)
+{
+ if (igt_ioctl(fd, DRM_IOCTL_I915_QUERY, q))
+ return -errno;
+ return 0;
+}
+
+static int
+__i915_query_items(int fd, struct drm_i915_query_item *items, uint32_t n_items)
+{
+ struct drm_i915_query q = {
+ .num_items = n_items,
+ .items_ptr = to_user_pointer(items),
+ };
+ return __i915_query(fd, &q);
+}
+
+bool gem_has_query_support(int fd)
+{
+ struct drm_i915_query query = {};
+
+ return __i915_query(fd, &query) == 0;
+}
+
const char *get_memory_region_name(uint32_t region)
{
uint16_t class = MEMORY_TYPE_FROM_REGION(region);
@@ -59,76 +90,77 @@ const char *get_memory_region_name(uint32_t region)
* gem_get_batch_size:
* @fd: open i915 drm file descriptor
* @mem_region_type: used memory_region type
+ *
+ * With introduction of LMEM we observe different page sizes for those two
+ * memory regions. Without this helper funtion we may be prone to forget
+ * about setting proper page size.
*/
uint32_t gem_get_batch_size(int fd, uint8_t mem_region_type)
{
- /* temporary solution, to be erased later */
- (void) fd;
- (void) mem_region_type;
-
- return 4096;
+ return (mem_region_type == I915_MEMORY_CLASS_DEVICE) ? 65536 : 4096;
}
-static uint64_t __get_meminfo(const char *info, const char *tag)
+/**
+ * gem_get_query_memory_regions:
+ * @fd: open i915 drm file descriptor
+ *
+ * This function wraps query mechanism for memory regions.
+ *
+ * Returns: Filled struct with available memory regions.
+ */
+struct drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd)
{
- const char *str;
- unsigned long val;
+ struct drm_i915_query_item item;
+ struct drm_i915_query_memory_regions *query_info;
- str = strstr(info, tag);
- if (str && sscanf(str + strlen(tag), " %lu", &val) == 1)
- return (uint64_t)val << 10;
+ memset(&item, 0, sizeof(item));
+ item.query_id = DRM_I915_QUERY_MEMORY_REGIONS;
+ i915_query_items(fd, &item, 1);
- igt_warn("Unrecognized /proc/meminfo field: '%s'\n", tag);
- return 0;
-}
+ query_info = calloc(1, item.length);
-static uint64_t __get_available_smem(int fd)
-{
- uint64_t retval;
- char *info;
- int proc_fd;
+ item.data_ptr = to_user_pointer(query_info);
+ i915_query_items(fd, &item, 1);
- intel_purge_vm_caches(fd);
+ return query_info;
+}
- proc_fd = open("/proc", O_RDONLY);
- info = igt_sysfs_get(proc_fd, "meminfo");
- close(proc_fd);
+/**
+ * gem_get_lmem_region_count:
+ * @fd: open i915 drm file descriptor
+ *
+ * Helper function to check how many lmem regions are available on device.
+ *
+ * Returns: Number of found lmem regions.
+ */
+uint8_t gem_get_lmem_region_count(int fd)
+{
+ struct drm_i915_query_memory_regions *query_info;
+ uint8_t num_regions;
+ uint8_t lmem_regions = 0;
- if (info) {
- retval = __get_meminfo(info, "MemAvailable:");
- } else {
- struct sysinfo sysinf;
+ query_info = gem_get_query_memory_regions(fd);
+ num_regions = query_info->num_regions;
- igt_assert(sysinfo(&sysinf) == 0);
- retval = sysinf.freeram;
- retval *= sysinf.mem_unit;
+ for (int i = 0; i < num_regions; i++) {
+ if (query_info->regions[i].region.memory_class == I915_MEMORY_CLASS_DEVICE)
+ lmem_regions += 1;
}
- return retval;
+ return lmem_regions;
}
/**
- * gem_get_query_memory_regions:
+ * gem_has_lmem:
* @fd: open i915 drm file descriptor
*
- * This function is prepared as a wrapper for the upcoming memory
- * regions implementation.
+ * Helper function to check if lmem is available on device.
*
- * Returns: Filled struct with available memory regions.
+ * Returns: True if at least one lmem region was found.
*/
-struct drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd)
+bool gem_has_lmem(int fd)
{
- struct drm_i915_query_memory_regions *query_info;
-
- query_info = calloc(1, sizeof(struct drm_i915_query_memory_regions)
- + sizeof(struct drm_i915_memory_region_info));
-
- query_info->num_regions = 1;
- query_info->regions[0].region.memory_class = I915_MEMORY_CLASS_SYSTEM;
- query_info->regions[0].probed_size = intel_get_total_ram_mb() << 20;
- query_info->regions[0].unallocated_size = __get_available_smem(fd);
-
- return query_info;
+ return gem_get_lmem_region_count(fd) > 0;
}
/* A version of gem_create_in_memory_region_list which can be allowed to
diff --git a/lib/i915/intel_memory_region.h b/lib/i915/intel_memory_region.h
index 0ddc9f98..3e53d8de 100644
--- a/lib/i915/intel_memory_region.h
+++ b/lib/i915/intel_memory_region.h
@@ -39,11 +39,16 @@
#define REGION_SMEM INTEL_MEMORY_REGION_ID(I915_MEMORY_CLASS_SYSTEM, 0)
+bool gem_has_query_support(int fd);
+
const char *get_memory_region_name(uint32_t region);
uint32_t gem_get_batch_size(int fd, uint8_t mem_region_type);
struct drm_i915_query_memory_regions *gem_get_query_memory_regions(int fd);
+uint8_t gem_get_lmem_region_count(int fd);
+
+bool gem_has_lmem(int fd);
int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t size,
struct drm_i915_gem_memory_class_instance *mem_regions,
--
2.26.3
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igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [Intel-gfx] [PATCH i-g-t 10/12] tests/i915/gem_create: exercise placements extension
2021-05-11 16:51 ` [igt-dev] " Matthew Auld
@ 2021-05-11 16:51 ` Matthew Auld
-1 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev; +Cc: thomas.hellstrom, Dominik Grzegorzek, intel-gfx
Add some explicit testcases for the create_ext placements extension.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
tests/i915/gem_create.c | 188 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 188 insertions(+)
diff --git a/tests/i915/gem_create.c b/tests/i915/gem_create.c
index 8acc2f52..167d7d28 100644
--- a/tests/i915/gem_create.c
+++ b/tests/i915/gem_create.c
@@ -290,6 +290,184 @@ static void size_update(int fd)
igt_assert_neq(create.size, size_initial_nonaligned);
}
+static void create_ext_placement_sanity_check(int fd)
+{
+ struct drm_i915_query_memory_regions *regions;
+ struct drm_i915_gem_create_ext_memory_regions setparam_region = {
+ .base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
+ };
+ struct drm_i915_gem_memory_class_instance *uregions;
+ struct drm_i915_gem_memory_class_instance region_smem = {
+ .memory_class = I915_MEMORY_CLASS_SYSTEM,
+ .memory_instance = 0,
+ };
+ struct drm_i915_gem_memory_class_instance region_invalid = {
+ .memory_class = -1,
+ .memory_instance = -1,
+ };
+ uint64_t size;
+ uint32_t handle;
+ int i;
+
+ regions = gem_get_query_memory_regions(fd);
+ igt_assert(regions);
+ igt_assert(regions->num_regions);
+
+ /*
+ * extensions should be optional, giving us the normal gem_create
+ * behaviour.
+ */
+ size = PAGE_SIZE;
+ igt_assert_eq(__gem_create_ext(fd, &size, &handle, 0), 0);
+ gem_close(fd, handle);
+
+ /* Try some uncreative invalid combinations */
+ setparam_region.regions = to_user_pointer(®ion_smem);
+ setparam_region.num_regions = 0;
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+
+ setparam_region.regions = to_user_pointer(®ion_smem);
+ setparam_region.num_regions = regions->num_regions + 1;
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+
+ setparam_region.regions = to_user_pointer(®ion_smem);
+ setparam_region.num_regions = -1;
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+
+ setparam_region.regions = to_user_pointer(®ion_invalid);
+ setparam_region.num_regions = 1;
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+
+ setparam_region.regions = to_user_pointer(®ion_invalid);
+ setparam_region.num_regions = 0;
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+
+ uregions = calloc(regions->num_regions + 1, sizeof(uint32_t));
+
+ for (i = 0; i < regions->num_regions; i++)
+ uregions[i] = regions->regions[i].region;
+
+ setparam_region.regions = to_user_pointer(uregions);
+ setparam_region.num_regions = regions->num_regions + 1;
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+
+ if (regions->num_regions > 1) {
+ for (i = 0; i < regions->num_regions; i++) {
+ struct drm_i915_gem_memory_class_instance dups[] = {
+ regions->regions[i].region,
+ regions->regions[i].region,
+ };
+
+ setparam_region.regions = to_user_pointer(dups);
+ setparam_region.num_regions = 2;
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+ }
+ }
+
+ uregions[rand() % regions->num_regions].memory_class = -1;
+ uregions[rand() % regions->num_regions].memory_instance = -1;
+ setparam_region.regions = to_user_pointer(uregions);
+ setparam_region.num_regions = regions->num_regions;
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+
+ free(uregions);
+
+ {
+ struct drm_i915_gem_create_ext_memory_regions setparam_region_next;
+
+ setparam_region.regions = to_user_pointer(®ion_smem);
+ setparam_region.num_regions = 1;
+
+ setparam_region_next = setparam_region;
+ setparam_region.base.next_extension =
+ to_user_pointer(&setparam_region_next);
+
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+ setparam_region.base.next_extension = 0;
+ }
+
+ free(regions);
+}
+
+static void create_ext_placement_all(int fd)
+{
+ struct drm_i915_query_memory_regions *regions;
+ struct drm_i915_gem_create_ext_memory_regions setparam_region = {
+ .base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
+ };
+ struct drm_i915_gem_memory_class_instance *uregions;
+ uint64_t size;
+ uint32_t handle;
+ int i;
+
+ regions = gem_get_query_memory_regions(fd);
+ igt_assert(regions);
+ igt_assert(regions->num_regions);
+
+ uregions = calloc(regions->num_regions, sizeof(*uregions));
+
+ for (i = 0; i < regions->num_regions; i++)
+ uregions[i] = regions->regions[i].region;
+
+ setparam_region.regions = to_user_pointer(uregions);
+ setparam_region.num_regions = regions->num_regions;
+
+ size = PAGE_SIZE;
+ igt_assert_eq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+ gem_close(fd, handle);
+ free(uregions);
+ free(regions);
+}
+
+static void create_ext_placement_each(int fd)
+{
+ struct drm_i915_query_memory_regions *regions;
+ struct drm_i915_gem_create_ext_memory_regions setparam_region = {
+ .base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
+ };
+ int i;
+
+ regions = gem_get_query_memory_regions(fd);
+ igt_assert(regions);
+ igt_assert(regions->num_regions);
+
+ for (i = 0; i < regions->num_regions; i++) {
+ struct drm_i915_gem_memory_class_instance region =
+ regions->regions[i].region;
+ uint64_t size;
+ uint32_t handle;
+
+ setparam_region.regions = to_user_pointer(®ion);
+ setparam_region.num_regions = 1;
+
+ size = PAGE_SIZE;
+ igt_assert_eq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+ gem_close(fd, handle);
+ }
+
+ free(regions);
+}
+
igt_main
{
int fd = -1;
@@ -315,4 +493,14 @@ igt_main
igt_subtest("busy-create")
busy_create(fd, 30);
+
+ igt_subtest("create-ext-placement-sanity-check")
+ create_ext_placement_sanity_check(fd);
+
+ igt_subtest("create-ext-placement-each")
+ create_ext_placement_each(fd);
+
+ igt_subtest("create-ext-placement-all")
+ create_ext_placement_all(fd);
+
}
--
2.26.3
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 39+ messages in thread* [igt-dev] [PATCH i-g-t 10/12] tests/i915/gem_create: exercise placements extension
@ 2021-05-11 16:51 ` Matthew Auld
0 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev; +Cc: thomas.hellstrom, petri.latvala, intel-gfx, daniel
Add some explicit testcases for the create_ext placements extension.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
tests/i915/gem_create.c | 188 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 188 insertions(+)
diff --git a/tests/i915/gem_create.c b/tests/i915/gem_create.c
index 8acc2f52..167d7d28 100644
--- a/tests/i915/gem_create.c
+++ b/tests/i915/gem_create.c
@@ -290,6 +290,184 @@ static void size_update(int fd)
igt_assert_neq(create.size, size_initial_nonaligned);
}
+static void create_ext_placement_sanity_check(int fd)
+{
+ struct drm_i915_query_memory_regions *regions;
+ struct drm_i915_gem_create_ext_memory_regions setparam_region = {
+ .base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
+ };
+ struct drm_i915_gem_memory_class_instance *uregions;
+ struct drm_i915_gem_memory_class_instance region_smem = {
+ .memory_class = I915_MEMORY_CLASS_SYSTEM,
+ .memory_instance = 0,
+ };
+ struct drm_i915_gem_memory_class_instance region_invalid = {
+ .memory_class = -1,
+ .memory_instance = -1,
+ };
+ uint64_t size;
+ uint32_t handle;
+ int i;
+
+ regions = gem_get_query_memory_regions(fd);
+ igt_assert(regions);
+ igt_assert(regions->num_regions);
+
+ /*
+ * extensions should be optional, giving us the normal gem_create
+ * behaviour.
+ */
+ size = PAGE_SIZE;
+ igt_assert_eq(__gem_create_ext(fd, &size, &handle, 0), 0);
+ gem_close(fd, handle);
+
+ /* Try some uncreative invalid combinations */
+ setparam_region.regions = to_user_pointer(®ion_smem);
+ setparam_region.num_regions = 0;
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+
+ setparam_region.regions = to_user_pointer(®ion_smem);
+ setparam_region.num_regions = regions->num_regions + 1;
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+
+ setparam_region.regions = to_user_pointer(®ion_smem);
+ setparam_region.num_regions = -1;
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+
+ setparam_region.regions = to_user_pointer(®ion_invalid);
+ setparam_region.num_regions = 1;
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+
+ setparam_region.regions = to_user_pointer(®ion_invalid);
+ setparam_region.num_regions = 0;
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+
+ uregions = calloc(regions->num_regions + 1, sizeof(uint32_t));
+
+ for (i = 0; i < regions->num_regions; i++)
+ uregions[i] = regions->regions[i].region;
+
+ setparam_region.regions = to_user_pointer(uregions);
+ setparam_region.num_regions = regions->num_regions + 1;
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+
+ if (regions->num_regions > 1) {
+ for (i = 0; i < regions->num_regions; i++) {
+ struct drm_i915_gem_memory_class_instance dups[] = {
+ regions->regions[i].region,
+ regions->regions[i].region,
+ };
+
+ setparam_region.regions = to_user_pointer(dups);
+ setparam_region.num_regions = 2;
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+ }
+ }
+
+ uregions[rand() % regions->num_regions].memory_class = -1;
+ uregions[rand() % regions->num_regions].memory_instance = -1;
+ setparam_region.regions = to_user_pointer(uregions);
+ setparam_region.num_regions = regions->num_regions;
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+
+ free(uregions);
+
+ {
+ struct drm_i915_gem_create_ext_memory_regions setparam_region_next;
+
+ setparam_region.regions = to_user_pointer(®ion_smem);
+ setparam_region.num_regions = 1;
+
+ setparam_region_next = setparam_region;
+ setparam_region.base.next_extension =
+ to_user_pointer(&setparam_region_next);
+
+ size = PAGE_SIZE;
+ igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+ setparam_region.base.next_extension = 0;
+ }
+
+ free(regions);
+}
+
+static void create_ext_placement_all(int fd)
+{
+ struct drm_i915_query_memory_regions *regions;
+ struct drm_i915_gem_create_ext_memory_regions setparam_region = {
+ .base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
+ };
+ struct drm_i915_gem_memory_class_instance *uregions;
+ uint64_t size;
+ uint32_t handle;
+ int i;
+
+ regions = gem_get_query_memory_regions(fd);
+ igt_assert(regions);
+ igt_assert(regions->num_regions);
+
+ uregions = calloc(regions->num_regions, sizeof(*uregions));
+
+ for (i = 0; i < regions->num_regions; i++)
+ uregions[i] = regions->regions[i].region;
+
+ setparam_region.regions = to_user_pointer(uregions);
+ setparam_region.num_regions = regions->num_regions;
+
+ size = PAGE_SIZE;
+ igt_assert_eq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+ gem_close(fd, handle);
+ free(uregions);
+ free(regions);
+}
+
+static void create_ext_placement_each(int fd)
+{
+ struct drm_i915_query_memory_regions *regions;
+ struct drm_i915_gem_create_ext_memory_regions setparam_region = {
+ .base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
+ };
+ int i;
+
+ regions = gem_get_query_memory_regions(fd);
+ igt_assert(regions);
+ igt_assert(regions->num_regions);
+
+ for (i = 0; i < regions->num_regions; i++) {
+ struct drm_i915_gem_memory_class_instance region =
+ regions->regions[i].region;
+ uint64_t size;
+ uint32_t handle;
+
+ setparam_region.regions = to_user_pointer(®ion);
+ setparam_region.num_regions = 1;
+
+ size = PAGE_SIZE;
+ igt_assert_eq(__gem_create_ext(fd, &size, &handle,
+ &setparam_region.base), 0);
+ gem_close(fd, handle);
+ }
+
+ free(regions);
+}
+
igt_main
{
int fd = -1;
@@ -315,4 +493,14 @@ igt_main
igt_subtest("busy-create")
busy_create(fd, 30);
+
+ igt_subtest("create-ext-placement-sanity-check")
+ create_ext_placement_sanity_check(fd);
+
+ igt_subtest("create-ext-placement-each")
+ create_ext_placement_each(fd);
+
+ igt_subtest("create-ext-placement-all")
+ create_ext_placement_all(fd);
+
}
--
2.26.3
_______________________________________________
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igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [Intel-gfx] [PATCH i-g-t 11/12] lib/i915/intel_memory_region: Add new macros and support for igt_collection
2021-05-11 16:51 ` [igt-dev] " Matthew Auld
@ 2021-05-11 16:51 ` Matthew Auld
-1 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev
Cc: thomas.hellstrom, Janusz Krzysztofik, intel-gfx, Dominik Grzegorzek
From: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
As with new memory region era we will have to cover different sets
of memory regions inside the tests this patch adds support for
generating subtest names according to passed memory region collection.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Cc: Janusz Krzysztofik <janusz.krzysztofik@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
---
lib/i915/intel_memory_region.c | 26 ++++++++++++++++++--------
lib/i915/intel_memory_region.h | 15 ++++++++++++++-
2 files changed, 32 insertions(+), 9 deletions(-)
diff --git a/lib/i915/intel_memory_region.c b/lib/i915/intel_memory_region.c
index 91d3ef18..983ac4df 100644
--- a/lib/i915/intel_memory_region.c
+++ b/lib/i915/intel_memory_region.c
@@ -80,9 +80,12 @@ const char *get_memory_region_name(uint32_t region)
{
uint16_t class = MEMORY_TYPE_FROM_REGION(region);
- if (class == I915_MEMORY_CLASS_SYSTEM)
+ switch (class) {
+ case I915_MEMORY_CLASS_SYSTEM:
return "smem";
-
+ case I915_MEMORY_CLASS_DEVICE:
+ return "lmem";
+ }
igt_assert_f(false, "Unknown memory region");
}
@@ -169,11 +172,13 @@ int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t size,
struct drm_i915_gem_memory_class_instance *mem_regions,
int num_regions)
{
- /* a temporary solution, to be removed when these arguments will be used */
- (void) mem_regions;
- (void) num_regions;
+ struct drm_i915_gem_create_ext_memory_regions ext_regions = {
+ .base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
+ .num_regions = num_regions,
+ .regions = to_user_pointer(mem_regions),
+ };
- return __gem_create(fd, &size, handle);
+ return __gem_create_ext(fd, &size, handle, &ext_regions.base);
}
/* gem_create_in_memory_region_list:
@@ -264,8 +269,13 @@ char *memregion_dynamic_subtest_name(struct igt_collection *set)
int r;
region = data->value;
-
- r = snprintf(p, len, "%s-", get_memory_region_name(region));
+ if (IS_DEVICE_MEMORY_REGION(region))
+ r = snprintf(p, len, "%s%d-",
+ get_memory_region_name(region),
+ MEMORY_INSTANCE_FROM_REGION(region));
+ else
+ r = snprintf(p, len, "%s-",
+ get_memory_region_name(region));
igt_assert(r > 0);
p += r;
diff --git a/lib/i915/intel_memory_region.h b/lib/i915/intel_memory_region.h
index 3e53d8de..e9d1d66d 100644
--- a/lib/i915/intel_memory_region.h
+++ b/lib/i915/intel_memory_region.h
@@ -26,6 +26,9 @@
#define INTEL_MEMORY_REGION_H
#define I915_SYSTEM_MEMORY I915_MEMORY_CLASS_SYSTEM
+#define I915_DEVICE_MEMORY I915_MEMORY_CLASS_DEVICE
+#define I915_STOLEN_SYSTEM_MEMORY I915_MEMORY_CLASS_STOLEN_SYSTEM
+#define I915_STOLEN_DEVICE_MEMORY I915_MEMORY_CLASS_STOLEN_DEVICE
#define INTEL_MEMORY_REGION_ID(type, instance) ((type) << 16u | (instance))
#define MEMORY_TYPE_FROM_REGION(r) ((r) >> 16u)
@@ -34,10 +37,19 @@
#define IS_MEMORY_REGION_TYPE(region, type) \
(MEMORY_TYPE_FROM_REGION(region) == type)
+#define IS_DEVICE_MEMORY_REGION(region) \
+ IS_MEMORY_REGION_TYPE(region, I915_MEMORY_CLASS_DEVICE)
#define IS_SYSTEM_MEMORY_REGION(region) \
IS_MEMORY_REGION_TYPE(region, I915_MEMORY_CLASS_SYSTEM)
+#define IS_STOLEN_MEMORY_REGION(region) \
+ (IS_MEMORY_REGION_TYPE(region, I915_MEMORY_CLASS_STOLEN_SYSTEM) || \
+ IS_MEMORY_REGION_TYPE(region, I915_MEMORY_CLASS_STOLEN_DEVICE))
+
#define REGION_SMEM INTEL_MEMORY_REGION_ID(I915_MEMORY_CLASS_SYSTEM, 0)
+#define REGION_LMEM(n) INTEL_MEMORY_REGION_ID(I915_MEMORY_CLASS_DEVICE, (n))
+#define REGION_STLN_SMEM(n) INTEL_MEMORY_REGION_ID(I915_MEMORY_CLASS_STOLEN_SYSTEM, (n))
+#define REGION_STLN_LMEM(n) INTEL_MEMORY_REGION_ID(I915_MEMORY_CLASS_STOLEN_DEVICE, (n))
bool gem_has_query_support(int fd);
@@ -89,7 +101,8 @@ __get_memory_region_set(struct drm_i915_query_memory_regions *regions,
/*
* Helper macro to create igt_collection which contains all memory regions
- * which matches mem_region_types array.
+ * which matches mem_region_types array. Useful to filter out stolen memory
+ * from accessible memory regions.
*/
#define get_memory_region_set(regions, mem_region_types...) ({ \
unsigned int arr__[] = { mem_region_types }; \
--
2.26.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 39+ messages in thread* [igt-dev] [PATCH i-g-t 11/12] lib/i915/intel_memory_region: Add new macros and support for igt_collection
@ 2021-05-11 16:51 ` Matthew Auld
0 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev
Cc: thomas.hellstrom, Janusz Krzysztofik, petri.latvala, intel-gfx, daniel
From: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
As with new memory region era we will have to cover different sets
of memory regions inside the tests this patch adds support for
generating subtest names according to passed memory region collection.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Cc: Janusz Krzysztofik <janusz.krzysztofik@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
---
lib/i915/intel_memory_region.c | 26 ++++++++++++++++++--------
lib/i915/intel_memory_region.h | 15 ++++++++++++++-
2 files changed, 32 insertions(+), 9 deletions(-)
diff --git a/lib/i915/intel_memory_region.c b/lib/i915/intel_memory_region.c
index 91d3ef18..983ac4df 100644
--- a/lib/i915/intel_memory_region.c
+++ b/lib/i915/intel_memory_region.c
@@ -80,9 +80,12 @@ const char *get_memory_region_name(uint32_t region)
{
uint16_t class = MEMORY_TYPE_FROM_REGION(region);
- if (class == I915_MEMORY_CLASS_SYSTEM)
+ switch (class) {
+ case I915_MEMORY_CLASS_SYSTEM:
return "smem";
-
+ case I915_MEMORY_CLASS_DEVICE:
+ return "lmem";
+ }
igt_assert_f(false, "Unknown memory region");
}
@@ -169,11 +172,13 @@ int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t size,
struct drm_i915_gem_memory_class_instance *mem_regions,
int num_regions)
{
- /* a temporary solution, to be removed when these arguments will be used */
- (void) mem_regions;
- (void) num_regions;
+ struct drm_i915_gem_create_ext_memory_regions ext_regions = {
+ .base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
+ .num_regions = num_regions,
+ .regions = to_user_pointer(mem_regions),
+ };
- return __gem_create(fd, &size, handle);
+ return __gem_create_ext(fd, &size, handle, &ext_regions.base);
}
/* gem_create_in_memory_region_list:
@@ -264,8 +269,13 @@ char *memregion_dynamic_subtest_name(struct igt_collection *set)
int r;
region = data->value;
-
- r = snprintf(p, len, "%s-", get_memory_region_name(region));
+ if (IS_DEVICE_MEMORY_REGION(region))
+ r = snprintf(p, len, "%s%d-",
+ get_memory_region_name(region),
+ MEMORY_INSTANCE_FROM_REGION(region));
+ else
+ r = snprintf(p, len, "%s-",
+ get_memory_region_name(region));
igt_assert(r > 0);
p += r;
diff --git a/lib/i915/intel_memory_region.h b/lib/i915/intel_memory_region.h
index 3e53d8de..e9d1d66d 100644
--- a/lib/i915/intel_memory_region.h
+++ b/lib/i915/intel_memory_region.h
@@ -26,6 +26,9 @@
#define INTEL_MEMORY_REGION_H
#define I915_SYSTEM_MEMORY I915_MEMORY_CLASS_SYSTEM
+#define I915_DEVICE_MEMORY I915_MEMORY_CLASS_DEVICE
+#define I915_STOLEN_SYSTEM_MEMORY I915_MEMORY_CLASS_STOLEN_SYSTEM
+#define I915_STOLEN_DEVICE_MEMORY I915_MEMORY_CLASS_STOLEN_DEVICE
#define INTEL_MEMORY_REGION_ID(type, instance) ((type) << 16u | (instance))
#define MEMORY_TYPE_FROM_REGION(r) ((r) >> 16u)
@@ -34,10 +37,19 @@
#define IS_MEMORY_REGION_TYPE(region, type) \
(MEMORY_TYPE_FROM_REGION(region) == type)
+#define IS_DEVICE_MEMORY_REGION(region) \
+ IS_MEMORY_REGION_TYPE(region, I915_MEMORY_CLASS_DEVICE)
#define IS_SYSTEM_MEMORY_REGION(region) \
IS_MEMORY_REGION_TYPE(region, I915_MEMORY_CLASS_SYSTEM)
+#define IS_STOLEN_MEMORY_REGION(region) \
+ (IS_MEMORY_REGION_TYPE(region, I915_MEMORY_CLASS_STOLEN_SYSTEM) || \
+ IS_MEMORY_REGION_TYPE(region, I915_MEMORY_CLASS_STOLEN_DEVICE))
+
#define REGION_SMEM INTEL_MEMORY_REGION_ID(I915_MEMORY_CLASS_SYSTEM, 0)
+#define REGION_LMEM(n) INTEL_MEMORY_REGION_ID(I915_MEMORY_CLASS_DEVICE, (n))
+#define REGION_STLN_SMEM(n) INTEL_MEMORY_REGION_ID(I915_MEMORY_CLASS_STOLEN_SYSTEM, (n))
+#define REGION_STLN_LMEM(n) INTEL_MEMORY_REGION_ID(I915_MEMORY_CLASS_STOLEN_DEVICE, (n))
bool gem_has_query_support(int fd);
@@ -89,7 +101,8 @@ __get_memory_region_set(struct drm_i915_query_memory_regions *regions,
/*
* Helper macro to create igt_collection which contains all memory regions
- * which matches mem_region_types array.
+ * which matches mem_region_types array. Useful to filter out stolen memory
+ * from accessible memory regions.
*/
#define get_memory_region_set(regions, mem_region_types...) ({ \
unsigned int arr__[] = { mem_region_types }; \
--
2.26.3
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [Intel-gfx] [PATCH i-g-t 12/12] tests/i915/gem_exec_basic/dg1: Iterate over all memory regions
2021-05-11 16:51 ` [igt-dev] " Matthew Auld
@ 2021-05-11 16:51 ` Matthew Auld
-1 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev
Cc: Vanshidhar Konda, thomas.hellstrom, Dominik Grzegorzek,
Janulgue Abdiel, intel-gfx, Kalamarz, Lukasz
From: "Kalamarz, Lukasz" <lukasz.kalamarz@intel.com>
As a part of local memory effort we need to make sure, that
every available memory region is covered. This patch is an attempt
for this problem. If it will be accepted it will be replicated on
each test that can actually benefit from it.
Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Cc: Janulgue Abdiel <abdiel.janulgue@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Vanshidhar Konda <vanshidhar.r.konda@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_exec_basic.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tests/i915/gem_exec_basic.c b/tests/i915/gem_exec_basic.c
index 8bc4dc52..872b1d3b 100644
--- a/tests/i915/gem_exec_basic.c
+++ b/tests/i915/gem_exec_basic.c
@@ -56,7 +56,8 @@ igt_main
igt_assert(query_info);
set = get_memory_region_set(query_info,
- I915_SYSTEM_MEMORY);
+ I915_SYSTEM_MEMORY,
+ I915_DEVICE_MEMORY);
}
igt_subtest_with_dynamic("basic") {
--
2.26.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 39+ messages in thread* [igt-dev] [PATCH i-g-t 12/12] tests/i915/gem_exec_basic/dg1: Iterate over all memory regions
@ 2021-05-11 16:51 ` Matthew Auld
0 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-11 16:51 UTC (permalink / raw)
To: igt-dev
Cc: Vanshidhar Konda, thomas.hellstrom, petri.latvala,
Janulgue Abdiel, intel-gfx, Kalamarz, Lukasz, daniel
From: "Kalamarz, Lukasz" <lukasz.kalamarz@intel.com>
As a part of local memory effort we need to make sure, that
every available memory region is covered. This patch is an attempt
for this problem. If it will be accepted it will be replicated on
each test that can actually benefit from it.
Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Cc: Janulgue Abdiel <abdiel.janulgue@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Vanshidhar Konda <vanshidhar.r.konda@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_exec_basic.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tests/i915/gem_exec_basic.c b/tests/i915/gem_exec_basic.c
index 8bc4dc52..872b1d3b 100644
--- a/tests/i915/gem_exec_basic.c
+++ b/tests/i915/gem_exec_basic.c
@@ -56,7 +56,8 @@ igt_main
igt_assert(query_info);
set = get_memory_region_set(query_info,
- I915_SYSTEM_MEMORY);
+ I915_SYSTEM_MEMORY,
+ I915_DEVICE_MEMORY);
}
igt_subtest_with_dynamic("basic") {
--
2.26.3
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [igt-dev] ✗ Fi.CI.BAT: failure for DG1/LMEM uAPI basics
2021-05-11 16:51 ` [igt-dev] " Matthew Auld
` (12 preceding siblings ...)
(?)
@ 2021-05-11 17:52 ` Patchwork
-1 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2021-05-11 17:52 UTC (permalink / raw)
To: Matthew Auld; +Cc: igt-dev
[-- Attachment #1.1: Type: text/plain, Size: 14173 bytes --]
== Series Details ==
Series: DG1/LMEM uAPI basics
URL : https://patchwork.freedesktop.org/series/90038/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10068 -> IGTPW_5802
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_5802 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_5802, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_5802:
### IGT changes ###
#### Possible regressions ####
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
- fi-bsw-kefka: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-bsw-kefka/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-bsw-kefka/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a.html
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
- fi-ilk-650: [PASS][3] -> [FAIL][4] +8 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-ilk-650/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-ilk-650/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence.html
#### Warnings ####
* igt@gem_exec_gttfill@basic:
- fi-ilk-650: [FAIL][5] ([i915#3457]) -> [FAIL][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-ilk-650/igt@gem_exec_gttfill@basic.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-ilk-650/igt@gem_exec_gttfill@basic.html
New tests
---------
New tests have been introduced between CI_DRM_10068 and IGTPW_5802:
### New IGT tests (5) ###
* igt@gem_exec_basic@basic@bcs0-smem:
- Statuses : 35 pass(s)
- Exec time: [0.0, 0.01] s
* igt@gem_exec_basic@basic@rcs0-smem:
- Statuses : 39 pass(s)
- Exec time: [0.0, 0.02] s
* igt@gem_exec_basic@basic@vcs0-smem:
- Statuses : 37 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_exec_basic@basic@vcs1-smem:
- Statuses : 9 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_exec_basic@basic@vecs0-smem:
- Statuses : 32 pass(s)
- Exec time: [0.0, 0.01] s
Known issues
------------
Here are the changes found in IGTPW_5802 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_busy@busy@all:
- fi-bsw-nick: [PASS][7] -> [FAIL][8] ([i915#3457])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-bsw-nick/igt@gem_busy@busy@all.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-bsw-nick/igt@gem_busy@busy@all.html
* igt@gem_exec_fence@basic-await@bcs0:
- fi-bsw-n3050: [PASS][9] -> [FAIL][10] ([i915#3457])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-bsw-n3050/igt@gem_exec_fence@basic-await@bcs0.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-bsw-n3050/igt@gem_exec_fence@basic-await@bcs0.html
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-u2: [PASS][11] -> [FAIL][12] ([i915#1888])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html
* igt@gem_wait@busy@all:
- fi-bwr-2160: [PASS][13] -> [FAIL][14] ([i915#3457])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-bwr-2160/igt@gem_wait@busy@all.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-bwr-2160/igt@gem_wait@busy@all.html
- fi-bsw-nick: [PASS][15] -> [FAIL][16] ([i915#3177] / [i915#3457])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-bsw-nick/igt@gem_wait@busy@all.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-bsw-nick/igt@gem_wait@busy@all.html
* igt@gem_wait@wait@all:
- fi-pnv-d510: [PASS][17] -> [FAIL][18] ([i915#3457])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-pnv-d510/igt@gem_wait@wait@all.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-pnv-d510/igt@gem_wait@wait@all.html
#### Possible fixes ####
* igt@gem_exec_fence@basic-await@vecs0:
- fi-bsw-kefka: [FAIL][19] ([i915#3457]) -> [PASS][20] +2 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-bsw-kefka/igt@gem_exec_fence@basic-await@vecs0.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-bsw-kefka/igt@gem_exec_fence@basic-await@vecs0.html
* igt@gem_exec_fence@nb-await@bcs0:
- fi-bsw-nick: [FAIL][21] ([i915#3457]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-bsw-nick/igt@gem_exec_fence@nb-await@bcs0.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-bsw-nick/igt@gem_exec_fence@nb-await@bcs0.html
* igt@gem_exec_fence@nb-await@vecs0:
- fi-bsw-n3050: [FAIL][23] ([i915#3457]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-bsw-n3050/igt@gem_exec_fence@nb-await@vecs0.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-bsw-n3050/igt@gem_exec_fence@nb-await@vecs0.html
* igt@kms_busy@basic@modeset:
- fi-ilk-650: [INCOMPLETE][25] ([i915#3457]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-ilk-650/igt@kms_busy@basic@modeset.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-ilk-650/igt@kms_busy@basic@modeset.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7500u: [DMESG-FAIL][27] ([i915#165]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-kbl-7500u/igt@kms_chamelium@common-hpd-after-suspend.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-kbl-7500u/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_pipe_crc_basic@read-crc-pipe-b:
- fi-elk-e7500: [FAIL][29] -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-elk-e7500/igt@kms_pipe_crc_basic@read-crc-pipe-b.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-elk-e7500/igt@kms_pipe_crc_basic@read-crc-pipe-b.html
#### Warnings ####
* igt@gem_exec_gttfill@basic:
- fi-pnv-d510: [FAIL][31] -> [FAIL][32] ([i915#3457])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-pnv-d510/igt@gem_exec_gttfill@basic.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-pnv-d510/igt@gem_exec_gttfill@basic.html
* igt@i915_module_load@reload:
- fi-icl-u2: [DMESG-WARN][33] ([i915#3457]) -> [DMESG-WARN][34] ([i915#1982] / [i915#3457])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-icl-u2/igt@i915_module_load@reload.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-icl-u2/igt@i915_module_load@reload.html
- fi-kbl-soraka: [DMESG-WARN][35] ([i915#1982]) -> [DMESG-WARN][36] ([i915#1982] / [i915#3457])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-kbl-soraka/igt@i915_module_load@reload.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-kbl-soraka/igt@i915_module_load@reload.html
- fi-tgl-u2: [DMESG-WARN][37] ([k.org#205379]) -> [DMESG-WARN][38] ([i915#3457] / [k.org#205379])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-tgl-u2/igt@i915_module_load@reload.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-tgl-u2/igt@i915_module_load@reload.html
- fi-bsw-kefka: [DMESG-FAIL][39] ([i915#1982]) -> [DMESG-WARN][40] ([i915#1982] / [i915#3457])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-bsw-kefka/igt@i915_module_load@reload.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-bsw-kefka/igt@i915_module_load@reload.html
- fi-tgl-y: [DMESG-WARN][41] ([i915#1982] / [k.org#205379]) -> [DMESG-WARN][42] ([i915#1982] / [i915#3457] / [k.org#205379])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-tgl-y/igt@i915_module_load@reload.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-tgl-y/igt@i915_module_load@reload.html
* igt@i915_pm_rpm@basic-rte:
- fi-kbl-guc: [SKIP][43] ([fdo#109271]) -> [FAIL][44] ([i915#579])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html
* igt@i915_selftest@live@execlists:
- fi-icl-u2: [DMESG-FAIL][45] ([i915#3462]) -> [INCOMPLETE][46] ([i915#2782] / [i915#3462])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-icl-u2/igt@i915_selftest@live@execlists.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-icl-u2/igt@i915_selftest@live@execlists.html
- fi-kbl-7567u: [INCOMPLETE][47] ([i915#2782] / [i915#794]) -> [INCOMPLETE][48] ([i915#2782] / [i915#3462] / [i915#794])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-kbl-7567u/igt@i915_selftest@live@execlists.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-kbl-7567u/igt@i915_selftest@live@execlists.html
- fi-icl-y: [INCOMPLETE][49] ([i915#2782]) -> [INCOMPLETE][50] ([i915#2782] / [i915#3462])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-icl-y/igt@i915_selftest@live@execlists.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-icl-y/igt@i915_selftest@live@execlists.html
- fi-kbl-soraka: [INCOMPLETE][51] ([i915#2782] / [i915#794]) -> [INCOMPLETE][52] ([i915#2782] / [i915#3462] / [i915#794])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-kbl-soraka/igt@i915_selftest@live@execlists.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-kbl-soraka/igt@i915_selftest@live@execlists.html
* igt@i915_selftest@live@mman:
- fi-bwr-2160: [DMESG-FAIL][53] ([i915#3457]) -> [DMESG-WARN][54] ([i915#3457])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-bwr-2160/igt@i915_selftest@live@mman.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-bwr-2160/igt@i915_selftest@live@mman.html
* igt@runner@aborted:
- fi-skl-6600u: [FAIL][55] ([i915#1436] / [i915#3363]) -> [FAIL][56] ([i915#1436] / [i915#2426] / [i915#3363])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-skl-6600u/igt@runner@aborted.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-skl-6600u/igt@runner@aborted.html
- fi-icl-u2: [FAIL][57] ([i915#2426] / [i915#2782] / [i915#3363]) -> [FAIL][58] ([i915#2782] / [i915#3363])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-icl-u2/igt@runner@aborted.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-icl-u2/igt@runner@aborted.html
- fi-kbl-7567u: [FAIL][59] ([i915#1436] / [i915#3363]) -> [FAIL][60] ([i915#1436] / [i915#2426] / [i915#3363])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-kbl-7567u/igt@runner@aborted.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-kbl-7567u/igt@runner@aborted.html
- fi-skl-6700k2: [FAIL][61] ([i915#1436] / [i915#3363]) -> [FAIL][62] ([i915#1436] / [i915#2426] / [i915#3363])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10068/fi-skl-6700k2/igt@runner@aborted.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/fi-skl-6700k2/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1222]: https://gitlab.freedesktop.org/drm/intel/issues/1222
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#165]: https://gitlab.freedesktop.org/drm/intel/issues/165
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
[i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782
[i915#3177]: https://gitlab.freedesktop.org/drm/intel/issues/3177
[i915#3276]: https://gitlab.freedesktop.org/drm/intel/issues/3276
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
[i915#3457]: https://gitlab.freedesktop.org/drm/intel/issues/3457
[i915#3462]: https://gitlab.freedesktop.org/drm/intel/issues/3462
[i915#579]: https://gitlab.freedesktop.org/drm/intel/issues/579
[i915#794]: https://gitlab.freedesktop.org/drm/intel/issues/794
[k.org#205379]: https://bugzilla.kernel.org/show_bug.cgi?id=205379
Participating hosts (48 -> 40)
------------------------------
Missing (8): fi-ilk-m540 fi-hsw-4200u fi-skl-guc fi-glk-dsi fi-bsw-cyan fi-ctg-p8600 fi-dg1-1 fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_6082 -> IGTPW_5802
CI-20190529: 20190529
CI_DRM_10068: f71e8fae425cfb4e06a68874bced2fb728638d2a @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_5802: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/index.html
IGT_6082: 355269577baef0c5d8114e8851acaeac657e4fe6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Testlist changes ==
+igt@gem_create@create-ext-placement-all
+igt@gem_create@create-ext-placement-each
+igt@gem_create@create-ext-placement-sanity-check
+igt@gem_gpgpu_fill@basic
+igt@gem_media_fill@media-fill
-igt@gem_gpgpu_fill
-igt@gem_media_fill
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5802/index.html
[-- Attachment #1.2: Type: text/html, Size: 19185 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 39+ messages in thread* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 00/12] DG1/LMEM uAPI basics
2021-05-11 16:51 ` [igt-dev] " Matthew Auld
` (13 preceding siblings ...)
(?)
@ 2021-05-19 8:13 ` Matthew Auld
2021-05-19 8:50 ` Petri Latvala
-1 siblings, 1 reply; 39+ messages in thread
From: Matthew Auld @ 2021-05-19 8:13 UTC (permalink / raw)
To: Matthew Auld; +Cc: igt-dev, Thomas Hellström, Intel Graphics Development
On Tue, 11 May 2021 at 17:52, Matthew Auld <matthew.auld@intel.com> wrote:
>
> Just the really basic stuff, which unlocks adding more interesting testcases
> later, like gem_lmem_swapping.
>
> On the kernel side we landed the uAPI bits[1] behind CONFIG_BROKEN, which is
> already enabled in CI builds, so it should be possible to get some more BAT
> testing(outside of just the selftests) on DG1 to the point where we can start to
> exercise the LMEM paths with the new bits of uAPI.
>
> [1] https://patchwork.freedesktop.org/series/89648/
Petri, any thoughts on this series? As an initial step we just need
some way to start exercising the new bits of uAPI, and from that we
can add more interesting test cases.
>
> Andrzej Turko (6):
> lib/i915/gem_create: Add gem_create_ext
> lib/i915/intel_memory_region: Add memory regions stubs
> tests/i915/gem_exec_basic: Use memory region interface
> tests/i915/gem_gpgpu_fill: Use memory region interface
> tests/i915/gem_media_fill: Use memory region interface
> Synchronize memory region uapi and tests with i915_drm.h
>
> Dominik Grzegorzek (1):
> tests/gem_gpgpu_fill: Convert from simple to standard igt_main
>
> Kalamarz, Lukasz (1):
> tests/i915/gem_exec_basic/dg1: Iterate over all memory regions
>
> Lukasz Kalamarz (1):
> lib/i915/intel_memory_region/dg1: Add new lib to query memory region
>
> Matthew Auld (2):
> i915_drm.h sync
> tests/i915/gem_create: exercise placements extension
>
> Zbigniew Kempczyński (1):
> lib/i915/intel_memory_region: Add new macros and support for
> igt_collection
>
> benchmarks/gem_blt.c | 2 +-
> benchmarks/gem_busy.c | 2 +-
> benchmarks/gem_create.c | 2 +-
> benchmarks/gem_exec_ctx.c | 2 +-
> benchmarks/gem_exec_fault.c | 2 +-
> benchmarks/gem_exec_nop.c | 2 +-
> benchmarks/gem_exec_reloc.c | 2 +-
> benchmarks/gem_exec_trace.c | 2 +-
> benchmarks/gem_latency.c | 2 +-
> benchmarks/gem_prw.c | 2 +-
> benchmarks/gem_set_domain.c | 2 +-
> benchmarks/gem_syslatency.c | 2 +-
> benchmarks/gem_wsim.c | 2 +-
> benchmarks/prime_lookup.c | 2 +-
> include/drm-uapi/i915_drm.h | 394 +++++++++++++++++++--
> lib/i915/gem.h | 3 -
> lib/i915/gem_create.c | 43 ++-
> lib/i915/gem_create.h | 19 +
> lib/i915/gem_mman.c | 2 +-
> lib/i915/gem_ring.c | 1 +
> lib/i915/gem_submission.c | 1 +
> lib/i915/intel_memory_region.c | 441 ++++++++++++++++++++++++
> lib/i915/intel_memory_region.h | 130 +++++++
> lib/igt_draw.c | 2 +-
> lib/igt_dummyload.c | 2 +-
> lib/igt_fb.c | 2 +-
> lib/intel_batchbuffer.c | 2 +-
> lib/intel_bufops.c | 2 +-
> lib/ioctl_wrappers.c | 2 +-
> lib/ioctl_wrappers.h | 1 +
> lib/meson.build | 1 +
> tests/amdgpu/amd_prime.c | 1 +
> tests/core_hotunplug.c | 1 +
> tests/i915/api_intel_allocator.c | 1 +
> tests/i915/api_intel_bb.c | 1 +
> tests/i915/gem_bad_reloc.c | 1 +
> tests/i915/gem_basic.c | 2 +-
> tests/i915/gem_blits.c | 1 +
> tests/i915/gem_busy.c | 1 +
> tests/i915/gem_close.c | 1 +
> tests/i915/gem_close_race.c | 1 +
> tests/i915/gem_concurrent_all.c | 1 +
> tests/i915/gem_create.c | 189 ++++++++++
> tests/i915/gem_cs_tlb.c | 1 +
> tests/i915/gem_ctx_clone.c | 1 +
> tests/i915/gem_ctx_create.c | 1 +
> tests/i915/gem_ctx_engines.c | 1 +
> tests/i915/gem_ctx_exec.c | 1 +
> tests/i915/gem_ctx_isolation.c | 1 +
> tests/i915/gem_ctx_param.c | 1 +
> tests/i915/gem_ctx_shared.c | 1 +
> tests/i915/gem_ctx_sseu.c | 1 +
> tests/i915/gem_ctx_switch.c | 1 +
> tests/i915/gem_eio.c | 1 +
> tests/i915/gem_evict_alignment.c | 1 +
> tests/i915/gem_evict_everything.c | 1 +
> tests/i915/gem_exec_alignment.c | 1 +
> tests/i915/gem_exec_async.c | 1 +
> tests/i915/gem_exec_await.c | 1 +
> tests/i915/gem_exec_balancer.c | 1 +
> tests/i915/gem_exec_basic.c | 53 ++-
> tests/i915/gem_exec_big.c | 1 +
> tests/i915/gem_exec_capture.c | 1 +
> tests/i915/gem_exec_create.c | 1 +
> tests/i915/gem_exec_endless.c | 1 +
> tests/i915/gem_exec_fair.c | 1 +
> tests/i915/gem_exec_fence.c | 1 +
> tests/i915/gem_exec_flush.c | 1 +
> tests/i915/gem_exec_gttfill.c | 1 +
> tests/i915/gem_exec_latency.c | 1 +
> tests/i915/gem_exec_lut_handle.c | 1 +
> tests/i915/gem_exec_nop.c | 1 +
> tests/i915/gem_exec_parallel.c | 1 +
> tests/i915/gem_exec_params.c | 1 +
> tests/i915/gem_exec_reloc.c | 1 +
> tests/i915/gem_exec_schedule.c | 1 +
> tests/i915/gem_exec_store.c | 1 +
> tests/i915/gem_exec_suspend.c | 1 +
> tests/i915/gem_exec_whisper.c | 1 +
> tests/i915/gem_fd_exhaustion.c | 2 +-
> tests/i915/gem_fence_thrash.c | 2 +-
> tests/i915/gem_fence_upload.c | 2 +-
> tests/i915/gem_fenced_exec_thrash.c | 1 +
> tests/i915/gem_flink_race.c | 2 +-
> tests/i915/gem_gpgpu_fill.c | 61 +++-
> tests/i915/gem_gtt_cpu_tlb.c | 2 +-
> tests/i915/gem_gtt_hog.c | 1 +
> tests/i915/gem_gtt_speed.c | 2 +-
> tests/i915/gem_huc_copy.c | 1 +
> tests/i915/gem_linear_blits.c | 1 +
> tests/i915/gem_lut_handle.c | 2 +-
> tests/i915/gem_madvise.c | 2 +-
> tests/i915/gem_media_fill.c | 57 ++-
> tests/i915/gem_mmap.c | 2 +-
> tests/i915/gem_mmap_gtt.c | 1 +
> tests/i915/gem_mmap_offset.c | 1 +
> tests/i915/gem_mmap_wc.c | 2 +-
> tests/i915/gem_ppgtt.c | 1 +
> tests/i915/gem_pread.c | 2 +-
> tests/i915/gem_pwrite.c | 2 +-
> tests/i915/gem_readwrite.c | 2 +-
> tests/i915/gem_reset_stats.c | 1 +
> tests/i915/gem_ringfill.c | 1 +
> tests/i915/gem_set_tiling_vs_gtt.c | 2 +-
> tests/i915/gem_set_tiling_vs_pwrite.c | 2 +-
> tests/i915/gem_shrink.c | 1 +
> tests/i915/gem_softpin.c | 1 +
> tests/i915/gem_streaming_writes.c | 1 +
> tests/i915/gem_sync.c | 1 +
> tests/i915/gem_tiled_fence_blits.c | 1 +
> tests/i915/gem_tiled_pread_basic.c | 2 +-
> tests/i915/gem_tiled_pread_pwrite.c | 2 +-
> tests/i915/gem_tiled_swapping.c | 2 +-
> tests/i915/gem_tiled_wb.c | 2 +-
> tests/i915/gem_tiled_wc.c | 2 +-
> tests/i915/gem_tiling_max_stride.c | 2 +-
> tests/i915/gem_unfence_active_buffers.c | 1 +
> tests/i915/gem_unref_active_buffers.c | 1 +
> tests/i915/gem_userptr_blits.c | 1 +
> tests/i915/gem_vm_create.c | 1 +
> tests/i915/gem_wait.c | 1 +
> tests/i915/gem_watchdog.c | 1 +
> tests/i915/gem_workarounds.c | 1 +
> tests/i915/gen3_mixed_blits.c | 1 +
> tests/i915/gen3_render_linear_blits.c | 1 +
> tests/i915/gen3_render_mixed_blits.c | 1 +
> tests/i915/gen3_render_tiledx_blits.c | 1 +
> tests/i915/gen3_render_tiledy_blits.c | 1 +
> tests/i915/gen7_exec_parse.c | 1 +
> tests/i915/gen9_exec_parse.c | 1 +
> tests/i915/i915_hangman.c | 1 +
> tests/i915/i915_module_load.c | 2 +-
> tests/i915/i915_pm_rc6_residency.c | 1 +
> tests/i915/i915_pm_rpm.c | 1 +
> tests/i915/i915_suspend.c | 1 +
> tests/i915/perf_pmu.c | 1 +
> tests/i915/sysfs_clients.c | 1 +
> tests/i915/sysfs_timeslice_duration.c | 1 +
> tests/kms_big_fb.c | 2 +-
> tests/kms_ccs.c | 2 +-
> tests/kms_flip.c | 2 +-
> tests/kms_frontbuffer_tracking.c | 1 +
> tests/kms_getfb.c | 2 +-
> tests/prime_busy.c | 1 +
> tests/prime_mmap.c | 2 +-
> tests/prime_mmap_kms.c | 2 +-
> tests/prime_self_import.c | 2 +-
> tests/prime_vgem.c | 1 +
> tools/intel_reg.c | 2 +-
> 149 files changed, 1447 insertions(+), 134 deletions(-)
> create mode 100644 lib/i915/gem_create.h
> create mode 100644 lib/i915/intel_memory_region.c
> create mode 100644 lib/i915/intel_memory_region.h
>
> --
> 2.26.3
>
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 39+ messages in thread* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 00/12] DG1/LMEM uAPI basics
2021-05-19 8:13 ` [Intel-gfx] [igt-dev] [PATCH i-g-t 00/12] " Matthew Auld
@ 2021-05-19 8:50 ` Petri Latvala
2021-05-19 10:45 ` Matthew Auld
0 siblings, 1 reply; 39+ messages in thread
From: Petri Latvala @ 2021-05-19 8:50 UTC (permalink / raw)
To: Matthew Auld
Cc: igt-dev, Thomas Hellström, Intel Graphics Development, Matthew Auld
On Wed, May 19, 2021 at 09:13:37AM +0100, Matthew Auld wrote:
> On Tue, 11 May 2021 at 17:52, Matthew Auld <matthew.auld@intel.com> wrote:
> >
> > Just the really basic stuff, which unlocks adding more interesting testcases
> > later, like gem_lmem_swapping.
> >
> > On the kernel side we landed the uAPI bits[1] behind CONFIG_BROKEN, which is
> > already enabled in CI builds, so it should be possible to get some more BAT
> > testing(outside of just the selftests) on DG1 to the point where we can start to
> > exercise the LMEM paths with the new bits of uAPI.
> >
> > [1] https://patchwork.freedesktop.org/series/89648/
>
> Petri, any thoughts on this series? As an initial step we just need
> some way to start exercising the new bits of uAPI, and from that we
> can add more interesting test cases.
This series is in a confused state. First there's the addition of
local definitions and ioctl tokens, then they are replaced with the
proper stuff...
When this was starting to get developed the idea was to avoid icky
cases that break _testing_. Not tests, testing. Remember when engine
discovery was being developed and we had cases where for_each_engine
loop didn't progress, causing stuff like
for_each_engine(...)
igt_subtest(...)
to never enter a subtest?
Pushing for stubbing memory regions ultimately wanted to avoid cases
where for_each_combination(memregions) breaks test enumeration.
It all boils down to: Can that break? Can we have cases where the
query gives garbage? Can it give two million smem regions? Can it give
0 regions, or -1 regions? And what happens then?
Is it just gem_create_ext that's hiding behind CONFIG_BROKEN or also
the querying?
--
Petri Latvala
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 00/12] DG1/LMEM uAPI basics
2021-05-19 8:50 ` Petri Latvala
@ 2021-05-19 10:45 ` Matthew Auld
0 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-19 10:45 UTC (permalink / raw)
To: Petri Latvala
Cc: igt-dev, Thomas Hellström, Intel Graphics Development, Matthew Auld
On Wed, 19 May 2021 at 09:49, Petri Latvala <petri.latvala@intel.com> wrote:
>
> On Wed, May 19, 2021 at 09:13:37AM +0100, Matthew Auld wrote:
> > On Tue, 11 May 2021 at 17:52, Matthew Auld <matthew.auld@intel.com> wrote:
> > >
> > > Just the really basic stuff, which unlocks adding more interesting testcases
> > > later, like gem_lmem_swapping.
> > >
> > > On the kernel side we landed the uAPI bits[1] behind CONFIG_BROKEN, which is
> > > already enabled in CI builds, so it should be possible to get some more BAT
> > > testing(outside of just the selftests) on DG1 to the point where we can start to
> > > exercise the LMEM paths with the new bits of uAPI.
> > >
> > > [1] https://patchwork.freedesktop.org/series/89648/
> >
> > Petri, any thoughts on this series? As an initial step we just need
> > some way to start exercising the new bits of uAPI, and from that we
> > can add more interesting test cases.
>
> This series is in a confused state. First there's the addition of
> local definitions and ioctl tokens, then they are replaced with the
> proper stuff...
Yeah, I think that's how it is internally. Maybe the idea with that
was to somehow land the igt changes first, before the kernel stuff
potentially landed? I can clean this up and just start with the proper
stuff.
>
> When this was starting to get developed the idea was to avoid icky
> cases that break _testing_. Not tests, testing. Remember when engine
> discovery was being developed and we had cases where for_each_engine
> loop didn't progress, causing stuff like
>
> for_each_engine(...)
> igt_subtest(...)
>
> to never enter a subtest?
>
> Pushing for stubbing memory regions ultimately wanted to avoid cases
> where for_each_combination(memregions) breaks test enumeration.
>
> It all boils down to: Can that break? Can we have cases where the
> query gives garbage? Can it give two million smem regions? Can it give
> 0 regions, or -1 regions? And what happens then?
On integrated platforms it can only return one region: smem. If we
somehow don't have a smem region then the i915 module load would have
failed, since we must have been unable to populate the
i915->mm.regions. On DG1 we just get the extra lmem region, and for Xe
HP multi-tile we get a few more lmem regions, but again if we can't
populate the i915->mm.regions with the required regions then we fail
driver init. The only "optional" region is stolen memory, but for that
we don't expose it to userspace.
The query will fail on !CONFIG_BROKEN kernels though, where it just
returns -ENODEV, or of course some other error if the user provided an
invalid query.
>
> Is it just gem_create_ext that's hiding behind CONFIG_BROKEN or also
> the querying?
It's the region query, and specifically the placements extension in
gem_create_ext, since there is also pxp coming soon and for that we
don't need CONFIG_BROKEN.
>
>
> --
> Petri Latvala
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 00/12] DG1/LMEM uAPI basics
@ 2021-05-19 10:45 ` Matthew Auld
0 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-19 10:45 UTC (permalink / raw)
To: Petri Latvala
Cc: igt-dev, Thomas Hellström, Intel Graphics Development,
Matthew Auld, Daniel Vetter
On Wed, 19 May 2021 at 09:49, Petri Latvala <petri.latvala@intel.com> wrote:
>
> On Wed, May 19, 2021 at 09:13:37AM +0100, Matthew Auld wrote:
> > On Tue, 11 May 2021 at 17:52, Matthew Auld <matthew.auld@intel.com> wrote:
> > >
> > > Just the really basic stuff, which unlocks adding more interesting testcases
> > > later, like gem_lmem_swapping.
> > >
> > > On the kernel side we landed the uAPI bits[1] behind CONFIG_BROKEN, which is
> > > already enabled in CI builds, so it should be possible to get some more BAT
> > > testing(outside of just the selftests) on DG1 to the point where we can start to
> > > exercise the LMEM paths with the new bits of uAPI.
> > >
> > > [1] https://patchwork.freedesktop.org/series/89648/
> >
> > Petri, any thoughts on this series? As an initial step we just need
> > some way to start exercising the new bits of uAPI, and from that we
> > can add more interesting test cases.
>
> This series is in a confused state. First there's the addition of
> local definitions and ioctl tokens, then they are replaced with the
> proper stuff...
Yeah, I think that's how it is internally. Maybe the idea with that
was to somehow land the igt changes first, before the kernel stuff
potentially landed? I can clean this up and just start with the proper
stuff.
>
> When this was starting to get developed the idea was to avoid icky
> cases that break _testing_. Not tests, testing. Remember when engine
> discovery was being developed and we had cases where for_each_engine
> loop didn't progress, causing stuff like
>
> for_each_engine(...)
> igt_subtest(...)
>
> to never enter a subtest?
>
> Pushing for stubbing memory regions ultimately wanted to avoid cases
> where for_each_combination(memregions) breaks test enumeration.
>
> It all boils down to: Can that break? Can we have cases where the
> query gives garbage? Can it give two million smem regions? Can it give
> 0 regions, or -1 regions? And what happens then?
On integrated platforms it can only return one region: smem. If we
somehow don't have a smem region then the i915 module load would have
failed, since we must have been unable to populate the
i915->mm.regions. On DG1 we just get the extra lmem region, and for Xe
HP multi-tile we get a few more lmem regions, but again if we can't
populate the i915->mm.regions with the required regions then we fail
driver init. The only "optional" region is stolen memory, but for that
we don't expose it to userspace.
The query will fail on !CONFIG_BROKEN kernels though, where it just
returns -ENODEV, or of course some other error if the user provided an
invalid query.
>
> Is it just gem_create_ext that's hiding behind CONFIG_BROKEN or also
> the querying?
It's the region query, and specifically the placements extension in
gem_create_ext, since there is also pxp coming soon and for that we
don't need CONFIG_BROKEN.
>
>
> --
> Petri Latvala
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 00/12] DG1/LMEM uAPI basics
2021-05-19 10:45 ` Matthew Auld
@ 2021-05-19 11:02 ` Petri Latvala
-1 siblings, 0 replies; 39+ messages in thread
From: Petri Latvala @ 2021-05-19 11:02 UTC (permalink / raw)
To: Matthew Auld
Cc: igt-dev, Thomas Hellström, Intel Graphics Development, Matthew Auld
On Wed, May 19, 2021 at 11:45:17AM +0100, Matthew Auld wrote:
> On Wed, 19 May 2021 at 09:49, Petri Latvala <petri.latvala@intel.com> wrote:
> >
> > On Wed, May 19, 2021 at 09:13:37AM +0100, Matthew Auld wrote:
> > > On Tue, 11 May 2021 at 17:52, Matthew Auld <matthew.auld@intel.com> wrote:
> > > >
> > > > Just the really basic stuff, which unlocks adding more interesting testcases
> > > > later, like gem_lmem_swapping.
> > > >
> > > > On the kernel side we landed the uAPI bits[1] behind CONFIG_BROKEN, which is
> > > > already enabled in CI builds, so it should be possible to get some more BAT
> > > > testing(outside of just the selftests) on DG1 to the point where we can start to
> > > > exercise the LMEM paths with the new bits of uAPI.
> > > >
> > > > [1] https://patchwork.freedesktop.org/series/89648/
> > >
> > > Petri, any thoughts on this series? As an initial step we just need
> > > some way to start exercising the new bits of uAPI, and from that we
> > > can add more interesting test cases.
> >
> > This series is in a confused state. First there's the addition of
> > local definitions and ioctl tokens, then they are replaced with the
> > proper stuff...
>
> Yeah, I think that's how it is internally. Maybe the idea with that
> was to somehow land the igt changes first, before the kernel stuff
> potentially landed? I can clean this up and just start with the proper
> stuff.
>
> >
> > When this was starting to get developed the idea was to avoid icky
> > cases that break _testing_. Not tests, testing. Remember when engine
> > discovery was being developed and we had cases where for_each_engine
> > loop didn't progress, causing stuff like
> >
> > for_each_engine(...)
> > igt_subtest(...)
> >
> > to never enter a subtest?
> >
> > Pushing for stubbing memory regions ultimately wanted to avoid cases
> > where for_each_combination(memregions) breaks test enumeration.
> >
> > It all boils down to: Can that break? Can we have cases where the
> > query gives garbage? Can it give two million smem regions? Can it give
> > 0 regions, or -1 regions? And what happens then?
>
> On integrated platforms it can only return one region: smem. If we
> somehow don't have a smem region then the i915 module load would have
> failed, since we must have been unable to populate the
> i915->mm.regions. On DG1 we just get the extra lmem region, and for Xe
> HP multi-tile we get a few more lmem regions, but again if we can't
> populate the i915->mm.regions with the required regions then we fail
> driver init. The only "optional" region is stolen memory, but for that
> we don't expose it to userspace.
>
> The query will fail on !CONFIG_BROKEN kernels though, where it just
> returns -ENODEV, or of course some other error if the user provided an
> invalid query.
Behaviour between success/failure is business as usual. The danger in
the initial discussions for this was token value overloading or such,
stuff like IGT thinking it's calling DRM_IOCTL_DISTANCE_TO_LUNCHTIME
but that value was meanwhile taken by
DRM_IOCTL_HALT_AND_CATCH_FIRE. Of course the query change is not a new
ioctl but is value mismatch a possibility in a theoretical worst case
and how does the breakage show in testing?
--
Petri Latvala
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 00/12] DG1/LMEM uAPI basics
@ 2021-05-19 11:02 ` Petri Latvala
0 siblings, 0 replies; 39+ messages in thread
From: Petri Latvala @ 2021-05-19 11:02 UTC (permalink / raw)
To: Matthew Auld
Cc: igt-dev, Thomas Hellström, Intel Graphics Development,
Matthew Auld, Daniel Vetter
On Wed, May 19, 2021 at 11:45:17AM +0100, Matthew Auld wrote:
> On Wed, 19 May 2021 at 09:49, Petri Latvala <petri.latvala@intel.com> wrote:
> >
> > On Wed, May 19, 2021 at 09:13:37AM +0100, Matthew Auld wrote:
> > > On Tue, 11 May 2021 at 17:52, Matthew Auld <matthew.auld@intel.com> wrote:
> > > >
> > > > Just the really basic stuff, which unlocks adding more interesting testcases
> > > > later, like gem_lmem_swapping.
> > > >
> > > > On the kernel side we landed the uAPI bits[1] behind CONFIG_BROKEN, which is
> > > > already enabled in CI builds, so it should be possible to get some more BAT
> > > > testing(outside of just the selftests) on DG1 to the point where we can start to
> > > > exercise the LMEM paths with the new bits of uAPI.
> > > >
> > > > [1] https://patchwork.freedesktop.org/series/89648/
> > >
> > > Petri, any thoughts on this series? As an initial step we just need
> > > some way to start exercising the new bits of uAPI, and from that we
> > > can add more interesting test cases.
> >
> > This series is in a confused state. First there's the addition of
> > local definitions and ioctl tokens, then they are replaced with the
> > proper stuff...
>
> Yeah, I think that's how it is internally. Maybe the idea with that
> was to somehow land the igt changes first, before the kernel stuff
> potentially landed? I can clean this up and just start with the proper
> stuff.
>
> >
> > When this was starting to get developed the idea was to avoid icky
> > cases that break _testing_. Not tests, testing. Remember when engine
> > discovery was being developed and we had cases where for_each_engine
> > loop didn't progress, causing stuff like
> >
> > for_each_engine(...)
> > igt_subtest(...)
> >
> > to never enter a subtest?
> >
> > Pushing for stubbing memory regions ultimately wanted to avoid cases
> > where for_each_combination(memregions) breaks test enumeration.
> >
> > It all boils down to: Can that break? Can we have cases where the
> > query gives garbage? Can it give two million smem regions? Can it give
> > 0 regions, or -1 regions? And what happens then?
>
> On integrated platforms it can only return one region: smem. If we
> somehow don't have a smem region then the i915 module load would have
> failed, since we must have been unable to populate the
> i915->mm.regions. On DG1 we just get the extra lmem region, and for Xe
> HP multi-tile we get a few more lmem regions, but again if we can't
> populate the i915->mm.regions with the required regions then we fail
> driver init. The only "optional" region is stolen memory, but for that
> we don't expose it to userspace.
>
> The query will fail on !CONFIG_BROKEN kernels though, where it just
> returns -ENODEV, or of course some other error if the user provided an
> invalid query.
Behaviour between success/failure is business as usual. The danger in
the initial discussions for this was token value overloading or such,
stuff like IGT thinking it's calling DRM_IOCTL_DISTANCE_TO_LUNCHTIME
but that value was meanwhile taken by
DRM_IOCTL_HALT_AND_CATCH_FIRE. Of course the query change is not a new
ioctl but is value mismatch a possibility in a theoretical worst case
and how does the breakage show in testing?
--
Petri Latvala
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 00/12] DG1/LMEM uAPI basics
2021-05-19 11:02 ` Petri Latvala
@ 2021-05-19 11:36 ` Matthew Auld
-1 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-19 11:36 UTC (permalink / raw)
To: Petri Latvala
Cc: igt-dev, Thomas Hellström, Intel Graphics Development, Matthew Auld
On Wed, 19 May 2021 at 12:00, Petri Latvala <petri.latvala@intel.com> wrote:
>
> On Wed, May 19, 2021 at 11:45:17AM +0100, Matthew Auld wrote:
> > On Wed, 19 May 2021 at 09:49, Petri Latvala <petri.latvala@intel.com> wrote:
> > >
> > > On Wed, May 19, 2021 at 09:13:37AM +0100, Matthew Auld wrote:
> > > > On Tue, 11 May 2021 at 17:52, Matthew Auld <matthew.auld@intel.com> wrote:
> > > > >
> > > > > Just the really basic stuff, which unlocks adding more interesting testcases
> > > > > later, like gem_lmem_swapping.
> > > > >
> > > > > On the kernel side we landed the uAPI bits[1] behind CONFIG_BROKEN, which is
> > > > > already enabled in CI builds, so it should be possible to get some more BAT
> > > > > testing(outside of just the selftests) on DG1 to the point where we can start to
> > > > > exercise the LMEM paths with the new bits of uAPI.
> > > > >
> > > > > [1] https://patchwork.freedesktop.org/series/89648/
> > > >
> > > > Petri, any thoughts on this series? As an initial step we just need
> > > > some way to start exercising the new bits of uAPI, and from that we
> > > > can add more interesting test cases.
> > >
> > > This series is in a confused state. First there's the addition of
> > > local definitions and ioctl tokens, then they are replaced with the
> > > proper stuff...
> >
> > Yeah, I think that's how it is internally. Maybe the idea with that
> > was to somehow land the igt changes first, before the kernel stuff
> > potentially landed? I can clean this up and just start with the proper
> > stuff.
> >
> > >
> > > When this was starting to get developed the idea was to avoid icky
> > > cases that break _testing_. Not tests, testing. Remember when engine
> > > discovery was being developed and we had cases where for_each_engine
> > > loop didn't progress, causing stuff like
> > >
> > > for_each_engine(...)
> > > igt_subtest(...)
> > >
> > > to never enter a subtest?
> > >
> > > Pushing for stubbing memory regions ultimately wanted to avoid cases
> > > where for_each_combination(memregions) breaks test enumeration.
> > >
> > > It all boils down to: Can that break? Can we have cases where the
> > > query gives garbage? Can it give two million smem regions? Can it give
> > > 0 regions, or -1 regions? And what happens then?
> >
> > On integrated platforms it can only return one region: smem. If we
> > somehow don't have a smem region then the i915 module load would have
> > failed, since we must have been unable to populate the
> > i915->mm.regions. On DG1 we just get the extra lmem region, and for Xe
> > HP multi-tile we get a few more lmem regions, but again if we can't
> > populate the i915->mm.regions with the required regions then we fail
> > driver init. The only "optional" region is stolen memory, but for that
> > we don't expose it to userspace.
> >
> > The query will fail on !CONFIG_BROKEN kernels though, where it just
> > returns -ENODEV, or of course some other error if the user provided an
> > invalid query.
>
> Behaviour between success/failure is business as usual. The danger in
> the initial discussions for this was token value overloading or such,
> stuff like IGT thinking it's calling DRM_IOCTL_DISTANCE_TO_LUNCHTIME
> but that value was meanwhile taken by
> DRM_IOCTL_HALT_AND_CATCH_FIRE. Of course the query change is not a new
> ioctl but is value mismatch a possibility in a theoretical worst case
> and how does the breakage show in testing?
Hmm, do you mean if we decide to change the uAPI before dropping the
CONFIG_BROKEN? That's for sure a possibility.
Maybe we can do something like the prelim thing?
/** XXX: these are subject to change, hence leaving some holes */
I915_GEM_CREATE_EXT_MEMORY_REGIONS 0xff
DRM_I915_QUERY_MEMORY_REGIONS 0xff
That way, if we do need to change anything here we can add the new
version(using the lowest available value at the time) and also keep
the old version which should be backwards compat, then migrate igt
over to the new and then drop the old from the kernel? And then at
some point also drop CONFIG_BROKEN once the uAPI is final?
I think it should be the case that all other related values are
effectively namespaced within that.
>
>
> --
> Petri Latvala
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 00/12] DG1/LMEM uAPI basics
@ 2021-05-19 11:36 ` Matthew Auld
0 siblings, 0 replies; 39+ messages in thread
From: Matthew Auld @ 2021-05-19 11:36 UTC (permalink / raw)
To: Petri Latvala
Cc: igt-dev, Thomas Hellström, Intel Graphics Development,
Matthew Auld, Daniel Vetter
On Wed, 19 May 2021 at 12:00, Petri Latvala <petri.latvala@intel.com> wrote:
>
> On Wed, May 19, 2021 at 11:45:17AM +0100, Matthew Auld wrote:
> > On Wed, 19 May 2021 at 09:49, Petri Latvala <petri.latvala@intel.com> wrote:
> > >
> > > On Wed, May 19, 2021 at 09:13:37AM +0100, Matthew Auld wrote:
> > > > On Tue, 11 May 2021 at 17:52, Matthew Auld <matthew.auld@intel.com> wrote:
> > > > >
> > > > > Just the really basic stuff, which unlocks adding more interesting testcases
> > > > > later, like gem_lmem_swapping.
> > > > >
> > > > > On the kernel side we landed the uAPI bits[1] behind CONFIG_BROKEN, which is
> > > > > already enabled in CI builds, so it should be possible to get some more BAT
> > > > > testing(outside of just the selftests) on DG1 to the point where we can start to
> > > > > exercise the LMEM paths with the new bits of uAPI.
> > > > >
> > > > > [1] https://patchwork.freedesktop.org/series/89648/
> > > >
> > > > Petri, any thoughts on this series? As an initial step we just need
> > > > some way to start exercising the new bits of uAPI, and from that we
> > > > can add more interesting test cases.
> > >
> > > This series is in a confused state. First there's the addition of
> > > local definitions and ioctl tokens, then they are replaced with the
> > > proper stuff...
> >
> > Yeah, I think that's how it is internally. Maybe the idea with that
> > was to somehow land the igt changes first, before the kernel stuff
> > potentially landed? I can clean this up and just start with the proper
> > stuff.
> >
> > >
> > > When this was starting to get developed the idea was to avoid icky
> > > cases that break _testing_. Not tests, testing. Remember when engine
> > > discovery was being developed and we had cases where for_each_engine
> > > loop didn't progress, causing stuff like
> > >
> > > for_each_engine(...)
> > > igt_subtest(...)
> > >
> > > to never enter a subtest?
> > >
> > > Pushing for stubbing memory regions ultimately wanted to avoid cases
> > > where for_each_combination(memregions) breaks test enumeration.
> > >
> > > It all boils down to: Can that break? Can we have cases where the
> > > query gives garbage? Can it give two million smem regions? Can it give
> > > 0 regions, or -1 regions? And what happens then?
> >
> > On integrated platforms it can only return one region: smem. If we
> > somehow don't have a smem region then the i915 module load would have
> > failed, since we must have been unable to populate the
> > i915->mm.regions. On DG1 we just get the extra lmem region, and for Xe
> > HP multi-tile we get a few more lmem regions, but again if we can't
> > populate the i915->mm.regions with the required regions then we fail
> > driver init. The only "optional" region is stolen memory, but for that
> > we don't expose it to userspace.
> >
> > The query will fail on !CONFIG_BROKEN kernels though, where it just
> > returns -ENODEV, or of course some other error if the user provided an
> > invalid query.
>
> Behaviour between success/failure is business as usual. The danger in
> the initial discussions for this was token value overloading or such,
> stuff like IGT thinking it's calling DRM_IOCTL_DISTANCE_TO_LUNCHTIME
> but that value was meanwhile taken by
> DRM_IOCTL_HALT_AND_CATCH_FIRE. Of course the query change is not a new
> ioctl but is value mismatch a possibility in a theoretical worst case
> and how does the breakage show in testing?
Hmm, do you mean if we decide to change the uAPI before dropping the
CONFIG_BROKEN? That's for sure a possibility.
Maybe we can do something like the prelim thing?
/** XXX: these are subject to change, hence leaving some holes */
I915_GEM_CREATE_EXT_MEMORY_REGIONS 0xff
DRM_I915_QUERY_MEMORY_REGIONS 0xff
That way, if we do need to change anything here we can add the new
version(using the lowest available value at the time) and also keep
the old version which should be backwards compat, then migrate igt
over to the new and then drop the old from the kernel? And then at
some point also drop CONFIG_BROKEN once the uAPI is final?
I think it should be the case that all other related values are
effectively namespaced within that.
>
>
> --
> Petri Latvala
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 00/12] DG1/LMEM uAPI basics
2021-05-19 11:36 ` Matthew Auld
@ 2021-05-19 12:07 ` Petri Latvala
-1 siblings, 0 replies; 39+ messages in thread
From: Petri Latvala @ 2021-05-19 12:07 UTC (permalink / raw)
To: Matthew Auld
Cc: igt-dev, Thomas Hellström, Intel Graphics Development, Matthew Auld
On Wed, May 19, 2021 at 12:36:17PM +0100, Matthew Auld wrote:
> On Wed, 19 May 2021 at 12:00, Petri Latvala <petri.latvala@intel.com> wrote:
> >
> > On Wed, May 19, 2021 at 11:45:17AM +0100, Matthew Auld wrote:
> > > On Wed, 19 May 2021 at 09:49, Petri Latvala <petri.latvala@intel.com> wrote:
> > > >
> > > > On Wed, May 19, 2021 at 09:13:37AM +0100, Matthew Auld wrote:
> > > > > On Tue, 11 May 2021 at 17:52, Matthew Auld <matthew.auld@intel.com> wrote:
> > > > > >
> > > > > > Just the really basic stuff, which unlocks adding more interesting testcases
> > > > > > later, like gem_lmem_swapping.
> > > > > >
> > > > > > On the kernel side we landed the uAPI bits[1] behind CONFIG_BROKEN, which is
> > > > > > already enabled in CI builds, so it should be possible to get some more BAT
> > > > > > testing(outside of just the selftests) on DG1 to the point where we can start to
> > > > > > exercise the LMEM paths with the new bits of uAPI.
> > > > > >
> > > > > > [1] https://patchwork.freedesktop.org/series/89648/
> > > > >
> > > > > Petri, any thoughts on this series? As an initial step we just need
> > > > > some way to start exercising the new bits of uAPI, and from that we
> > > > > can add more interesting test cases.
> > > >
> > > > This series is in a confused state. First there's the addition of
> > > > local definitions and ioctl tokens, then they are replaced with the
> > > > proper stuff...
> > >
> > > Yeah, I think that's how it is internally. Maybe the idea with that
> > > was to somehow land the igt changes first, before the kernel stuff
> > > potentially landed? I can clean this up and just start with the proper
> > > stuff.
> > >
> > > >
> > > > When this was starting to get developed the idea was to avoid icky
> > > > cases that break _testing_. Not tests, testing. Remember when engine
> > > > discovery was being developed and we had cases where for_each_engine
> > > > loop didn't progress, causing stuff like
> > > >
> > > > for_each_engine(...)
> > > > igt_subtest(...)
> > > >
> > > > to never enter a subtest?
> > > >
> > > > Pushing for stubbing memory regions ultimately wanted to avoid cases
> > > > where for_each_combination(memregions) breaks test enumeration.
> > > >
> > > > It all boils down to: Can that break? Can we have cases where the
> > > > query gives garbage? Can it give two million smem regions? Can it give
> > > > 0 regions, or -1 regions? And what happens then?
> > >
> > > On integrated platforms it can only return one region: smem. If we
> > > somehow don't have a smem region then the i915 module load would have
> > > failed, since we must have been unable to populate the
> > > i915->mm.regions. On DG1 we just get the extra lmem region, and for Xe
> > > HP multi-tile we get a few more lmem regions, but again if we can't
> > > populate the i915->mm.regions with the required regions then we fail
> > > driver init. The only "optional" region is stolen memory, but for that
> > > we don't expose it to userspace.
> > >
> > > The query will fail on !CONFIG_BROKEN kernels though, where it just
> > > returns -ENODEV, or of course some other error if the user provided an
> > > invalid query.
> >
> > Behaviour between success/failure is business as usual. The danger in
> > the initial discussions for this was token value overloading or such,
> > stuff like IGT thinking it's calling DRM_IOCTL_DISTANCE_TO_LUNCHTIME
> > but that value was meanwhile taken by
> > DRM_IOCTL_HALT_AND_CATCH_FIRE. Of course the query change is not a new
> > ioctl but is value mismatch a possibility in a theoretical worst case
> > and how does the breakage show in testing?
>
> Hmm, do you mean if we decide to change the uAPI before dropping the
> CONFIG_BROKEN? That's for sure a possibility.
Yes. For ioctl numbers the realistic scenario is that someone else
takes over the value but that's not the case here for the query
token...
> Maybe we can do something like the prelim thing?
>
> /** XXX: these are subject to change, hence leaving some holes */
> I915_GEM_CREATE_EXT_MEMORY_REGIONS 0xff
> DRM_I915_QUERY_MEMORY_REGIONS 0xff
>
> That way, if we do need to change anything here we can add the new
> version(using the lowest available value at the time) and also keep
> the old version which should be backwards compat, then migrate igt
> over to the new and then drop the old from the kernel? And then at
> some point also drop CONFIG_BROKEN once the uAPI is final?
>
> I think it should be the case that all other related values are
> effectively namespaced within that.
That might be overkill for this if the only real danger is the query
token having the wrong meaning, and that value being fully in i915
control.
After mulling back and forth I'm ready to slap an A-b on this series
after the cleanup mentioned above.
--
Petri Latvala
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 00/12] DG1/LMEM uAPI basics
@ 2021-05-19 12:07 ` Petri Latvala
0 siblings, 0 replies; 39+ messages in thread
From: Petri Latvala @ 2021-05-19 12:07 UTC (permalink / raw)
To: Matthew Auld
Cc: igt-dev, Thomas Hellström, Intel Graphics Development,
Matthew Auld, Daniel Vetter
On Wed, May 19, 2021 at 12:36:17PM +0100, Matthew Auld wrote:
> On Wed, 19 May 2021 at 12:00, Petri Latvala <petri.latvala@intel.com> wrote:
> >
> > On Wed, May 19, 2021 at 11:45:17AM +0100, Matthew Auld wrote:
> > > On Wed, 19 May 2021 at 09:49, Petri Latvala <petri.latvala@intel.com> wrote:
> > > >
> > > > On Wed, May 19, 2021 at 09:13:37AM +0100, Matthew Auld wrote:
> > > > > On Tue, 11 May 2021 at 17:52, Matthew Auld <matthew.auld@intel.com> wrote:
> > > > > >
> > > > > > Just the really basic stuff, which unlocks adding more interesting testcases
> > > > > > later, like gem_lmem_swapping.
> > > > > >
> > > > > > On the kernel side we landed the uAPI bits[1] behind CONFIG_BROKEN, which is
> > > > > > already enabled in CI builds, so it should be possible to get some more BAT
> > > > > > testing(outside of just the selftests) on DG1 to the point where we can start to
> > > > > > exercise the LMEM paths with the new bits of uAPI.
> > > > > >
> > > > > > [1] https://patchwork.freedesktop.org/series/89648/
> > > > >
> > > > > Petri, any thoughts on this series? As an initial step we just need
> > > > > some way to start exercising the new bits of uAPI, and from that we
> > > > > can add more interesting test cases.
> > > >
> > > > This series is in a confused state. First there's the addition of
> > > > local definitions and ioctl tokens, then they are replaced with the
> > > > proper stuff...
> > >
> > > Yeah, I think that's how it is internally. Maybe the idea with that
> > > was to somehow land the igt changes first, before the kernel stuff
> > > potentially landed? I can clean this up and just start with the proper
> > > stuff.
> > >
> > > >
> > > > When this was starting to get developed the idea was to avoid icky
> > > > cases that break _testing_. Not tests, testing. Remember when engine
> > > > discovery was being developed and we had cases where for_each_engine
> > > > loop didn't progress, causing stuff like
> > > >
> > > > for_each_engine(...)
> > > > igt_subtest(...)
> > > >
> > > > to never enter a subtest?
> > > >
> > > > Pushing for stubbing memory regions ultimately wanted to avoid cases
> > > > where for_each_combination(memregions) breaks test enumeration.
> > > >
> > > > It all boils down to: Can that break? Can we have cases where the
> > > > query gives garbage? Can it give two million smem regions? Can it give
> > > > 0 regions, or -1 regions? And what happens then?
> > >
> > > On integrated platforms it can only return one region: smem. If we
> > > somehow don't have a smem region then the i915 module load would have
> > > failed, since we must have been unable to populate the
> > > i915->mm.regions. On DG1 we just get the extra lmem region, and for Xe
> > > HP multi-tile we get a few more lmem regions, but again if we can't
> > > populate the i915->mm.regions with the required regions then we fail
> > > driver init. The only "optional" region is stolen memory, but for that
> > > we don't expose it to userspace.
> > >
> > > The query will fail on !CONFIG_BROKEN kernels though, where it just
> > > returns -ENODEV, or of course some other error if the user provided an
> > > invalid query.
> >
> > Behaviour between success/failure is business as usual. The danger in
> > the initial discussions for this was token value overloading or such,
> > stuff like IGT thinking it's calling DRM_IOCTL_DISTANCE_TO_LUNCHTIME
> > but that value was meanwhile taken by
> > DRM_IOCTL_HALT_AND_CATCH_FIRE. Of course the query change is not a new
> > ioctl but is value mismatch a possibility in a theoretical worst case
> > and how does the breakage show in testing?
>
> Hmm, do you mean if we decide to change the uAPI before dropping the
> CONFIG_BROKEN? That's for sure a possibility.
Yes. For ioctl numbers the realistic scenario is that someone else
takes over the value but that's not the case here for the query
token...
> Maybe we can do something like the prelim thing?
>
> /** XXX: these are subject to change, hence leaving some holes */
> I915_GEM_CREATE_EXT_MEMORY_REGIONS 0xff
> DRM_I915_QUERY_MEMORY_REGIONS 0xff
>
> That way, if we do need to change anything here we can add the new
> version(using the lowest available value at the time) and also keep
> the old version which should be backwards compat, then migrate igt
> over to the new and then drop the old from the kernel? And then at
> some point also drop CONFIG_BROKEN once the uAPI is final?
>
> I think it should be the case that all other related values are
> effectively namespaced within that.
That might be overkill for this if the only real danger is the query
token having the wrong meaning, and that value being fully in i915
control.
After mulling back and forth I'm ready to slap an A-b on this series
after the cleanup mentioned above.
--
Petri Latvala
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