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From: Mark Rutland <mark.rutland@arm.com>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
	Will Deacon <will@kernel.org>,
	Suzuki K Poulose <Suzuki.Poulose@arm.com>
Subject: Re: [PATCH 1/2] arm64: Change the cpuinfo_arm64 member type for some sysregs to u64
Date: Wed, 12 May 2021 14:29:53 +0100	[thread overview]
Message-ID: <20210512132953.GC93815@C02TD0UTHF1T.local> (raw)
In-Reply-To: <20210511182322.3830-2-catalin.marinas@arm.com>

On Tue, May 11, 2021 at 07:23:21PM +0100, Catalin Marinas wrote:
> The architecture has been updated and the CTR_EL0, CNTFRQ_EL1,
> DCZID_EL0, MIDR_EL1, REVIDR_EL1 registers are all 64-bit, even if most
> of them have a RES0 top 32-bit.
> 
> Change their type to u64 in struct cpuinfo_arm64.
> 
> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com>

Acked-by: Mark Rutland <mark.rutland@arm.com>

Mark.

> ---
> 
> CTR_EL0 gained a new field with MTE in the top 32-bit, TminLine. I have
> no idea what software is supposed to do with this field. I even have a
> Jira ticket from 2019 asking for it to be removed. So I don't think we
> should bother adding the mask/checks for it to the kernel.
> 
>  arch/arm64/include/asm/cpu.h | 10 +++++-----
>  arch/arm64/kernel/cpuinfo.c  |  2 +-
>  2 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/cpu.h b/arch/arm64/include/asm/cpu.h
> index 7faae6ff3ab4..fe5a8499ddc2 100644
> --- a/arch/arm64/include/asm/cpu.h
> +++ b/arch/arm64/include/asm/cpu.h
> @@ -15,11 +15,11 @@
>  struct cpuinfo_arm64 {
>  	struct cpu	cpu;
>  	struct kobject	kobj;
> -	u32		reg_ctr;
> -	u32		reg_cntfrq;
> -	u32		reg_dczid;
> -	u32		reg_midr;
> -	u32		reg_revidr;
> +	u64		reg_ctr;
> +	u64		reg_cntfrq;
> +	u64		reg_dczid;
> +	u64		reg_midr;
> +	u64		reg_revidr;
>  
>  	u64		reg_id_aa64dfr0;
>  	u64		reg_id_aa64dfr1;
> diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
> index 77605aec25fe..4bea701117d4 100644
> --- a/arch/arm64/kernel/cpuinfo.c
> +++ b/arch/arm64/kernel/cpuinfo.c
> @@ -246,7 +246,7 @@ static struct kobj_type cpuregs_kobj_type = {
>  		struct cpuinfo_arm64 *info = kobj_to_cpuinfo(kobj);		\
>  										\
>  		if (info->reg_midr)						\
> -			return sprintf(buf, "0x%016x\n", info->reg_##_field);	\
> +			return sprintf(buf, "0x%016llx\n", info->reg_##_field);	\
>  		else								\
>  			return 0;						\
>  	}									\

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  reply	other threads:[~2021-05-12 13:36 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-11 18:23 [PATCH 0/2] arm64: Taint the kernel on different GMID_EL1.BS Catalin Marinas
2021-05-11 18:23 ` [PATCH 1/2] arm64: Change the cpuinfo_arm64 member type for some sysregs to u64 Catalin Marinas
2021-05-12 13:29   ` Mark Rutland [this message]
2021-05-12 13:54   ` Suzuki K Poulose
2021-05-24  1:31   ` Shaokun Zhang
2021-05-26 16:07     ` Catalin Marinas
2021-05-11 18:23 ` [PATCH 2/2] arm64: Check if GMID_EL1.BS is the same on all CPUs Catalin Marinas
2021-05-12 13:33   ` Mark Rutland
2021-05-26 19:47   ` Jon Hunter
2021-05-26 19:47     ` Jon Hunter
2021-05-26 21:08     ` Will Deacon
2021-05-26 21:08       ` Will Deacon
2021-05-26 21:48     ` Catalin Marinas
2021-05-26 21:48       ` Catalin Marinas
2021-05-26 22:11       ` Jon Hunter
2021-05-26 22:11         ` Jon Hunter
2021-05-25 18:58 ` [PATCH 0/2] arm64: Taint the kernel on different GMID_EL1.BS Will Deacon

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