From: "Philippe Mathieu-Daudé" <f4bug@amsat.org> To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, "Richard Henderson" <richard.henderson@linaro.org>, "Laurent Vivier" <laurent@vivier.eu>, "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-s390x@nongnu.org, qemu-arm@nongnu.org, qemu-ppc@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com> Subject: [PATCH v7 00/23] cpu: Introduce SysemuCPUOps structure Date: Mon, 17 May 2021 12:51:17 +0200 [thread overview] Message-ID: <20210517105140.1062037-1-f4bug@amsat.org> (raw) Missing review: 2-5 (new) and 13 Hi, This series is inspired on Claudio TCG work. Instead of separate TCG from other accelerators, here we separate sysemu operations (system VS user). Since v6: - Rebased (3 targets removed, Claudio's target/i386 series merged) - Addressed Richard & David comments Since v5: - Rework patch 10 after Peter Maydell explanation on v3: https://www.mail-archive.com/qemu-devel@nongnu.org/msg800849.html Since v4: - Removed watchpoint patches (need more work) (Richard) - Merged patch 1 & 7 "Move CPUClass::vmsd to SysemuCPUOps" (Eduardo) - Reworded cpu_virtio_is_big_endian description (Greg) - Move write_elf() in target/riscv/cpu.c (rebased on top of 43a965888) - Added R-b tags Since v3: - SysemuCPUOps const (Richard) - added missing xtensa #ifdef'ry - added missing aa64/sve #ifdef'ry - added Laurent R-b Since v2: - fixed lm32/unicore32 - remove USER_ONLY ifdef'ry from "cpu.h" (Claudio) Since v1: - Name 'sysemu' (Claudio) - change each field progressively (Richard) $ git backport-diff Key: [----] : patches are identical [####] : number of functional differences between upstream/downstream patch [down] : patch is downstream-only The flags [FC] indicate (F)unctional and (C)ontextual differences, respective= ly 001/23:[down] 'NOTFORMERGE target/arm: Restrict MTE code to softmmu' 002/23:[down] 'cpu: Restrict target cpu_do_transaction_failed() handlers to s= ysemu' 003/23:[down] 'cpu: Restrict target cpu_do_unaligned_access() handlers to sys= emu' 004/23:[down] 'cpu: Remove duplicated 'sysemu/hw_accel.h' header' 005/23:[down] 'cpu: Split as cpu-common / cpu-sysemu' 006/23:[0002] [FC] 'cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from= _attrs' 007/23:[0010] [FC] 'cpu: Introduce cpu_virtio_is_big_endian()' 008/23:[0088] [FC] 'cpu: Directly use cpu_write_elf*() fallback handlers in p= lace' 009/23:[0022] [FC] 'cpu: Directly use get_paging_enabled() fallback handlers = in place' 010/23:[0026] [FC] 'cpu: Directly use get_memory_mapping() fallback handlers = in place' 011/23:[0007] [FC] 'cpu: Assert DeviceClass::vmsd is NULL on user emulation' 012/23:[0004] [FC] 'cpu: Rename CPUClass vmsd -> legacy_vmsd' 013/23:[down] 'cpu: Move AVR target vmsd field from CPUClass to DeviceClass' 014/23:[0014] [FC] 'cpu: Introduce SysemuCPUOps structure' 015/23:[0003] [FC] 'cpu: Move CPUClass::vmsd to SysemuCPUOps' 016/23:[0002] [FC] 'cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps' 017/23:[----] [--] 'cpu: Move CPUClass::get_crash_info to SysemuCPUOps' 018/23:[----] [-C] 'cpu: Move CPUClass::write_elf* to SysemuCPUOps' 019/23:[----] [--] 'cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps' 020/23:[0055] [FC] 'cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps' 021/23:[----] [--] 'cpu: Move CPUClass::get_memory_mapping to SysemuCPUOps' 022/23:[----] [--] 'cpu: Move CPUClass::get_paging_enabled to SysemuCPUOps' 023/23:[0012] [FC] 'cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c' Regards, Phil. Philippe Mathieu-Daud=C3=A9 (23): NOTFORMERGE target/arm: Restrict MTE code to softmmu cpu: Restrict target cpu_do_transaction_failed() handlers to sysemu cpu: Restrict target cpu_do_unaligned_access() handlers to sysemu cpu: Remove duplicated 'sysemu/hw_accel.h' header cpu: Split as cpu-common / cpu-sysemu cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs cpu: Introduce cpu_virtio_is_big_endian() cpu: Directly use cpu_write_elf*() fallback handlers in place cpu: Directly use get_paging_enabled() fallback handlers in place cpu: Directly use get_memory_mapping() fallback handlers in place cpu: Assert DeviceClass::vmsd is NULL on user emulation cpu: Rename CPUClass vmsd -> legacy_vmsd cpu: Move AVR target vmsd field from CPUClass to DeviceClass cpu: Introduce SysemuCPUOps structure cpu: Move CPUClass::vmsd to SysemuCPUOps cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps cpu: Move CPUClass::get_crash_info to SysemuCPUOps cpu: Move CPUClass::write_elf* to SysemuCPUOps cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps cpu: Move CPUClass::get_memory_mapping to SysemuCPUOps cpu: Move CPUClass::get_paging_enabled to SysemuCPUOps cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c include/hw/core/cpu.h | 92 +++++--------------- include/hw/core/sysemu-cpu-ops.h | 92 ++++++++++++++++++++ include/migration/vmstate.h | 2 - target/alpha/cpu.h | 12 ++- target/arm/cpu.h | 9 +- target/arm/internals.h | 2 + target/avr/cpu.h | 1 + target/cris/cpu.h | 7 +- target/hexagon/cpu.h | 3 + target/hppa/cpu.h | 5 +- target/i386/cpu.h | 9 +- target/m68k/cpu.h | 10 ++- target/microblaze/cpu.h | 11 +-- target/mips/cpu.h | 3 + target/mips/tcg/tcg-internal.h | 6 +- target/nios2/cpu.h | 4 +- target/openrisc/cpu.h | 6 +- target/ppc/cpu.h | 5 +- target/ppc/internal.h | 2 + target/riscv/cpu.h | 21 +++-- target/rx/cpu.h | 5 ++ target/s390x/cpu.h | 3 + target/s390x/internal.h | 2 + target/sh4/cpu.h | 11 ++- target/sparc/cpu.h | 14 +-- target/tricore/cpu.h | 5 ++ target/xtensa/cpu.h | 19 ++-- cpu.c | 18 ++-- hw/core/{cpu.c =3D> cpu-common.c} | 116 ------------------------- hw/core/cpu-sysemu.c | 145 +++++++++++++++++++++++++++++++ hw/virtio/virtio.c | 4 +- stubs/vmstate.c | 2 - target/alpha/cpu.c | 8 +- target/arm/cpu.c | 18 ++-- target/arm/tlb_helper.c | 4 +- target/avr/cpu.c | 8 +- target/avr/machine.c | 4 +- target/cris/cpu.c | 8 +- target/hppa/cpu.c | 8 +- target/i386/cpu.c | 28 +++--- target/m68k/cpu.c | 8 +- target/microblaze/cpu.c | 8 +- target/microblaze/helper.c | 35 ++++---- target/mips/cpu.c | 10 ++- target/nios2/cpu.c | 8 +- target/openrisc/cpu.c | 8 +- target/ppc/excp_helper.c | 3 +- target/riscv/cpu.c | 14 ++- target/rx/cpu.c | 10 ++- target/s390x/cpu.c | 14 ++- target/sh4/cpu.c | 11 ++- target/sparc/cpu.c | 10 ++- target/sparc/ldst_helper.c | 5 +- target/tricore/cpu.c | 6 +- target/xtensa/cpu.c | 10 ++- target/ppc/translate_init.c.inc | 20 +++-- hw/core/meson.build | 3 +- target/arm/meson.build | 6 +- 58 files changed, 587 insertions(+), 334 deletions(-) create mode 100644 include/hw/core/sysemu-cpu-ops.h rename hw/core/{cpu.c =3D> cpu-common.c} (73%) create mode 100644 hw/core/cpu-sysemu.c --=20 2.26.3
WARNING: multiple messages have this Message-ID (diff)
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org> To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, "Richard Henderson" <richard.henderson@linaro.org>, qemu-arm@nongnu.org, "Laurent Vivier" <laurent@vivier.eu>, "Paolo Bonzini" <pbonzini@redhat.com>, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, "Philippe Mathieu-Daudé" <f4bug@amsat.org> Subject: [PATCH v7 00/23] cpu: Introduce SysemuCPUOps structure Date: Mon, 17 May 2021 12:51:17 +0200 [thread overview] Message-ID: <20210517105140.1062037-1-f4bug@amsat.org> (raw) Missing review: 2-5 (new) and 13 Hi, This series is inspired on Claudio TCG work. Instead of separate TCG from other accelerators, here we separate sysemu operations (system VS user). Since v6: - Rebased (3 targets removed, Claudio's target/i386 series merged) - Addressed Richard & David comments Since v5: - Rework patch 10 after Peter Maydell explanation on v3: https://www.mail-archive.com/qemu-devel@nongnu.org/msg800849.html Since v4: - Removed watchpoint patches (need more work) (Richard) - Merged patch 1 & 7 "Move CPUClass::vmsd to SysemuCPUOps" (Eduardo) - Reworded cpu_virtio_is_big_endian description (Greg) - Move write_elf() in target/riscv/cpu.c (rebased on top of 43a965888) - Added R-b tags Since v3: - SysemuCPUOps const (Richard) - added missing xtensa #ifdef'ry - added missing aa64/sve #ifdef'ry - added Laurent R-b Since v2: - fixed lm32/unicore32 - remove USER_ONLY ifdef'ry from "cpu.h" (Claudio) Since v1: - Name 'sysemu' (Claudio) - change each field progressively (Richard) $ git backport-diff Key: [----] : patches are identical [####] : number of functional differences between upstream/downstream patch [down] : patch is downstream-only The flags [FC] indicate (F)unctional and (C)ontextual differences, respective= ly 001/23:[down] 'NOTFORMERGE target/arm: Restrict MTE code to softmmu' 002/23:[down] 'cpu: Restrict target cpu_do_transaction_failed() handlers to s= ysemu' 003/23:[down] 'cpu: Restrict target cpu_do_unaligned_access() handlers to sys= emu' 004/23:[down] 'cpu: Remove duplicated 'sysemu/hw_accel.h' header' 005/23:[down] 'cpu: Split as cpu-common / cpu-sysemu' 006/23:[0002] [FC] 'cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from= _attrs' 007/23:[0010] [FC] 'cpu: Introduce cpu_virtio_is_big_endian()' 008/23:[0088] [FC] 'cpu: Directly use cpu_write_elf*() fallback handlers in p= lace' 009/23:[0022] [FC] 'cpu: Directly use get_paging_enabled() fallback handlers = in place' 010/23:[0026] [FC] 'cpu: Directly use get_memory_mapping() fallback handlers = in place' 011/23:[0007] [FC] 'cpu: Assert DeviceClass::vmsd is NULL on user emulation' 012/23:[0004] [FC] 'cpu: Rename CPUClass vmsd -> legacy_vmsd' 013/23:[down] 'cpu: Move AVR target vmsd field from CPUClass to DeviceClass' 014/23:[0014] [FC] 'cpu: Introduce SysemuCPUOps structure' 015/23:[0003] [FC] 'cpu: Move CPUClass::vmsd to SysemuCPUOps' 016/23:[0002] [FC] 'cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps' 017/23:[----] [--] 'cpu: Move CPUClass::get_crash_info to SysemuCPUOps' 018/23:[----] [-C] 'cpu: Move CPUClass::write_elf* to SysemuCPUOps' 019/23:[----] [--] 'cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps' 020/23:[0055] [FC] 'cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps' 021/23:[----] [--] 'cpu: Move CPUClass::get_memory_mapping to SysemuCPUOps' 022/23:[----] [--] 'cpu: Move CPUClass::get_paging_enabled to SysemuCPUOps' 023/23:[0012] [FC] 'cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c' Regards, Phil. Philippe Mathieu-Daud=C3=A9 (23): NOTFORMERGE target/arm: Restrict MTE code to softmmu cpu: Restrict target cpu_do_transaction_failed() handlers to sysemu cpu: Restrict target cpu_do_unaligned_access() handlers to sysemu cpu: Remove duplicated 'sysemu/hw_accel.h' header cpu: Split as cpu-common / cpu-sysemu cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs cpu: Introduce cpu_virtio_is_big_endian() cpu: Directly use cpu_write_elf*() fallback handlers in place cpu: Directly use get_paging_enabled() fallback handlers in place cpu: Directly use get_memory_mapping() fallback handlers in place cpu: Assert DeviceClass::vmsd is NULL on user emulation cpu: Rename CPUClass vmsd -> legacy_vmsd cpu: Move AVR target vmsd field from CPUClass to DeviceClass cpu: Introduce SysemuCPUOps structure cpu: Move CPUClass::vmsd to SysemuCPUOps cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps cpu: Move CPUClass::get_crash_info to SysemuCPUOps cpu: Move CPUClass::write_elf* to SysemuCPUOps cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps cpu: Move CPUClass::get_memory_mapping to SysemuCPUOps cpu: Move CPUClass::get_paging_enabled to SysemuCPUOps cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c include/hw/core/cpu.h | 92 +++++--------------- include/hw/core/sysemu-cpu-ops.h | 92 ++++++++++++++++++++ include/migration/vmstate.h | 2 - target/alpha/cpu.h | 12 ++- target/arm/cpu.h | 9 +- target/arm/internals.h | 2 + target/avr/cpu.h | 1 + target/cris/cpu.h | 7 +- target/hexagon/cpu.h | 3 + target/hppa/cpu.h | 5 +- target/i386/cpu.h | 9 +- target/m68k/cpu.h | 10 ++- target/microblaze/cpu.h | 11 +-- target/mips/cpu.h | 3 + target/mips/tcg/tcg-internal.h | 6 +- target/nios2/cpu.h | 4 +- target/openrisc/cpu.h | 6 +- target/ppc/cpu.h | 5 +- target/ppc/internal.h | 2 + target/riscv/cpu.h | 21 +++-- target/rx/cpu.h | 5 ++ target/s390x/cpu.h | 3 + target/s390x/internal.h | 2 + target/sh4/cpu.h | 11 ++- target/sparc/cpu.h | 14 +-- target/tricore/cpu.h | 5 ++ target/xtensa/cpu.h | 19 ++-- cpu.c | 18 ++-- hw/core/{cpu.c =3D> cpu-common.c} | 116 ------------------------- hw/core/cpu-sysemu.c | 145 +++++++++++++++++++++++++++++++ hw/virtio/virtio.c | 4 +- stubs/vmstate.c | 2 - target/alpha/cpu.c | 8 +- target/arm/cpu.c | 18 ++-- target/arm/tlb_helper.c | 4 +- target/avr/cpu.c | 8 +- target/avr/machine.c | 4 +- target/cris/cpu.c | 8 +- target/hppa/cpu.c | 8 +- target/i386/cpu.c | 28 +++--- target/m68k/cpu.c | 8 +- target/microblaze/cpu.c | 8 +- target/microblaze/helper.c | 35 ++++---- target/mips/cpu.c | 10 ++- target/nios2/cpu.c | 8 +- target/openrisc/cpu.c | 8 +- target/ppc/excp_helper.c | 3 +- target/riscv/cpu.c | 14 ++- target/rx/cpu.c | 10 ++- target/s390x/cpu.c | 14 ++- target/sh4/cpu.c | 11 ++- target/sparc/cpu.c | 10 ++- target/sparc/ldst_helper.c | 5 +- target/tricore/cpu.c | 6 +- target/xtensa/cpu.c | 10 ++- target/ppc/translate_init.c.inc | 20 +++-- hw/core/meson.build | 3 +- target/arm/meson.build | 6 +- 58 files changed, 587 insertions(+), 334 deletions(-) create mode 100644 include/hw/core/sysemu-cpu-ops.h rename hw/core/{cpu.c =3D> cpu-common.c} (73%) create mode 100644 hw/core/cpu-sysemu.c --=20 2.26.3
next reply other threads:[~2021-05-17 10:53 UTC|newest] Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-17 10:51 Philippe Mathieu-Daudé [this message] 2021-05-17 10:51 ` [PATCH v7 00/23] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 01/23] NOTFORMERGE target/arm: Restrict MTE code to softmmu Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 02/23] cpu: Restrict target cpu_do_transaction_failed() handlers to sysemu Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-26 2:12 ` Richard Henderson 2021-05-26 2:12 ` Richard Henderson 2021-05-26 17:22 ` Philippe Mathieu-Daudé 2021-05-26 17:47 ` Richard Henderson 2021-05-17 10:51 ` [PATCH v7 03/23] cpu: Restrict target cpu_do_unaligned_access() " Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 04/23] cpu: Remove duplicated 'sysemu/hw_accel.h' header Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-26 2:13 ` Richard Henderson 2021-05-26 2:13 ` Richard Henderson 2021-05-17 10:51 ` [PATCH v7 05/23] cpu: Split as cpu-common / cpu-sysemu Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-26 2:16 ` Richard Henderson 2021-05-26 2:16 ` Richard Henderson 2021-05-17 10:51 ` [PATCH v7 06/23] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 07/23] cpu: Introduce cpu_virtio_is_big_endian() Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 08/23] cpu: Directly use cpu_write_elf*() fallback handlers in place Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 09/23] cpu: Directly use get_paging_enabled() " Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 10/23] cpu: Directly use get_memory_mapping() " Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 11/23] cpu: Assert DeviceClass::vmsd is NULL on user emulation Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 12/23] cpu: Rename CPUClass vmsd -> legacy_vmsd Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 13/23] cpu: Move AVR target vmsd field from CPUClass to DeviceClass Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-26 2:19 ` Richard Henderson 2021-05-26 2:19 ` Richard Henderson 2021-05-17 10:51 ` [PATCH v7 14/23] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 15/23] cpu: Move CPUClass::vmsd to SysemuCPUOps Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 16/23] cpu: Move CPUClass::virtio_is_big_endian " Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 17/23] cpu: Move CPUClass::get_crash_info " Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 18/23] cpu: Move CPUClass::write_elf* " Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 19/23] cpu: Move CPUClass::asidx_from_attrs " Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 20/23] cpu: Move CPUClass::get_phys_page_debug " Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 21/23] cpu: Move CPUClass::get_memory_mapping " Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 22/23] cpu: Move CPUClass::get_paging_enabled " Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-17 10:51 ` [PATCH v7 23/23] cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c Philippe Mathieu-Daudé 2021-05-17 10:51 ` Philippe Mathieu-Daudé 2021-05-25 14:12 ` [PATCH v7 00/23] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé 2021-05-26 17:42 ` Richard Henderson 2021-05-26 17:42 ` Richard Henderson
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