* [PATCH 0/4] J721E: Use external clock in EVM for SERDES
@ 2021-05-12 15:12 ` Kishon Vijay Abraham I
0 siblings, 0 replies; 24+ messages in thread
From: Kishon Vijay Abraham I @ 2021-05-12 15:12 UTC (permalink / raw)
To: Nishanth Menon, Tero Kristo, Rob Herring
Cc: linux-arm-kernel, devicetree, linux-kernel,
Kishon Vijay Abraham I, Lokesh Vutla
J721E EVM has clock generator that feeds both to the SERDES and to the
PCIe slot present in the EVM. In order to use common reference clock on
either side of the link, configure SERDES to use external reference
clock.
Previously SERDES used internal reference clock and the attached device
used clock from clock generator in the EVM.
Kishon Vijay Abraham I (4):
arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES
arm64: dts: ti: k3-j721e-main: Add #clock-cells property to serdes DT
node
arm64: dts: ti: k3-j721e-common-proc-board: Use external clock for
SERDES
arm64: dts: ti: k3-j721e-common-proc-board: Re-name "link" name as
"phy"
.../dts/ti/k3-j721e-common-proc-board.dts | 52 ++++++++++++-
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 78 ++++++++++---------
2 files changed, 90 insertions(+), 40 deletions(-)
--
2.17.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 0/4] J721E: Use external clock in EVM for SERDES @ 2021-05-12 15:12 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 24+ messages in thread From: Kishon Vijay Abraham I @ 2021-05-12 15:12 UTC (permalink / raw) To: Nishanth Menon, Tero Kristo, Rob Herring Cc: linux-arm-kernel, devicetree, linux-kernel, Kishon Vijay Abraham I, Lokesh Vutla J721E EVM has clock generator that feeds both to the SERDES and to the PCIe slot present in the EVM. In order to use common reference clock on either side of the link, configure SERDES to use external reference clock. Previously SERDES used internal reference clock and the attached device used clock from clock generator in the EVM. Kishon Vijay Abraham I (4): arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES arm64: dts: ti: k3-j721e-main: Add #clock-cells property to serdes DT node arm64: dts: ti: k3-j721e-common-proc-board: Use external clock for SERDES arm64: dts: ti: k3-j721e-common-proc-board: Re-name "link" name as "phy" .../dts/ti/k3-j721e-common-proc-board.dts | 52 ++++++++++++- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 78 ++++++++++--------- 2 files changed, 90 insertions(+), 40 deletions(-) -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES 2021-05-12 15:12 ` Kishon Vijay Abraham I @ 2021-05-12 15:12 ` Kishon Vijay Abraham I -1 siblings, 0 replies; 24+ messages in thread From: Kishon Vijay Abraham I @ 2021-05-12 15:12 UTC (permalink / raw) To: Nishanth Menon, Tero Kristo, Rob Herring Cc: linux-arm-kernel, devicetree, linux-kernel, Kishon Vijay Abraham I, Lokesh Vutla Rename the external refclk inputs to the SERDES from dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1 respectively. Also move the external refclk DT nodes outside the cbass_main DT node. Since in j721e common processor board, only the cmn_refclk1 is connected to 100MHz clock, fix the clock frequency. Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++ arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 58 ++++++++++--------- 2 files changed, 34 insertions(+), 28 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 60764366e22b..86f7ab511ee8 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -635,6 +635,10 @@ status = "disabled"; }; +&cmn_refclk1 { + clock-frequency = <100000000>; +}; + &serdes0 { serdes0_pcie_link: link@0 { reg = <0>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index c2aa45a3ac79..002a0c1520ee 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -8,6 +8,20 @@ #include <dt-bindings/mux/mux.h> #include <dt-bindings/mux/ti-serdes.h> +/ { + cmn_refclk: cmn-refclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; + + cmn_refclk1: cmn-refclk1 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; +}; + &cbass_main { msmc_ram: sram@70000000 { compatible = "mmio-sram"; @@ -336,24 +350,12 @@ pinctrl-single,function-mask = <0xffffffff>; }; - dummy_cmn_refclk: dummy-cmn-refclk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - }; - - dummy_cmn_refclk1: dummy-cmn-refclk1 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - }; - serdes_wiz0: wiz@5000000 { compatible = "ti,j721e-wiz-16g"; #address-cells = <1>; #size-cells = <1>; power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 292 5>, <&k3_clks 292 11>, <&dummy_cmn_refclk>; + clocks = <&k3_clks 292 5>, <&k3_clks 292 11>, <&cmn_refclk>; clock-names = "fck", "core_ref_clk", "ext_ref_clk"; assigned-clocks = <&k3_clks 292 11>, <&k3_clks 292 0>; assigned-clock-parents = <&k3_clks 292 15>, <&k3_clks 292 4>; @@ -362,21 +364,21 @@ ranges = <0x5000000 0x0 0x5000000 0x10000>; wiz0_pll0_refclk: pll0-refclk { - clocks = <&k3_clks 292 11>, <&dummy_cmn_refclk>; + clocks = <&k3_clks 292 11>, <&cmn_refclk>; #clock-cells = <0>; assigned-clocks = <&wiz0_pll0_refclk>; assigned-clock-parents = <&k3_clks 292 11>; }; wiz0_pll1_refclk: pll1-refclk { - clocks = <&k3_clks 292 0>, <&dummy_cmn_refclk1>; + clocks = <&k3_clks 292 0>, <&cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz0_pll1_refclk>; assigned-clock-parents = <&k3_clks 292 0>; }; wiz0_refclk_dig: refclk-dig { - clocks = <&k3_clks 292 11>, <&k3_clks 292 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; + clocks = <&k3_clks 292 11>, <&k3_clks 292 0>, <&cmn_refclk>, <&cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz0_refclk_dig>; assigned-clock-parents = <&k3_clks 292 11>; @@ -410,7 +412,7 @@ #address-cells = <1>; #size-cells = <1>; power-domains = <&k3_pds 293 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 293 5>, <&k3_clks 293 13>, <&dummy_cmn_refclk>; + clocks = <&k3_clks 293 5>, <&k3_clks 293 13>, <&cmn_refclk>; clock-names = "fck", "core_ref_clk", "ext_ref_clk"; assigned-clocks = <&k3_clks 293 13>, <&k3_clks 293 0>; assigned-clock-parents = <&k3_clks 293 17>, <&k3_clks 293 4>; @@ -419,21 +421,21 @@ ranges = <0x5010000 0x0 0x5010000 0x10000>; wiz1_pll0_refclk: pll0-refclk { - clocks = <&k3_clks 293 13>, <&dummy_cmn_refclk>; + clocks = <&k3_clks 293 13>, <&cmn_refclk>; #clock-cells = <0>; assigned-clocks = <&wiz1_pll0_refclk>; assigned-clock-parents = <&k3_clks 293 13>; }; wiz1_pll1_refclk: pll1-refclk { - clocks = <&k3_clks 293 0>, <&dummy_cmn_refclk1>; + clocks = <&k3_clks 293 0>, <&cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz1_pll1_refclk>; assigned-clock-parents = <&k3_clks 293 0>; }; wiz1_refclk_dig: refclk-dig { - clocks = <&k3_clks 293 13>, <&k3_clks 293 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; + clocks = <&k3_clks 293 13>, <&k3_clks 293 0>, <&cmn_refclk>, <&cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz1_refclk_dig>; assigned-clock-parents = <&k3_clks 293 13>; @@ -467,7 +469,7 @@ #address-cells = <1>; #size-cells = <1>; power-domains = <&k3_pds 294 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 294 5>, <&k3_clks 294 11>, <&dummy_cmn_refclk>; + clocks = <&k3_clks 294 5>, <&k3_clks 294 11>, <&cmn_refclk>; clock-names = "fck", "core_ref_clk", "ext_ref_clk"; assigned-clocks = <&k3_clks 294 11>, <&k3_clks 294 0>; assigned-clock-parents = <&k3_clks 294 15>, <&k3_clks 294 4>; @@ -476,21 +478,21 @@ ranges = <0x5020000 0x0 0x5020000 0x10000>; wiz2_pll0_refclk: pll0-refclk { - clocks = <&k3_clks 294 11>, <&dummy_cmn_refclk>; + clocks = <&k3_clks 294 11>, <&cmn_refclk>; #clock-cells = <0>; assigned-clocks = <&wiz2_pll0_refclk>; assigned-clock-parents = <&k3_clks 294 11>; }; wiz2_pll1_refclk: pll1-refclk { - clocks = <&k3_clks 294 0>, <&dummy_cmn_refclk1>; + clocks = <&k3_clks 294 0>, <&cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz2_pll1_refclk>; assigned-clock-parents = <&k3_clks 294 0>; }; wiz2_refclk_dig: refclk-dig { - clocks = <&k3_clks 294 11>, <&k3_clks 294 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; + clocks = <&k3_clks 294 11>, <&k3_clks 294 0>, <&cmn_refclk>, <&cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz2_refclk_dig>; assigned-clock-parents = <&k3_clks 294 11>; @@ -524,7 +526,7 @@ #address-cells = <1>; #size-cells = <1>; power-domains = <&k3_pds 295 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 295 5>, <&k3_clks 295 9>, <&dummy_cmn_refclk>; + clocks = <&k3_clks 295 5>, <&k3_clks 295 9>, <&cmn_refclk>; clock-names = "fck", "core_ref_clk", "ext_ref_clk"; assigned-clocks = <&k3_clks 295 9>, <&k3_clks 295 0>; assigned-clock-parents = <&k3_clks 295 13>, <&k3_clks 295 4>; @@ -533,21 +535,21 @@ ranges = <0x5030000 0x0 0x5030000 0x10000>; wiz3_pll0_refclk: pll0-refclk { - clocks = <&k3_clks 295 9>, <&dummy_cmn_refclk>; + clocks = <&k3_clks 295 9>, <&cmn_refclk>; #clock-cells = <0>; assigned-clocks = <&wiz3_pll0_refclk>; assigned-clock-parents = <&k3_clks 295 9>; }; wiz3_pll1_refclk: pll1-refclk { - clocks = <&k3_clks 295 0>, <&dummy_cmn_refclk1>; + clocks = <&k3_clks 295 0>, <&cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz3_pll1_refclk>; assigned-clock-parents = <&k3_clks 295 0>; }; wiz3_refclk_dig: refclk-dig { - clocks = <&k3_clks 295 9>, <&k3_clks 295 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; + clocks = <&k3_clks 295 9>, <&k3_clks 295 0>, <&cmn_refclk>, <&cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz3_refclk_dig>; assigned-clock-parents = <&k3_clks 295 9>; -- 2.17.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES @ 2021-05-12 15:12 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 24+ messages in thread From: Kishon Vijay Abraham I @ 2021-05-12 15:12 UTC (permalink / raw) To: Nishanth Menon, Tero Kristo, Rob Herring Cc: linux-arm-kernel, devicetree, linux-kernel, Kishon Vijay Abraham I, Lokesh Vutla Rename the external refclk inputs to the SERDES from dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1 respectively. Also move the external refclk DT nodes outside the cbass_main DT node. Since in j721e common processor board, only the cmn_refclk1 is connected to 100MHz clock, fix the clock frequency. Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++ arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 58 ++++++++++--------- 2 files changed, 34 insertions(+), 28 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 60764366e22b..86f7ab511ee8 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -635,6 +635,10 @@ status = "disabled"; }; +&cmn_refclk1 { + clock-frequency = <100000000>; +}; + &serdes0 { serdes0_pcie_link: link@0 { reg = <0>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index c2aa45a3ac79..002a0c1520ee 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -8,6 +8,20 @@ #include <dt-bindings/mux/mux.h> #include <dt-bindings/mux/ti-serdes.h> +/ { + cmn_refclk: cmn-refclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; + + cmn_refclk1: cmn-refclk1 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; +}; + &cbass_main { msmc_ram: sram@70000000 { compatible = "mmio-sram"; @@ -336,24 +350,12 @@ pinctrl-single,function-mask = <0xffffffff>; }; - dummy_cmn_refclk: dummy-cmn-refclk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - }; - - dummy_cmn_refclk1: dummy-cmn-refclk1 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - }; - serdes_wiz0: wiz@5000000 { compatible = "ti,j721e-wiz-16g"; #address-cells = <1>; #size-cells = <1>; power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 292 5>, <&k3_clks 292 11>, <&dummy_cmn_refclk>; + clocks = <&k3_clks 292 5>, <&k3_clks 292 11>, <&cmn_refclk>; clock-names = "fck", "core_ref_clk", "ext_ref_clk"; assigned-clocks = <&k3_clks 292 11>, <&k3_clks 292 0>; assigned-clock-parents = <&k3_clks 292 15>, <&k3_clks 292 4>; @@ -362,21 +364,21 @@ ranges = <0x5000000 0x0 0x5000000 0x10000>; wiz0_pll0_refclk: pll0-refclk { - clocks = <&k3_clks 292 11>, <&dummy_cmn_refclk>; + clocks = <&k3_clks 292 11>, <&cmn_refclk>; #clock-cells = <0>; assigned-clocks = <&wiz0_pll0_refclk>; assigned-clock-parents = <&k3_clks 292 11>; }; wiz0_pll1_refclk: pll1-refclk { - clocks = <&k3_clks 292 0>, <&dummy_cmn_refclk1>; + clocks = <&k3_clks 292 0>, <&cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz0_pll1_refclk>; assigned-clock-parents = <&k3_clks 292 0>; }; wiz0_refclk_dig: refclk-dig { - clocks = <&k3_clks 292 11>, <&k3_clks 292 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; + clocks = <&k3_clks 292 11>, <&k3_clks 292 0>, <&cmn_refclk>, <&cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz0_refclk_dig>; assigned-clock-parents = <&k3_clks 292 11>; @@ -410,7 +412,7 @@ #address-cells = <1>; #size-cells = <1>; power-domains = <&k3_pds 293 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 293 5>, <&k3_clks 293 13>, <&dummy_cmn_refclk>; + clocks = <&k3_clks 293 5>, <&k3_clks 293 13>, <&cmn_refclk>; clock-names = "fck", "core_ref_clk", "ext_ref_clk"; assigned-clocks = <&k3_clks 293 13>, <&k3_clks 293 0>; assigned-clock-parents = <&k3_clks 293 17>, <&k3_clks 293 4>; @@ -419,21 +421,21 @@ ranges = <0x5010000 0x0 0x5010000 0x10000>; wiz1_pll0_refclk: pll0-refclk { - clocks = <&k3_clks 293 13>, <&dummy_cmn_refclk>; + clocks = <&k3_clks 293 13>, <&cmn_refclk>; #clock-cells = <0>; assigned-clocks = <&wiz1_pll0_refclk>; assigned-clock-parents = <&k3_clks 293 13>; }; wiz1_pll1_refclk: pll1-refclk { - clocks = <&k3_clks 293 0>, <&dummy_cmn_refclk1>; + clocks = <&k3_clks 293 0>, <&cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz1_pll1_refclk>; assigned-clock-parents = <&k3_clks 293 0>; }; wiz1_refclk_dig: refclk-dig { - clocks = <&k3_clks 293 13>, <&k3_clks 293 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; + clocks = <&k3_clks 293 13>, <&k3_clks 293 0>, <&cmn_refclk>, <&cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz1_refclk_dig>; assigned-clock-parents = <&k3_clks 293 13>; @@ -467,7 +469,7 @@ #address-cells = <1>; #size-cells = <1>; power-domains = <&k3_pds 294 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 294 5>, <&k3_clks 294 11>, <&dummy_cmn_refclk>; + clocks = <&k3_clks 294 5>, <&k3_clks 294 11>, <&cmn_refclk>; clock-names = "fck", "core_ref_clk", "ext_ref_clk"; assigned-clocks = <&k3_clks 294 11>, <&k3_clks 294 0>; assigned-clock-parents = <&k3_clks 294 15>, <&k3_clks 294 4>; @@ -476,21 +478,21 @@ ranges = <0x5020000 0x0 0x5020000 0x10000>; wiz2_pll0_refclk: pll0-refclk { - clocks = <&k3_clks 294 11>, <&dummy_cmn_refclk>; + clocks = <&k3_clks 294 11>, <&cmn_refclk>; #clock-cells = <0>; assigned-clocks = <&wiz2_pll0_refclk>; assigned-clock-parents = <&k3_clks 294 11>; }; wiz2_pll1_refclk: pll1-refclk { - clocks = <&k3_clks 294 0>, <&dummy_cmn_refclk1>; + clocks = <&k3_clks 294 0>, <&cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz2_pll1_refclk>; assigned-clock-parents = <&k3_clks 294 0>; }; wiz2_refclk_dig: refclk-dig { - clocks = <&k3_clks 294 11>, <&k3_clks 294 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; + clocks = <&k3_clks 294 11>, <&k3_clks 294 0>, <&cmn_refclk>, <&cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz2_refclk_dig>; assigned-clock-parents = <&k3_clks 294 11>; @@ -524,7 +526,7 @@ #address-cells = <1>; #size-cells = <1>; power-domains = <&k3_pds 295 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 295 5>, <&k3_clks 295 9>, <&dummy_cmn_refclk>; + clocks = <&k3_clks 295 5>, <&k3_clks 295 9>, <&cmn_refclk>; clock-names = "fck", "core_ref_clk", "ext_ref_clk"; assigned-clocks = <&k3_clks 295 9>, <&k3_clks 295 0>; assigned-clock-parents = <&k3_clks 295 13>, <&k3_clks 295 4>; @@ -533,21 +535,21 @@ ranges = <0x5030000 0x0 0x5030000 0x10000>; wiz3_pll0_refclk: pll0-refclk { - clocks = <&k3_clks 295 9>, <&dummy_cmn_refclk>; + clocks = <&k3_clks 295 9>, <&cmn_refclk>; #clock-cells = <0>; assigned-clocks = <&wiz3_pll0_refclk>; assigned-clock-parents = <&k3_clks 295 9>; }; wiz3_pll1_refclk: pll1-refclk { - clocks = <&k3_clks 295 0>, <&dummy_cmn_refclk1>; + clocks = <&k3_clks 295 0>, <&cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz3_pll1_refclk>; assigned-clock-parents = <&k3_clks 295 0>; }; wiz3_refclk_dig: refclk-dig { - clocks = <&k3_clks 295 9>, <&k3_clks 295 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; + clocks = <&k3_clks 295 9>, <&k3_clks 295 0>, <&cmn_refclk>, <&cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz3_refclk_dig>; assigned-clock-parents = <&k3_clks 295 9>; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES 2021-05-12 15:12 ` Kishon Vijay Abraham I @ 2021-05-12 18:51 ` Nishanth Menon -1 siblings, 0 replies; 24+ messages in thread From: Nishanth Menon @ 2021-05-12 18:51 UTC (permalink / raw) To: Kishon Vijay Abraham I Cc: Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel, Lokesh Vutla On 20:42-20210512, Kishon Vijay Abraham I wrote: > Rename the external refclk inputs to the SERDES from > dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1 > respectively. Also move the external refclk DT nodes outside the > cbass_main DT node. Since in j721e common processor board, only the > cmn_refclk1 is connected to 100MHz clock, fix the clock frequency. > > Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes") Assume we want this part of 5.13 fixes? > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > --- > .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++ > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 58 ++++++++++--------- > 2 files changed, 34 insertions(+), 28 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > index 60764366e22b..86f7ab511ee8 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > @@ -635,6 +635,10 @@ > status = "disabled"; > }; > > +&cmn_refclk1 { > + clock-frequency = <100000000>; > +}; > + > &serdes0 { > serdes0_pcie_link: link@0 { > reg = <0>; > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > index c2aa45a3ac79..002a0c1520ee 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > @@ -8,6 +8,20 @@ > #include <dt-bindings/mux/mux.h> > #include <dt-bindings/mux/ti-serdes.h> > > +/ { > + cmn_refclk: cmn-refclk { > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <0>; > + }; > + > + cmn_refclk1: cmn-refclk1 { Just curious: why cant we use the standard nodenames with clock? > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <0>; > + }; > +}; > + > &cbass_main { > msmc_ram: sram@70000000 { > compatible = "mmio-sram"; > @@ -336,24 +350,12 @@ > pinctrl-single,function-mask = <0xffffffff>; > }; > > - dummy_cmn_refclk: dummy-cmn-refclk { > - #clock-cells = <0>; > - compatible = "fixed-clock"; > - clock-frequency = <100000000>; > - }; > - > - dummy_cmn_refclk1: dummy-cmn-refclk1 { > - #clock-cells = <0>; > - compatible = "fixed-clock"; > - clock-frequency = <100000000>; > - }; > - > serdes_wiz0: wiz@5000000 { > compatible = "ti,j721e-wiz-16g"; > #address-cells = <1>; > #size-cells = <1>; > power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>; > - clocks = <&k3_clks 292 5>, <&k3_clks 292 11>, <&dummy_cmn_refclk>; > + clocks = <&k3_clks 292 5>, <&k3_clks 292 11>, <&cmn_refclk>; > clock-names = "fck", "core_ref_clk", "ext_ref_clk"; > assigned-clocks = <&k3_clks 292 11>, <&k3_clks 292 0>; > assigned-clock-parents = <&k3_clks 292 15>, <&k3_clks 292 4>; > @@ -362,21 +364,21 @@ > ranges = <0x5000000 0x0 0x5000000 0x10000>; > > wiz0_pll0_refclk: pll0-refclk { > - clocks = <&k3_clks 292 11>, <&dummy_cmn_refclk>; > + clocks = <&k3_clks 292 11>, <&cmn_refclk>; > #clock-cells = <0>; > assigned-clocks = <&wiz0_pll0_refclk>; > assigned-clock-parents = <&k3_clks 292 11>; > }; > > wiz0_pll1_refclk: pll1-refclk { > - clocks = <&k3_clks 292 0>, <&dummy_cmn_refclk1>; > + clocks = <&k3_clks 292 0>, <&cmn_refclk1>; > #clock-cells = <0>; > assigned-clocks = <&wiz0_pll1_refclk>; > assigned-clock-parents = <&k3_clks 292 0>; > }; > > wiz0_refclk_dig: refclk-dig { > - clocks = <&k3_clks 292 11>, <&k3_clks 292 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; > + clocks = <&k3_clks 292 11>, <&k3_clks 292 0>, <&cmn_refclk>, <&cmn_refclk1>; > #clock-cells = <0>; > assigned-clocks = <&wiz0_refclk_dig>; > assigned-clock-parents = <&k3_clks 292 11>; > @@ -410,7 +412,7 @@ > #address-cells = <1>; > #size-cells = <1>; > power-domains = <&k3_pds 293 TI_SCI_PD_EXCLUSIVE>; > - clocks = <&k3_clks 293 5>, <&k3_clks 293 13>, <&dummy_cmn_refclk>; > + clocks = <&k3_clks 293 5>, <&k3_clks 293 13>, <&cmn_refclk>; > clock-names = "fck", "core_ref_clk", "ext_ref_clk"; > assigned-clocks = <&k3_clks 293 13>, <&k3_clks 293 0>; > assigned-clock-parents = <&k3_clks 293 17>, <&k3_clks 293 4>; > @@ -419,21 +421,21 @@ > ranges = <0x5010000 0x0 0x5010000 0x10000>; > > wiz1_pll0_refclk: pll0-refclk { > - clocks = <&k3_clks 293 13>, <&dummy_cmn_refclk>; > + clocks = <&k3_clks 293 13>, <&cmn_refclk>; > #clock-cells = <0>; > assigned-clocks = <&wiz1_pll0_refclk>; > assigned-clock-parents = <&k3_clks 293 13>; > }; > > wiz1_pll1_refclk: pll1-refclk { > - clocks = <&k3_clks 293 0>, <&dummy_cmn_refclk1>; > + clocks = <&k3_clks 293 0>, <&cmn_refclk1>; > #clock-cells = <0>; > assigned-clocks = <&wiz1_pll1_refclk>; > assigned-clock-parents = <&k3_clks 293 0>; > }; > > wiz1_refclk_dig: refclk-dig { > - clocks = <&k3_clks 293 13>, <&k3_clks 293 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; > + clocks = <&k3_clks 293 13>, <&k3_clks 293 0>, <&cmn_refclk>, <&cmn_refclk1>; > #clock-cells = <0>; > assigned-clocks = <&wiz1_refclk_dig>; > assigned-clock-parents = <&k3_clks 293 13>; > @@ -467,7 +469,7 @@ > #address-cells = <1>; > #size-cells = <1>; > power-domains = <&k3_pds 294 TI_SCI_PD_EXCLUSIVE>; > - clocks = <&k3_clks 294 5>, <&k3_clks 294 11>, <&dummy_cmn_refclk>; > + clocks = <&k3_clks 294 5>, <&k3_clks 294 11>, <&cmn_refclk>; > clock-names = "fck", "core_ref_clk", "ext_ref_clk"; > assigned-clocks = <&k3_clks 294 11>, <&k3_clks 294 0>; > assigned-clock-parents = <&k3_clks 294 15>, <&k3_clks 294 4>; > @@ -476,21 +478,21 @@ > ranges = <0x5020000 0x0 0x5020000 0x10000>; > > wiz2_pll0_refclk: pll0-refclk { > - clocks = <&k3_clks 294 11>, <&dummy_cmn_refclk>; > + clocks = <&k3_clks 294 11>, <&cmn_refclk>; > #clock-cells = <0>; > assigned-clocks = <&wiz2_pll0_refclk>; > assigned-clock-parents = <&k3_clks 294 11>; > }; > > wiz2_pll1_refclk: pll1-refclk { > - clocks = <&k3_clks 294 0>, <&dummy_cmn_refclk1>; > + clocks = <&k3_clks 294 0>, <&cmn_refclk1>; > #clock-cells = <0>; > assigned-clocks = <&wiz2_pll1_refclk>; > assigned-clock-parents = <&k3_clks 294 0>; > }; > > wiz2_refclk_dig: refclk-dig { > - clocks = <&k3_clks 294 11>, <&k3_clks 294 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; > + clocks = <&k3_clks 294 11>, <&k3_clks 294 0>, <&cmn_refclk>, <&cmn_refclk1>; > #clock-cells = <0>; > assigned-clocks = <&wiz2_refclk_dig>; > assigned-clock-parents = <&k3_clks 294 11>; > @@ -524,7 +526,7 @@ > #address-cells = <1>; > #size-cells = <1>; > power-domains = <&k3_pds 295 TI_SCI_PD_EXCLUSIVE>; > - clocks = <&k3_clks 295 5>, <&k3_clks 295 9>, <&dummy_cmn_refclk>; > + clocks = <&k3_clks 295 5>, <&k3_clks 295 9>, <&cmn_refclk>; > clock-names = "fck", "core_ref_clk", "ext_ref_clk"; > assigned-clocks = <&k3_clks 295 9>, <&k3_clks 295 0>; > assigned-clock-parents = <&k3_clks 295 13>, <&k3_clks 295 4>; > @@ -533,21 +535,21 @@ > ranges = <0x5030000 0x0 0x5030000 0x10000>; > > wiz3_pll0_refclk: pll0-refclk { > - clocks = <&k3_clks 295 9>, <&dummy_cmn_refclk>; > + clocks = <&k3_clks 295 9>, <&cmn_refclk>; > #clock-cells = <0>; > assigned-clocks = <&wiz3_pll0_refclk>; > assigned-clock-parents = <&k3_clks 295 9>; > }; > > wiz3_pll1_refclk: pll1-refclk { > - clocks = <&k3_clks 295 0>, <&dummy_cmn_refclk1>; > + clocks = <&k3_clks 295 0>, <&cmn_refclk1>; > #clock-cells = <0>; > assigned-clocks = <&wiz3_pll1_refclk>; > assigned-clock-parents = <&k3_clks 295 0>; > }; > > wiz3_refclk_dig: refclk-dig { > - clocks = <&k3_clks 295 9>, <&k3_clks 295 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; > + clocks = <&k3_clks 295 9>, <&k3_clks 295 0>, <&cmn_refclk>, <&cmn_refclk1>; > #clock-cells = <0>; > assigned-clocks = <&wiz3_refclk_dig>; > assigned-clock-parents = <&k3_clks 295 9>; > -- > 2.17.1 > -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES @ 2021-05-12 18:51 ` Nishanth Menon 0 siblings, 0 replies; 24+ messages in thread From: Nishanth Menon @ 2021-05-12 18:51 UTC (permalink / raw) To: Kishon Vijay Abraham I Cc: Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel, Lokesh Vutla On 20:42-20210512, Kishon Vijay Abraham I wrote: > Rename the external refclk inputs to the SERDES from > dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1 > respectively. Also move the external refclk DT nodes outside the > cbass_main DT node. Since in j721e common processor board, only the > cmn_refclk1 is connected to 100MHz clock, fix the clock frequency. > > Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes") Assume we want this part of 5.13 fixes? > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > --- > .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++ > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 58 ++++++++++--------- > 2 files changed, 34 insertions(+), 28 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > index 60764366e22b..86f7ab511ee8 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > @@ -635,6 +635,10 @@ > status = "disabled"; > }; > > +&cmn_refclk1 { > + clock-frequency = <100000000>; > +}; > + > &serdes0 { > serdes0_pcie_link: link@0 { > reg = <0>; > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > index c2aa45a3ac79..002a0c1520ee 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > @@ -8,6 +8,20 @@ > #include <dt-bindings/mux/mux.h> > #include <dt-bindings/mux/ti-serdes.h> > > +/ { > + cmn_refclk: cmn-refclk { > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <0>; > + }; > + > + cmn_refclk1: cmn-refclk1 { Just curious: why cant we use the standard nodenames with clock? > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <0>; > + }; > +}; > + > &cbass_main { > msmc_ram: sram@70000000 { > compatible = "mmio-sram"; > @@ -336,24 +350,12 @@ > pinctrl-single,function-mask = <0xffffffff>; > }; > > - dummy_cmn_refclk: dummy-cmn-refclk { > - #clock-cells = <0>; > - compatible = "fixed-clock"; > - clock-frequency = <100000000>; > - }; > - > - dummy_cmn_refclk1: dummy-cmn-refclk1 { > - #clock-cells = <0>; > - compatible = "fixed-clock"; > - clock-frequency = <100000000>; > - }; > - > serdes_wiz0: wiz@5000000 { > compatible = "ti,j721e-wiz-16g"; > #address-cells = <1>; > #size-cells = <1>; > power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>; > - clocks = <&k3_clks 292 5>, <&k3_clks 292 11>, <&dummy_cmn_refclk>; > + clocks = <&k3_clks 292 5>, <&k3_clks 292 11>, <&cmn_refclk>; > clock-names = "fck", "core_ref_clk", "ext_ref_clk"; > assigned-clocks = <&k3_clks 292 11>, <&k3_clks 292 0>; > assigned-clock-parents = <&k3_clks 292 15>, <&k3_clks 292 4>; > @@ -362,21 +364,21 @@ > ranges = <0x5000000 0x0 0x5000000 0x10000>; > > wiz0_pll0_refclk: pll0-refclk { > - clocks = <&k3_clks 292 11>, <&dummy_cmn_refclk>; > + clocks = <&k3_clks 292 11>, <&cmn_refclk>; > #clock-cells = <0>; > assigned-clocks = <&wiz0_pll0_refclk>; > assigned-clock-parents = <&k3_clks 292 11>; > }; > > wiz0_pll1_refclk: pll1-refclk { > - clocks = <&k3_clks 292 0>, <&dummy_cmn_refclk1>; > + clocks = <&k3_clks 292 0>, <&cmn_refclk1>; > #clock-cells = <0>; > assigned-clocks = <&wiz0_pll1_refclk>; > assigned-clock-parents = <&k3_clks 292 0>; > }; > > wiz0_refclk_dig: refclk-dig { > - clocks = <&k3_clks 292 11>, <&k3_clks 292 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; > + clocks = <&k3_clks 292 11>, <&k3_clks 292 0>, <&cmn_refclk>, <&cmn_refclk1>; > #clock-cells = <0>; > assigned-clocks = <&wiz0_refclk_dig>; > assigned-clock-parents = <&k3_clks 292 11>; > @@ -410,7 +412,7 @@ > #address-cells = <1>; > #size-cells = <1>; > power-domains = <&k3_pds 293 TI_SCI_PD_EXCLUSIVE>; > - clocks = <&k3_clks 293 5>, <&k3_clks 293 13>, <&dummy_cmn_refclk>; > + clocks = <&k3_clks 293 5>, <&k3_clks 293 13>, <&cmn_refclk>; > clock-names = "fck", "core_ref_clk", "ext_ref_clk"; > assigned-clocks = <&k3_clks 293 13>, <&k3_clks 293 0>; > assigned-clock-parents = <&k3_clks 293 17>, <&k3_clks 293 4>; > @@ -419,21 +421,21 @@ > ranges = <0x5010000 0x0 0x5010000 0x10000>; > > wiz1_pll0_refclk: pll0-refclk { > - clocks = <&k3_clks 293 13>, <&dummy_cmn_refclk>; > + clocks = <&k3_clks 293 13>, <&cmn_refclk>; > #clock-cells = <0>; > assigned-clocks = <&wiz1_pll0_refclk>; > assigned-clock-parents = <&k3_clks 293 13>; > }; > > wiz1_pll1_refclk: pll1-refclk { > - clocks = <&k3_clks 293 0>, <&dummy_cmn_refclk1>; > + clocks = <&k3_clks 293 0>, <&cmn_refclk1>; > #clock-cells = <0>; > assigned-clocks = <&wiz1_pll1_refclk>; > assigned-clock-parents = <&k3_clks 293 0>; > }; > > wiz1_refclk_dig: refclk-dig { > - clocks = <&k3_clks 293 13>, <&k3_clks 293 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; > + clocks = <&k3_clks 293 13>, <&k3_clks 293 0>, <&cmn_refclk>, <&cmn_refclk1>; > #clock-cells = <0>; > assigned-clocks = <&wiz1_refclk_dig>; > assigned-clock-parents = <&k3_clks 293 13>; > @@ -467,7 +469,7 @@ > #address-cells = <1>; > #size-cells = <1>; > power-domains = <&k3_pds 294 TI_SCI_PD_EXCLUSIVE>; > - clocks = <&k3_clks 294 5>, <&k3_clks 294 11>, <&dummy_cmn_refclk>; > + clocks = <&k3_clks 294 5>, <&k3_clks 294 11>, <&cmn_refclk>; > clock-names = "fck", "core_ref_clk", "ext_ref_clk"; > assigned-clocks = <&k3_clks 294 11>, <&k3_clks 294 0>; > assigned-clock-parents = <&k3_clks 294 15>, <&k3_clks 294 4>; > @@ -476,21 +478,21 @@ > ranges = <0x5020000 0x0 0x5020000 0x10000>; > > wiz2_pll0_refclk: pll0-refclk { > - clocks = <&k3_clks 294 11>, <&dummy_cmn_refclk>; > + clocks = <&k3_clks 294 11>, <&cmn_refclk>; > #clock-cells = <0>; > assigned-clocks = <&wiz2_pll0_refclk>; > assigned-clock-parents = <&k3_clks 294 11>; > }; > > wiz2_pll1_refclk: pll1-refclk { > - clocks = <&k3_clks 294 0>, <&dummy_cmn_refclk1>; > + clocks = <&k3_clks 294 0>, <&cmn_refclk1>; > #clock-cells = <0>; > assigned-clocks = <&wiz2_pll1_refclk>; > assigned-clock-parents = <&k3_clks 294 0>; > }; > > wiz2_refclk_dig: refclk-dig { > - clocks = <&k3_clks 294 11>, <&k3_clks 294 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; > + clocks = <&k3_clks 294 11>, <&k3_clks 294 0>, <&cmn_refclk>, <&cmn_refclk1>; > #clock-cells = <0>; > assigned-clocks = <&wiz2_refclk_dig>; > assigned-clock-parents = <&k3_clks 294 11>; > @@ -524,7 +526,7 @@ > #address-cells = <1>; > #size-cells = <1>; > power-domains = <&k3_pds 295 TI_SCI_PD_EXCLUSIVE>; > - clocks = <&k3_clks 295 5>, <&k3_clks 295 9>, <&dummy_cmn_refclk>; > + clocks = <&k3_clks 295 5>, <&k3_clks 295 9>, <&cmn_refclk>; > clock-names = "fck", "core_ref_clk", "ext_ref_clk"; > assigned-clocks = <&k3_clks 295 9>, <&k3_clks 295 0>; > assigned-clock-parents = <&k3_clks 295 13>, <&k3_clks 295 4>; > @@ -533,21 +535,21 @@ > ranges = <0x5030000 0x0 0x5030000 0x10000>; > > wiz3_pll0_refclk: pll0-refclk { > - clocks = <&k3_clks 295 9>, <&dummy_cmn_refclk>; > + clocks = <&k3_clks 295 9>, <&cmn_refclk>; > #clock-cells = <0>; > assigned-clocks = <&wiz3_pll0_refclk>; > assigned-clock-parents = <&k3_clks 295 9>; > }; > > wiz3_pll1_refclk: pll1-refclk { > - clocks = <&k3_clks 295 0>, <&dummy_cmn_refclk1>; > + clocks = <&k3_clks 295 0>, <&cmn_refclk1>; > #clock-cells = <0>; > assigned-clocks = <&wiz3_pll1_refclk>; > assigned-clock-parents = <&k3_clks 295 0>; > }; > > wiz3_refclk_dig: refclk-dig { > - clocks = <&k3_clks 295 9>, <&k3_clks 295 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; > + clocks = <&k3_clks 295 9>, <&k3_clks 295 0>, <&cmn_refclk>, <&cmn_refclk1>; > #clock-cells = <0>; > assigned-clocks = <&wiz3_refclk_dig>; > assigned-clock-parents = <&k3_clks 295 9>; > -- > 2.17.1 > -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES 2021-05-12 18:51 ` Nishanth Menon @ 2021-05-13 12:11 ` Kishon Vijay Abraham I -1 siblings, 0 replies; 24+ messages in thread From: Kishon Vijay Abraham I @ 2021-05-13 12:11 UTC (permalink / raw) To: Nishanth Menon Cc: Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel, Lokesh Vutla Hi Nishanth, On 13/05/21 12:21 am, Nishanth Menon wrote: > On 20:42-20210512, Kishon Vijay Abraham I wrote: >> Rename the external refclk inputs to the SERDES from >> dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1 >> respectively. Also move the external refclk DT nodes outside the >> cbass_main DT node. Since in j721e common processor board, only the >> cmn_refclk1 is connected to 100MHz clock, fix the clock frequency. >> >> Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes") > > Assume we want this part of 5.13 fixes? This doesn't fix any functionality. Okay for me to go in 5.14 along with the rest of the series. > >> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> >> --- >> .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++ >> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 58 ++++++++++--------- >> 2 files changed, 34 insertions(+), 28 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >> index 60764366e22b..86f7ab511ee8 100644 >> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >> @@ -635,6 +635,10 @@ >> status = "disabled"; >> }; >> >> +&cmn_refclk1 { >> + clock-frequency = <100000000>; >> +}; >> + >> &serdes0 { >> serdes0_pcie_link: link@0 { >> reg = <0>; >> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >> index c2aa45a3ac79..002a0c1520ee 100644 >> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >> @@ -8,6 +8,20 @@ >> #include <dt-bindings/mux/mux.h> >> #include <dt-bindings/mux/ti-serdes.h> >> >> +/ { >> + cmn_refclk: cmn-refclk { >> + #clock-cells = <0>; >> + compatible = "fixed-clock"; >> + clock-frequency = <0>; >> + }; >> + >> + cmn_refclk1: cmn-refclk1 { > > Just curious: why cant we use the standard nodenames with clock? We can use standard names here. Is there any defined nodename for clocks? clk or clock? Don't see $nodename defined for clocks in dt-schema repository. Thanks Kishon ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES @ 2021-05-13 12:11 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 24+ messages in thread From: Kishon Vijay Abraham I @ 2021-05-13 12:11 UTC (permalink / raw) To: Nishanth Menon Cc: Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel, Lokesh Vutla Hi Nishanth, On 13/05/21 12:21 am, Nishanth Menon wrote: > On 20:42-20210512, Kishon Vijay Abraham I wrote: >> Rename the external refclk inputs to the SERDES from >> dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1 >> respectively. Also move the external refclk DT nodes outside the >> cbass_main DT node. Since in j721e common processor board, only the >> cmn_refclk1 is connected to 100MHz clock, fix the clock frequency. >> >> Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes") > > Assume we want this part of 5.13 fixes? This doesn't fix any functionality. Okay for me to go in 5.14 along with the rest of the series. > >> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> >> --- >> .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++ >> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 58 ++++++++++--------- >> 2 files changed, 34 insertions(+), 28 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >> index 60764366e22b..86f7ab511ee8 100644 >> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >> @@ -635,6 +635,10 @@ >> status = "disabled"; >> }; >> >> +&cmn_refclk1 { >> + clock-frequency = <100000000>; >> +}; >> + >> &serdes0 { >> serdes0_pcie_link: link@0 { >> reg = <0>; >> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >> index c2aa45a3ac79..002a0c1520ee 100644 >> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >> @@ -8,6 +8,20 @@ >> #include <dt-bindings/mux/mux.h> >> #include <dt-bindings/mux/ti-serdes.h> >> >> +/ { >> + cmn_refclk: cmn-refclk { >> + #clock-cells = <0>; >> + compatible = "fixed-clock"; >> + clock-frequency = <0>; >> + }; >> + >> + cmn_refclk1: cmn-refclk1 { > > Just curious: why cant we use the standard nodenames with clock? We can use standard names here. Is there any defined nodename for clocks? clk or clock? Don't see $nodename defined for clocks in dt-schema repository. Thanks Kishon _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES 2021-05-13 12:11 ` Kishon Vijay Abraham I @ 2021-05-13 14:01 ` Nishanth Menon -1 siblings, 0 replies; 24+ messages in thread From: Nishanth Menon @ 2021-05-13 14:01 UTC (permalink / raw) To: Kishon Vijay Abraham I Cc: Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel, Lokesh Vutla On 17:41-20210513, Kishon Vijay Abraham I wrote: > Hi Nishanth, > > On 13/05/21 12:21 am, Nishanth Menon wrote: > > On 20:42-20210512, Kishon Vijay Abraham I wrote: > >> Rename the external refclk inputs to the SERDES from > >> dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1 > >> respectively. Also move the external refclk DT nodes outside the > >> cbass_main DT node. Since in j721e common processor board, only the > >> cmn_refclk1 is connected to 100MHz clock, fix the clock frequency. > >> > >> Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes") > > > > Assume we want this part of 5.13 fixes? > > This doesn't fix any functionality. Okay for me to go in 5.14 along with > the rest of the series. > > > >> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > >> --- > >> .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++ > >> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 58 ++++++++++--------- > >> 2 files changed, 34 insertions(+), 28 deletions(-) > >> > >> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >> index 60764366e22b..86f7ab511ee8 100644 > >> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >> @@ -635,6 +635,10 @@ > >> status = "disabled"; > >> }; > >> > >> +&cmn_refclk1 { > >> + clock-frequency = <100000000>; > >> +}; > >> + > >> &serdes0 { > >> serdes0_pcie_link: link@0 { > >> reg = <0>; > >> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >> index c2aa45a3ac79..002a0c1520ee 100644 > >> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >> @@ -8,6 +8,20 @@ > >> #include <dt-bindings/mux/mux.h> > >> #include <dt-bindings/mux/ti-serdes.h> > >> > >> +/ { > >> + cmn_refclk: cmn-refclk { > >> + #clock-cells = <0>; > >> + compatible = "fixed-clock"; > >> + clock-frequency = <0>; > >> + }; > >> + > >> + cmn_refclk1: cmn-refclk1 { > > > > Just curious: why cant we use the standard nodenames with clock? > > We can use standard names here. Is there any defined nodename for > clocks? clk or clock? Don't see $nodename defined for clocks in > dt-schema repository. Looking at the fixed-clock example, lets go with clock -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES @ 2021-05-13 14:01 ` Nishanth Menon 0 siblings, 0 replies; 24+ messages in thread From: Nishanth Menon @ 2021-05-13 14:01 UTC (permalink / raw) To: Kishon Vijay Abraham I Cc: Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel, Lokesh Vutla On 17:41-20210513, Kishon Vijay Abraham I wrote: > Hi Nishanth, > > On 13/05/21 12:21 am, Nishanth Menon wrote: > > On 20:42-20210512, Kishon Vijay Abraham I wrote: > >> Rename the external refclk inputs to the SERDES from > >> dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1 > >> respectively. Also move the external refclk DT nodes outside the > >> cbass_main DT node. Since in j721e common processor board, only the > >> cmn_refclk1 is connected to 100MHz clock, fix the clock frequency. > >> > >> Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes") > > > > Assume we want this part of 5.13 fixes? > > This doesn't fix any functionality. Okay for me to go in 5.14 along with > the rest of the series. > > > >> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > >> --- > >> .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++ > >> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 58 ++++++++++--------- > >> 2 files changed, 34 insertions(+), 28 deletions(-) > >> > >> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >> index 60764366e22b..86f7ab511ee8 100644 > >> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >> @@ -635,6 +635,10 @@ > >> status = "disabled"; > >> }; > >> > >> +&cmn_refclk1 { > >> + clock-frequency = <100000000>; > >> +}; > >> + > >> &serdes0 { > >> serdes0_pcie_link: link@0 { > >> reg = <0>; > >> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >> index c2aa45a3ac79..002a0c1520ee 100644 > >> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >> @@ -8,6 +8,20 @@ > >> #include <dt-bindings/mux/mux.h> > >> #include <dt-bindings/mux/ti-serdes.h> > >> > >> +/ { > >> + cmn_refclk: cmn-refclk { > >> + #clock-cells = <0>; > >> + compatible = "fixed-clock"; > >> + clock-frequency = <0>; > >> + }; > >> + > >> + cmn_refclk1: cmn-refclk1 { > > > > Just curious: why cant we use the standard nodenames with clock? > > We can use standard names here. Is there any defined nodename for > clocks? clk or clock? Don't see $nodename defined for clocks in > dt-schema repository. Looking at the fixed-clock example, lets go with clock -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES 2021-05-13 14:01 ` Nishanth Menon @ 2021-05-17 8:30 ` Kishon Vijay Abraham I -1 siblings, 0 replies; 24+ messages in thread From: Kishon Vijay Abraham I @ 2021-05-17 8:30 UTC (permalink / raw) To: Nishanth Menon Cc: Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel, Lokesh Vutla Hi Nishanth, On 13/05/21 7:31 pm, Nishanth Menon wrote: > On 17:41-20210513, Kishon Vijay Abraham I wrote: >> Hi Nishanth, >> >> On 13/05/21 12:21 am, Nishanth Menon wrote: >>> On 20:42-20210512, Kishon Vijay Abraham I wrote: >>>> Rename the external refclk inputs to the SERDES from >>>> dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1 >>>> respectively. Also move the external refclk DT nodes outside the >>>> cbass_main DT node. Since in j721e common processor board, only the >>>> cmn_refclk1 is connected to 100MHz clock, fix the clock frequency. >>>> >>>> Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes") >>> >>> Assume we want this part of 5.13 fixes? >> >> This doesn't fix any functionality. Okay for me to go in 5.14 along with >> the rest of the series. > > >>> >>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> >>>> --- >>>> .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++ >>>> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 58 ++++++++++--------- >>>> 2 files changed, 34 insertions(+), 28 deletions(-) >>>> >>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >>>> index 60764366e22b..86f7ab511ee8 100644 >>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >>>> @@ -635,6 +635,10 @@ >>>> status = "disabled"; >>>> }; >>>> >>>> +&cmn_refclk1 { >>>> + clock-frequency = <100000000>; >>>> +}; >>>> + >>>> &serdes0 { >>>> serdes0_pcie_link: link@0 { >>>> reg = <0>; >>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>>> index c2aa45a3ac79..002a0c1520ee 100644 >>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>>> @@ -8,6 +8,20 @@ >>>> #include <dt-bindings/mux/mux.h> >>>> #include <dt-bindings/mux/ti-serdes.h> >>>> >>>> +/ { >>>> + cmn_refclk: cmn-refclk { >>>> + #clock-cells = <0>; >>>> + compatible = "fixed-clock"; >>>> + clock-frequency = <0>; >>>> + }; >>>> + >>>> + cmn_refclk1: cmn-refclk1 { >>> >>> Just curious: why cant we use the standard nodenames with clock? >> >> We can use standard names here. Is there any defined nodename for >> clocks? clk or clock? Don't see $nodename defined for clocks in >> dt-schema repository. > > Looking at the fixed-clock example, lets go with clock Since I have two clocks here adding clock@0 and clock@1 introduces the following error. /home/a0393678/repos/linux-wip/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dt.yaml: /: clock@0: 'anyOf' conditional failed, one must be fixed: 'reg' is a required property 'ranges' is a required property The current "fixed-clock" binding doesn't allow adding "reg" property. We'll stick to non standard names? or do you think the binding has to be fixed? Thanks Kishon ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES @ 2021-05-17 8:30 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 24+ messages in thread From: Kishon Vijay Abraham I @ 2021-05-17 8:30 UTC (permalink / raw) To: Nishanth Menon Cc: Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel, Lokesh Vutla Hi Nishanth, On 13/05/21 7:31 pm, Nishanth Menon wrote: > On 17:41-20210513, Kishon Vijay Abraham I wrote: >> Hi Nishanth, >> >> On 13/05/21 12:21 am, Nishanth Menon wrote: >>> On 20:42-20210512, Kishon Vijay Abraham I wrote: >>>> Rename the external refclk inputs to the SERDES from >>>> dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1 >>>> respectively. Also move the external refclk DT nodes outside the >>>> cbass_main DT node. Since in j721e common processor board, only the >>>> cmn_refclk1 is connected to 100MHz clock, fix the clock frequency. >>>> >>>> Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes") >>> >>> Assume we want this part of 5.13 fixes? >> >> This doesn't fix any functionality. Okay for me to go in 5.14 along with >> the rest of the series. > > >>> >>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> >>>> --- >>>> .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++ >>>> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 58 ++++++++++--------- >>>> 2 files changed, 34 insertions(+), 28 deletions(-) >>>> >>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >>>> index 60764366e22b..86f7ab511ee8 100644 >>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >>>> @@ -635,6 +635,10 @@ >>>> status = "disabled"; >>>> }; >>>> >>>> +&cmn_refclk1 { >>>> + clock-frequency = <100000000>; >>>> +}; >>>> + >>>> &serdes0 { >>>> serdes0_pcie_link: link@0 { >>>> reg = <0>; >>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>>> index c2aa45a3ac79..002a0c1520ee 100644 >>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>>> @@ -8,6 +8,20 @@ >>>> #include <dt-bindings/mux/mux.h> >>>> #include <dt-bindings/mux/ti-serdes.h> >>>> >>>> +/ { >>>> + cmn_refclk: cmn-refclk { >>>> + #clock-cells = <0>; >>>> + compatible = "fixed-clock"; >>>> + clock-frequency = <0>; >>>> + }; >>>> + >>>> + cmn_refclk1: cmn-refclk1 { >>> >>> Just curious: why cant we use the standard nodenames with clock? >> >> We can use standard names here. Is there any defined nodename for >> clocks? clk or clock? Don't see $nodename defined for clocks in >> dt-schema repository. > > Looking at the fixed-clock example, lets go with clock Since I have two clocks here adding clock@0 and clock@1 introduces the following error. /home/a0393678/repos/linux-wip/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dt.yaml: /: clock@0: 'anyOf' conditional failed, one must be fixed: 'reg' is a required property 'ranges' is a required property The current "fixed-clock" binding doesn't allow adding "reg" property. We'll stick to non standard names? or do you think the binding has to be fixed? Thanks Kishon _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES 2021-05-17 8:30 ` Kishon Vijay Abraham I @ 2021-05-17 14:05 ` Nishanth Menon -1 siblings, 0 replies; 24+ messages in thread From: Nishanth Menon @ 2021-05-17 14:05 UTC (permalink / raw) To: Kishon Vijay Abraham I Cc: Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel, Lokesh Vutla On 14:00-20210517, Kishon Vijay Abraham I wrote: > Hi Nishanth, > > On 13/05/21 7:31 pm, Nishanth Menon wrote: > > On 17:41-20210513, Kishon Vijay Abraham I wrote: > >> Hi Nishanth, > >> > >> On 13/05/21 12:21 am, Nishanth Menon wrote: > >>> On 20:42-20210512, Kishon Vijay Abraham I wrote: > >>>> Rename the external refclk inputs to the SERDES from > >>>> dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1 > >>>> respectively. Also move the external refclk DT nodes outside the > >>>> cbass_main DT node. Since in j721e common processor board, only the > >>>> cmn_refclk1 is connected to 100MHz clock, fix the clock frequency. > >>>> > >>>> Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes") > >>> > >>> Assume we want this part of 5.13 fixes? > >> > >> This doesn't fix any functionality. Okay for me to go in 5.14 along with > >> the rest of the series. > > > > > >>> > >>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > >>>> --- > >>>> .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++ > >>>> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 58 ++++++++++--------- > >>>> 2 files changed, 34 insertions(+), 28 deletions(-) > >>>> > >>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >>>> index 60764366e22b..86f7ab511ee8 100644 > >>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >>>> @@ -635,6 +635,10 @@ > >>>> status = "disabled"; > >>>> }; > >>>> > >>>> +&cmn_refclk1 { > >>>> + clock-frequency = <100000000>; > >>>> +}; > >>>> + > >>>> &serdes0 { > >>>> serdes0_pcie_link: link@0 { > >>>> reg = <0>; > >>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >>>> index c2aa45a3ac79..002a0c1520ee 100644 > >>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >>>> @@ -8,6 +8,20 @@ > >>>> #include <dt-bindings/mux/mux.h> > >>>> #include <dt-bindings/mux/ti-serdes.h> > >>>> > >>>> +/ { > >>>> + cmn_refclk: cmn-refclk { > >>>> + #clock-cells = <0>; > >>>> + compatible = "fixed-clock"; > >>>> + clock-frequency = <0>; > >>>> + }; > >>>> + > >>>> + cmn_refclk1: cmn-refclk1 { > >>> > >>> Just curious: why cant we use the standard nodenames with clock? > >> > >> We can use standard names here. Is there any defined nodename for > >> clocks? clk or clock? Don't see $nodename defined for clocks in > >> dt-schema repository. > > > > Looking at the fixed-clock example, lets go with clock > > Since I have two clocks here adding clock@0 and clock@1 introduces the > following error. > /home/a0393678/repos/linux-wip/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dt.yaml: > /: clock@0: 'anyOf' conditional failed, one must be fixed: > 'reg' is a required property > 'ranges' is a required property > > The current "fixed-clock" binding doesn't allow adding "reg" property. > We'll stick to non standard names? or do you think the binding has to be > fixed? Look at other fixed-clock examples in other arm64 examples https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm.dtsi#n147 is a good one.. Binding is fine, IMHO. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES @ 2021-05-17 14:05 ` Nishanth Menon 0 siblings, 0 replies; 24+ messages in thread From: Nishanth Menon @ 2021-05-17 14:05 UTC (permalink / raw) To: Kishon Vijay Abraham I Cc: Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel, Lokesh Vutla On 14:00-20210517, Kishon Vijay Abraham I wrote: > Hi Nishanth, > > On 13/05/21 7:31 pm, Nishanth Menon wrote: > > On 17:41-20210513, Kishon Vijay Abraham I wrote: > >> Hi Nishanth, > >> > >> On 13/05/21 12:21 am, Nishanth Menon wrote: > >>> On 20:42-20210512, Kishon Vijay Abraham I wrote: > >>>> Rename the external refclk inputs to the SERDES from > >>>> dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1 > >>>> respectively. Also move the external refclk DT nodes outside the > >>>> cbass_main DT node. Since in j721e common processor board, only the > >>>> cmn_refclk1 is connected to 100MHz clock, fix the clock frequency. > >>>> > >>>> Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes") > >>> > >>> Assume we want this part of 5.13 fixes? > >> > >> This doesn't fix any functionality. Okay for me to go in 5.14 along with > >> the rest of the series. > > > > > >>> > >>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > >>>> --- > >>>> .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++ > >>>> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 58 ++++++++++--------- > >>>> 2 files changed, 34 insertions(+), 28 deletions(-) > >>>> > >>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >>>> index 60764366e22b..86f7ab511ee8 100644 > >>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >>>> @@ -635,6 +635,10 @@ > >>>> status = "disabled"; > >>>> }; > >>>> > >>>> +&cmn_refclk1 { > >>>> + clock-frequency = <100000000>; > >>>> +}; > >>>> + > >>>> &serdes0 { > >>>> serdes0_pcie_link: link@0 { > >>>> reg = <0>; > >>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >>>> index c2aa45a3ac79..002a0c1520ee 100644 > >>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >>>> @@ -8,6 +8,20 @@ > >>>> #include <dt-bindings/mux/mux.h> > >>>> #include <dt-bindings/mux/ti-serdes.h> > >>>> > >>>> +/ { > >>>> + cmn_refclk: cmn-refclk { > >>>> + #clock-cells = <0>; > >>>> + compatible = "fixed-clock"; > >>>> + clock-frequency = <0>; > >>>> + }; > >>>> + > >>>> + cmn_refclk1: cmn-refclk1 { > >>> > >>> Just curious: why cant we use the standard nodenames with clock? > >> > >> We can use standard names here. Is there any defined nodename for > >> clocks? clk or clock? Don't see $nodename defined for clocks in > >> dt-schema repository. > > > > Looking at the fixed-clock example, lets go with clock > > Since I have two clocks here adding clock@0 and clock@1 introduces the > following error. > /home/a0393678/repos/linux-wip/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dt.yaml: > /: clock@0: 'anyOf' conditional failed, one must be fixed: > 'reg' is a required property > 'ranges' is a required property > > The current "fixed-clock" binding doesn't allow adding "reg" property. > We'll stick to non standard names? or do you think the binding has to be > fixed? Look at other fixed-clock examples in other arm64 examples https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm.dtsi#n147 is a good one.. Binding is fine, IMHO. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES 2021-05-17 14:05 ` Nishanth Menon @ 2021-05-20 13:18 ` Kishon Vijay Abraham I -1 siblings, 0 replies; 24+ messages in thread From: Kishon Vijay Abraham I @ 2021-05-20 13:18 UTC (permalink / raw) To: Nishanth Menon Cc: Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel, Lokesh Vutla Hi Nishanth, On 17/05/21 7:35 pm, Nishanth Menon wrote: > On 14:00-20210517, Kishon Vijay Abraham I wrote: >> Hi Nishanth, >> >> On 13/05/21 7:31 pm, Nishanth Menon wrote: >>> On 17:41-20210513, Kishon Vijay Abraham I wrote: >>>> Hi Nishanth, >>>> >>>> On 13/05/21 12:21 am, Nishanth Menon wrote: >>>>> On 20:42-20210512, Kishon Vijay Abraham I wrote: >>>>>> Rename the external refclk inputs to the SERDES from >>>>>> dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1 >>>>>> respectively. Also move the external refclk DT nodes outside the >>>>>> cbass_main DT node. Since in j721e common processor board, only the >>>>>> cmn_refclk1 is connected to 100MHz clock, fix the clock frequency. >>>>>> >>>>>> Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes") >>>>> >>>>> Assume we want this part of 5.13 fixes? >>>> >>>> This doesn't fix any functionality. Okay for me to go in 5.14 along with >>>> the rest of the series. >>> >>> >>>>> >>>>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> >>>>>> --- >>>>>> .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++ >>>>>> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 58 ++++++++++--------- >>>>>> 2 files changed, 34 insertions(+), 28 deletions(-) >>>>>> >>>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >>>>>> index 60764366e22b..86f7ab511ee8 100644 >>>>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >>>>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >>>>>> @@ -635,6 +635,10 @@ >>>>>> status = "disabled"; >>>>>> }; >>>>>> >>>>>> +&cmn_refclk1 { >>>>>> + clock-frequency = <100000000>; >>>>>> +}; >>>>>> + >>>>>> &serdes0 { >>>>>> serdes0_pcie_link: link@0 { >>>>>> reg = <0>; >>>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>>>>> index c2aa45a3ac79..002a0c1520ee 100644 >>>>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>>>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>>>>> @@ -8,6 +8,20 @@ >>>>>> #include <dt-bindings/mux/mux.h> >>>>>> #include <dt-bindings/mux/ti-serdes.h> >>>>>> >>>>>> +/ { >>>>>> + cmn_refclk: cmn-refclk { >>>>>> + #clock-cells = <0>; >>>>>> + compatible = "fixed-clock"; >>>>>> + clock-frequency = <0>; >>>>>> + }; >>>>>> + >>>>>> + cmn_refclk1: cmn-refclk1 { >>>>> >>>>> Just curious: why cant we use the standard nodenames with clock? >>>> >>>> We can use standard names here. Is there any defined nodename for >>>> clocks? clk or clock? Don't see $nodename defined for clocks in >>>> dt-schema repository. >>> >>> Looking at the fixed-clock example, lets go with clock >> >> Since I have two clocks here adding clock@0 and clock@1 introduces the >> following error. >> /home/a0393678/repos/linux-wip/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dt.yaml: >> /: clock@0: 'anyOf' conditional failed, one must be fixed: >> 'reg' is a required property >> 'ranges' is a required property >> >> The current "fixed-clock" binding doesn't allow adding "reg" property. >> We'll stick to non standard names? or do you think the binding has to be >> fixed? > > Look at other fixed-clock examples in other arm64 examples > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm.dtsi#n147 > is a good one.. Binding is fine, IMHO. Ah Thanks. It only has to be prefixed with clock-. Thanks Kishon ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES @ 2021-05-20 13:18 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 24+ messages in thread From: Kishon Vijay Abraham I @ 2021-05-20 13:18 UTC (permalink / raw) To: Nishanth Menon Cc: Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel, Lokesh Vutla Hi Nishanth, On 17/05/21 7:35 pm, Nishanth Menon wrote: > On 14:00-20210517, Kishon Vijay Abraham I wrote: >> Hi Nishanth, >> >> On 13/05/21 7:31 pm, Nishanth Menon wrote: >>> On 17:41-20210513, Kishon Vijay Abraham I wrote: >>>> Hi Nishanth, >>>> >>>> On 13/05/21 12:21 am, Nishanth Menon wrote: >>>>> On 20:42-20210512, Kishon Vijay Abraham I wrote: >>>>>> Rename the external refclk inputs to the SERDES from >>>>>> dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1 >>>>>> respectively. Also move the external refclk DT nodes outside the >>>>>> cbass_main DT node. Since in j721e common processor board, only the >>>>>> cmn_refclk1 is connected to 100MHz clock, fix the clock frequency. >>>>>> >>>>>> Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes") >>>>> >>>>> Assume we want this part of 5.13 fixes? >>>> >>>> This doesn't fix any functionality. Okay for me to go in 5.14 along with >>>> the rest of the series. >>> >>> >>>>> >>>>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> >>>>>> --- >>>>>> .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++ >>>>>> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 58 ++++++++++--------- >>>>>> 2 files changed, 34 insertions(+), 28 deletions(-) >>>>>> >>>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >>>>>> index 60764366e22b..86f7ab511ee8 100644 >>>>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >>>>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts >>>>>> @@ -635,6 +635,10 @@ >>>>>> status = "disabled"; >>>>>> }; >>>>>> >>>>>> +&cmn_refclk1 { >>>>>> + clock-frequency = <100000000>; >>>>>> +}; >>>>>> + >>>>>> &serdes0 { >>>>>> serdes0_pcie_link: link@0 { >>>>>> reg = <0>; >>>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>>>>> index c2aa45a3ac79..002a0c1520ee 100644 >>>>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>>>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi >>>>>> @@ -8,6 +8,20 @@ >>>>>> #include <dt-bindings/mux/mux.h> >>>>>> #include <dt-bindings/mux/ti-serdes.h> >>>>>> >>>>>> +/ { >>>>>> + cmn_refclk: cmn-refclk { >>>>>> + #clock-cells = <0>; >>>>>> + compatible = "fixed-clock"; >>>>>> + clock-frequency = <0>; >>>>>> + }; >>>>>> + >>>>>> + cmn_refclk1: cmn-refclk1 { >>>>> >>>>> Just curious: why cant we use the standard nodenames with clock? >>>> >>>> We can use standard names here. Is there any defined nodename for >>>> clocks? clk or clock? Don't see $nodename defined for clocks in >>>> dt-schema repository. >>> >>> Looking at the fixed-clock example, lets go with clock >> >> Since I have two clocks here adding clock@0 and clock@1 introduces the >> following error. >> /home/a0393678/repos/linux-wip/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dt.yaml: >> /: clock@0: 'anyOf' conditional failed, one must be fixed: >> 'reg' is a required property >> 'ranges' is a required property >> >> The current "fixed-clock" binding doesn't allow adding "reg" property. >> We'll stick to non standard names? or do you think the binding has to be >> fixed? > > Look at other fixed-clock examples in other arm64 examples > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm.dtsi#n147 > is a good one.. Binding is fine, IMHO. Ah Thanks. It only has to be prefixed with clock-. Thanks Kishon _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES 2021-05-20 13:18 ` Kishon Vijay Abraham I @ 2021-05-20 13:41 ` Nishanth Menon -1 siblings, 0 replies; 24+ messages in thread From: Nishanth Menon @ 2021-05-20 13:41 UTC (permalink / raw) To: Kishon Vijay Abraham I Cc: Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel, Lokesh Vutla On 18:48-20210520, Kishon Vijay Abraham I wrote: > Hi Nishanth, > > On 17/05/21 7:35 pm, Nishanth Menon wrote: > > On 14:00-20210517, Kishon Vijay Abraham I wrote: > >> Hi Nishanth, > >> > >> On 13/05/21 7:31 pm, Nishanth Menon wrote: > >>> On 17:41-20210513, Kishon Vijay Abraham I wrote: > >>>> Hi Nishanth, > >>>> > >>>> On 13/05/21 12:21 am, Nishanth Menon wrote: > >>>>> On 20:42-20210512, Kishon Vijay Abraham I wrote: > >>>>>> Rename the external refclk inputs to the SERDES from > >>>>>> dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1 > >>>>>> respectively. Also move the external refclk DT nodes outside the > >>>>>> cbass_main DT node. Since in j721e common processor board, only the > >>>>>> cmn_refclk1 is connected to 100MHz clock, fix the clock frequency. > >>>>>> > >>>>>> Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes") > >>>>> > >>>>> Assume we want this part of 5.13 fixes? > >>>> > >>>> This doesn't fix any functionality. Okay for me to go in 5.14 along with > >>>> the rest of the series. > >>> > >>> > >>>>> > >>>>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > >>>>>> --- > >>>>>> .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++ > >>>>>> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 58 ++++++++++--------- > >>>>>> 2 files changed, 34 insertions(+), 28 deletions(-) > >>>>>> > >>>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >>>>>> index 60764366e22b..86f7ab511ee8 100644 > >>>>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >>>>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >>>>>> @@ -635,6 +635,10 @@ > >>>>>> status = "disabled"; > >>>>>> }; > >>>>>> > >>>>>> +&cmn_refclk1 { > >>>>>> + clock-frequency = <100000000>; > >>>>>> +}; > >>>>>> + > >>>>>> &serdes0 { > >>>>>> serdes0_pcie_link: link@0 { > >>>>>> reg = <0>; > >>>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >>>>>> index c2aa45a3ac79..002a0c1520ee 100644 > >>>>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >>>>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >>>>>> @@ -8,6 +8,20 @@ > >>>>>> #include <dt-bindings/mux/mux.h> > >>>>>> #include <dt-bindings/mux/ti-serdes.h> > >>>>>> > >>>>>> +/ { > >>>>>> + cmn_refclk: cmn-refclk { > >>>>>> + #clock-cells = <0>; > >>>>>> + compatible = "fixed-clock"; > >>>>>> + clock-frequency = <0>; > >>>>>> + }; > >>>>>> + > >>>>>> + cmn_refclk1: cmn-refclk1 { > >>>>> > >>>>> Just curious: why cant we use the standard nodenames with clock? > >>>> > >>>> We can use standard names here. Is there any defined nodename for > >>>> clocks? clk or clock? Don't see $nodename defined for clocks in > >>>> dt-schema repository. > >>> > >>> Looking at the fixed-clock example, lets go with clock > >> > >> Since I have two clocks here adding clock@0 and clock@1 introduces the > >> following error. > >> /home/a0393678/repos/linux-wip/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dt.yaml: > >> /: clock@0: 'anyOf' conditional failed, one must be fixed: > >> 'reg' is a required property > >> 'ranges' is a required property > >> > >> The current "fixed-clock" binding doesn't allow adding "reg" property. > >> We'll stick to non standard names? or do you think the binding has to be > >> fixed? > > > > Look at other fixed-clock examples in other arm64 examples > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm.dtsi#n147 > > is a good one.. Binding is fine, IMHO. > > Ah Thanks. It only has to be prefixed with clock-. Yep - also, though I think it is self evident, I will explicitly state as well: since dts should represent hardware, using names like "dummy" does'nt belong to dts - it would indicate something of a software construct. Knowing what you are trying to describe, I do understand it is not a "software construct", but please avoid using similar naming which may create misunderstanding. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES @ 2021-05-20 13:41 ` Nishanth Menon 0 siblings, 0 replies; 24+ messages in thread From: Nishanth Menon @ 2021-05-20 13:41 UTC (permalink / raw) To: Kishon Vijay Abraham I Cc: Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel, Lokesh Vutla On 18:48-20210520, Kishon Vijay Abraham I wrote: > Hi Nishanth, > > On 17/05/21 7:35 pm, Nishanth Menon wrote: > > On 14:00-20210517, Kishon Vijay Abraham I wrote: > >> Hi Nishanth, > >> > >> On 13/05/21 7:31 pm, Nishanth Menon wrote: > >>> On 17:41-20210513, Kishon Vijay Abraham I wrote: > >>>> Hi Nishanth, > >>>> > >>>> On 13/05/21 12:21 am, Nishanth Menon wrote: > >>>>> On 20:42-20210512, Kishon Vijay Abraham I wrote: > >>>>>> Rename the external refclk inputs to the SERDES from > >>>>>> dummy_cmn_refclk/dummy_cmn_refclk1 to cmn_refclk/cmn_refclk1 > >>>>>> respectively. Also move the external refclk DT nodes outside the > >>>>>> cbass_main DT node. Since in j721e common processor board, only the > >>>>>> cmn_refclk1 is connected to 100MHz clock, fix the clock frequency. > >>>>>> > >>>>>> Fixes: afd094ebe69f ("arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes") > >>>>> > >>>>> Assume we want this part of 5.13 fixes? > >>>> > >>>> This doesn't fix any functionality. Okay for me to go in 5.14 along with > >>>> the rest of the series. > >>> > >>> > >>>>> > >>>>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > >>>>>> --- > >>>>>> .../dts/ti/k3-j721e-common-proc-board.dts | 4 ++ > >>>>>> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 58 ++++++++++--------- > >>>>>> 2 files changed, 34 insertions(+), 28 deletions(-) > >>>>>> > >>>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >>>>>> index 60764366e22b..86f7ab511ee8 100644 > >>>>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >>>>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > >>>>>> @@ -635,6 +635,10 @@ > >>>>>> status = "disabled"; > >>>>>> }; > >>>>>> > >>>>>> +&cmn_refclk1 { > >>>>>> + clock-frequency = <100000000>; > >>>>>> +}; > >>>>>> + > >>>>>> &serdes0 { > >>>>>> serdes0_pcie_link: link@0 { > >>>>>> reg = <0>; > >>>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >>>>>> index c2aa45a3ac79..002a0c1520ee 100644 > >>>>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >>>>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > >>>>>> @@ -8,6 +8,20 @@ > >>>>>> #include <dt-bindings/mux/mux.h> > >>>>>> #include <dt-bindings/mux/ti-serdes.h> > >>>>>> > >>>>>> +/ { > >>>>>> + cmn_refclk: cmn-refclk { > >>>>>> + #clock-cells = <0>; > >>>>>> + compatible = "fixed-clock"; > >>>>>> + clock-frequency = <0>; > >>>>>> + }; > >>>>>> + > >>>>>> + cmn_refclk1: cmn-refclk1 { > >>>>> > >>>>> Just curious: why cant we use the standard nodenames with clock? > >>>> > >>>> We can use standard names here. Is there any defined nodename for > >>>> clocks? clk or clock? Don't see $nodename defined for clocks in > >>>> dt-schema repository. > >>> > >>> Looking at the fixed-clock example, lets go with clock > >> > >> Since I have two clocks here adding clock@0 and clock@1 introduces the > >> following error. > >> /home/a0393678/repos/linux-wip/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dt.yaml: > >> /: clock@0: 'anyOf' conditional failed, one must be fixed: > >> 'reg' is a required property > >> 'ranges' is a required property > >> > >> The current "fixed-clock" binding doesn't allow adding "reg" property. > >> We'll stick to non standard names? or do you think the binding has to be > >> fixed? > > > > Look at other fixed-clock examples in other arm64 examples > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm.dtsi#n147 > > is a good one.. Binding is fine, IMHO. > > Ah Thanks. It only has to be prefixed with clock-. Yep - also, though I think it is self evident, I will explicitly state as well: since dts should represent hardware, using names like "dummy" does'nt belong to dts - it would indicate something of a software construct. Knowing what you are trying to describe, I do understand it is not a "software construct", but please avoid using similar naming which may create misunderstanding. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 2/4] arm64: dts: ti: k3-j721e-main: Add #clock-cells property to serdes DT node 2021-05-12 15:12 ` Kishon Vijay Abraham I @ 2021-05-12 15:12 ` Kishon Vijay Abraham I -1 siblings, 0 replies; 24+ messages in thread From: Kishon Vijay Abraham I @ 2021-05-12 15:12 UTC (permalink / raw) To: Nishanth Menon, Tero Kristo, Rob Herring Cc: linux-arm-kernel, devicetree, linux-kernel, Kishon Vijay Abraham I, Lokesh Vutla Add #clock-cells property to serdes DT node since the serdes is also now modeled as a clock provider and include the input clocks "pll0_refclk" and "pll1_refclk" which are parents to the clocks modeled by serdes. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 002a0c1520ee..cccd9fc966bb 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -400,10 +400,11 @@ reg = <0x5000000 0x10000>; #address-cells = <1>; #size-cells = <0>; + #clock-cells = <1>; resets = <&serdes_wiz0 0>; reset-names = "sierra_reset"; - clocks = <&wiz0_cmn_refclk_dig_div>, <&wiz0_cmn_refclk1_dig_div>; - clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div"; + clocks = <&wiz0_cmn_refclk_dig_div>, <&wiz0_cmn_refclk1_dig_div>, <&wiz0_pll0_refclk>, <&wiz0_pll1_refclk>; + clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div", "pll0_refclk", "pll1_refclk"; }; }; @@ -457,10 +458,11 @@ reg = <0x5010000 0x10000>; #address-cells = <1>; #size-cells = <0>; + #clock-cells = <1>; resets = <&serdes_wiz1 0>; reset-names = "sierra_reset"; - clocks = <&wiz1_cmn_refclk_dig_div>, <&wiz1_cmn_refclk1_dig_div>; - clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div"; + clocks = <&wiz1_cmn_refclk_dig_div>, <&wiz1_cmn_refclk1_dig_div>, <&wiz1_pll0_refclk>, <&wiz1_pll1_refclk>; + clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div", "pll0_refclk", "pll1_refclk"; }; }; @@ -514,10 +516,11 @@ reg = <0x5020000 0x10000>; #address-cells = <1>; #size-cells = <0>; + #clock-cells = <1>; resets = <&serdes_wiz2 0>; reset-names = "sierra_reset"; - clocks = <&wiz2_cmn_refclk_dig_div>, <&wiz2_cmn_refclk1_dig_div>; - clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div"; + clocks = <&wiz2_cmn_refclk_dig_div>, <&wiz2_cmn_refclk1_dig_div>, <&wiz2_pll0_refclk>, <&wiz2_pll1_refclk>; + clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div", "pll0_refclk", "pll1_refclk"; }; }; @@ -571,10 +574,11 @@ reg = <0x5030000 0x10000>; #address-cells = <1>; #size-cells = <0>; + #clock-cells = <1>; resets = <&serdes_wiz3 0>; reset-names = "sierra_reset"; - clocks = <&wiz3_cmn_refclk_dig_div>, <&wiz3_cmn_refclk1_dig_div>; - clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div"; + clocks = <&wiz3_cmn_refclk_dig_div>, <&wiz3_cmn_refclk1_dig_div>, <&wiz3_pll0_refclk>, <&wiz3_pll1_refclk>; + clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div", "pll0_refclk", "pll1_refclk"; }; }; -- 2.17.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 2/4] arm64: dts: ti: k3-j721e-main: Add #clock-cells property to serdes DT node @ 2021-05-12 15:12 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 24+ messages in thread From: Kishon Vijay Abraham I @ 2021-05-12 15:12 UTC (permalink / raw) To: Nishanth Menon, Tero Kristo, Rob Herring Cc: linux-arm-kernel, devicetree, linux-kernel, Kishon Vijay Abraham I, Lokesh Vutla Add #clock-cells property to serdes DT node since the serdes is also now modeled as a clock provider and include the input clocks "pll0_refclk" and "pll1_refclk" which are parents to the clocks modeled by serdes. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 002a0c1520ee..cccd9fc966bb 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -400,10 +400,11 @@ reg = <0x5000000 0x10000>; #address-cells = <1>; #size-cells = <0>; + #clock-cells = <1>; resets = <&serdes_wiz0 0>; reset-names = "sierra_reset"; - clocks = <&wiz0_cmn_refclk_dig_div>, <&wiz0_cmn_refclk1_dig_div>; - clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div"; + clocks = <&wiz0_cmn_refclk_dig_div>, <&wiz0_cmn_refclk1_dig_div>, <&wiz0_pll0_refclk>, <&wiz0_pll1_refclk>; + clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div", "pll0_refclk", "pll1_refclk"; }; }; @@ -457,10 +458,11 @@ reg = <0x5010000 0x10000>; #address-cells = <1>; #size-cells = <0>; + #clock-cells = <1>; resets = <&serdes_wiz1 0>; reset-names = "sierra_reset"; - clocks = <&wiz1_cmn_refclk_dig_div>, <&wiz1_cmn_refclk1_dig_div>; - clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div"; + clocks = <&wiz1_cmn_refclk_dig_div>, <&wiz1_cmn_refclk1_dig_div>, <&wiz1_pll0_refclk>, <&wiz1_pll1_refclk>; + clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div", "pll0_refclk", "pll1_refclk"; }; }; @@ -514,10 +516,11 @@ reg = <0x5020000 0x10000>; #address-cells = <1>; #size-cells = <0>; + #clock-cells = <1>; resets = <&serdes_wiz2 0>; reset-names = "sierra_reset"; - clocks = <&wiz2_cmn_refclk_dig_div>, <&wiz2_cmn_refclk1_dig_div>; - clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div"; + clocks = <&wiz2_cmn_refclk_dig_div>, <&wiz2_cmn_refclk1_dig_div>, <&wiz2_pll0_refclk>, <&wiz2_pll1_refclk>; + clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div", "pll0_refclk", "pll1_refclk"; }; }; @@ -571,10 +574,11 @@ reg = <0x5030000 0x10000>; #address-cells = <1>; #size-cells = <0>; + #clock-cells = <1>; resets = <&serdes_wiz3 0>; reset-names = "sierra_reset"; - clocks = <&wiz3_cmn_refclk_dig_div>, <&wiz3_cmn_refclk1_dig_div>; - clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div"; + clocks = <&wiz3_cmn_refclk_dig_div>, <&wiz3_cmn_refclk1_dig_div>, <&wiz3_pll0_refclk>, <&wiz3_pll1_refclk>; + clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div", "pll0_refclk", "pll1_refclk"; }; }; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 3/4] arm64: dts: ti: k3-j721e-common-proc-board: Use external clock for SERDES 2021-05-12 15:12 ` Kishon Vijay Abraham I @ 2021-05-12 15:12 ` Kishon Vijay Abraham I -1 siblings, 0 replies; 24+ messages in thread From: Kishon Vijay Abraham I @ 2021-05-12 15:12 UTC (permalink / raw) To: Nishanth Menon, Tero Kristo, Rob Herring Cc: linux-arm-kernel, devicetree, linux-kernel, Kishon Vijay Abraham I, Lokesh Vutla Use external clock for all the SERDES used by PCIe controller. This will make the same clock used by the local SERDES as well as the clock provided to the PCIe connector. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- .../dts/ti/k3-j721e-common-proc-board.dts | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 86f7ab511ee8..1b25a5ae9635 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -9,6 +9,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/net/ti-dp83867.h> +#include <dt-bindings/phy/phy-cadence.h> / { chosen { @@ -639,7 +640,40 @@ clock-frequency = <100000000>; }; +&wiz0_pll1_refclk { + assigned-clocks = <&wiz0_pll1_refclk>; + assigned-clock-parents = <&cmn_refclk1>; +}; + +&wiz0_refclk_dig { + assigned-clocks = <&wiz0_refclk_dig>; + assigned-clock-parents = <&cmn_refclk1>; +}; + +&wiz1_pll1_refclk { + assigned-clocks = <&wiz1_pll1_refclk>; + assigned-clock-parents = <&cmn_refclk1>; +}; + +&wiz1_refclk_dig { + assigned-clocks = <&wiz1_refclk_dig>; + assigned-clock-parents = <&cmn_refclk1>; +}; + +&wiz2_pll1_refclk { + assigned-clocks = <&wiz2_pll1_refclk>; + assigned-clock-parents = <&cmn_refclk1>; +}; + +&wiz2_refclk_dig { + assigned-clocks = <&wiz2_refclk_dig>; + assigned-clock-parents = <&cmn_refclk1>; +}; + &serdes0 { + assigned-clocks = <&serdes0 CDNS_SIERRA_PLL_CMNLC>; + assigned-clock-parents = <&wiz0_pll1_refclk>; + serdes0_pcie_link: link@0 { reg = <0>; cdns,num-lanes = <1>; @@ -650,6 +684,9 @@ }; &serdes1 { + assigned-clocks = <&serdes1 CDNS_SIERRA_PLL_CMNLC>; + assigned-clock-parents = <&wiz1_pll1_refclk>; + serdes1_pcie_link: link@0 { reg = <0>; cdns,num-lanes = <2>; @@ -660,6 +697,9 @@ }; &serdes2 { + assigned-clocks = <&serdes2 CDNS_SIERRA_PLL_CMNLC>; + assigned-clock-parents = <&wiz2_pll1_refclk>; + serdes2_pcie_link: link@0 { reg = <0>; cdns,num-lanes = <2>; -- 2.17.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 3/4] arm64: dts: ti: k3-j721e-common-proc-board: Use external clock for SERDES @ 2021-05-12 15:12 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 24+ messages in thread From: Kishon Vijay Abraham I @ 2021-05-12 15:12 UTC (permalink / raw) To: Nishanth Menon, Tero Kristo, Rob Herring Cc: linux-arm-kernel, devicetree, linux-kernel, Kishon Vijay Abraham I, Lokesh Vutla Use external clock for all the SERDES used by PCIe controller. This will make the same clock used by the local SERDES as well as the clock provided to the PCIe connector. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- .../dts/ti/k3-j721e-common-proc-board.dts | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 86f7ab511ee8..1b25a5ae9635 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -9,6 +9,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/net/ti-dp83867.h> +#include <dt-bindings/phy/phy-cadence.h> / { chosen { @@ -639,7 +640,40 @@ clock-frequency = <100000000>; }; +&wiz0_pll1_refclk { + assigned-clocks = <&wiz0_pll1_refclk>; + assigned-clock-parents = <&cmn_refclk1>; +}; + +&wiz0_refclk_dig { + assigned-clocks = <&wiz0_refclk_dig>; + assigned-clock-parents = <&cmn_refclk1>; +}; + +&wiz1_pll1_refclk { + assigned-clocks = <&wiz1_pll1_refclk>; + assigned-clock-parents = <&cmn_refclk1>; +}; + +&wiz1_refclk_dig { + assigned-clocks = <&wiz1_refclk_dig>; + assigned-clock-parents = <&cmn_refclk1>; +}; + +&wiz2_pll1_refclk { + assigned-clocks = <&wiz2_pll1_refclk>; + assigned-clock-parents = <&cmn_refclk1>; +}; + +&wiz2_refclk_dig { + assigned-clocks = <&wiz2_refclk_dig>; + assigned-clock-parents = <&cmn_refclk1>; +}; + &serdes0 { + assigned-clocks = <&serdes0 CDNS_SIERRA_PLL_CMNLC>; + assigned-clock-parents = <&wiz0_pll1_refclk>; + serdes0_pcie_link: link@0 { reg = <0>; cdns,num-lanes = <1>; @@ -650,6 +684,9 @@ }; &serdes1 { + assigned-clocks = <&serdes1 CDNS_SIERRA_PLL_CMNLC>; + assigned-clock-parents = <&wiz1_pll1_refclk>; + serdes1_pcie_link: link@0 { reg = <0>; cdns,num-lanes = <2>; @@ -660,6 +697,9 @@ }; &serdes2 { + assigned-clocks = <&serdes2 CDNS_SIERRA_PLL_CMNLC>; + assigned-clock-parents = <&wiz2_pll1_refclk>; + serdes2_pcie_link: link@0 { reg = <0>; cdns,num-lanes = <2>; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 4/4] arm64: dts: ti: k3-j721e-common-proc-board: Re-name "link" name as "phy" 2021-05-12 15:12 ` Kishon Vijay Abraham I @ 2021-05-12 15:12 ` Kishon Vijay Abraham I -1 siblings, 0 replies; 24+ messages in thread From: Kishon Vijay Abraham I @ 2021-05-12 15:12 UTC (permalink / raw) To: Nishanth Menon, Tero Kristo, Rob Herring Cc: linux-arm-kernel, devicetree, linux-kernel, Kishon Vijay Abraham I, Lokesh Vutla Commit 66db854b1f62d ("arm64: dts: ti: k3-j721e-common-proc-board: Configure the PCIe instances") and commit 02c35dca2b488 ("arm64: dts: ti: k3-j721e: Enable Super-Speed support for USB0") added PHY DT nodes with node name as "link" However nodes with #phy-cells should be named 'phy' as discussed in [1]. Re-name subnodes of serdes in J721E to 'phy'. [1] -> http://lore.kernel.org/r/20200909203631.GA3026331@bogus Fixes: 66db854b1f62d ("arm64: dts: ti: k3-j721e-common-proc-board: Configure the PCIe instances") Fixes: 02c35dca2b488 ("arm64: dts: ti: k3-j721e: Enable Super-Speed support for USB0") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 1b25a5ae9635..ffccbc53f1e7 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -359,7 +359,7 @@ }; &serdes3 { - serdes3_usb_link: link@0 { + serdes3_usb_link: phy@0 { reg = <0>; cdns,num-lanes = <2>; #phy-cells = <0>; @@ -674,7 +674,7 @@ assigned-clocks = <&serdes0 CDNS_SIERRA_PLL_CMNLC>; assigned-clock-parents = <&wiz0_pll1_refclk>; - serdes0_pcie_link: link@0 { + serdes0_pcie_link: phy@0 { reg = <0>; cdns,num-lanes = <1>; #phy-cells = <0>; @@ -687,7 +687,7 @@ assigned-clocks = <&serdes1 CDNS_SIERRA_PLL_CMNLC>; assigned-clock-parents = <&wiz1_pll1_refclk>; - serdes1_pcie_link: link@0 { + serdes1_pcie_link: phy@0 { reg = <0>; cdns,num-lanes = <2>; #phy-cells = <0>; @@ -700,7 +700,7 @@ assigned-clocks = <&serdes2 CDNS_SIERRA_PLL_CMNLC>; assigned-clock-parents = <&wiz2_pll1_refclk>; - serdes2_pcie_link: link@0 { + serdes2_pcie_link: phy@0 { reg = <0>; cdns,num-lanes = <2>; #phy-cells = <0>; -- 2.17.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 4/4] arm64: dts: ti: k3-j721e-common-proc-board: Re-name "link" name as "phy" @ 2021-05-12 15:12 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 24+ messages in thread From: Kishon Vijay Abraham I @ 2021-05-12 15:12 UTC (permalink / raw) To: Nishanth Menon, Tero Kristo, Rob Herring Cc: linux-arm-kernel, devicetree, linux-kernel, Kishon Vijay Abraham I, Lokesh Vutla Commit 66db854b1f62d ("arm64: dts: ti: k3-j721e-common-proc-board: Configure the PCIe instances") and commit 02c35dca2b488 ("arm64: dts: ti: k3-j721e: Enable Super-Speed support for USB0") added PHY DT nodes with node name as "link" However nodes with #phy-cells should be named 'phy' as discussed in [1]. Re-name subnodes of serdes in J721E to 'phy'. [1] -> http://lore.kernel.org/r/20200909203631.GA3026331@bogus Fixes: 66db854b1f62d ("arm64: dts: ti: k3-j721e-common-proc-board: Configure the PCIe instances") Fixes: 02c35dca2b488 ("arm64: dts: ti: k3-j721e: Enable Super-Speed support for USB0") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 1b25a5ae9635..ffccbc53f1e7 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -359,7 +359,7 @@ }; &serdes3 { - serdes3_usb_link: link@0 { + serdes3_usb_link: phy@0 { reg = <0>; cdns,num-lanes = <2>; #phy-cells = <0>; @@ -674,7 +674,7 @@ assigned-clocks = <&serdes0 CDNS_SIERRA_PLL_CMNLC>; assigned-clock-parents = <&wiz0_pll1_refclk>; - serdes0_pcie_link: link@0 { + serdes0_pcie_link: phy@0 { reg = <0>; cdns,num-lanes = <1>; #phy-cells = <0>; @@ -687,7 +687,7 @@ assigned-clocks = <&serdes1 CDNS_SIERRA_PLL_CMNLC>; assigned-clock-parents = <&wiz1_pll1_refclk>; - serdes1_pcie_link: link@0 { + serdes1_pcie_link: phy@0 { reg = <0>; cdns,num-lanes = <2>; #phy-cells = <0>; @@ -700,7 +700,7 @@ assigned-clocks = <&serdes2 CDNS_SIERRA_PLL_CMNLC>; assigned-clock-parents = <&wiz2_pll1_refclk>; - serdes2_pcie_link: link@0 { + serdes2_pcie_link: phy@0 { reg = <0>; cdns,num-lanes = <2>; #phy-cells = <0>; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 24+ messages in thread
end of thread, other threads:[~2021-05-20 13:43 UTC | newest] Thread overview: 24+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-05-12 15:12 [PATCH 0/4] J721E: Use external clock in EVM for SERDES Kishon Vijay Abraham I 2021-05-12 15:12 ` Kishon Vijay Abraham I 2021-05-12 15:12 ` [PATCH 1/4] arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES Kishon Vijay Abraham I 2021-05-12 15:12 ` Kishon Vijay Abraham I 2021-05-12 18:51 ` Nishanth Menon 2021-05-12 18:51 ` Nishanth Menon 2021-05-13 12:11 ` Kishon Vijay Abraham I 2021-05-13 12:11 ` Kishon Vijay Abraham I 2021-05-13 14:01 ` Nishanth Menon 2021-05-13 14:01 ` Nishanth Menon 2021-05-17 8:30 ` Kishon Vijay Abraham I 2021-05-17 8:30 ` Kishon Vijay Abraham I 2021-05-17 14:05 ` Nishanth Menon 2021-05-17 14:05 ` Nishanth Menon 2021-05-20 13:18 ` Kishon Vijay Abraham I 2021-05-20 13:18 ` Kishon Vijay Abraham I 2021-05-20 13:41 ` Nishanth Menon 2021-05-20 13:41 ` Nishanth Menon 2021-05-12 15:12 ` [PATCH 2/4] arm64: dts: ti: k3-j721e-main: Add #clock-cells property to serdes DT node Kishon Vijay Abraham I 2021-05-12 15:12 ` Kishon Vijay Abraham I 2021-05-12 15:12 ` [PATCH 3/4] arm64: dts: ti: k3-j721e-common-proc-board: Use external clock for SERDES Kishon Vijay Abraham I 2021-05-12 15:12 ` Kishon Vijay Abraham I 2021-05-12 15:12 ` [PATCH 4/4] arm64: dts: ti: k3-j721e-common-proc-board: Re-name "link" name as "phy" Kishon Vijay Abraham I 2021-05-12 15:12 ` Kishon Vijay Abraham I
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