* [PATCH 1/2] dt-bindings: power: Add MT8365 power domains @ 2021-05-18 19:40 ` Fabien Parent 0 siblings, 0 replies; 9+ messages in thread From: Fabien Parent @ 2021-05-18 19:40 UTC (permalink / raw) To: Rob Herring, Matthias Brugger, Weiyi Lu Cc: mkorpershoek, Fabien Parent, Matthias Brugger, devicetree, linux-kernel, linux-arm-kernel, linux-mediatek Add power domains dt-bindings for MT8365. Signed-off-by: Fabien Parent <fparent@baylibre.com> --- .../power/mediatek,power-controller.yaml | 2 ++ include/dt-bindings/power/mt8365-power.h | 20 +++++++++++++++++++ 2 files changed, 22 insertions(+) create mode 100644 include/dt-bindings/power/mt8365-power.h diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml index f234a756c193..9a26a2cee7fb 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -27,6 +27,7 @@ properties: - mediatek,mt8173-power-controller - mediatek,mt8183-power-controller - mediatek,mt8192-power-controller + - mediatek,mt8365-power-controller '#power-domain-cells': const: 1 @@ -64,6 +65,7 @@ patternProperties: "include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain. "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain. "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain. + "include/dt-bindings/power/mt8365-power.h" - for MT8365 type power domain. maxItems: 1 clocks: diff --git a/include/dt-bindings/power/mt8365-power.h b/include/dt-bindings/power/mt8365-power.h new file mode 100644 index 000000000000..352440c4b5dd --- /dev/null +++ b/include/dt-bindings/power/mt8365-power.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2021 MediaTek Inc. + */ + +#ifndef _DT_BINDINGS_POWER_MT8365_POWER_H +#define _DT_BINDINGS_POWER_MT8365_POWER_H + +#define MT8365_POWER_DOMAIN_DISP 0 +#define MT8365_POWER_DOMAIN_CONN 1 +#define MT8365_POWER_DOMAIN_MFG 2 +#define MT8365_POWER_DOMAIN_AUDIO 3 +#define MT8365_POWER_DOMAIN_CAM 4 +#define MT8365_POWER_DOMAIN_DSP 5 +#define MT8365_POWER_DOMAIN_VDEC 6 +#define MT8365_POWER_DOMAIN_VENC 7 +#define MT8365_POWER_DOMAIN_APU 8 + +#endif /* _DT_BINDINGS_POWER_MT8365_POWER_H */ + -- 2.31.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 1/2] dt-bindings: power: Add MT8365 power domains @ 2021-05-18 19:40 ` Fabien Parent 0 siblings, 0 replies; 9+ messages in thread From: Fabien Parent @ 2021-05-18 19:40 UTC (permalink / raw) To: Rob Herring, Matthias Brugger, Weiyi Lu Cc: mkorpershoek, Fabien Parent, Matthias Brugger, devicetree, linux-kernel, linux-arm-kernel, linux-mediatek Add power domains dt-bindings for MT8365. Signed-off-by: Fabien Parent <fparent@baylibre.com> --- .../power/mediatek,power-controller.yaml | 2 ++ include/dt-bindings/power/mt8365-power.h | 20 +++++++++++++++++++ 2 files changed, 22 insertions(+) create mode 100644 include/dt-bindings/power/mt8365-power.h diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml index f234a756c193..9a26a2cee7fb 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -27,6 +27,7 @@ properties: - mediatek,mt8173-power-controller - mediatek,mt8183-power-controller - mediatek,mt8192-power-controller + - mediatek,mt8365-power-controller '#power-domain-cells': const: 1 @@ -64,6 +65,7 @@ patternProperties: "include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain. "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain. "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain. + "include/dt-bindings/power/mt8365-power.h" - for MT8365 type power domain. maxItems: 1 clocks: diff --git a/include/dt-bindings/power/mt8365-power.h b/include/dt-bindings/power/mt8365-power.h new file mode 100644 index 000000000000..352440c4b5dd --- /dev/null +++ b/include/dt-bindings/power/mt8365-power.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2021 MediaTek Inc. + */ + +#ifndef _DT_BINDINGS_POWER_MT8365_POWER_H +#define _DT_BINDINGS_POWER_MT8365_POWER_H + +#define MT8365_POWER_DOMAIN_DISP 0 +#define MT8365_POWER_DOMAIN_CONN 1 +#define MT8365_POWER_DOMAIN_MFG 2 +#define MT8365_POWER_DOMAIN_AUDIO 3 +#define MT8365_POWER_DOMAIN_CAM 4 +#define MT8365_POWER_DOMAIN_DSP 5 +#define MT8365_POWER_DOMAIN_VDEC 6 +#define MT8365_POWER_DOMAIN_VENC 7 +#define MT8365_POWER_DOMAIN_APU 8 + +#endif /* _DT_BINDINGS_POWER_MT8365_POWER_H */ + -- 2.31.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 1/2] dt-bindings: power: Add MT8365 power domains @ 2021-05-18 19:40 ` Fabien Parent 0 siblings, 0 replies; 9+ messages in thread From: Fabien Parent @ 2021-05-18 19:40 UTC (permalink / raw) To: Rob Herring, Matthias Brugger, Weiyi Lu Cc: mkorpershoek, Fabien Parent, Matthias Brugger, devicetree, linux-kernel, linux-arm-kernel, linux-mediatek Add power domains dt-bindings for MT8365. Signed-off-by: Fabien Parent <fparent@baylibre.com> --- .../power/mediatek,power-controller.yaml | 2 ++ include/dt-bindings/power/mt8365-power.h | 20 +++++++++++++++++++ 2 files changed, 22 insertions(+) create mode 100644 include/dt-bindings/power/mt8365-power.h diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml index f234a756c193..9a26a2cee7fb 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -27,6 +27,7 @@ properties: - mediatek,mt8173-power-controller - mediatek,mt8183-power-controller - mediatek,mt8192-power-controller + - mediatek,mt8365-power-controller '#power-domain-cells': const: 1 @@ -64,6 +65,7 @@ patternProperties: "include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain. "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain. "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain. + "include/dt-bindings/power/mt8365-power.h" - for MT8365 type power domain. maxItems: 1 clocks: diff --git a/include/dt-bindings/power/mt8365-power.h b/include/dt-bindings/power/mt8365-power.h new file mode 100644 index 000000000000..352440c4b5dd --- /dev/null +++ b/include/dt-bindings/power/mt8365-power.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2021 MediaTek Inc. + */ + +#ifndef _DT_BINDINGS_POWER_MT8365_POWER_H +#define _DT_BINDINGS_POWER_MT8365_POWER_H + +#define MT8365_POWER_DOMAIN_DISP 0 +#define MT8365_POWER_DOMAIN_CONN 1 +#define MT8365_POWER_DOMAIN_MFG 2 +#define MT8365_POWER_DOMAIN_AUDIO 3 +#define MT8365_POWER_DOMAIN_CAM 4 +#define MT8365_POWER_DOMAIN_DSP 5 +#define MT8365_POWER_DOMAIN_VDEC 6 +#define MT8365_POWER_DOMAIN_VENC 7 +#define MT8365_POWER_DOMAIN_APU 8 + +#endif /* _DT_BINDINGS_POWER_MT8365_POWER_H */ + -- 2.31.1 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/2] soc: mediatek: pm-domains: Add support for MT8365 2021-05-18 19:40 ` Fabien Parent (?) @ 2021-05-18 19:40 ` Fabien Parent -1 siblings, 0 replies; 9+ messages in thread From: Fabien Parent @ 2021-05-18 19:40 UTC (permalink / raw) To: Matthias Brugger Cc: mkorpershoek, Fabien Parent, linux-kernel, linux-arm-kernel, linux-mediatek Add the needed board data to support MT8365 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> --- drivers/soc/mediatek/mt8365-pm-domains.h | 129 +++++++++++++++++++++++ drivers/soc/mediatek/mtk-pm-domains.c | 5 + 2 files changed, 134 insertions(+) create mode 100644 drivers/soc/mediatek/mt8365-pm-domains.h diff --git a/drivers/soc/mediatek/mt8365-pm-domains.h b/drivers/soc/mediatek/mt8365-pm-domains.h new file mode 100644 index 000000000000..964387967888 --- /dev/null +++ b/drivers/soc/mediatek/mt8365-pm-domains.h @@ -0,0 +1,129 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __SOC_MEDIATEK_MT8365_PM_DOMAINS_H +#define __SOC_MEDIATEK_MT8365_PM_DOMAINS_H + +#include "mtk-pm-domains.h" +#include <dt-bindings/power/mt8365-power.h> + +/* + * MT8365 power domain support + */ + +static const struct scpsys_domain_data scpsys_domain_data_mt8365[] = { + [MT8365_POWER_DOMAIN_DISP] = { + .name = "disp", + .sta_mask = PWR_STATUS_DISP, + .ctl_offs = 0x30c, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .bp_infracfg = { + BUS_PROT_WR(BIT(16) | BIT(17), 0x2a8, 0x2ac, 0x258), + BUS_PROT_WR(BIT(1) | BIT(2) | BIT(10) | BIT(11), 0x2a0, 0x2a4, 0x228), + BUS_PROT_WR_IGN(BIT(5), 0x0, 0x234, 0x28), + BUS_PROT_WR(BIT(6), 0x2a0, 0x2a4, 0x228), + }, + }, + [MT8365_POWER_DOMAIN_VENC] = { + .name = "venc", + .sta_mask = PWR_STATUS_VENC, + .ctl_offs = 0x0304, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .bp_smi = { + BUS_PROT_WR(BIT(1), 0x3c4, 0x3c8, 0x3c0), + }, + }, + [MT8365_POWER_DOMAIN_AUDIO] = { + .name = "audio", + .sta_mask = PWR_STATUS_AUDIO, + .ctl_offs = 0x0314, + .sram_pdn_bits = GENMASK(12, 8), + .sram_pdn_ack_bits = GENMASK(17, 13), + .bp_infracfg = { + BUS_PROT_WR(BIT(27) | BIT(28), 0x2a8, 0x2ac, 0x258), + }, + .caps = MTK_SCPD_ACTIVE_WAKEUP, + }, + [MT8365_POWER_DOMAIN_CONN] = { + .name = "conn", + .sta_mask = PWR_STATUS_CONN, + .ctl_offs = 0x032c, + .sram_pdn_bits = 0, + .sram_pdn_ack_bits = 0, + .bp_infracfg = { + BUS_PROT_WR(BIT(13), 0x2a0, 0x2a4, 0x228), + BUS_PROT_WR(BIT(18), 0x2a8, 0x2ac, 0x258), + BUS_PROT_WR(BIT(14), 0x2a0, 0x2a4, 0x228), + BUS_PROT_WR(BIT(21), 0x2a8, 0x2ac, 0x258), + }, + .caps = MTK_SCPD_ACTIVE_WAKEUP | MTK_SCPD_KEEP_DEFAULT_OFF, + }, + [MT8365_POWER_DOMAIN_MFG] = { + .name = "mfg", + .sta_mask = PWR_STATUS_MFG, + .ctl_offs = 0x0338, + .sram_pdn_bits = GENMASK(9, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + .bp_infracfg = { + BUS_PROT_WR(BIT(25), 0x2a0, 0x2a4, 0x228), + BUS_PROT_WR(BIT(21) | BIT(22), 0x2a0, 0x2a4, 0x228), + }, + }, + [MT8365_POWER_DOMAIN_CAM] = { + .name = "cam", + .sta_mask = BIT(25), + .ctl_offs = 0x0344, + .sram_pdn_bits = GENMASK(9, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + .bp_infracfg = { + BUS_PROT_WR(BIT(19), 0x2a8, 0x2ac, 0x258), + }, + .bp_smi = { + BUS_PROT_WR(BIT(2), 0x3c4, 0x3c8, 0x3c0), + }, + }, + [MT8365_POWER_DOMAIN_VDEC] = { + .name = "vdec", + .sta_mask = BIT(31), + .ctl_offs = 0x0370, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .bp_smi = { + BUS_PROT_WR(BIT(3), 0x3c4, 0x3c8, 0x3c0), + }, + }, + [MT8365_POWER_DOMAIN_APU] = { + .name = "apu", + .sta_mask = BIT(16), + .ctl_offs = 0x0378, + .sram_pdn_bits = GENMASK(14, 8), + .sram_pdn_ack_bits = GENMASK(21, 15), + .bp_infracfg = { + BUS_PROT_WR(BIT(2) | BIT(20), 0x2a8, 0x2ac, 0x258), + }, + .bp_smi = { + BUS_PROT_WR(BIT(4), 0x3c4, 0x3c8, 0x3c0), + }, + }, + [MT8365_POWER_DOMAIN_DSP] = { + .name = "dsp", + .sta_mask = BIT(17), + .ctl_offs = 0x037C, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(15, 12), + .bp_infracfg = { + BUS_PROT_WR(BIT(24) | BIT(30) | BIT(31), 0x2a8, 0x2ac, 0x258), + }, + .caps = MTK_SCPD_ACTIVE_WAKEUP, + }, +}; + +static const struct scpsys_soc_data mt8365_scpsys_data = { + .domains_data = scpsys_domain_data_mt8365, + .num_domains = ARRAY_SIZE(scpsys_domain_data_mt8365), + .pwr_sta_offs = 0x0180, + .pwr_sta2nd_offs = 0x0184 +}; + +#endif /* __SOC_MEDIATEK_MT8365_PM_DOMAINS_H */ diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c index 0af00efa0ef8..4c8eecaace99 100644 --- a/drivers/soc/mediatek/mtk-pm-domains.c +++ b/drivers/soc/mediatek/mtk-pm-domains.c @@ -20,6 +20,7 @@ #include "mt8173-pm-domains.h" #include "mt8183-pm-domains.h" #include "mt8192-pm-domains.h" +#include "mt8365-pm-domains.h" #define MTK_POLL_DELAY_US 10 #define MTK_POLL_TIMEOUT USEC_PER_SEC @@ -576,6 +577,10 @@ static const struct of_device_id scpsys_of_match[] = { .compatible = "mediatek,mt8192-power-controller", .data = &mt8192_scpsys_data, }, + { + .compatible = "mediatek,mt8365-power-controller", + .data = &mt8365_scpsys_data, + }, { } }; -- 2.31.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/2] soc: mediatek: pm-domains: Add support for MT8365 @ 2021-05-18 19:40 ` Fabien Parent 0 siblings, 0 replies; 9+ messages in thread From: Fabien Parent @ 2021-05-18 19:40 UTC (permalink / raw) To: Matthias Brugger Cc: mkorpershoek, Fabien Parent, linux-kernel, linux-arm-kernel, linux-mediatek Add the needed board data to support MT8365 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> --- drivers/soc/mediatek/mt8365-pm-domains.h | 129 +++++++++++++++++++++++ drivers/soc/mediatek/mtk-pm-domains.c | 5 + 2 files changed, 134 insertions(+) create mode 100644 drivers/soc/mediatek/mt8365-pm-domains.h diff --git a/drivers/soc/mediatek/mt8365-pm-domains.h b/drivers/soc/mediatek/mt8365-pm-domains.h new file mode 100644 index 000000000000..964387967888 --- /dev/null +++ b/drivers/soc/mediatek/mt8365-pm-domains.h @@ -0,0 +1,129 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __SOC_MEDIATEK_MT8365_PM_DOMAINS_H +#define __SOC_MEDIATEK_MT8365_PM_DOMAINS_H + +#include "mtk-pm-domains.h" +#include <dt-bindings/power/mt8365-power.h> + +/* + * MT8365 power domain support + */ + +static const struct scpsys_domain_data scpsys_domain_data_mt8365[] = { + [MT8365_POWER_DOMAIN_DISP] = { + .name = "disp", + .sta_mask = PWR_STATUS_DISP, + .ctl_offs = 0x30c, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .bp_infracfg = { + BUS_PROT_WR(BIT(16) | BIT(17), 0x2a8, 0x2ac, 0x258), + BUS_PROT_WR(BIT(1) | BIT(2) | BIT(10) | BIT(11), 0x2a0, 0x2a4, 0x228), + BUS_PROT_WR_IGN(BIT(5), 0x0, 0x234, 0x28), + BUS_PROT_WR(BIT(6), 0x2a0, 0x2a4, 0x228), + }, + }, + [MT8365_POWER_DOMAIN_VENC] = { + .name = "venc", + .sta_mask = PWR_STATUS_VENC, + .ctl_offs = 0x0304, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .bp_smi = { + BUS_PROT_WR(BIT(1), 0x3c4, 0x3c8, 0x3c0), + }, + }, + [MT8365_POWER_DOMAIN_AUDIO] = { + .name = "audio", + .sta_mask = PWR_STATUS_AUDIO, + .ctl_offs = 0x0314, + .sram_pdn_bits = GENMASK(12, 8), + .sram_pdn_ack_bits = GENMASK(17, 13), + .bp_infracfg = { + BUS_PROT_WR(BIT(27) | BIT(28), 0x2a8, 0x2ac, 0x258), + }, + .caps = MTK_SCPD_ACTIVE_WAKEUP, + }, + [MT8365_POWER_DOMAIN_CONN] = { + .name = "conn", + .sta_mask = PWR_STATUS_CONN, + .ctl_offs = 0x032c, + .sram_pdn_bits = 0, + .sram_pdn_ack_bits = 0, + .bp_infracfg = { + BUS_PROT_WR(BIT(13), 0x2a0, 0x2a4, 0x228), + BUS_PROT_WR(BIT(18), 0x2a8, 0x2ac, 0x258), + BUS_PROT_WR(BIT(14), 0x2a0, 0x2a4, 0x228), + BUS_PROT_WR(BIT(21), 0x2a8, 0x2ac, 0x258), + }, + .caps = MTK_SCPD_ACTIVE_WAKEUP | MTK_SCPD_KEEP_DEFAULT_OFF, + }, + [MT8365_POWER_DOMAIN_MFG] = { + .name = "mfg", + .sta_mask = PWR_STATUS_MFG, + .ctl_offs = 0x0338, + .sram_pdn_bits = GENMASK(9, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + .bp_infracfg = { + BUS_PROT_WR(BIT(25), 0x2a0, 0x2a4, 0x228), + BUS_PROT_WR(BIT(21) | BIT(22), 0x2a0, 0x2a4, 0x228), + }, + }, + [MT8365_POWER_DOMAIN_CAM] = { + .name = "cam", + .sta_mask = BIT(25), + .ctl_offs = 0x0344, + .sram_pdn_bits = GENMASK(9, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + .bp_infracfg = { + BUS_PROT_WR(BIT(19), 0x2a8, 0x2ac, 0x258), + }, + .bp_smi = { + BUS_PROT_WR(BIT(2), 0x3c4, 0x3c8, 0x3c0), + }, + }, + [MT8365_POWER_DOMAIN_VDEC] = { + .name = "vdec", + .sta_mask = BIT(31), + .ctl_offs = 0x0370, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .bp_smi = { + BUS_PROT_WR(BIT(3), 0x3c4, 0x3c8, 0x3c0), + }, + }, + [MT8365_POWER_DOMAIN_APU] = { + .name = "apu", + .sta_mask = BIT(16), + .ctl_offs = 0x0378, + .sram_pdn_bits = GENMASK(14, 8), + .sram_pdn_ack_bits = GENMASK(21, 15), + .bp_infracfg = { + BUS_PROT_WR(BIT(2) | BIT(20), 0x2a8, 0x2ac, 0x258), + }, + .bp_smi = { + BUS_PROT_WR(BIT(4), 0x3c4, 0x3c8, 0x3c0), + }, + }, + [MT8365_POWER_DOMAIN_DSP] = { + .name = "dsp", + .sta_mask = BIT(17), + .ctl_offs = 0x037C, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(15, 12), + .bp_infracfg = { + BUS_PROT_WR(BIT(24) | BIT(30) | BIT(31), 0x2a8, 0x2ac, 0x258), + }, + .caps = MTK_SCPD_ACTIVE_WAKEUP, + }, +}; + +static const struct scpsys_soc_data mt8365_scpsys_data = { + .domains_data = scpsys_domain_data_mt8365, + .num_domains = ARRAY_SIZE(scpsys_domain_data_mt8365), + .pwr_sta_offs = 0x0180, + .pwr_sta2nd_offs = 0x0184 +}; + +#endif /* __SOC_MEDIATEK_MT8365_PM_DOMAINS_H */ diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c index 0af00efa0ef8..4c8eecaace99 100644 --- a/drivers/soc/mediatek/mtk-pm-domains.c +++ b/drivers/soc/mediatek/mtk-pm-domains.c @@ -20,6 +20,7 @@ #include "mt8173-pm-domains.h" #include "mt8183-pm-domains.h" #include "mt8192-pm-domains.h" +#include "mt8365-pm-domains.h" #define MTK_POLL_DELAY_US 10 #define MTK_POLL_TIMEOUT USEC_PER_SEC @@ -576,6 +577,10 @@ static const struct of_device_id scpsys_of_match[] = { .compatible = "mediatek,mt8192-power-controller", .data = &mt8192_scpsys_data, }, + { + .compatible = "mediatek,mt8365-power-controller", + .data = &mt8365_scpsys_data, + }, { } }; -- 2.31.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/2] soc: mediatek: pm-domains: Add support for MT8365 @ 2021-05-18 19:40 ` Fabien Parent 0 siblings, 0 replies; 9+ messages in thread From: Fabien Parent @ 2021-05-18 19:40 UTC (permalink / raw) To: Matthias Brugger Cc: mkorpershoek, Fabien Parent, linux-kernel, linux-arm-kernel, linux-mediatek Add the needed board data to support MT8365 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> --- drivers/soc/mediatek/mt8365-pm-domains.h | 129 +++++++++++++++++++++++ drivers/soc/mediatek/mtk-pm-domains.c | 5 + 2 files changed, 134 insertions(+) create mode 100644 drivers/soc/mediatek/mt8365-pm-domains.h diff --git a/drivers/soc/mediatek/mt8365-pm-domains.h b/drivers/soc/mediatek/mt8365-pm-domains.h new file mode 100644 index 000000000000..964387967888 --- /dev/null +++ b/drivers/soc/mediatek/mt8365-pm-domains.h @@ -0,0 +1,129 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __SOC_MEDIATEK_MT8365_PM_DOMAINS_H +#define __SOC_MEDIATEK_MT8365_PM_DOMAINS_H + +#include "mtk-pm-domains.h" +#include <dt-bindings/power/mt8365-power.h> + +/* + * MT8365 power domain support + */ + +static const struct scpsys_domain_data scpsys_domain_data_mt8365[] = { + [MT8365_POWER_DOMAIN_DISP] = { + .name = "disp", + .sta_mask = PWR_STATUS_DISP, + .ctl_offs = 0x30c, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .bp_infracfg = { + BUS_PROT_WR(BIT(16) | BIT(17), 0x2a8, 0x2ac, 0x258), + BUS_PROT_WR(BIT(1) | BIT(2) | BIT(10) | BIT(11), 0x2a0, 0x2a4, 0x228), + BUS_PROT_WR_IGN(BIT(5), 0x0, 0x234, 0x28), + BUS_PROT_WR(BIT(6), 0x2a0, 0x2a4, 0x228), + }, + }, + [MT8365_POWER_DOMAIN_VENC] = { + .name = "venc", + .sta_mask = PWR_STATUS_VENC, + .ctl_offs = 0x0304, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .bp_smi = { + BUS_PROT_WR(BIT(1), 0x3c4, 0x3c8, 0x3c0), + }, + }, + [MT8365_POWER_DOMAIN_AUDIO] = { + .name = "audio", + .sta_mask = PWR_STATUS_AUDIO, + .ctl_offs = 0x0314, + .sram_pdn_bits = GENMASK(12, 8), + .sram_pdn_ack_bits = GENMASK(17, 13), + .bp_infracfg = { + BUS_PROT_WR(BIT(27) | BIT(28), 0x2a8, 0x2ac, 0x258), + }, + .caps = MTK_SCPD_ACTIVE_WAKEUP, + }, + [MT8365_POWER_DOMAIN_CONN] = { + .name = "conn", + .sta_mask = PWR_STATUS_CONN, + .ctl_offs = 0x032c, + .sram_pdn_bits = 0, + .sram_pdn_ack_bits = 0, + .bp_infracfg = { + BUS_PROT_WR(BIT(13), 0x2a0, 0x2a4, 0x228), + BUS_PROT_WR(BIT(18), 0x2a8, 0x2ac, 0x258), + BUS_PROT_WR(BIT(14), 0x2a0, 0x2a4, 0x228), + BUS_PROT_WR(BIT(21), 0x2a8, 0x2ac, 0x258), + }, + .caps = MTK_SCPD_ACTIVE_WAKEUP | MTK_SCPD_KEEP_DEFAULT_OFF, + }, + [MT8365_POWER_DOMAIN_MFG] = { + .name = "mfg", + .sta_mask = PWR_STATUS_MFG, + .ctl_offs = 0x0338, + .sram_pdn_bits = GENMASK(9, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + .bp_infracfg = { + BUS_PROT_WR(BIT(25), 0x2a0, 0x2a4, 0x228), + BUS_PROT_WR(BIT(21) | BIT(22), 0x2a0, 0x2a4, 0x228), + }, + }, + [MT8365_POWER_DOMAIN_CAM] = { + .name = "cam", + .sta_mask = BIT(25), + .ctl_offs = 0x0344, + .sram_pdn_bits = GENMASK(9, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + .bp_infracfg = { + BUS_PROT_WR(BIT(19), 0x2a8, 0x2ac, 0x258), + }, + .bp_smi = { + BUS_PROT_WR(BIT(2), 0x3c4, 0x3c8, 0x3c0), + }, + }, + [MT8365_POWER_DOMAIN_VDEC] = { + .name = "vdec", + .sta_mask = BIT(31), + .ctl_offs = 0x0370, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .bp_smi = { + BUS_PROT_WR(BIT(3), 0x3c4, 0x3c8, 0x3c0), + }, + }, + [MT8365_POWER_DOMAIN_APU] = { + .name = "apu", + .sta_mask = BIT(16), + .ctl_offs = 0x0378, + .sram_pdn_bits = GENMASK(14, 8), + .sram_pdn_ack_bits = GENMASK(21, 15), + .bp_infracfg = { + BUS_PROT_WR(BIT(2) | BIT(20), 0x2a8, 0x2ac, 0x258), + }, + .bp_smi = { + BUS_PROT_WR(BIT(4), 0x3c4, 0x3c8, 0x3c0), + }, + }, + [MT8365_POWER_DOMAIN_DSP] = { + .name = "dsp", + .sta_mask = BIT(17), + .ctl_offs = 0x037C, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(15, 12), + .bp_infracfg = { + BUS_PROT_WR(BIT(24) | BIT(30) | BIT(31), 0x2a8, 0x2ac, 0x258), + }, + .caps = MTK_SCPD_ACTIVE_WAKEUP, + }, +}; + +static const struct scpsys_soc_data mt8365_scpsys_data = { + .domains_data = scpsys_domain_data_mt8365, + .num_domains = ARRAY_SIZE(scpsys_domain_data_mt8365), + .pwr_sta_offs = 0x0180, + .pwr_sta2nd_offs = 0x0184 +}; + +#endif /* __SOC_MEDIATEK_MT8365_PM_DOMAINS_H */ diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c index 0af00efa0ef8..4c8eecaace99 100644 --- a/drivers/soc/mediatek/mtk-pm-domains.c +++ b/drivers/soc/mediatek/mtk-pm-domains.c @@ -20,6 +20,7 @@ #include "mt8173-pm-domains.h" #include "mt8183-pm-domains.h" #include "mt8192-pm-domains.h" +#include "mt8365-pm-domains.h" #define MTK_POLL_DELAY_US 10 #define MTK_POLL_TIMEOUT USEC_PER_SEC @@ -576,6 +577,10 @@ static const struct of_device_id scpsys_of_match[] = { .compatible = "mediatek,mt8192-power-controller", .data = &mt8192_scpsys_data, }, + { + .compatible = "mediatek,mt8365-power-controller", + .data = &mt8365_scpsys_data, + }, { } }; -- 2.31.1 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] dt-bindings: power: Add MT8365 power domains 2021-05-18 19:40 ` Fabien Parent (?) @ 2021-05-21 1:22 ` Rob Herring -1 siblings, 0 replies; 9+ messages in thread From: Rob Herring @ 2021-05-21 1:22 UTC (permalink / raw) To: Fabien Parent Cc: Matthias Brugger, Weiyi Lu, mkorpershoek, Matthias Brugger, devicetree, linux-kernel, linux-arm-kernel, linux-mediatek On Tue, May 18, 2021 at 09:40:07PM +0200, Fabien Parent wrote: > Add power domains dt-bindings for MT8365. > > Signed-off-by: Fabien Parent <fparent@baylibre.com> > --- > .../power/mediatek,power-controller.yaml | 2 ++ > include/dt-bindings/power/mt8365-power.h | 20 +++++++++++++++++++ > 2 files changed, 22 insertions(+) > create mode 100644 include/dt-bindings/power/mt8365-power.h > > diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml > index f234a756c193..9a26a2cee7fb 100644 > --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml > +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml > @@ -27,6 +27,7 @@ properties: > - mediatek,mt8173-power-controller > - mediatek,mt8183-power-controller > - mediatek,mt8192-power-controller > + - mediatek,mt8365-power-controller > > '#power-domain-cells': > const: 1 > @@ -64,6 +65,7 @@ patternProperties: > "include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain. > "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain. > "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain. > + "include/dt-bindings/power/mt8365-power.h" - for MT8365 type power domain. > maxItems: 1 > > clocks: > diff --git a/include/dt-bindings/power/mt8365-power.h b/include/dt-bindings/power/mt8365-power.h > new file mode 100644 > index 000000000000..352440c4b5dd > --- /dev/null > +++ b/include/dt-bindings/power/mt8365-power.h > @@ -0,0 +1,20 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ What about non-GPL users of DT? Dual license please. > +/* > + * Copyright (c) 2021 MediaTek Inc. > + */ > + > +#ifndef _DT_BINDINGS_POWER_MT8365_POWER_H > +#define _DT_BINDINGS_POWER_MT8365_POWER_H > + > +#define MT8365_POWER_DOMAIN_DISP 0 > +#define MT8365_POWER_DOMAIN_CONN 1 > +#define MT8365_POWER_DOMAIN_MFG 2 > +#define MT8365_POWER_DOMAIN_AUDIO 3 > +#define MT8365_POWER_DOMAIN_CAM 4 > +#define MT8365_POWER_DOMAIN_DSP 5 > +#define MT8365_POWER_DOMAIN_VDEC 6 > +#define MT8365_POWER_DOMAIN_VENC 7 > +#define MT8365_POWER_DOMAIN_APU 8 > + > +#endif /* _DT_BINDINGS_POWER_MT8365_POWER_H */ > + > -- > 2.31.1 > ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] dt-bindings: power: Add MT8365 power domains @ 2021-05-21 1:22 ` Rob Herring 0 siblings, 0 replies; 9+ messages in thread From: Rob Herring @ 2021-05-21 1:22 UTC (permalink / raw) To: Fabien Parent Cc: Matthias Brugger, Weiyi Lu, mkorpershoek, Matthias Brugger, devicetree, linux-kernel, linux-arm-kernel, linux-mediatek On Tue, May 18, 2021 at 09:40:07PM +0200, Fabien Parent wrote: > Add power domains dt-bindings for MT8365. > > Signed-off-by: Fabien Parent <fparent@baylibre.com> > --- > .../power/mediatek,power-controller.yaml | 2 ++ > include/dt-bindings/power/mt8365-power.h | 20 +++++++++++++++++++ > 2 files changed, 22 insertions(+) > create mode 100644 include/dt-bindings/power/mt8365-power.h > > diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml > index f234a756c193..9a26a2cee7fb 100644 > --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml > +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml > @@ -27,6 +27,7 @@ properties: > - mediatek,mt8173-power-controller > - mediatek,mt8183-power-controller > - mediatek,mt8192-power-controller > + - mediatek,mt8365-power-controller > > '#power-domain-cells': > const: 1 > @@ -64,6 +65,7 @@ patternProperties: > "include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain. > "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain. > "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain. > + "include/dt-bindings/power/mt8365-power.h" - for MT8365 type power domain. > maxItems: 1 > > clocks: > diff --git a/include/dt-bindings/power/mt8365-power.h b/include/dt-bindings/power/mt8365-power.h > new file mode 100644 > index 000000000000..352440c4b5dd > --- /dev/null > +++ b/include/dt-bindings/power/mt8365-power.h > @@ -0,0 +1,20 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ What about non-GPL users of DT? Dual license please. > +/* > + * Copyright (c) 2021 MediaTek Inc. > + */ > + > +#ifndef _DT_BINDINGS_POWER_MT8365_POWER_H > +#define _DT_BINDINGS_POWER_MT8365_POWER_H > + > +#define MT8365_POWER_DOMAIN_DISP 0 > +#define MT8365_POWER_DOMAIN_CONN 1 > +#define MT8365_POWER_DOMAIN_MFG 2 > +#define MT8365_POWER_DOMAIN_AUDIO 3 > +#define MT8365_POWER_DOMAIN_CAM 4 > +#define MT8365_POWER_DOMAIN_DSP 5 > +#define MT8365_POWER_DOMAIN_VDEC 6 > +#define MT8365_POWER_DOMAIN_VENC 7 > +#define MT8365_POWER_DOMAIN_APU 8 > + > +#endif /* _DT_BINDINGS_POWER_MT8365_POWER_H */ > + > -- > 2.31.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] dt-bindings: power: Add MT8365 power domains @ 2021-05-21 1:22 ` Rob Herring 0 siblings, 0 replies; 9+ messages in thread From: Rob Herring @ 2021-05-21 1:22 UTC (permalink / raw) To: Fabien Parent Cc: Matthias Brugger, Weiyi Lu, mkorpershoek, Matthias Brugger, devicetree, linux-kernel, linux-arm-kernel, linux-mediatek On Tue, May 18, 2021 at 09:40:07PM +0200, Fabien Parent wrote: > Add power domains dt-bindings for MT8365. > > Signed-off-by: Fabien Parent <fparent@baylibre.com> > --- > .../power/mediatek,power-controller.yaml | 2 ++ > include/dt-bindings/power/mt8365-power.h | 20 +++++++++++++++++++ > 2 files changed, 22 insertions(+) > create mode 100644 include/dt-bindings/power/mt8365-power.h > > diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml > index f234a756c193..9a26a2cee7fb 100644 > --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml > +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml > @@ -27,6 +27,7 @@ properties: > - mediatek,mt8173-power-controller > - mediatek,mt8183-power-controller > - mediatek,mt8192-power-controller > + - mediatek,mt8365-power-controller > > '#power-domain-cells': > const: 1 > @@ -64,6 +65,7 @@ patternProperties: > "include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain. > "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain. > "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain. > + "include/dt-bindings/power/mt8365-power.h" - for MT8365 type power domain. > maxItems: 1 > > clocks: > diff --git a/include/dt-bindings/power/mt8365-power.h b/include/dt-bindings/power/mt8365-power.h > new file mode 100644 > index 000000000000..352440c4b5dd > --- /dev/null > +++ b/include/dt-bindings/power/mt8365-power.h > @@ -0,0 +1,20 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ What about non-GPL users of DT? Dual license please. > +/* > + * Copyright (c) 2021 MediaTek Inc. > + */ > + > +#ifndef _DT_BINDINGS_POWER_MT8365_POWER_H > +#define _DT_BINDINGS_POWER_MT8365_POWER_H > + > +#define MT8365_POWER_DOMAIN_DISP 0 > +#define MT8365_POWER_DOMAIN_CONN 1 > +#define MT8365_POWER_DOMAIN_MFG 2 > +#define MT8365_POWER_DOMAIN_AUDIO 3 > +#define MT8365_POWER_DOMAIN_CAM 4 > +#define MT8365_POWER_DOMAIN_DSP 5 > +#define MT8365_POWER_DOMAIN_VDEC 6 > +#define MT8365_POWER_DOMAIN_VENC 7 > +#define MT8365_POWER_DOMAIN_APU 8 > + > +#endif /* _DT_BINDINGS_POWER_MT8365_POWER_H */ > + > -- > 2.31.1 > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2021-05-21 1:24 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-05-18 19:40 [PATCH 1/2] dt-bindings: power: Add MT8365 power domains Fabien Parent 2021-05-18 19:40 ` Fabien Parent 2021-05-18 19:40 ` Fabien Parent 2021-05-18 19:40 ` [PATCH 2/2] soc: mediatek: pm-domains: Add support for MT8365 Fabien Parent 2021-05-18 19:40 ` Fabien Parent 2021-05-18 19:40 ` Fabien Parent 2021-05-21 1:22 ` [PATCH 1/2] dt-bindings: power: Add MT8365 power domains Rob Herring 2021-05-21 1:22 ` Rob Herring 2021-05-21 1:22 ` Rob Herring
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