From: Adam Ford <aford173@gmail.com> To: linux-arm-kernel@lists.infradead.org Cc: aford@beaconembedded.com, Adam Ford <aford173@gmail.com>, Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com>, NXP Linux Team <linux-imx@nxp.com>, Andrey Smirnov <andrew.smirnov@gmail.com>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/5] arm64: dts: imx8mn: add GPC node and power domains Date: Mon, 24 May 2021 20:07:30 -0500 [thread overview] Message-ID: <20210525010732.115562-4-aford173@gmail.com> (raw) In-Reply-To: <20210525010732.115562-1-aford173@gmail.com> This adds the DT nodes to describe the power domains available on the i.MX8MN. There are more power domains, but the displaymix and mipi power domains need a separate clock block controller which not yet available, so this limits it to the HSIO, OTG and GPU domains. Signed-off-by: Adam Ford <aford173@gmail.com> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index d4231e061403..0eb64b59c8e3 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -4,6 +4,8 @@ */ #include <dt-bindings/clock/imx8mn-clock.h> +#include <dt-bindings/power/imx8mn-power.h> +#include <dt-bindings/reset/imx8mq-reset.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -613,6 +615,40 @@ src: reset-controller@30390000 { interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; #reset-cells = <1>; }; + + gpc: gpc@303a0000 { + compatible = "fsl,imx8mn-gpc"; + reg = <0x303a0000 0x10000>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; + + pgc { + #address-cells = <1>; + #size-cells = <0>; + + pgc_hsiomix: power-domain@0 { + #power-domain-cells = <0>; + reg = <IMX8MN_POWER_DOMAIN_HSIOMIX>; + clocks = <&clk IMX8MN_CLK_USB_BUS>; + }; + + pgc_otg1: power-domain@1 { + #power-domain-cells = <0>; + reg = <IMX8MN_POWER_DOMAIN_OTG1>; + power-domains = <&pgc_hsiomix>; + }; + + pgc_gpumix: power-domain@2 { + #power-domain-cells = <0>; + reg = <IMX8MN_POWER_DOMAIN_GPUMIX>; + clocks = <&clk IMX8MN_CLK_GPU_CORE_ROOT>, + <&clk IMX8MN_CLK_GPU_SHADER_DIV>, + <&clk IMX8MN_CLK_GPU_BUS_ROOT>, + <&clk IMX8MN_CLK_GPU_AHB>; + resets = <&src IMX8MQ_RESET_GPU_RESET>; + }; + }; + }; }; aips2: bus@30400000 { -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Adam Ford <aford173@gmail.com> To: linux-arm-kernel@lists.infradead.org Cc: aford@beaconembedded.com, Adam Ford <aford173@gmail.com>, Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com>, NXP Linux Team <linux-imx@nxp.com>, Andrey Smirnov <andrew.smirnov@gmail.com>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/5] arm64: dts: imx8mn: add GPC node and power domains Date: Mon, 24 May 2021 20:07:30 -0500 [thread overview] Message-ID: <20210525010732.115562-4-aford173@gmail.com> (raw) In-Reply-To: <20210525010732.115562-1-aford173@gmail.com> This adds the DT nodes to describe the power domains available on the i.MX8MN. There are more power domains, but the displaymix and mipi power domains need a separate clock block controller which not yet available, so this limits it to the HSIO, OTG and GPU domains. Signed-off-by: Adam Ford <aford173@gmail.com> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index d4231e061403..0eb64b59c8e3 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -4,6 +4,8 @@ */ #include <dt-bindings/clock/imx8mn-clock.h> +#include <dt-bindings/power/imx8mn-power.h> +#include <dt-bindings/reset/imx8mq-reset.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -613,6 +615,40 @@ src: reset-controller@30390000 { interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; #reset-cells = <1>; }; + + gpc: gpc@303a0000 { + compatible = "fsl,imx8mn-gpc"; + reg = <0x303a0000 0x10000>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; + + pgc { + #address-cells = <1>; + #size-cells = <0>; + + pgc_hsiomix: power-domain@0 { + #power-domain-cells = <0>; + reg = <IMX8MN_POWER_DOMAIN_HSIOMIX>; + clocks = <&clk IMX8MN_CLK_USB_BUS>; + }; + + pgc_otg1: power-domain@1 { + #power-domain-cells = <0>; + reg = <IMX8MN_POWER_DOMAIN_OTG1>; + power-domains = <&pgc_hsiomix>; + }; + + pgc_gpumix: power-domain@2 { + #power-domain-cells = <0>; + reg = <IMX8MN_POWER_DOMAIN_GPUMIX>; + clocks = <&clk IMX8MN_CLK_GPU_CORE_ROOT>, + <&clk IMX8MN_CLK_GPU_SHADER_DIV>, + <&clk IMX8MN_CLK_GPU_BUS_ROOT>, + <&clk IMX8MN_CLK_GPU_AHB>; + resets = <&src IMX8MQ_RESET_GPU_RESET>; + }; + }; + }; }; aips2: bus@30400000 { -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-05-25 1:07 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-25 1:07 [PATCH 0/5] arm64: imx8mn: Add power domain and more peripherals Adam Ford 2021-05-25 1:07 ` Adam Ford 2021-05-25 1:07 ` [PATCH 1/5] dt-bindings: add defines for i.MX8MN power domains Adam Ford 2021-05-25 1:07 ` Adam Ford 2021-06-12 3:48 ` Shawn Guo 2021-06-12 3:48 ` Shawn Guo 2021-05-25 1:07 ` [PATCH 2/5] soc: imx: gpcv2: add support " Adam Ford 2021-05-25 1:07 ` Adam Ford 2021-06-12 3:49 ` Shawn Guo 2021-06-12 3:49 ` Shawn Guo 2021-05-25 1:07 ` Adam Ford [this message] 2021-05-25 1:07 ` [PATCH 3/5] arm64: dts: imx8mn: add GPC node and " Adam Ford 2021-05-25 1:07 ` [PATCH 4/5] arm64: dts: imx8mn: Add power-domain reference in USB controller Adam Ford 2021-05-25 1:07 ` Adam Ford 2021-05-25 1:07 ` [PATCH 5/5] arm64: dts: imx8mn: Add GPU node Adam Ford 2021-05-25 1:07 ` Adam Ford
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