* [Intel-gfx] [PATCH 0/1] drm/i915/gt: Introduce timeslicing for userspace @ 2021-05-25 14:01 Tejas Upadhyay 2021-05-25 14:01 ` [Intel-gfx] [PATCH 1/1] drm/i915/gt: Declare when we enabled timeslicing Tejas Upadhyay 2021-05-25 15:51 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Introduce timeslicing for userspace Patchwork 0 siblings, 2 replies; 6+ messages in thread From: Tejas Upadhyay @ 2021-05-25 14:01 UTC (permalink / raw) To: intel-gfx, mahesh.meena Test-with: 20210524124806.241439-1-tejaskumarx.surendrakumar.upadhyay@intel.com Tejas Upadhyay (1): drm/i915/gt: Declare when we enabled timeslicing drivers/gpu/drm/i915/gt/intel_engine_user.c | 1 + include/uapi/drm/i915_drm.h | 1 + 2 files changed, 2 insertions(+) -- 2.31.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] [PATCH 1/1] drm/i915/gt: Declare when we enabled timeslicing 2021-05-25 14:01 [Intel-gfx] [PATCH 0/1] drm/i915/gt: Introduce timeslicing for userspace Tejas Upadhyay @ 2021-05-25 14:01 ` Tejas Upadhyay 2021-05-25 17:09 ` kernel test robot 2021-05-25 15:51 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Introduce timeslicing for userspace Patchwork 1 sibling, 1 reply; 6+ messages in thread From: Tejas Upadhyay @ 2021-05-25 14:01 UTC (permalink / raw) To: intel-gfx, mahesh.meena Let userspace know if they can trust timeslicing by including it as part of the I915_PARAM_HAS_SCHEDULER::I915_SCHEDULER_CAP_TIMESLICING v2: Only declare timeslicing if we can safely preempt userspace. Fixes: 8ee36e048c98 ("drm/i915/execlists: Minimalistic timeslicing") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> --- drivers/gpu/drm/i915/gt/intel_engine_user.c | 1 + include/uapi/drm/i915_drm.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c b/drivers/gpu/drm/i915/gt/intel_engine_user.c index 3cca7ea2d6ea..12d165566ed2 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_user.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c @@ -98,6 +98,7 @@ static void set_scheduler_caps(struct drm_i915_private *i915) MAP(HAS_PREEMPTION, PREEMPTION), MAP(HAS_SEMAPHORES, SEMAPHORES), MAP(SUPPORTS_STATS, ENGINE_BUSY_STATS), + MAP(TIMESLICE_BIT, TIMESLICING), #undef MAP }; struct intel_engine_cs *engine; diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index c2c7759b7d2e..af2212d6113c 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -572,6 +572,7 @@ typedef struct drm_i915_irq_wait { #define I915_SCHEDULER_CAP_PREEMPTION (1ul << 2) #define I915_SCHEDULER_CAP_SEMAPHORES (1ul << 3) #define I915_SCHEDULER_CAP_ENGINE_BUSY_STATS (1ul << 4) +#define I915_SCHEDULER_CAP_TIMESLICING (1ul << 5) #define I915_PARAM_HUC_STATUS 42 -- 2.31.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/gt: Declare when we enabled timeslicing 2021-05-25 14:01 ` [Intel-gfx] [PATCH 1/1] drm/i915/gt: Declare when we enabled timeslicing Tejas Upadhyay @ 2021-05-25 17:09 ` kernel test robot 0 siblings, 0 replies; 6+ messages in thread From: kernel test robot @ 2021-05-25 17:09 UTC (permalink / raw) To: Tejas Upadhyay, intel-gfx, mahesh.meena; +Cc: kbuild-all [-- Attachment #1: Type: text/plain, Size: 5890 bytes --] Hi Tejas, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on drm-tip/drm-tip linus/master v5.13-rc3 next-20210525] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Tejas-Upadhyay/drm-i915-gt-Introduce-timeslicing-for-userspace/20210525-221509 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: i386-randconfig-r005-20210525 (attached as .config) compiler: gcc-9 (Debian 9.3.0-22) 9.3.0 reproduce (this is a W=1 build): # https://github.com/0day-ci/linux/commit/f2b7eecbbed425bfed1aea378181b5629bbcb34f git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Tejas-Upadhyay/drm-i915-gt-Introduce-timeslicing-for-userspace/20210525-221509 git checkout f2b7eecbbed425bfed1aea378181b5629bbcb34f # save the attached .config to linux build tree make W=1 ARCH=i386 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): In file included from include/linux/kernel.h:13, from include/linux/list.h:9, from drivers/gpu/drm/i915/gt/intel_engine_user.c:6: drivers/gpu/drm/i915/gt/intel_engine_user.c: In function 'set_scheduler_caps': >> drivers/gpu/drm/i915/gt/intel_engine_user.c:97:27: error: 'I915_ENGINE_TIMESLICE_BIT' undeclared (first use in this function); did you mean 'I915_ENGINE_HAS_TIMESLICES'? 97 | #define MAP(x, y) { ilog2(I915_ENGINE_##x), ilog2(I915_SCHEDULER_CAP_##y) } | ^~~~~~~~~~~~ include/linux/log2.h:158:23: note: in definition of macro 'ilog2' 158 | __builtin_constant_p(n) ? \ | ^ drivers/gpu/drm/i915/gt/intel_engine_user.c:101:3: note: in expansion of macro 'MAP' 101 | MAP(TIMESLICE_BIT, TIMESLICING), | ^~~ drivers/gpu/drm/i915/gt/intel_engine_user.c:97:27: note: each undeclared identifier is reported only once for each function it appears in 97 | #define MAP(x, y) { ilog2(I915_ENGINE_##x), ilog2(I915_SCHEDULER_CAP_##y) } | ^~~~~~~~~~~~ include/linux/log2.h:158:23: note: in definition of macro 'ilog2' 158 | __builtin_constant_p(n) ? \ | ^ drivers/gpu/drm/i915/gt/intel_engine_user.c:101:3: note: in expansion of macro 'MAP' 101 | MAP(TIMESLICE_BIT, TIMESLICING), | ^~~ vim +97 drivers/gpu/drm/i915/gt/intel_engine_user.c 750e76b4f9f63c Chris Wilson 2019-08-06 90 750e76b4f9f63c Chris Wilson 2019-08-06 91 static void set_scheduler_caps(struct drm_i915_private *i915) 750e76b4f9f63c Chris Wilson 2019-08-06 92 { 750e76b4f9f63c Chris Wilson 2019-08-06 93 static const struct { 750e76b4f9f63c Chris Wilson 2019-08-06 94 u8 engine; 750e76b4f9f63c Chris Wilson 2019-08-06 95 u8 sched; 750e76b4f9f63c Chris Wilson 2019-08-06 96 } map[] = { 750e76b4f9f63c Chris Wilson 2019-08-06 @97 #define MAP(x, y) { ilog2(I915_ENGINE_##x), ilog2(I915_SCHEDULER_CAP_##y) } 750e76b4f9f63c Chris Wilson 2019-08-06 98 MAP(HAS_PREEMPTION, PREEMPTION), 750e76b4f9f63c Chris Wilson 2019-08-06 99 MAP(HAS_SEMAPHORES, SEMAPHORES), 750e76b4f9f63c Chris Wilson 2019-08-06 100 MAP(SUPPORTS_STATS, ENGINE_BUSY_STATS), f2b7eecbbed425 Tejas Upadhyay 2021-05-25 101 MAP(TIMESLICE_BIT, TIMESLICING), 750e76b4f9f63c Chris Wilson 2019-08-06 102 #undef MAP 750e76b4f9f63c Chris Wilson 2019-08-06 103 }; 750e76b4f9f63c Chris Wilson 2019-08-06 104 struct intel_engine_cs *engine; 750e76b4f9f63c Chris Wilson 2019-08-06 105 u32 enabled, disabled; 750e76b4f9f63c Chris Wilson 2019-08-06 106 750e76b4f9f63c Chris Wilson 2019-08-06 107 enabled = 0; 750e76b4f9f63c Chris Wilson 2019-08-06 108 disabled = 0; 750e76b4f9f63c Chris Wilson 2019-08-06 109 for_each_uabi_engine(engine, i915) { /* all engines must agree! */ 750e76b4f9f63c Chris Wilson 2019-08-06 110 int i; 750e76b4f9f63c Chris Wilson 2019-08-06 111 750e76b4f9f63c Chris Wilson 2019-08-06 112 if (engine->schedule) 750e76b4f9f63c Chris Wilson 2019-08-06 113 enabled |= (I915_SCHEDULER_CAP_ENABLED | 750e76b4f9f63c Chris Wilson 2019-08-06 114 I915_SCHEDULER_CAP_PRIORITY); 750e76b4f9f63c Chris Wilson 2019-08-06 115 else 750e76b4f9f63c Chris Wilson 2019-08-06 116 disabled |= (I915_SCHEDULER_CAP_ENABLED | 750e76b4f9f63c Chris Wilson 2019-08-06 117 I915_SCHEDULER_CAP_PRIORITY); 750e76b4f9f63c Chris Wilson 2019-08-06 118 750e76b4f9f63c Chris Wilson 2019-08-06 119 for (i = 0; i < ARRAY_SIZE(map); i++) { 750e76b4f9f63c Chris Wilson 2019-08-06 120 if (engine->flags & BIT(map[i].engine)) 750e76b4f9f63c Chris Wilson 2019-08-06 121 enabled |= BIT(map[i].sched); 750e76b4f9f63c Chris Wilson 2019-08-06 122 else 750e76b4f9f63c Chris Wilson 2019-08-06 123 disabled |= BIT(map[i].sched); 750e76b4f9f63c Chris Wilson 2019-08-06 124 } 750e76b4f9f63c Chris Wilson 2019-08-06 125 } 750e76b4f9f63c Chris Wilson 2019-08-06 126 750e76b4f9f63c Chris Wilson 2019-08-06 127 i915->caps.scheduler = enabled & ~disabled; 750e76b4f9f63c Chris Wilson 2019-08-06 128 if (!(i915->caps.scheduler & I915_SCHEDULER_CAP_ENABLED)) 750e76b4f9f63c Chris Wilson 2019-08-06 129 i915->caps.scheduler = 0; 750e76b4f9f63c Chris Wilson 2019-08-06 130 } 750e76b4f9f63c Chris Wilson 2019-08-06 131 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org [-- Attachment #2: .config.gz --] [-- Type: application/gzip, Size: 32835 bytes --] [-- Attachment #3: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/gt: Declare when we enabled timeslicing @ 2021-05-25 17:09 ` kernel test robot 0 siblings, 0 replies; 6+ messages in thread From: kernel test robot @ 2021-05-25 17:09 UTC (permalink / raw) To: kbuild-all [-- Attachment #1: Type: text/plain, Size: 5991 bytes --] Hi Tejas, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on drm-tip/drm-tip linus/master v5.13-rc3 next-20210525] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Tejas-Upadhyay/drm-i915-gt-Introduce-timeslicing-for-userspace/20210525-221509 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: i386-randconfig-r005-20210525 (attached as .config) compiler: gcc-9 (Debian 9.3.0-22) 9.3.0 reproduce (this is a W=1 build): # https://github.com/0day-ci/linux/commit/f2b7eecbbed425bfed1aea378181b5629bbcb34f git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Tejas-Upadhyay/drm-i915-gt-Introduce-timeslicing-for-userspace/20210525-221509 git checkout f2b7eecbbed425bfed1aea378181b5629bbcb34f # save the attached .config to linux build tree make W=1 ARCH=i386 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): In file included from include/linux/kernel.h:13, from include/linux/list.h:9, from drivers/gpu/drm/i915/gt/intel_engine_user.c:6: drivers/gpu/drm/i915/gt/intel_engine_user.c: In function 'set_scheduler_caps': >> drivers/gpu/drm/i915/gt/intel_engine_user.c:97:27: error: 'I915_ENGINE_TIMESLICE_BIT' undeclared (first use in this function); did you mean 'I915_ENGINE_HAS_TIMESLICES'? 97 | #define MAP(x, y) { ilog2(I915_ENGINE_##x), ilog2(I915_SCHEDULER_CAP_##y) } | ^~~~~~~~~~~~ include/linux/log2.h:158:23: note: in definition of macro 'ilog2' 158 | __builtin_constant_p(n) ? \ | ^ drivers/gpu/drm/i915/gt/intel_engine_user.c:101:3: note: in expansion of macro 'MAP' 101 | MAP(TIMESLICE_BIT, TIMESLICING), | ^~~ drivers/gpu/drm/i915/gt/intel_engine_user.c:97:27: note: each undeclared identifier is reported only once for each function it appears in 97 | #define MAP(x, y) { ilog2(I915_ENGINE_##x), ilog2(I915_SCHEDULER_CAP_##y) } | ^~~~~~~~~~~~ include/linux/log2.h:158:23: note: in definition of macro 'ilog2' 158 | __builtin_constant_p(n) ? \ | ^ drivers/gpu/drm/i915/gt/intel_engine_user.c:101:3: note: in expansion of macro 'MAP' 101 | MAP(TIMESLICE_BIT, TIMESLICING), | ^~~ vim +97 drivers/gpu/drm/i915/gt/intel_engine_user.c 750e76b4f9f63c Chris Wilson 2019-08-06 90 750e76b4f9f63c Chris Wilson 2019-08-06 91 static void set_scheduler_caps(struct drm_i915_private *i915) 750e76b4f9f63c Chris Wilson 2019-08-06 92 { 750e76b4f9f63c Chris Wilson 2019-08-06 93 static const struct { 750e76b4f9f63c Chris Wilson 2019-08-06 94 u8 engine; 750e76b4f9f63c Chris Wilson 2019-08-06 95 u8 sched; 750e76b4f9f63c Chris Wilson 2019-08-06 96 } map[] = { 750e76b4f9f63c Chris Wilson 2019-08-06 @97 #define MAP(x, y) { ilog2(I915_ENGINE_##x), ilog2(I915_SCHEDULER_CAP_##y) } 750e76b4f9f63c Chris Wilson 2019-08-06 98 MAP(HAS_PREEMPTION, PREEMPTION), 750e76b4f9f63c Chris Wilson 2019-08-06 99 MAP(HAS_SEMAPHORES, SEMAPHORES), 750e76b4f9f63c Chris Wilson 2019-08-06 100 MAP(SUPPORTS_STATS, ENGINE_BUSY_STATS), f2b7eecbbed425 Tejas Upadhyay 2021-05-25 101 MAP(TIMESLICE_BIT, TIMESLICING), 750e76b4f9f63c Chris Wilson 2019-08-06 102 #undef MAP 750e76b4f9f63c Chris Wilson 2019-08-06 103 }; 750e76b4f9f63c Chris Wilson 2019-08-06 104 struct intel_engine_cs *engine; 750e76b4f9f63c Chris Wilson 2019-08-06 105 u32 enabled, disabled; 750e76b4f9f63c Chris Wilson 2019-08-06 106 750e76b4f9f63c Chris Wilson 2019-08-06 107 enabled = 0; 750e76b4f9f63c Chris Wilson 2019-08-06 108 disabled = 0; 750e76b4f9f63c Chris Wilson 2019-08-06 109 for_each_uabi_engine(engine, i915) { /* all engines must agree! */ 750e76b4f9f63c Chris Wilson 2019-08-06 110 int i; 750e76b4f9f63c Chris Wilson 2019-08-06 111 750e76b4f9f63c Chris Wilson 2019-08-06 112 if (engine->schedule) 750e76b4f9f63c Chris Wilson 2019-08-06 113 enabled |= (I915_SCHEDULER_CAP_ENABLED | 750e76b4f9f63c Chris Wilson 2019-08-06 114 I915_SCHEDULER_CAP_PRIORITY); 750e76b4f9f63c Chris Wilson 2019-08-06 115 else 750e76b4f9f63c Chris Wilson 2019-08-06 116 disabled |= (I915_SCHEDULER_CAP_ENABLED | 750e76b4f9f63c Chris Wilson 2019-08-06 117 I915_SCHEDULER_CAP_PRIORITY); 750e76b4f9f63c Chris Wilson 2019-08-06 118 750e76b4f9f63c Chris Wilson 2019-08-06 119 for (i = 0; i < ARRAY_SIZE(map); i++) { 750e76b4f9f63c Chris Wilson 2019-08-06 120 if (engine->flags & BIT(map[i].engine)) 750e76b4f9f63c Chris Wilson 2019-08-06 121 enabled |= BIT(map[i].sched); 750e76b4f9f63c Chris Wilson 2019-08-06 122 else 750e76b4f9f63c Chris Wilson 2019-08-06 123 disabled |= BIT(map[i].sched); 750e76b4f9f63c Chris Wilson 2019-08-06 124 } 750e76b4f9f63c Chris Wilson 2019-08-06 125 } 750e76b4f9f63c Chris Wilson 2019-08-06 126 750e76b4f9f63c Chris Wilson 2019-08-06 127 i915->caps.scheduler = enabled & ~disabled; 750e76b4f9f63c Chris Wilson 2019-08-06 128 if (!(i915->caps.scheduler & I915_SCHEDULER_CAP_ENABLED)) 750e76b4f9f63c Chris Wilson 2019-08-06 129 i915->caps.scheduler = 0; 750e76b4f9f63c Chris Wilson 2019-08-06 130 } 750e76b4f9f63c Chris Wilson 2019-08-06 131 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org [-- Attachment #2: config.gz --] [-- Type: application/gzip, Size: 32835 bytes --] ^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Introduce timeslicing for userspace 2021-05-25 14:01 [Intel-gfx] [PATCH 0/1] drm/i915/gt: Introduce timeslicing for userspace Tejas Upadhyay 2021-05-25 14:01 ` [Intel-gfx] [PATCH 1/1] drm/i915/gt: Declare when we enabled timeslicing Tejas Upadhyay @ 2021-05-25 15:51 ` Patchwork 1 sibling, 0 replies; 6+ messages in thread From: Patchwork @ 2021-05-25 15:51 UTC (permalink / raw) To: Tejas Upadhyay; +Cc: intel-gfx == Series Details == Series: drm/i915/gt: Introduce timeslicing for userspace URL : https://patchwork.freedesktop.org/series/90539/ State : failure == Summary == CALL scripts/checksyscalls.sh CALL scripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.h CC [M] drivers/gpu/drm/i915/gt/intel_engine_user.o In file included from ./include/linux/kernel.h:13, from ./include/linux/list.h:9, from drivers/gpu/drm/i915/gt/intel_engine_user.c:6: drivers/gpu/drm/i915/gt/intel_engine_user.c: In function ‘set_scheduler_caps’: drivers/gpu/drm/i915/gt/intel_engine_user.c:97:27: error: ‘I915_ENGINE_TIMESLICE_BIT’ undeclared (first use in this function); did you mean ‘I915_ENGINE_HAS_TIMESLICES’? #define MAP(x, y) { ilog2(I915_ENGINE_##x), ilog2(I915_SCHEDULER_CAP_##y) } ^~~~~~~~~~~~ ./include/linux/log2.h:158:23: note: in definition of macro ‘ilog2’ __builtin_constant_p(n) ? \ ^ drivers/gpu/drm/i915/gt/intel_engine_user.c:101:3: note: in expansion of macro ‘MAP’ MAP(TIMESLICE_BIT, TIMESLICING), ^~~ drivers/gpu/drm/i915/gt/intel_engine_user.c:97:27: note: each undeclared identifier is reported only once for each function it appears in #define MAP(x, y) { ilog2(I915_ENGINE_##x), ilog2(I915_SCHEDULER_CAP_##y) } ^~~~~~~~~~~~ ./include/linux/log2.h:158:23: note: in definition of macro ‘ilog2’ __builtin_constant_p(n) ? \ ^ drivers/gpu/drm/i915/gt/intel_engine_user.c:101:3: note: in expansion of macro ‘MAP’ MAP(TIMESLICE_BIT, TIMESLICING), ^~~ scripts/Makefile.build:272: recipe for target 'drivers/gpu/drm/i915/gt/intel_engine_user.o' failed make[4]: *** [drivers/gpu/drm/i915/gt/intel_engine_user.o] Error 1 scripts/Makefile.build:515: recipe for target 'drivers/gpu/drm/i915' failed make[3]: *** [drivers/gpu/drm/i915] Error 2 scripts/Makefile.build:515: recipe for target 'drivers/gpu/drm' failed make[2]: *** [drivers/gpu/drm] Error 2 scripts/Makefile.build:515: recipe for target 'drivers/gpu' failed make[1]: *** [drivers/gpu] Error 2 Makefile:1839: recipe for target 'drivers' failed make: *** [drivers] Error 2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] [PATCH 0/1] drm/i915/gt: Introduce timeslicing for userspace
@ 2021-05-25 13:55 Tejas Upadhyay
0 siblings, 0 replies; 6+ messages in thread
From: Tejas Upadhyay @ 2021-05-25 13:55 UTC (permalink / raw)
To: intel-gfx, mahesh.meena
Test-with: 20210524124806.241439-1-tejaskumarx.surendrakumar.upadhyay@intel.com
Tejas Upadhyay (1):
Let userspace know if they can trust timeslicing by including it as
part of the I915_PARAM_HAS_SCHEDULER::I915_SCHEDULER_CAP_TIMESLICING
drivers/gpu/drm/i915/gt/intel_engine_user.c | 1 +
include/uapi/drm/i915_drm.h | 1 +
2 files changed, 2 insertions(+)
--
2.31.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in threadend of thread, other threads:[~2021-05-25 17:10 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-05-25 14:01 [Intel-gfx] [PATCH 0/1] drm/i915/gt: Introduce timeslicing for userspace Tejas Upadhyay 2021-05-25 14:01 ` [Intel-gfx] [PATCH 1/1] drm/i915/gt: Declare when we enabled timeslicing Tejas Upadhyay 2021-05-25 17:09 ` kernel test robot 2021-05-25 17:09 ` kernel test robot 2021-05-25 15:51 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Introduce timeslicing for userspace Patchwork -- strict thread matches above, loose matches on Subject: below -- 2021-05-25 13:55 [Intel-gfx] [PATCH 0/1] " Tejas Upadhyay
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