From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> To: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Cc: "Stephen Boyd" <sboyd@kernel.org>, "Rob Herring" <robh+dt@kernel.org>, "Andreas Färber" <afaerber@suse.de>, "Michael Turquette" <mturquette@baylibre.com>, "Edgar Bernardi Righi" <edgar.righi@lsitec.org.br>, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 4/6] clk: actions: Fix AHPPREDIV-H-AHB clock chain on Owl S500 SoC Date: Wed, 26 May 2021 15:42:30 +0530 [thread overview] Message-ID: <20210526101230.GD10723@work> (raw) In-Reply-To: <20210316185014.GD1111731@BV030612LT> On Tue, Mar 16, 2021 at 08:50:14PM +0200, Cristian Ciocaltea wrote: > On Tue, Mar 16, 2021 at 11:15:47AM +0530, Manivannan Sadhasivam wrote: > > On Mon, Mar 08, 2021 at 07:18:29PM +0200, Cristian Ciocaltea wrote: > > > There are a few issues with the setup of the Actions Semi Owl S500 SoC's > > > clock chain involving AHPPREDIV, H and AHB clocks: > > > > > > * AHBPREDIV clock is defined as a muxer only, although it also acts as > > > a divider. > > > * H clock is defined as a standard divider, although the raw value zero > > > is not supported. > > > > What do you mean by not supported? The datasheet lists "0" as the valid divisor > > value for divide by 1. > > Unfortunately CMU_BUSCLK1 is not documented in my S500 Datasheet > (Version: 1.6, 2016-03-07). Do you have a newer (or a more official) > one? > Yes I do have a newer version of the datasheet (v1.8) and there I can see the divisor 0. > The reference xapp-le code snipped is: > > static struct owl_div divider_H_CLK = { > .type = DIV_T_NATURE, > .range_from = 1, /* reserve H_CLK divsor 1 */ > .range_to = 3, > .reg = &divbit_H_CLK, > }; > > Not sure why divisor 1 has been reserved.. > It is not as per the datasheet. Did you run into any issues with this? Else I'd suggest to keep it as it is. Thanks, Mani > Thanks, > Cristi > > > Rest looks good to me. > > > > Thanks, > > Mani > > > [...]
WARNING: multiple messages have this Message-ID (diff)
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> To: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Cc: "Stephen Boyd" <sboyd@kernel.org>, "Rob Herring" <robh+dt@kernel.org>, "Andreas Färber" <afaerber@suse.de>, "Michael Turquette" <mturquette@baylibre.com>, "Edgar Bernardi Righi" <edgar.righi@lsitec.org.br>, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 4/6] clk: actions: Fix AHPPREDIV-H-AHB clock chain on Owl S500 SoC Date: Wed, 26 May 2021 15:42:30 +0530 [thread overview] Message-ID: <20210526101230.GD10723@work> (raw) In-Reply-To: <20210316185014.GD1111731@BV030612LT> On Tue, Mar 16, 2021 at 08:50:14PM +0200, Cristian Ciocaltea wrote: > On Tue, Mar 16, 2021 at 11:15:47AM +0530, Manivannan Sadhasivam wrote: > > On Mon, Mar 08, 2021 at 07:18:29PM +0200, Cristian Ciocaltea wrote: > > > There are a few issues with the setup of the Actions Semi Owl S500 SoC's > > > clock chain involving AHPPREDIV, H and AHB clocks: > > > > > > * AHBPREDIV clock is defined as a muxer only, although it also acts as > > > a divider. > > > * H clock is defined as a standard divider, although the raw value zero > > > is not supported. > > > > What do you mean by not supported? The datasheet lists "0" as the valid divisor > > value for divide by 1. > > Unfortunately CMU_BUSCLK1 is not documented in my S500 Datasheet > (Version: 1.6, 2016-03-07). Do you have a newer (or a more official) > one? > Yes I do have a newer version of the datasheet (v1.8) and there I can see the divisor 0. > The reference xapp-le code snipped is: > > static struct owl_div divider_H_CLK = { > .type = DIV_T_NATURE, > .range_from = 1, /* reserve H_CLK divsor 1 */ > .range_to = 3, > .reg = &divbit_H_CLK, > }; > > Not sure why divisor 1 has been reserved.. > It is not as per the datasheet. Did you run into any issues with this? Else I'd suggest to keep it as it is. Thanks, Mani > Thanks, > Cristi > > > Rest looks good to me. > > > > Thanks, > > Mani > > > [...] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-05-26 10:12 UTC|newest] Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-03-08 17:18 [PATCH 0/6] Improve clock support for Actions S500 SoC Cristian Ciocaltea 2021-03-08 17:18 ` Cristian Ciocaltea 2021-03-08 17:18 ` [PATCH 1/6] clk: actions: Fix UART clock dividers on Owl " Cristian Ciocaltea 2021-03-08 17:18 ` Cristian Ciocaltea 2021-03-16 3:50 ` Manivannan Sadhasivam 2021-03-16 3:50 ` Manivannan Sadhasivam 2021-03-08 17:18 ` [PATCH 2/6] clk: actions: Fix SD clocks factor table " Cristian Ciocaltea 2021-03-08 17:18 ` Cristian Ciocaltea 2021-03-16 3:58 ` Manivannan Sadhasivam 2021-03-16 3:58 ` Manivannan Sadhasivam 2021-03-16 18:14 ` Cristian Ciocaltea 2021-03-16 18:14 ` Cristian Ciocaltea 2021-05-26 10:07 ` Manivannan Sadhasivam 2021-05-26 10:07 ` Manivannan Sadhasivam 2021-05-27 13:27 ` Cristian Ciocaltea 2021-05-27 13:27 ` Cristian Ciocaltea 2021-03-08 17:18 ` [PATCH 3/6] clk: actions: Fix bisp_factor_table based clocks " Cristian Ciocaltea 2021-03-08 17:18 ` Cristian Ciocaltea 2021-03-16 4:17 ` Manivannan Sadhasivam 2021-03-16 4:17 ` Manivannan Sadhasivam 2021-03-16 18:37 ` Cristian Ciocaltea 2021-03-16 18:37 ` Cristian Ciocaltea 2021-05-26 10:18 ` Manivannan Sadhasivam 2021-05-26 10:18 ` Manivannan Sadhasivam 2021-05-27 13:34 ` Cristian Ciocaltea 2021-05-27 13:34 ` Cristian Ciocaltea 2021-03-08 17:18 ` [PATCH 4/6] clk: actions: Fix AHPPREDIV-H-AHB clock chain " Cristian Ciocaltea 2021-03-08 17:18 ` Cristian Ciocaltea 2021-03-16 5:45 ` Manivannan Sadhasivam 2021-03-16 5:45 ` Manivannan Sadhasivam 2021-03-16 18:50 ` Cristian Ciocaltea 2021-03-16 18:50 ` Cristian Ciocaltea 2021-05-26 10:12 ` Manivannan Sadhasivam [this message] 2021-05-26 10:12 ` Manivannan Sadhasivam 2021-05-27 13:45 ` Cristian Ciocaltea 2021-05-27 13:45 ` Cristian Ciocaltea 2021-03-08 17:18 ` [PATCH 5/6] dt-bindings: clock: Add NIC and ETHERNET bindings for Actions " Cristian Ciocaltea 2021-03-08 17:18 ` Cristian Ciocaltea 2021-03-16 22:00 ` Rob Herring 2021-03-16 22:00 ` Rob Herring 2021-03-08 17:18 ` [PATCH 6/6] clk: actions: Add NIC and ETHERNET clock support " Cristian Ciocaltea 2021-03-08 17:18 ` Cristian Ciocaltea 2021-03-16 5:52 ` Manivannan Sadhasivam 2021-03-16 5:52 ` Manivannan Sadhasivam 2021-03-16 19:02 ` Cristian Ciocaltea 2021-03-16 19:02 ` Cristian Ciocaltea
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