From: Christoph Niedermaier <cniedermaier@dh-electronics.com>
To: <linux-arm-kernel@lists.infradead.org>
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com>,
Shawn Guo <shawnguo@kernel.org>,
Fabio Estevam <festevam@gmail.com>, Marek Vasut <marex@denx.de>,
NXP Linux Team <linux-imx@nxp.com>, <kernel@dh-electronics.com>
Subject: [PATCH 16/20] ARM: dts: imx6q-dhcom: Rearrange of iomux
Date: Wed, 26 May 2021 12:54:13 +0200 [thread overview]
Message-ID: <20210526105417.52996-17-cniedermaier@dh-electronics.com> (raw)
In-Reply-To: <20210526105417.52996-1-cniedermaier@dh-electronics.com>
Move iomux to the end, no change in function.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
---
arch/arm/boot/dts/imx6q-dhcom-pdk2.dts | 56 ++++-----
arch/arm/boot/dts/imx6q-dhcom-som.dtsi | 210 ++++++++++++++++-----------------
2 files changed, 133 insertions(+), 133 deletions(-)
diff --git a/arch/arm/boot/dts/imx6q-dhcom-pdk2.dts b/arch/arm/boot/dts/imx6q-dhcom-pdk2.dts
index ebbef0b1cc4c..2dedc8b5dbbd 100644
--- a/arch/arm/boot/dts/imx6q-dhcom-pdk2.dts
+++ b/arch/arm/boot/dts/imx6q-dhcom-pdk2.dts
@@ -245,6 +245,34 @@
};
};
+&ipu1_di0_disp0 {
+ remote-endpoint = <&lcd_display_in>;
+};
+
+&pcie {
+ pinctrl-0 = <&pinctrl_pcie &pinctrl_dhcom_j>;
+ reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm1>;
+ status = "okay";
+};
+
+&ssi1 {
+ status = "okay";
+};
+
+&sata {
+ status = "okay";
+};
+
+&usdhc3 {
+ status = "okay";
+};
+
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <
@@ -346,31 +374,3 @@
>;
};
};
-
-&ipu1_di0_disp0 {
- remote-endpoint = <&lcd_display_in>;
-};
-
-&pcie {
- pinctrl-0 = <&pinctrl_pcie &pinctrl_dhcom_j>;
- reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>;
- status = "okay";
-};
-
-&pwm1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm1>;
- status = "okay";
-};
-
-&ssi1 {
- status = "okay";
-};
-
-&sata {
- status = "okay";
-};
-
-&usdhc3 {
- status = "okay";
-};
diff --git a/arch/arm/boot/dts/imx6q-dhcom-som.dtsi b/arch/arm/boot/dts/imx6q-dhcom-som.dtsi
index 5b5e1a0495c6..ffdd8d70fe31 100644
--- a/arch/arm/boot/dts/imx6q-dhcom-som.dtsi
+++ b/arch/arm/boot/dts/imx6q-dhcom-som.dtsi
@@ -314,6 +314,111 @@
};
};
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+};
+
+®_arm {
+ vin-supply = <&sw3_reg>;
+};
+
+®_soc {
+ vin-supply = <&sw1_reg>;
+};
+
+®_pu {
+ vin-supply = <&sw1_reg>;
+};
+
+®_vdd1p1 {
+ vin-supply = <&sw2_reg>;
+};
+
+®_vdd2p5 {
+ vin-supply = <&sw2_reg>;
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ uart-has-rtscts;
+ dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
+ dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
+ dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
+ rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart5>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&usbh1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbh1>;
+ vbus-supply = <®_usb_h1_vbus>;
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <®_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg>;
+ disable-over-current;
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usdhc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
+ keep-power-in-suspend;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
+ fsl,wp-controller;
+ keep-power-in-suspend;
+ status = "disabled";
+};
+
+&usdhc4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc4>;
+ non-removable;
+ bus-width = <8>;
+ no-1-8-v;
+ keep-power-in-suspend;
+ status = "okay";
+};
+
+&weim {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ fsl,weim-cs-gpr = <&gpr>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_weim &pinctrl_weim_cs0 &pinctrl_weim_cs1>;
+ /* It is necessary to setup 2x 64MB otherwise setting gpr fails */
+ ranges = <0 0 0x08000000 0x04000000>, /* CS0 */
+ <1 0 0x0c000000 0x04000000>; /* CS1 */
+ status = "disabled";
+};
+
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <
@@ -679,108 +784,3 @@
>;
};
};
-
-&pcie {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pcie>;
-};
-
-®_arm {
- vin-supply = <&sw3_reg>;
-};
-
-®_soc {
- vin-supply = <&sw1_reg>;
-};
-
-®_pu {
- vin-supply = <&sw1_reg>;
-};
-
-®_vdd1p1 {
- vin-supply = <&sw2_reg>;
-};
-
-®_vdd2p5 {
- vin-supply = <&sw2_reg>;
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
- uart-has-rtscts;
- dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
- dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
- dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
- rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
- status = "okay";
-};
-
-&uart4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart4>;
- status = "okay";
-};
-
-&uart5 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart5>;
- uart-has-rtscts;
- status = "okay";
-};
-
-&usbh1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbh1>;
- vbus-supply = <®_usb_h1_vbus>;
- dr_mode = "host";
- status = "okay";
-};
-
-&usbotg {
- vbus-supply = <®_usb_otg_vbus>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbotg>;
- disable-over-current;
- dr_mode = "otg";
- status = "okay";
-};
-
-&usdhc2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc2>;
- cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
- keep-power-in-suspend;
- status = "okay";
-};
-
-&usdhc3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc3>;
- cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
- fsl,wp-controller;
- keep-power-in-suspend;
- status = "disabled";
-};
-
-&usdhc4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc4>;
- non-removable;
- bus-width = <8>;
- no-1-8-v;
- keep-power-in-suspend;
- status = "okay";
-};
-
-&weim {
- #address-cells = <2>;
- #size-cells = <1>;
- fsl,weim-cs-gpr = <&gpr>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_weim &pinctrl_weim_cs0 &pinctrl_weim_cs1>;
- /* It is necessary to setup 2x 64MB otherwise setting gpr fails */
- ranges = <0 0 0x08000000 0x04000000>, /* CS0 */
- <1 0 0x0c000000 0x04000000>; /* CS1 */
- status = "disabled";
-};
--
2.11.0
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next prev parent reply other threads:[~2021-05-26 14:06 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-26 10:53 [PATCH 00/20] ARM: dts: imx6q-dhcom: Fix/update PDK2 board and adding PicoITX and DRC02 board Christoph Niedermaier
2021-05-26 10:53 ` [PATCH 01/20] ARM: dts: imx6q-dhcom: Fix ethernet reset time properties Christoph Niedermaier
2021-06-12 4:14 ` Shawn Guo
2021-05-26 10:53 ` [PATCH 02/20] ARM: dts: imx6q-dhcom: Fix ethernet plugin detection problems Christoph Niedermaier
2021-06-12 4:14 ` Shawn Guo
2021-05-26 10:54 ` [PATCH 03/20] ARM: dts: imx6q-dhcom: Add gpios pinctrl for i2c bus recovery Christoph Niedermaier
2021-06-12 4:15 ` Shawn Guo
2021-05-26 10:54 ` [PATCH 04/20] ARM: dts: imx6q-dhcom: Add aliases for i2c, serial and rtc Christoph Niedermaier
2021-06-12 4:16 ` Shawn Guo
2021-05-26 10:54 ` [PATCH 05/20] ARM: dts: imx6q-dhcom: Add ethernet VIO regulator Christoph Niedermaier
2021-06-12 4:17 ` Shawn Guo
2021-05-26 10:54 ` [PATCH 06/20] ARM: dts: imx6q-dhcom: Add the parallel system bus Christoph Niedermaier
2021-06-12 4:19 ` Shawn Guo
2021-06-16 13:20 ` Christoph Niedermaier
2021-05-26 10:54 ` [PATCH 07/20] ARM: dts: imx6q-dhcom: Add interrupt and compatible to the ethernet PHY Christoph Niedermaier
2021-05-26 10:54 ` [PATCH 08/20] ARM: dts: imx6q-dhcom: Fill GPIO line names on DHCOM SoM Christoph Niedermaier
2021-05-26 10:54 ` [PATCH 09/20] ARM: dts: imx6q-dhcom: Adding Wake pin to the PCIe pinctrl Christoph Niedermaier
2021-05-26 10:54 ` [PATCH 10/20] ARM: dts: imx6q-dhcom: Align stdout-path with other DHCOM SoMs Christoph Niedermaier
2021-05-26 10:54 ` [PATCH 11/20] ARM: dts: imx6q-dhcom: Add keys and leds to the PDK2 board Christoph Niedermaier
2021-05-26 10:54 ` [PATCH 12/20] ARM: dts: imx6q-dhcom: Use 1G ethernet on " Christoph Niedermaier
2021-05-26 10:54 ` [PATCH 13/20] ARM: dts: imx6q-dhcom: Rework of the DHCOM GPIO pinctrls Christoph Niedermaier
2021-05-26 10:54 ` [PATCH 14/20] ARM: dts: imx6q-dhcom: Remove ddc-i2c-bus property Christoph Niedermaier
2021-05-26 10:54 ` [PATCH 15/20] ARM: dts: imx6q-dhcom: Set minimum memory size of all DHCOM i.MX6 variants Christoph Niedermaier
2021-05-26 10:54 ` Christoph Niedermaier [this message]
2021-05-26 10:54 ` [PATCH 17/20] ARM: dts: imx6q-dhcom: Cleanup of the devicetrees Christoph Niedermaier
2021-05-26 10:54 ` [PATCH 18/20] ARM: dts: imx6qdl-dhcom: Split SoC-independent parts of DHCOM SOM and PDK2 Christoph Niedermaier
2021-05-26 10:54 ` [PATCH 19/20] ARM: dts: imx6qdl-dhcom: Add DHCOM based PicoITX board Christoph Niedermaier
2021-05-26 10:54 ` [PATCH 20/20] ARM: dts: imx6qdl-dhcom: Add DHSOM based DRC02 board Christoph Niedermaier
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