* [freescale-fslc:pr/317 13/48] drivers/pci/controller/dwc/pci-imx6.c:2960 imx6_pcie_l1ss_quirk() warn: should this be a bitwise op?
@ 2021-05-26 12:56 ` Dan Carpenter
0 siblings, 0 replies; 2+ messages in thread
From: kernel test robot @ 2021-05-26 7:08 UTC (permalink / raw)
To: kbuild
[-- Attachment #1: Type: text/plain, Size: 10234 bytes --]
CC: kbuild-all(a)lists.01.org
TO: Otavio Salvador <otavio@ossystems.com.br>
tree: https://github.com/Freescale/linux-fslc pr/317
head: cffe4fb95c43405f2fe3ceab81948a12c8769724
commit: a32bd4692437b1a2fc977fc8b1302e6107b2f0d6 [13/48] MLK-25283-4 PCI: imx: adjust the l1ss support to proper place
:::::: branch date: 4 weeks ago
:::::: commit date: 4 weeks ago
config: i386-randconfig-m021-20210526 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
New smatch warnings:
drivers/pci/controller/dwc/pci-imx6.c:2960 imx6_pcie_l1ss_quirk() warn: should this be a bitwise op?
Old smatch warnings:
drivers/pci/controller/dwc/pci-imx6.c:635 imx6_pcie_attach_pd() warn: missing error code 'ret'
vim +2960 drivers/pci/controller/dwc/pci-imx6.c
bb38919ec56e07 drivers/pci/host/pci-imx6.c Sean Cross 2013-09-26 2889
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2890 static void imx6_pcie_quirk(struct pci_dev *dev)
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2891 {
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2892 struct pci_bus *bus = dev->bus;
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2893 struct pcie_port *pp = bus->sysdata;
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2894
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2895 /* Bus parent is the PCI bridge, its parent is this platform driver */
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2896 if (!bus->dev.parent || !bus->dev.parent->parent)
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2897 return;
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2898
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2899 /* Make sure we only quirk devices associated with this driver */
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2900 if (bus->dev.parent->parent->driver != &imx6_pcie_driver.driver)
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2901 return;
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2902
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2903 if (bus->number == pp->root_bus_nr) {
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2904 struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2905 struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2906
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2907 /*
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2908 * Limit config length to avoid the kernel reading beyond
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2909 * the register set and causing an abort on i.MX 6Quad
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2910 */
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2911 if (imx6_pcie->drvdata->dbi_length) {
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2912 dev->cfg_size = imx6_pcie->drvdata->dbi_length;
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2913 dev_info(&dev->dev, "Limiting cfg_size to %d\n",
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2914 dev->cfg_size);
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2915 }
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2916 }
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2917 }
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2918 DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_SYNOPSYS, 0xabcd,
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2919 PCI_CLASS_BRIDGE_PCI, 8, imx6_pcie_quirk);
075af61c19cdc3 drivers/pci/controller/dwc/pci-imx6.c Stefan Agner 2019-07-26 2920
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2921 static void imx6_pcie_l1ss_quirk(struct pci_dev *dev)
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2922 {
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2923 u32 reg, rc_l1sub, ep_l1sub, header;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2924 int ttl, ret;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2925 int pos = PCI_CFG_SPACE_SIZE;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2926 struct pci_bus *bus = dev->bus;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2927 struct pcie_port *pp = bus->sysdata;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2928 struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2929 struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2930
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2931 /* Return directly, if the L1SS is not supported by RC */
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2932 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_SUPPORTS_L1SS))
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2933 return;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2934
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2935 reg = dw_pcie_find_ext_capability(pci, PCI_EXT_CAP_ID_L1SS);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2936 rc_l1sub = dw_pcie_readl_dbi(pci, reg + PCI_L1SS_CAP);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2937
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2938 /* minimum 8 bytes per capability */
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2939 ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2940 ret = dw_pcie_read(pp->va_cfg0_base + pos, 4, &header);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2941 /*
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2942 * If we have no capabilities, this is indicated by cap ID,
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2943 * cap version and next pointer all being 0.
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2944 */
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2945 if (header == 0)
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2946 return;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2947
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2948 while (ttl-- > 0) {
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2949 if (PCI_EXT_CAP_ID(header) == PCI_EXT_CAP_ID_L1SS && pos != 0)
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2950 break;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2951
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2952 pos = PCI_EXT_CAP_NEXT(header);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2953 if (pos < PCI_CFG_SPACE_SIZE)
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2954 break;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2955
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2956 ret = dw_pcie_read(pp->va_cfg0_base + pos, 4, &header);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2957 }
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2958 ret = dw_pcie_read(pp->va_cfg0_base + pos + PCI_L1SS_CAP, 4, &ep_l1sub);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2959
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 @2960 if ((rc_l1sub && ep_l1sub) && PCI_L1SS_CAP_L1_PM_SS) {
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2961 imx6_pcie->l1ss_clkreq = 1;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2962 imx6_pcie_clkreq_enable(imx6_pcie);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2963 } else {
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2964 imx6_pcie->l1ss_clkreq = 0;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2965 }
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2966 }
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2967 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SYNOPSYS, 0xabcd, imx6_pcie_l1ss_quirk);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2968
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 31027 bytes --]
^ permalink raw reply [flat|nested] 2+ messages in thread
* [freescale-fslc:pr/317 13/48] drivers/pci/controller/dwc/pci-imx6.c:2960 imx6_pcie_l1ss_quirk() warn: should this be a bitwise op?
@ 2021-05-26 12:56 ` Dan Carpenter
0 siblings, 0 replies; 2+ messages in thread
From: Dan Carpenter @ 2021-05-26 12:56 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 6402 bytes --]
tree: https://github.com/Freescale/linux-fslc pr/317
head: cffe4fb95c43405f2fe3ceab81948a12c8769724
commit: a32bd4692437b1a2fc977fc8b1302e6107b2f0d6 [13/48] MLK-25283-4 PCI: imx: adjust the l1ss support to proper place
config: i386-randconfig-m021-20210526 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
New smatch warnings:
drivers/pci/controller/dwc/pci-imx6.c:2960 imx6_pcie_l1ss_quirk() warn: should this be a bitwise op?
Old smatch warnings:
drivers/pci/controller/dwc/pci-imx6.c:635 imx6_pcie_attach_pd() warn: missing error code 'ret'
vim +2960 drivers/pci/controller/dwc/pci-imx6.c
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2921 static void imx6_pcie_l1ss_quirk(struct pci_dev *dev)
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2922 {
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2923 u32 reg, rc_l1sub, ep_l1sub, header;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2924 int ttl, ret;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2925 int pos = PCI_CFG_SPACE_SIZE;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2926 struct pci_bus *bus = dev->bus;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2927 struct pcie_port *pp = bus->sysdata;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2928 struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2929 struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2930
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2931 /* Return directly, if the L1SS is not supported by RC */
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2932 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_SUPPORTS_L1SS))
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2933 return;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2934
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2935 reg = dw_pcie_find_ext_capability(pci, PCI_EXT_CAP_ID_L1SS);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2936 rc_l1sub = dw_pcie_readl_dbi(pci, reg + PCI_L1SS_CAP);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2937
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2938 /* minimum 8 bytes per capability */
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2939 ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2940 ret = dw_pcie_read(pp->va_cfg0_base + pos, 4, &header);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2941 /*
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2942 * If we have no capabilities, this is indicated by cap ID,
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2943 * cap version and next pointer all being 0.
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2944 */
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2945 if (header == 0)
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2946 return;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2947
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2948 while (ttl-- > 0) {
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2949 if (PCI_EXT_CAP_ID(header) == PCI_EXT_CAP_ID_L1SS && pos != 0)
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2950 break;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2951
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2952 pos = PCI_EXT_CAP_NEXT(header);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2953 if (pos < PCI_CFG_SPACE_SIZE)
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2954 break;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2955
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2956 ret = dw_pcie_read(pp->va_cfg0_base + pos, 4, &header);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2957 }
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2958 ret = dw_pcie_read(pp->va_cfg0_base + pos + PCI_L1SS_CAP, 4, &ep_l1sub);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2959
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 @2960 if ((rc_l1sub && ep_l1sub) && PCI_L1SS_CAP_L1_PM_SS) {
^^^^^^^^^^^^^^^^^^^^^
This define is non-zero in upstream and I can't pull the git branch
mentioned above, so...
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2961 imx6_pcie->l1ss_clkreq = 1;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2962 imx6_pcie_clkreq_enable(imx6_pcie);
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2963 } else {
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2964 imx6_pcie->l1ss_clkreq = 0;
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2965 }
a32bd4692437b1 drivers/pci/controller/dwc/pci-imx6.c Richard Zhu 2020-12-16 2966 }
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2021-05-26 12:56 UTC | newest]
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2021-05-26 7:08 [freescale-fslc:pr/317 13/48] drivers/pci/controller/dwc/pci-imx6.c:2960 imx6_pcie_l1ss_quirk() warn: should this be a bitwise op? kernel test robot
2021-05-26 12:56 ` Dan Carpenter
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