* [PATCH 1/6] drm/amdgpu: add amdgpu_bo_vm bo type
@ 2021-05-28 10:56 Nirmoy Das
2021-05-28 10:56 ` [PATCH v2 2/6] drm/amdgpu: move shadow bo validation to VM code Nirmoy Das
` (4 more replies)
0 siblings, 5 replies; 11+ messages in thread
From: Nirmoy Das @ 2021-05-28 10:56 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, Nirmoy Das, Christian König
Add new BO subclass that will be used by amdgpu vm code.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 32 ++++++++++++++++++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 10 +++++++
2 files changed, 42 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index e9f8701fd046..2e5426ab24a8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -694,6 +694,38 @@ int amdgpu_bo_create_user(struct amdgpu_device *adev,
*ubo_ptr = to_amdgpu_bo_user(bo_ptr);
return r;
}
+
+/**
+ * amdgpu_bo_create_vm - create an &amdgpu_bo_vm buffer object
+ * @adev: amdgpu device object
+ * @bp: parameters to be used for the buffer object
+ * @vmbo_ptr: pointer to the buffer object pointer
+ *
+ * Create a BO to be for GPUVM.
+ *
+ * Returns:
+ * 0 for success or a negative error code on failure.
+ */
+
+int amdgpu_bo_create_vm(struct amdgpu_device *adev,
+ struct amdgpu_bo_param *bp,
+ struct amdgpu_bo_vm **vmbo_ptr)
+{
+ struct amdgpu_bo *bo_ptr;
+ int r;
+
+ /* bo_ptr_size will be determined by the caller and it depends on
+ * num of amdgpu_vm_pt entries.
+ */
+ BUG_ON(bp->bo_ptr_size < sizeof(struct amdgpu_bo_vm));
+ r = amdgpu_bo_create(adev, bp, &bo_ptr);
+ if (r)
+ return r;
+
+ *vmbo_ptr = to_amdgpu_bo_vm(bo_ptr);
+ return r;
+}
+
/**
* amdgpu_bo_validate - validate an &amdgpu_bo buffer object
* @bo: pointer to the buffer object
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 11480c5a2716..a7fbf5f7051e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -44,6 +44,7 @@
#define AMDGPU_AMDKFD_CREATE_SVM_BO (1ULL << 62)
#define to_amdgpu_bo_user(abo) container_of((abo), struct amdgpu_bo_user, bo)
+#define to_amdgpu_bo_vm(abo) container_of((abo), struct amdgpu_bo_vm, bo)
struct amdgpu_bo_param {
unsigned long size;
@@ -125,6 +126,12 @@ struct amdgpu_bo_user {
};
+struct amdgpu_bo_vm {
+ struct amdgpu_bo bo;
+ struct amdgpu_bo *shadow;
+ struct amdgpu_vm_pt entries[];
+};
+
static inline struct amdgpu_bo *ttm_to_amdgpu_bo(struct ttm_buffer_object *tbo)
{
return container_of(tbo, struct amdgpu_bo, tbo);
@@ -272,6 +279,9 @@ int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
int amdgpu_bo_create_user(struct amdgpu_device *adev,
struct amdgpu_bo_param *bp,
struct amdgpu_bo_user **ubo_ptr);
+int amdgpu_bo_create_vm(struct amdgpu_device *adev,
+ struct amdgpu_bo_param *bp,
+ struct amdgpu_bo_vm **ubo_ptr);
void amdgpu_bo_free_kernel(struct amdgpu_bo **bo, u64 *gpu_addr,
void **cpu_addr);
int amdgpu_bo_create_shadow(struct amdgpu_device *adev,
--
2.31.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 2/6] drm/amdgpu: move shadow bo validation to VM code
2021-05-28 10:56 [PATCH 1/6] drm/amdgpu: add amdgpu_bo_vm bo type Nirmoy Das
@ 2021-05-28 10:56 ` Nirmoy Das
2021-05-28 10:56 ` [PATCH 3/6] drm/admgpu: add two shadow BO helper functions Nirmoy Das
` (3 subsequent siblings)
4 siblings, 0 replies; 11+ messages in thread
From: Nirmoy Das @ 2021-05-28 10:56 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, Nirmoy Das, Christian König
Do the shadow bo validation in the VM code as
VM code knows/owns shadow BOs.
v2: Fix a typo.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 23 ++++-------------------
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 5 +++++
2 files changed, 9 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 90136f9dedd6..f6a8f0c5a52f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -396,10 +396,10 @@ void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes,
spin_unlock(&adev->mm_stats.lock);
}
-static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
- struct amdgpu_bo *bo)
+static int amdgpu_cs_bo_validate(void *param, struct amdgpu_bo *bo)
{
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+ struct amdgpu_cs_parser *p = param;
struct ttm_operation_ctx ctx = {
.interruptible = true,
.no_wait_gpu = false,
@@ -451,21 +451,6 @@ static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
return r;
}
-static int amdgpu_cs_validate(void *param, struct amdgpu_bo *bo)
-{
- struct amdgpu_cs_parser *p = param;
- int r;
-
- r = amdgpu_cs_bo_validate(p, bo);
- if (r)
- return r;
-
- if (bo->shadow)
- r = amdgpu_cs_bo_validate(p, bo->shadow);
-
- return r;
-}
-
static int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p,
struct list_head *validated)
{
@@ -493,7 +478,7 @@ static int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p,
lobj->user_pages);
}
- r = amdgpu_cs_validate(p, bo);
+ r = amdgpu_cs_bo_validate(p, bo);
if (r)
return r;
@@ -593,7 +578,7 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
p->bytes_moved_vis = 0;
r = amdgpu_vm_validate_pt_bos(p->adev, &fpriv->vm,
- amdgpu_cs_validate, p);
+ amdgpu_cs_bo_validate, p);
if (r) {
DRM_ERROR("amdgpu_vm_validate_pt_bos() failed.\n");
goto error_validate;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index da155c276c51..6bc7566cc193 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -696,6 +696,11 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
r = validate(param, bo);
if (r)
return r;
+ if (bo->shadow) {
+ r = validate(param, bo->shadow);
+ if (r)
+ return r;
+ }
if (bo->tbo.type != ttm_bo_type_kernel) {
amdgpu_vm_bo_moved(bo_base);
--
2.31.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 3/6] drm/admgpu: add two shadow BO helper functions
2021-05-28 10:56 [PATCH 1/6] drm/amdgpu: add amdgpu_bo_vm bo type Nirmoy Das
2021-05-28 10:56 ` [PATCH v2 2/6] drm/amdgpu: move shadow bo validation to VM code Nirmoy Das
@ 2021-05-28 10:56 ` Nirmoy Das
2021-05-28 10:56 ` [PATCH v4 4/6] drm/amdgpu: switch to amdgpu_bo_vm for vm code Nirmoy Das
` (2 subsequent siblings)
4 siblings, 0 replies; 11+ messages in thread
From: Nirmoy Das @ 2021-05-28 10:56 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, Nirmoy Das, Christian König
Add amdgpu_bo_add_to_shadow_list() to handle shadow list
additions and amdgpu_bo_shadowed() to check if a BO is shadowed.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 16 ++++++++++++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 17 +++++++++++++++++
2 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 2e5426ab24a8..89ba612a5080 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -760,6 +760,22 @@ int amdgpu_bo_validate(struct amdgpu_bo *bo)
return r;
}
+/**
+ * amdgpu_bo_add_to_shadow_list - add a BO to the shadow list
+ *
+ * @bo: BO that will be inserted into the shadow list
+ *
+ * Insert a BO to the shadow list.
+ */
+void amdgpu_bo_add_to_shadow_list(struct amdgpu_bo *bo)
+{
+ struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+
+ mutex_lock(&adev->shadow_list_lock);
+ list_add_tail(&bo->shadow_list, &adev->shadow_list);
+ mutex_unlock(&adev->shadow_list_lock);
+}
+
/**
* amdgpu_bo_restore_shadow - restore an &amdgpu_bo shadow
*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index a7fbf5f7051e..9afccf6c66f2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -259,6 +259,22 @@ static inline bool amdgpu_bo_encrypted(struct amdgpu_bo *bo)
return bo->flags & AMDGPU_GEM_CREATE_ENCRYPTED;
}
+/**
+ * amdgpu_bo_shadowed - check if the BO is shadowed
+ *
+ * @bo: BO to be tested.
+ *
+ * Returns:
+ * NULL if not shadowed or else return a BO pointer.
+ */
+static inline struct amdgpu_bo *amdgpu_bo_shadowed(struct amdgpu_bo *bo)
+{
+ if (bo->tbo.type == ttm_bo_type_kernel)
+ return to_amdgpu_bo_vm(bo)->shadow;
+
+ return NULL;
+}
+
bool amdgpu_bo_is_amdgpu_bo(struct ttm_buffer_object *bo);
void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain);
@@ -322,6 +338,7 @@ u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo);
int amdgpu_bo_validate(struct amdgpu_bo *bo);
void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
uint64_t *gtt_mem, uint64_t *cpu_mem);
+void amdgpu_bo_add_to_shadow_list(struct amdgpu_bo *bo);
int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow,
struct dma_fence **fence);
uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev,
--
2.31.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v4 4/6] drm/amdgpu: switch to amdgpu_bo_vm for vm code
2021-05-28 10:56 [PATCH 1/6] drm/amdgpu: add amdgpu_bo_vm bo type Nirmoy Das
2021-05-28 10:56 ` [PATCH v2 2/6] drm/amdgpu: move shadow bo validation to VM code Nirmoy Das
2021-05-28 10:56 ` [PATCH 3/6] drm/admgpu: add two shadow BO helper functions Nirmoy Das
@ 2021-05-28 10:56 ` Nirmoy Das
2021-05-28 14:06 ` Christian König
2021-05-28 10:56 ` [PATCH v2 5/6] drm/amdgpu: remove unused code Nirmoy Das
2021-05-28 10:56 ` [PATCH v2 6/6] drm/amdgpu: do not allocate entries separately Nirmoy Das
4 siblings, 1 reply; 11+ messages in thread
From: Nirmoy Das @ 2021-05-28 10:56 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, Nirmoy Das, Christian.Koenig
The subclass, amdgpu_bo_vm is intended for PT/PD BOs which are also
shadowed, so switch to amdgpu_bo_vm BO for PT/PD BOs.
v4: update amdgpu_vm_update_funcs to accept amdgpu_bo_vm.
v3: simplify code.
check also if shadow bo exist instead of checking bo only type.
v2: squash three related patches.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 123 ++++++++++++--------
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c | 14 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c | 19 +--
4 files changed, 96 insertions(+), 65 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 6bc7566cc193..223c63342ecd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -652,15 +652,15 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev,
spin_lock(&adev->mman.bdev.lru_lock);
list_for_each_entry(bo_base, &vm->idle, vm_status) {
struct amdgpu_bo *bo = bo_base->bo;
+ struct amdgpu_bo *shadow = amdgpu_bo_shadowed(bo);
if (!bo->parent)
continue;
ttm_bo_move_to_lru_tail(&bo->tbo, &bo->tbo.mem,
&vm->lru_bulk_move);
- if (bo->shadow)
- ttm_bo_move_to_lru_tail(&bo->shadow->tbo,
- &bo->shadow->tbo.mem,
+ if (shadow)
+ ttm_bo_move_to_lru_tail(&shadow->tbo, &shadow->tbo.mem,
&vm->lru_bulk_move);
}
spin_unlock(&adev->mman.bdev.lru_lock);
@@ -692,12 +692,13 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
list_for_each_entry_safe(bo_base, tmp, &vm->evicted, vm_status) {
struct amdgpu_bo *bo = bo_base->bo;
+ struct amdgpu_bo *shadow = amdgpu_bo_shadowed(bo);
r = validate(param, bo);
if (r)
return r;
- if (bo->shadow) {
- r = validate(param, bo->shadow);
+ if (shadow) {
+ r = validate(param, shadow);
if (r)
return r;
}
@@ -705,7 +706,7 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
if (bo->tbo.type != ttm_bo_type_kernel) {
amdgpu_vm_bo_moved(bo_base);
} else {
- vm->update_funcs->map_table(bo);
+ vm->update_funcs->map_table(to_amdgpu_bo_vm(bo));
amdgpu_vm_bo_relocated(bo_base);
}
}
@@ -737,7 +738,7 @@ bool amdgpu_vm_ready(struct amdgpu_vm *vm)
*
* @adev: amdgpu_device pointer
* @vm: VM to clear BO from
- * @bo: BO to clear
+ * @vmbo: BO to clear
* @immediate: use an immediate update
*
* Root PD needs to be reserved when calling this.
@@ -747,13 +748,14 @@ bool amdgpu_vm_ready(struct amdgpu_vm *vm)
*/
static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
struct amdgpu_vm *vm,
- struct amdgpu_bo *bo,
+ struct amdgpu_bo_vm *vmbo,
bool immediate)
{
struct ttm_operation_ctx ctx = { true, false };
unsigned level = adev->vm_manager.root_level;
struct amdgpu_vm_update_params params;
- struct amdgpu_bo *ancestor = bo;
+ struct amdgpu_bo *ancestor = &vmbo->bo;
+ struct amdgpu_bo *bo = &vmbo->bo;
unsigned entries, ats_entries;
uint64_t addr;
int r;
@@ -793,14 +795,15 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
if (r)
return r;
- if (bo->shadow) {
- r = ttm_bo_validate(&bo->shadow->tbo, &bo->shadow->placement,
- &ctx);
+ if (vmbo->shadow) {
+ struct amdgpu_bo *shadow = vmbo->shadow;
+
+ r = ttm_bo_validate(&shadow->tbo, &shadow->placement, &ctx);
if (r)
return r;
}
- r = vm->update_funcs->map_table(bo);
+ r = vm->update_funcs->map_table(vmbo);
if (r)
return r;
@@ -824,7 +827,7 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
amdgpu_gmc_get_vm_pde(adev, level, &value, &flags);
}
- r = vm->update_funcs->update(¶ms, bo, addr, 0, ats_entries,
+ r = vm->update_funcs->update(¶ms, vmbo, addr, 0, ats_entries,
value, flags);
if (r)
return r;
@@ -847,7 +850,7 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
}
}
- r = vm->update_funcs->update(¶ms, bo, addr, 0, entries,
+ r = vm->update_funcs->update(¶ms, vmbo, addr, 0, entries,
value, flags);
if (r)
return r;
@@ -863,14 +866,16 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
* @vm: requesting vm
* @level: the page table level
* @immediate: use a immediate update
- * @bo: pointer to the buffer object pointer
+ * @vmbo: pointer to the buffer object pointer
*/
static int amdgpu_vm_pt_create(struct amdgpu_device *adev,
struct amdgpu_vm *vm,
int level, bool immediate,
- struct amdgpu_bo **bo)
+ struct amdgpu_bo_vm **vmbo)
{
struct amdgpu_bo_param bp;
+ struct amdgpu_bo *bo;
+ struct dma_resv *resv;
int r;
memset(&bp, 0, sizeof(bp));
@@ -881,7 +886,7 @@ static int amdgpu_vm_pt_create(struct amdgpu_device *adev,
bp.domain = amdgpu_bo_get_preferred_pin_domain(adev, bp.domain);
bp.flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
AMDGPU_GEM_CREATE_CPU_GTT_USWC;
- bp.bo_ptr_size = sizeof(struct amdgpu_bo);
+ bp.bo_ptr_size = sizeof(struct amdgpu_bo_vm);
if (vm->use_cpu_for_update)
bp.flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
@@ -890,26 +895,41 @@ static int amdgpu_vm_pt_create(struct amdgpu_device *adev,
if (vm->root.base.bo)
bp.resv = vm->root.base.bo->tbo.base.resv;
- r = amdgpu_bo_create(adev, &bp, bo);
+ r = amdgpu_bo_create_vm(adev, &bp, vmbo);
if (r)
return r;
- if (vm->is_compute_context && (adev->flags & AMD_IS_APU))
+ bo = &(*vmbo)->bo;
+ if (vm->is_compute_context && (adev->flags & AMD_IS_APU)) {
+ (*vmbo)->shadow = NULL;
return 0;
+ }
if (!bp.resv)
- WARN_ON(dma_resv_lock((*bo)->tbo.base.resv,
+ WARN_ON(dma_resv_lock(bo->tbo.base.resv,
NULL));
- r = amdgpu_bo_create_shadow(adev, bp.size, *bo);
+ resv = bp.resv;
+ memset(&bp, 0, sizeof(bp));
+ bp.size = amdgpu_vm_bo_size(adev, level);
+ bp.domain = AMDGPU_GEM_DOMAIN_GTT;
+ bp.flags = AMDGPU_GEM_CREATE_CPU_GTT_USWC;
+ bp.type = ttm_bo_type_kernel;
+ bp.resv = bo->tbo.base.resv;
+ bp.bo_ptr_size = sizeof(struct amdgpu_bo);
- if (!bp.resv)
- dma_resv_unlock((*bo)->tbo.base.resv);
+ r = amdgpu_bo_create(adev, &bp, &(*vmbo)->shadow);
+
+ if (!resv)
+ dma_resv_unlock(bo->tbo.base.resv);
if (r) {
- amdgpu_bo_unref(bo);
+ amdgpu_bo_unref(&bo);
return r;
}
+ (*vmbo)->shadow->parent = amdgpu_bo_ref(bo);
+ amdgpu_bo_add_to_shadow_list((*vmbo)->shadow);
+
return 0;
}
@@ -933,7 +953,8 @@ static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
bool immediate)
{
struct amdgpu_vm_pt *entry = cursor->entry;
- struct amdgpu_bo *pt;
+ struct amdgpu_bo *pt_bo;
+ struct amdgpu_bo_vm *pt;
int r;
if (cursor->level < AMDGPU_VM_PTB && !entry->entries) {
@@ -957,8 +978,9 @@ static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
/* Keep a reference to the root directory to avoid
* freeing them up in the wrong order.
*/
- pt->parent = amdgpu_bo_ref(cursor->parent->base.bo);
- amdgpu_vm_bo_base_init(&entry->base, vm, pt);
+ pt_bo = &pt->bo;
+ pt_bo->parent = amdgpu_bo_ref(cursor->parent->base.bo);
+ amdgpu_vm_bo_base_init(&entry->base, vm, pt_bo);
r = amdgpu_vm_clear_bo(adev, vm, pt, immediate);
if (r)
@@ -968,7 +990,7 @@ static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
error_free_pt:
amdgpu_bo_unref(&pt->shadow);
- amdgpu_bo_unref(&pt);
+ amdgpu_bo_unref(&pt_bo);
return r;
}
@@ -979,10 +1001,13 @@ static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
*/
static void amdgpu_vm_free_table(struct amdgpu_vm_pt *entry)
{
+ struct amdgpu_bo *shadow;
+
if (entry->base.bo) {
+ shadow = amdgpu_bo_shadowed(entry->base.bo);
entry->base.bo->vm_bo = NULL;
list_del(&entry->base.vm_status);
- amdgpu_bo_unref(&entry->base.bo->shadow);
+ amdgpu_bo_unref(&shadow);
amdgpu_bo_unref(&entry->base.bo);
}
kvfree(entry->entries);
@@ -1284,7 +1309,8 @@ static int amdgpu_vm_update_pde(struct amdgpu_vm_update_params *params,
level += params->adev->vm_manager.root_level;
amdgpu_gmc_get_pde_for_bo(entry->base.bo, level, &pt, &flags);
pde = (entry - parent->entries) * 8;
- return vm->update_funcs->update(params, bo, pde, pt, 1, 0, flags);
+ return vm->update_funcs->update(params, to_amdgpu_bo_vm(bo), pde, pt,
+ 1, 0, flags);
}
/**
@@ -1364,9 +1390,9 @@ int amdgpu_vm_update_pdes(struct amdgpu_device *adev,
* Make sure to set the right flags for the PTEs at the desired level.
*/
static void amdgpu_vm_update_flags(struct amdgpu_vm_update_params *params,
- struct amdgpu_bo *bo, unsigned level,
+ struct amdgpu_bo_vm *pt, unsigned int level,
uint64_t pe, uint64_t addr,
- unsigned count, uint32_t incr,
+ unsigned int count, uint32_t incr,
uint64_t flags)
{
@@ -1382,7 +1408,7 @@ static void amdgpu_vm_update_flags(struct amdgpu_vm_update_params *params,
flags |= AMDGPU_PTE_EXECUTABLE;
}
- params->vm->update_funcs->update(params, bo, pe, addr, count, incr,
+ params->vm->update_funcs->update(params, pt, pe, addr, count, incr,
flags);
}
@@ -1562,9 +1588,9 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
nptes, dst, incr, upd_flags,
vm->task_info.pid,
vm->immediate.fence_context);
- amdgpu_vm_update_flags(params, pt, cursor.level,
- pe_start, dst, nptes, incr,
- upd_flags);
+ amdgpu_vm_update_flags(params, to_amdgpu_bo_vm(pt),
+ cursor.level, pe_start, dst,
+ nptes, incr, upd_flags);
pe_start += nptes * 8;
dst += nptes * incr;
@@ -2674,7 +2700,7 @@ void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,
struct amdgpu_vm_bo_base *bo_base;
/* shadow bo doesn't have bo base, its validation needs its parent */
- if (bo->parent && bo->parent->shadow == bo)
+ if (bo->parent && (amdgpu_bo_shadowed(bo->parent) == bo))
bo = bo->parent;
for (bo_base = bo->vm_bo; bo_base; bo_base = bo_base->next) {
@@ -2843,7 +2869,8 @@ long amdgpu_vm_wait_idle(struct amdgpu_vm *vm, long timeout)
*/
int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, u32 pasid)
{
- struct amdgpu_bo *root;
+ struct amdgpu_bo *root_bo;
+ struct amdgpu_bo_vm *root;
int r, i;
vm->va = RB_ROOT_CACHED;
@@ -2897,16 +2924,16 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, u32 pasid)
false, &root);
if (r)
goto error_free_delayed;
-
- r = amdgpu_bo_reserve(root, true);
+ root_bo = &root->bo;
+ r = amdgpu_bo_reserve(root_bo, true);
if (r)
goto error_free_root;
- r = dma_resv_reserve_shared(root->tbo.base.resv, 1);
+ r = dma_resv_reserve_shared(root_bo->tbo.base.resv, 1);
if (r)
goto error_unreserve;
- amdgpu_vm_bo_base_init(&vm->root.base, vm, root);
+ amdgpu_vm_bo_base_init(&vm->root.base, vm, root_bo);
r = amdgpu_vm_clear_bo(adev, vm, root, false);
if (r)
@@ -2935,8 +2962,8 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, u32 pasid)
amdgpu_bo_unreserve(vm->root.base.bo);
error_free_root:
- amdgpu_bo_unref(&vm->root.base.bo->shadow);
- amdgpu_bo_unref(&vm->root.base.bo);
+ amdgpu_bo_unref(&root->shadow);
+ amdgpu_bo_unref(&root_bo);
vm->root.base.bo = NULL;
error_free_delayed:
@@ -3034,7 +3061,9 @@ int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm,
*/
if (pte_support_ats != vm->pte_support_ats) {
vm->pte_support_ats = pte_support_ats;
- r = amdgpu_vm_clear_bo(adev, vm, vm->root.base.bo, false);
+ r = amdgpu_vm_clear_bo(adev, vm,
+ to_amdgpu_bo_vm(vm->root.base.bo),
+ false);
if (r)
goto free_idr;
}
@@ -3078,7 +3107,7 @@ int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm,
}
/* Free the shadow bo for compute VM */
- amdgpu_bo_unref(&vm->root.base.bo->shadow);
+ amdgpu_bo_unref(&to_amdgpu_bo_vm(vm->root.base.bo)->shadow);
if (pasid)
vm->pasid = pasid;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 39d60e3c4e32..bee439dd673a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -39,6 +39,7 @@
struct amdgpu_bo_va;
struct amdgpu_job;
struct amdgpu_bo_list_entry;
+struct amdgpu_bo_vm;
/*
* GPUVM handling
@@ -239,11 +240,11 @@ struct amdgpu_vm_update_params {
};
struct amdgpu_vm_update_funcs {
- int (*map_table)(struct amdgpu_bo *bo);
+ int (*map_table)(struct amdgpu_bo_vm *bo);
int (*prepare)(struct amdgpu_vm_update_params *p, struct dma_resv *resv,
enum amdgpu_sync_mode sync_mode);
int (*update)(struct amdgpu_vm_update_params *p,
- struct amdgpu_bo *bo, uint64_t pe, uint64_t addr,
+ struct amdgpu_bo_vm *bo, uint64_t pe, uint64_t addr,
unsigned count, uint32_t incr, uint64_t flags);
int (*commit)(struct amdgpu_vm_update_params *p,
struct dma_fence **fence);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c
index ac45d9c7a4e9..03a44be50dd7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c
@@ -29,9 +29,9 @@
*
* @table: newly allocated or validated PD/PT
*/
-static int amdgpu_vm_cpu_map_table(struct amdgpu_bo *table)
+static int amdgpu_vm_cpu_map_table(struct amdgpu_bo_vm *table)
{
- return amdgpu_bo_kmap(table, NULL);
+ return amdgpu_bo_kmap(&table->bo, NULL);
}
/**
@@ -58,7 +58,7 @@ static int amdgpu_vm_cpu_prepare(struct amdgpu_vm_update_params *p,
* amdgpu_vm_cpu_update - helper to update page tables via CPU
*
* @p: see amdgpu_vm_update_params definition
- * @bo: PD/PT to update
+ * @vmbo: PD/PT to update
* @pe: byte offset of the PDE/PTE, relative to start of PDB/PTB
* @addr: dst addr to write into pe
* @count: number of page entries to update
@@ -68,7 +68,7 @@ static int amdgpu_vm_cpu_prepare(struct amdgpu_vm_update_params *p,
* Write count number of PT/PD entries directly.
*/
static int amdgpu_vm_cpu_update(struct amdgpu_vm_update_params *p,
- struct amdgpu_bo *bo, uint64_t pe,
+ struct amdgpu_bo_vm *vmbo, uint64_t pe,
uint64_t addr, unsigned count, uint32_t incr,
uint64_t flags)
{
@@ -76,13 +76,13 @@ static int amdgpu_vm_cpu_update(struct amdgpu_vm_update_params *p,
uint64_t value;
int r;
- if (bo->tbo.moving) {
- r = dma_fence_wait(bo->tbo.moving, true);
+ if (vmbo->bo.tbo.moving) {
+ r = dma_fence_wait(vmbo->bo.tbo.moving, true);
if (r)
return r;
}
- pe += (unsigned long)amdgpu_bo_kptr(bo);
+ pe += (unsigned long)amdgpu_bo_kptr(&vmbo->bo);
trace_amdgpu_vm_set_ptes(pe, addr, count, incr, flags, p->immediate);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
index a83a646759c5..422958152c2b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
@@ -33,11 +33,11 @@
*
* @table: newly allocated or validated PD/PT
*/
-static int amdgpu_vm_sdma_map_table(struct amdgpu_bo *table)
+static int amdgpu_vm_sdma_map_table(struct amdgpu_bo_vm *table)
{
int r;
- r = amdgpu_ttm_alloc_gart(&table->tbo);
+ r = amdgpu_ttm_alloc_gart(&table->bo.tbo);
if (r)
return r;
@@ -186,7 +186,7 @@ static void amdgpu_vm_sdma_set_ptes(struct amdgpu_vm_update_params *p,
* amdgpu_vm_sdma_update - execute VM update
*
* @p: see amdgpu_vm_update_params definition
- * @bo: PD/PT to update
+ * @vmbo: PD/PT to update
* @pe: byte offset of the PDE/PTE, relative to start of PDB/PTB
* @addr: dst addr to write into pe
* @count: number of page entries to update
@@ -197,10 +197,11 @@ static void amdgpu_vm_sdma_set_ptes(struct amdgpu_vm_update_params *p,
* the IB.
*/
static int amdgpu_vm_sdma_update(struct amdgpu_vm_update_params *p,
- struct amdgpu_bo *bo, uint64_t pe,
+ struct amdgpu_bo_vm *vmbo, uint64_t pe,
uint64_t addr, unsigned count, uint32_t incr,
uint64_t flags)
{
+ struct amdgpu_bo *bo = &vmbo->bo;
enum amdgpu_ib_pool_type pool = p->immediate ? AMDGPU_IB_POOL_IMMEDIATE
: AMDGPU_IB_POOL_DELAYED;
unsigned int i, ndw, nptes;
@@ -238,8 +239,8 @@ static int amdgpu_vm_sdma_update(struct amdgpu_vm_update_params *p,
if (!p->pages_addr) {
/* set page commands needed */
- if (bo->shadow)
- amdgpu_vm_sdma_set_ptes(p, bo->shadow, pe, addr,
+ if (vmbo->shadow)
+ amdgpu_vm_sdma_set_ptes(p, vmbo->shadow, pe, addr,
count, incr, flags);
amdgpu_vm_sdma_set_ptes(p, bo, pe, addr, count,
incr, flags);
@@ -248,7 +249,7 @@ static int amdgpu_vm_sdma_update(struct amdgpu_vm_update_params *p,
/* copy commands needed */
ndw -= p->adev->vm_manager.vm_pte_funcs->copy_pte_num_dw *
- (bo->shadow ? 2 : 1);
+ (vmbo->shadow ? 2 : 1);
/* for padding */
ndw -= 7;
@@ -263,8 +264,8 @@ static int amdgpu_vm_sdma_update(struct amdgpu_vm_update_params *p,
pte[i] |= flags;
}
- if (bo->shadow)
- amdgpu_vm_sdma_copy_ptes(p, bo->shadow, pe, nptes);
+ if (vmbo->shadow)
+ amdgpu_vm_sdma_copy_ptes(p, vmbo->shadow, pe, nptes);
amdgpu_vm_sdma_copy_ptes(p, bo, pe, nptes);
pe += nptes * 8;
--
2.31.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 5/6] drm/amdgpu: remove unused code
2021-05-28 10:56 [PATCH 1/6] drm/amdgpu: add amdgpu_bo_vm bo type Nirmoy Das
` (2 preceding siblings ...)
2021-05-28 10:56 ` [PATCH v4 4/6] drm/amdgpu: switch to amdgpu_bo_vm for vm code Nirmoy Das
@ 2021-05-28 10:56 ` Nirmoy Das
2021-05-28 10:56 ` [PATCH v2 6/6] drm/amdgpu: do not allocate entries separately Nirmoy Das
4 siblings, 0 replies; 11+ messages in thread
From: Nirmoy Das @ 2021-05-28 10:56 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, Nirmoy Das, Christian König
Remove unused code related to shadow BO.
v2: removing shadow bo ptr from base class.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 29 ----------------------
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 6 -----
2 files changed, 35 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 89ba612a5080..15cee49f11e2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -638,35 +638,6 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
return r;
}
-int amdgpu_bo_create_shadow(struct amdgpu_device *adev,
- unsigned long size,
- struct amdgpu_bo *bo)
-{
- struct amdgpu_bo_param bp;
- int r;
-
- if (bo->shadow)
- return 0;
-
- memset(&bp, 0, sizeof(bp));
- bp.size = size;
- bp.domain = AMDGPU_GEM_DOMAIN_GTT;
- bp.flags = AMDGPU_GEM_CREATE_CPU_GTT_USWC;
- bp.type = ttm_bo_type_kernel;
- bp.resv = bo->tbo.base.resv;
- bp.bo_ptr_size = sizeof(struct amdgpu_bo);
-
- r = amdgpu_bo_create(adev, &bp, &bo->shadow);
- if (!r) {
- bo->shadow->parent = amdgpu_bo_ref(bo);
- mutex_lock(&adev->shadow_list_lock);
- list_add_tail(&bo->shadow->shadow_list, &adev->shadow_list);
- mutex_unlock(&adev->shadow_list_lock);
- }
-
- return r;
-}
-
/**
* amdgpu_bo_create_user - create an &amdgpu_bo_user buffer object
* @adev: amdgpu device object
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 9afccf6c66f2..fa75251148be 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -104,9 +104,6 @@ struct amdgpu_bo {
struct amdgpu_vm_bo_base *vm_bo;
/* Constant after initialization */
struct amdgpu_bo *parent;
- struct amdgpu_bo *shadow;
-
-
#ifdef CONFIG_MMU_NOTIFIER
struct mmu_interval_notifier notifier;
@@ -300,9 +297,6 @@ int amdgpu_bo_create_vm(struct amdgpu_device *adev,
struct amdgpu_bo_vm **ubo_ptr);
void amdgpu_bo_free_kernel(struct amdgpu_bo **bo, u64 *gpu_addr,
void **cpu_addr);
-int amdgpu_bo_create_shadow(struct amdgpu_device *adev,
- unsigned long size,
- struct amdgpu_bo *bo);
int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr);
void *amdgpu_bo_kptr(struct amdgpu_bo *bo);
void amdgpu_bo_kunmap(struct amdgpu_bo *bo);
--
2.31.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 6/6] drm/amdgpu: do not allocate entries separately
2021-05-28 10:56 [PATCH 1/6] drm/amdgpu: add amdgpu_bo_vm bo type Nirmoy Das
` (3 preceding siblings ...)
2021-05-28 10:56 ` [PATCH v2 5/6] drm/amdgpu: remove unused code Nirmoy Das
@ 2021-05-28 10:56 ` Nirmoy Das
2021-05-28 14:09 ` Christian König
4 siblings, 1 reply; 11+ messages in thread
From: Nirmoy Das @ 2021-05-28 10:56 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, Nirmoy Das, Christian.Koenig
Allocate PD/PT entries while allocating VM BOs and use that
instead of allocating those entries separately.
v2: create a new var for num entries.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 34 +++++++++++++++-----------
1 file changed, 20 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 223c63342ecd..7e478ffb7fdf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -877,6 +877,7 @@ static int amdgpu_vm_pt_create(struct amdgpu_device *adev,
struct amdgpu_bo *bo;
struct dma_resv *resv;
int r;
+ unsigned int num_entries;
memset(&bp, 0, sizeof(bp));
@@ -886,7 +887,14 @@ static int amdgpu_vm_pt_create(struct amdgpu_device *adev,
bp.domain = amdgpu_bo_get_preferred_pin_domain(adev, bp.domain);
bp.flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
AMDGPU_GEM_CREATE_CPU_GTT_USWC;
- bp.bo_ptr_size = sizeof(struct amdgpu_bo_vm);
+
+ if (level < AMDGPU_VM_PTB)
+ num_entries = amdgpu_vm_num_entries(adev, level);
+ else
+ num_entries = 0;
+
+ bp.bo_ptr_size = struct_size((*vmbo), entries, num_entries);
+
if (vm->use_cpu_for_update)
bp.flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
@@ -957,19 +965,14 @@ static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
struct amdgpu_bo_vm *pt;
int r;
- if (cursor->level < AMDGPU_VM_PTB && !entry->entries) {
- unsigned num_entries;
-
- num_entries = amdgpu_vm_num_entries(adev, cursor->level);
- entry->entries = kvmalloc_array(num_entries,
- sizeof(*entry->entries),
- GFP_KERNEL | __GFP_ZERO);
- if (!entry->entries)
- return -ENOMEM;
- }
-
- if (entry->base.bo)
+ if (entry->base.bo) {
+ if (cursor->level < AMDGPU_VM_PTB)
+ entry->entries =
+ to_amdgpu_bo_vm(entry->base.bo)->entries;
+ else
+ entry->entries = NULL;
return 0;
+ }
r = amdgpu_vm_pt_create(adev, vm, cursor->level, immediate, &pt);
if (r)
@@ -981,6 +984,10 @@ static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
pt_bo = &pt->bo;
pt_bo->parent = amdgpu_bo_ref(cursor->parent->base.bo);
amdgpu_vm_bo_base_init(&entry->base, vm, pt_bo);
+ if (cursor->level < AMDGPU_VM_PTB)
+ entry->entries = pt->entries;
+ else
+ entry->entries = NULL;
r = amdgpu_vm_clear_bo(adev, vm, pt, immediate);
if (r)
@@ -1010,7 +1017,6 @@ static void amdgpu_vm_free_table(struct amdgpu_vm_pt *entry)
amdgpu_bo_unref(&shadow);
amdgpu_bo_unref(&entry->base.bo);
}
- kvfree(entry->entries);
entry->entries = NULL;
}
--
2.31.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v4 4/6] drm/amdgpu: switch to amdgpu_bo_vm for vm code
2021-05-28 10:56 ` [PATCH v4 4/6] drm/amdgpu: switch to amdgpu_bo_vm for vm code Nirmoy Das
@ 2021-05-28 14:06 ` Christian König
0 siblings, 0 replies; 11+ messages in thread
From: Christian König @ 2021-05-28 14:06 UTC (permalink / raw)
To: Nirmoy Das, amd-gfx; +Cc: alexander.deucher
Am 28.05.21 um 12:56 schrieb Nirmoy Das:
> The subclass, amdgpu_bo_vm is intended for PT/PD BOs which are also
> shadowed, so switch to amdgpu_bo_vm BO for PT/PD BOs.
>
> v4: update amdgpu_vm_update_funcs to accept amdgpu_bo_vm.
> v3: simplify code.
> check also if shadow bo exist instead of checking bo only type.
> v2: squash three related patches.
>
> Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 123 ++++++++++++--------
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 5 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c | 14 +--
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c | 19 +--
> 4 files changed, 96 insertions(+), 65 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 6bc7566cc193..223c63342ecd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -652,15 +652,15 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev,
> spin_lock(&adev->mman.bdev.lru_lock);
> list_for_each_entry(bo_base, &vm->idle, vm_status) {
> struct amdgpu_bo *bo = bo_base->bo;
> + struct amdgpu_bo *shadow = amdgpu_bo_shadowed(bo);
>
> if (!bo->parent)
> continue;
>
> ttm_bo_move_to_lru_tail(&bo->tbo, &bo->tbo.mem,
> &vm->lru_bulk_move);
> - if (bo->shadow)
> - ttm_bo_move_to_lru_tail(&bo->shadow->tbo,
> - &bo->shadow->tbo.mem,
> + if (shadow)
> + ttm_bo_move_to_lru_tail(&shadow->tbo, &shadow->tbo.mem,
> &vm->lru_bulk_move);
> }
> spin_unlock(&adev->mman.bdev.lru_lock);
> @@ -692,12 +692,13 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
>
> list_for_each_entry_safe(bo_base, tmp, &vm->evicted, vm_status) {
> struct amdgpu_bo *bo = bo_base->bo;
> + struct amdgpu_bo *shadow = amdgpu_bo_shadowed(bo);
>
> r = validate(param, bo);
> if (r)
> return r;
> - if (bo->shadow) {
> - r = validate(param, bo->shadow);
> + if (shadow) {
> + r = validate(param, shadow);
> if (r)
> return r;
> }
> @@ -705,7 +706,7 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
> if (bo->tbo.type != ttm_bo_type_kernel) {
> amdgpu_vm_bo_moved(bo_base);
> } else {
> - vm->update_funcs->map_table(bo);
> + vm->update_funcs->map_table(to_amdgpu_bo_vm(bo));
> amdgpu_vm_bo_relocated(bo_base);
> }
> }
> @@ -737,7 +738,7 @@ bool amdgpu_vm_ready(struct amdgpu_vm *vm)
> *
> * @adev: amdgpu_device pointer
> * @vm: VM to clear BO from
> - * @bo: BO to clear
> + * @vmbo: BO to clear
> * @immediate: use an immediate update
> *
> * Root PD needs to be reserved when calling this.
> @@ -747,13 +748,14 @@ bool amdgpu_vm_ready(struct amdgpu_vm *vm)
> */
> static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
> struct amdgpu_vm *vm,
> - struct amdgpu_bo *bo,
> + struct amdgpu_bo_vm *vmbo,
> bool immediate)
> {
> struct ttm_operation_ctx ctx = { true, false };
> unsigned level = adev->vm_manager.root_level;
> struct amdgpu_vm_update_params params;
> - struct amdgpu_bo *ancestor = bo;
> + struct amdgpu_bo *ancestor = &vmbo->bo;
> + struct amdgpu_bo *bo = &vmbo->bo;
> unsigned entries, ats_entries;
> uint64_t addr;
> int r;
> @@ -793,14 +795,15 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
> if (r)
> return r;
>
> - if (bo->shadow) {
> - r = ttm_bo_validate(&bo->shadow->tbo, &bo->shadow->placement,
> - &ctx);
> + if (vmbo->shadow) {
> + struct amdgpu_bo *shadow = vmbo->shadow;
> +
> + r = ttm_bo_validate(&shadow->tbo, &shadow->placement, &ctx);
> if (r)
> return r;
> }
>
> - r = vm->update_funcs->map_table(bo);
> + r = vm->update_funcs->map_table(vmbo);
> if (r)
> return r;
>
> @@ -824,7 +827,7 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
> amdgpu_gmc_get_vm_pde(adev, level, &value, &flags);
> }
>
> - r = vm->update_funcs->update(¶ms, bo, addr, 0, ats_entries,
> + r = vm->update_funcs->update(¶ms, vmbo, addr, 0, ats_entries,
> value, flags);
> if (r)
> return r;
> @@ -847,7 +850,7 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
> }
> }
>
> - r = vm->update_funcs->update(¶ms, bo, addr, 0, entries,
> + r = vm->update_funcs->update(¶ms, vmbo, addr, 0, entries,
> value, flags);
> if (r)
> return r;
> @@ -863,14 +866,16 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
> * @vm: requesting vm
> * @level: the page table level
> * @immediate: use a immediate update
> - * @bo: pointer to the buffer object pointer
> + * @vmbo: pointer to the buffer object pointer
> */
> static int amdgpu_vm_pt_create(struct amdgpu_device *adev,
> struct amdgpu_vm *vm,
> int level, bool immediate,
> - struct amdgpu_bo **bo)
> + struct amdgpu_bo_vm **vmbo)
> {
> struct amdgpu_bo_param bp;
> + struct amdgpu_bo *bo;
> + struct dma_resv *resv;
> int r;
>
> memset(&bp, 0, sizeof(bp));
> @@ -881,7 +886,7 @@ static int amdgpu_vm_pt_create(struct amdgpu_device *adev,
> bp.domain = amdgpu_bo_get_preferred_pin_domain(adev, bp.domain);
> bp.flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
> AMDGPU_GEM_CREATE_CPU_GTT_USWC;
> - bp.bo_ptr_size = sizeof(struct amdgpu_bo);
> + bp.bo_ptr_size = sizeof(struct amdgpu_bo_vm);
> if (vm->use_cpu_for_update)
> bp.flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
>
> @@ -890,26 +895,41 @@ static int amdgpu_vm_pt_create(struct amdgpu_device *adev,
> if (vm->root.base.bo)
> bp.resv = vm->root.base.bo->tbo.base.resv;
>
> - r = amdgpu_bo_create(adev, &bp, bo);
> + r = amdgpu_bo_create_vm(adev, &bp, vmbo);
> if (r)
> return r;
>
> - if (vm->is_compute_context && (adev->flags & AMD_IS_APU))
> + bo = &(*vmbo)->bo;
> + if (vm->is_compute_context && (adev->flags & AMD_IS_APU)) {
> + (*vmbo)->shadow = NULL;
> return 0;
> + }
>
> if (!bp.resv)
> - WARN_ON(dma_resv_lock((*bo)->tbo.base.resv,
> + WARN_ON(dma_resv_lock(bo->tbo.base.resv,
> NULL));
> - r = amdgpu_bo_create_shadow(adev, bp.size, *bo);
> + resv = bp.resv;
> + memset(&bp, 0, sizeof(bp));
> + bp.size = amdgpu_vm_bo_size(adev, level);
> + bp.domain = AMDGPU_GEM_DOMAIN_GTT;
> + bp.flags = AMDGPU_GEM_CREATE_CPU_GTT_USWC;
> + bp.type = ttm_bo_type_kernel;
> + bp.resv = bo->tbo.base.resv;
> + bp.bo_ptr_size = sizeof(struct amdgpu_bo);
>
> - if (!bp.resv)
> - dma_resv_unlock((*bo)->tbo.base.resv);
> + r = amdgpu_bo_create(adev, &bp, &(*vmbo)->shadow);
> +
> + if (!resv)
> + dma_resv_unlock(bo->tbo.base.resv);
>
> if (r) {
> - amdgpu_bo_unref(bo);
> + amdgpu_bo_unref(&bo);
> return r;
> }
>
> + (*vmbo)->shadow->parent = amdgpu_bo_ref(bo);
> + amdgpu_bo_add_to_shadow_list((*vmbo)->shadow);
> +
> return 0;
> }
>
> @@ -933,7 +953,8 @@ static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
> bool immediate)
> {
> struct amdgpu_vm_pt *entry = cursor->entry;
> - struct amdgpu_bo *pt;
> + struct amdgpu_bo *pt_bo;
> + struct amdgpu_bo_vm *pt;
> int r;
>
> if (cursor->level < AMDGPU_VM_PTB && !entry->entries) {
> @@ -957,8 +978,9 @@ static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
> /* Keep a reference to the root directory to avoid
> * freeing them up in the wrong order.
> */
> - pt->parent = amdgpu_bo_ref(cursor->parent->base.bo);
> - amdgpu_vm_bo_base_init(&entry->base, vm, pt);
> + pt_bo = &pt->bo;
> + pt_bo->parent = amdgpu_bo_ref(cursor->parent->base.bo);
> + amdgpu_vm_bo_base_init(&entry->base, vm, pt_bo);
>
> r = amdgpu_vm_clear_bo(adev, vm, pt, immediate);
> if (r)
> @@ -968,7 +990,7 @@ static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
>
> error_free_pt:
> amdgpu_bo_unref(&pt->shadow);
> - amdgpu_bo_unref(&pt);
> + amdgpu_bo_unref(&pt_bo);
> return r;
> }
>
> @@ -979,10 +1001,13 @@ static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
> */
> static void amdgpu_vm_free_table(struct amdgpu_vm_pt *entry)
> {
> + struct amdgpu_bo *shadow;
> +
> if (entry->base.bo) {
> + shadow = amdgpu_bo_shadowed(entry->base.bo);
> entry->base.bo->vm_bo = NULL;
> list_del(&entry->base.vm_status);
> - amdgpu_bo_unref(&entry->base.bo->shadow);
> + amdgpu_bo_unref(&shadow);
> amdgpu_bo_unref(&entry->base.bo);
> }
> kvfree(entry->entries);
> @@ -1284,7 +1309,8 @@ static int amdgpu_vm_update_pde(struct amdgpu_vm_update_params *params,
> level += params->adev->vm_manager.root_level;
> amdgpu_gmc_get_pde_for_bo(entry->base.bo, level, &pt, &flags);
> pde = (entry - parent->entries) * 8;
> - return vm->update_funcs->update(params, bo, pde, pt, 1, 0, flags);
> + return vm->update_funcs->update(params, to_amdgpu_bo_vm(bo), pde, pt,
> + 1, 0, flags);
> }
>
> /**
> @@ -1364,9 +1390,9 @@ int amdgpu_vm_update_pdes(struct amdgpu_device *adev,
> * Make sure to set the right flags for the PTEs at the desired level.
> */
> static void amdgpu_vm_update_flags(struct amdgpu_vm_update_params *params,
> - struct amdgpu_bo *bo, unsigned level,
> + struct amdgpu_bo_vm *pt, unsigned int level,
> uint64_t pe, uint64_t addr,
> - unsigned count, uint32_t incr,
> + unsigned int count, uint32_t incr,
> uint64_t flags)
>
> {
> @@ -1382,7 +1408,7 @@ static void amdgpu_vm_update_flags(struct amdgpu_vm_update_params *params,
> flags |= AMDGPU_PTE_EXECUTABLE;
> }
>
> - params->vm->update_funcs->update(params, bo, pe, addr, count, incr,
> + params->vm->update_funcs->update(params, pt, pe, addr, count, incr,
> flags);
> }
>
> @@ -1562,9 +1588,9 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
> nptes, dst, incr, upd_flags,
> vm->task_info.pid,
> vm->immediate.fence_context);
> - amdgpu_vm_update_flags(params, pt, cursor.level,
> - pe_start, dst, nptes, incr,
> - upd_flags);
> + amdgpu_vm_update_flags(params, to_amdgpu_bo_vm(pt),
> + cursor.level, pe_start, dst,
> + nptes, incr, upd_flags);
>
> pe_start += nptes * 8;
> dst += nptes * incr;
> @@ -2674,7 +2700,7 @@ void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,
> struct amdgpu_vm_bo_base *bo_base;
>
> /* shadow bo doesn't have bo base, its validation needs its parent */
> - if (bo->parent && bo->parent->shadow == bo)
> + if (bo->parent && (amdgpu_bo_shadowed(bo->parent) == bo))
> bo = bo->parent;
>
> for (bo_base = bo->vm_bo; bo_base; bo_base = bo_base->next) {
> @@ -2843,7 +2869,8 @@ long amdgpu_vm_wait_idle(struct amdgpu_vm *vm, long timeout)
> */
> int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, u32 pasid)
> {
> - struct amdgpu_bo *root;
> + struct amdgpu_bo *root_bo;
> + struct amdgpu_bo_vm *root;
> int r, i;
>
> vm->va = RB_ROOT_CACHED;
> @@ -2897,16 +2924,16 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, u32 pasid)
> false, &root);
> if (r)
> goto error_free_delayed;
> -
> - r = amdgpu_bo_reserve(root, true);
> + root_bo = &root->bo;
> + r = amdgpu_bo_reserve(root_bo, true);
> if (r)
> goto error_free_root;
>
> - r = dma_resv_reserve_shared(root->tbo.base.resv, 1);
> + r = dma_resv_reserve_shared(root_bo->tbo.base.resv, 1);
> if (r)
> goto error_unreserve;
>
> - amdgpu_vm_bo_base_init(&vm->root.base, vm, root);
> + amdgpu_vm_bo_base_init(&vm->root.base, vm, root_bo);
>
> r = amdgpu_vm_clear_bo(adev, vm, root, false);
> if (r)
> @@ -2935,8 +2962,8 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, u32 pasid)
> amdgpu_bo_unreserve(vm->root.base.bo);
>
> error_free_root:
> - amdgpu_bo_unref(&vm->root.base.bo->shadow);
> - amdgpu_bo_unref(&vm->root.base.bo);
> + amdgpu_bo_unref(&root->shadow);
> + amdgpu_bo_unref(&root_bo);
> vm->root.base.bo = NULL;
>
> error_free_delayed:
> @@ -3034,7 +3061,9 @@ int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm,
> */
> if (pte_support_ats != vm->pte_support_ats) {
> vm->pte_support_ats = pte_support_ats;
> - r = amdgpu_vm_clear_bo(adev, vm, vm->root.base.bo, false);
> + r = amdgpu_vm_clear_bo(adev, vm,
> + to_amdgpu_bo_vm(vm->root.base.bo),
> + false);
> if (r)
> goto free_idr;
> }
> @@ -3078,7 +3107,7 @@ int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm,
> }
>
> /* Free the shadow bo for compute VM */
> - amdgpu_bo_unref(&vm->root.base.bo->shadow);
> + amdgpu_bo_unref(&to_amdgpu_bo_vm(vm->root.base.bo)->shadow);
>
> if (pasid)
> vm->pasid = pasid;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> index 39d60e3c4e32..bee439dd673a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> @@ -39,6 +39,7 @@
> struct amdgpu_bo_va;
> struct amdgpu_job;
> struct amdgpu_bo_list_entry;
> +struct amdgpu_bo_vm;
>
> /*
> * GPUVM handling
> @@ -239,11 +240,11 @@ struct amdgpu_vm_update_params {
> };
>
> struct amdgpu_vm_update_funcs {
> - int (*map_table)(struct amdgpu_bo *bo);
> + int (*map_table)(struct amdgpu_bo_vm *bo);
> int (*prepare)(struct amdgpu_vm_update_params *p, struct dma_resv *resv,
> enum amdgpu_sync_mode sync_mode);
> int (*update)(struct amdgpu_vm_update_params *p,
> - struct amdgpu_bo *bo, uint64_t pe, uint64_t addr,
> + struct amdgpu_bo_vm *bo, uint64_t pe, uint64_t addr,
> unsigned count, uint32_t incr, uint64_t flags);
> int (*commit)(struct amdgpu_vm_update_params *p,
> struct dma_fence **fence);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c
> index ac45d9c7a4e9..03a44be50dd7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c
> @@ -29,9 +29,9 @@
> *
> * @table: newly allocated or validated PD/PT
> */
> -static int amdgpu_vm_cpu_map_table(struct amdgpu_bo *table)
> +static int amdgpu_vm_cpu_map_table(struct amdgpu_bo_vm *table)
> {
> - return amdgpu_bo_kmap(table, NULL);
> + return amdgpu_bo_kmap(&table->bo, NULL);
> }
>
> /**
> @@ -58,7 +58,7 @@ static int amdgpu_vm_cpu_prepare(struct amdgpu_vm_update_params *p,
> * amdgpu_vm_cpu_update - helper to update page tables via CPU
> *
> * @p: see amdgpu_vm_update_params definition
> - * @bo: PD/PT to update
> + * @vmbo: PD/PT to update
> * @pe: byte offset of the PDE/PTE, relative to start of PDB/PTB
> * @addr: dst addr to write into pe
> * @count: number of page entries to update
> @@ -68,7 +68,7 @@ static int amdgpu_vm_cpu_prepare(struct amdgpu_vm_update_params *p,
> * Write count number of PT/PD entries directly.
> */
> static int amdgpu_vm_cpu_update(struct amdgpu_vm_update_params *p,
> - struct amdgpu_bo *bo, uint64_t pe,
> + struct amdgpu_bo_vm *vmbo, uint64_t pe,
> uint64_t addr, unsigned count, uint32_t incr,
> uint64_t flags)
> {
> @@ -76,13 +76,13 @@ static int amdgpu_vm_cpu_update(struct amdgpu_vm_update_params *p,
> uint64_t value;
> int r;
>
> - if (bo->tbo.moving) {
> - r = dma_fence_wait(bo->tbo.moving, true);
> + if (vmbo->bo.tbo.moving) {
> + r = dma_fence_wait(vmbo->bo.tbo.moving, true);
> if (r)
> return r;
> }
>
> - pe += (unsigned long)amdgpu_bo_kptr(bo);
> + pe += (unsigned long)amdgpu_bo_kptr(&vmbo->bo);
>
> trace_amdgpu_vm_set_ptes(pe, addr, count, incr, flags, p->immediate);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
> index a83a646759c5..422958152c2b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
> @@ -33,11 +33,11 @@
> *
> * @table: newly allocated or validated PD/PT
> */
> -static int amdgpu_vm_sdma_map_table(struct amdgpu_bo *table)
> +static int amdgpu_vm_sdma_map_table(struct amdgpu_bo_vm *table)
> {
> int r;
>
> - r = amdgpu_ttm_alloc_gart(&table->tbo);
> + r = amdgpu_ttm_alloc_gart(&table->bo.tbo);
> if (r)
> return r;
>
> @@ -186,7 +186,7 @@ static void amdgpu_vm_sdma_set_ptes(struct amdgpu_vm_update_params *p,
> * amdgpu_vm_sdma_update - execute VM update
> *
> * @p: see amdgpu_vm_update_params definition
> - * @bo: PD/PT to update
> + * @vmbo: PD/PT to update
> * @pe: byte offset of the PDE/PTE, relative to start of PDB/PTB
> * @addr: dst addr to write into pe
> * @count: number of page entries to update
> @@ -197,10 +197,11 @@ static void amdgpu_vm_sdma_set_ptes(struct amdgpu_vm_update_params *p,
> * the IB.
> */
> static int amdgpu_vm_sdma_update(struct amdgpu_vm_update_params *p,
> - struct amdgpu_bo *bo, uint64_t pe,
> + struct amdgpu_bo_vm *vmbo, uint64_t pe,
> uint64_t addr, unsigned count, uint32_t incr,
> uint64_t flags)
> {
> + struct amdgpu_bo *bo = &vmbo->bo;
> enum amdgpu_ib_pool_type pool = p->immediate ? AMDGPU_IB_POOL_IMMEDIATE
> : AMDGPU_IB_POOL_DELAYED;
> unsigned int i, ndw, nptes;
> @@ -238,8 +239,8 @@ static int amdgpu_vm_sdma_update(struct amdgpu_vm_update_params *p,
>
> if (!p->pages_addr) {
> /* set page commands needed */
> - if (bo->shadow)
> - amdgpu_vm_sdma_set_ptes(p, bo->shadow, pe, addr,
> + if (vmbo->shadow)
> + amdgpu_vm_sdma_set_ptes(p, vmbo->shadow, pe, addr,
> count, incr, flags);
> amdgpu_vm_sdma_set_ptes(p, bo, pe, addr, count,
> incr, flags);
> @@ -248,7 +249,7 @@ static int amdgpu_vm_sdma_update(struct amdgpu_vm_update_params *p,
>
> /* copy commands needed */
> ndw -= p->adev->vm_manager.vm_pte_funcs->copy_pte_num_dw *
> - (bo->shadow ? 2 : 1);
> + (vmbo->shadow ? 2 : 1);
>
> /* for padding */
> ndw -= 7;
> @@ -263,8 +264,8 @@ static int amdgpu_vm_sdma_update(struct amdgpu_vm_update_params *p,
> pte[i] |= flags;
> }
>
> - if (bo->shadow)
> - amdgpu_vm_sdma_copy_ptes(p, bo->shadow, pe, nptes);
> + if (vmbo->shadow)
> + amdgpu_vm_sdma_copy_ptes(p, vmbo->shadow, pe, nptes);
> amdgpu_vm_sdma_copy_ptes(p, bo, pe, nptes);
>
> pe += nptes * 8;
> --
> 2.31.1
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 6/6] drm/amdgpu: do not allocate entries separately
2021-05-28 10:56 ` [PATCH v2 6/6] drm/amdgpu: do not allocate entries separately Nirmoy Das
@ 2021-05-28 14:09 ` Christian König
2021-05-28 14:58 ` Das, Nirmoy
0 siblings, 1 reply; 11+ messages in thread
From: Christian König @ 2021-05-28 14:09 UTC (permalink / raw)
To: Nirmoy Das, amd-gfx; +Cc: alexander.deucher
Am 28.05.21 um 12:56 schrieb Nirmoy Das:
> Allocate PD/PT entries while allocating VM BOs and use that
> instead of allocating those entries separately.
>
> v2: create a new var for num entries.
>
> Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 34 +++++++++++++++-----------
> 1 file changed, 20 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 223c63342ecd..7e478ffb7fdf 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -877,6 +877,7 @@ static int amdgpu_vm_pt_create(struct amdgpu_device *adev,
> struct amdgpu_bo *bo;
> struct dma_resv *resv;
> int r;
> + unsigned int num_entries;
Move that a more up, variables like r and i should be always declared last.
Apart from that Reviewed-by: Christian König <christian.koenig@amd.com>
Next step should probably be to remove entry->entries.
Regards,
Christian.
>
> memset(&bp, 0, sizeof(bp));
>
> @@ -886,7 +887,14 @@ static int amdgpu_vm_pt_create(struct amdgpu_device *adev,
> bp.domain = amdgpu_bo_get_preferred_pin_domain(adev, bp.domain);
> bp.flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
> AMDGPU_GEM_CREATE_CPU_GTT_USWC;
> - bp.bo_ptr_size = sizeof(struct amdgpu_bo_vm);
> +
> + if (level < AMDGPU_VM_PTB)
> + num_entries = amdgpu_vm_num_entries(adev, level);
> + else
> + num_entries = 0;
> +
> + bp.bo_ptr_size = struct_size((*vmbo), entries, num_entries);
> +
> if (vm->use_cpu_for_update)
> bp.flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
>
> @@ -957,19 +965,14 @@ static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
> struct amdgpu_bo_vm *pt;
> int r;
>
> - if (cursor->level < AMDGPU_VM_PTB && !entry->entries) {
> - unsigned num_entries;
> -
> - num_entries = amdgpu_vm_num_entries(adev, cursor->level);
> - entry->entries = kvmalloc_array(num_entries,
> - sizeof(*entry->entries),
> - GFP_KERNEL | __GFP_ZERO);
> - if (!entry->entries)
> - return -ENOMEM;
> - }
> -
> - if (entry->base.bo)
> + if (entry->base.bo) {
> + if (cursor->level < AMDGPU_VM_PTB)
> + entry->entries =
> + to_amdgpu_bo_vm(entry->base.bo)->entries;
> + else
> + entry->entries = NULL;
> return 0;
> + }
>
> r = amdgpu_vm_pt_create(adev, vm, cursor->level, immediate, &pt);
> if (r)
> @@ -981,6 +984,10 @@ static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev,
> pt_bo = &pt->bo;
> pt_bo->parent = amdgpu_bo_ref(cursor->parent->base.bo);
> amdgpu_vm_bo_base_init(&entry->base, vm, pt_bo);
> + if (cursor->level < AMDGPU_VM_PTB)
> + entry->entries = pt->entries;
> + else
> + entry->entries = NULL;
>
> r = amdgpu_vm_clear_bo(adev, vm, pt, immediate);
> if (r)
> @@ -1010,7 +1017,6 @@ static void amdgpu_vm_free_table(struct amdgpu_vm_pt *entry)
> amdgpu_bo_unref(&shadow);
> amdgpu_bo_unref(&entry->base.bo);
> }
> - kvfree(entry->entries);
> entry->entries = NULL;
> }
>
> --
> 2.31.1
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 6/6] drm/amdgpu: do not allocate entries separately
2021-05-28 14:09 ` Christian König
@ 2021-05-28 14:58 ` Das, Nirmoy
0 siblings, 0 replies; 11+ messages in thread
From: Das, Nirmoy @ 2021-05-28 14:58 UTC (permalink / raw)
To: Christian König, amd-gfx; +Cc: alexander.deucher
On 5/28/2021 4:09 PM, Christian König wrote:
>
>
> Am 28.05.21 um 12:56 schrieb Nirmoy Das:
>> Allocate PD/PT entries while allocating VM BOs and use that
>> instead of allocating those entries separately.
>>
>> v2: create a new var for num entries.
>>
>> Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 34 +++++++++++++++-----------
>> 1 file changed, 20 insertions(+), 14 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>> index 223c63342ecd..7e478ffb7fdf 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>> @@ -877,6 +877,7 @@ static int amdgpu_vm_pt_create(struct
>> amdgpu_device *adev,
>> struct amdgpu_bo *bo;
>> struct dma_resv *resv;
>> int r;
>> + unsigned int num_entries;
>
> Move that a more up, variables like r and i should be always declared
> last.
>
Thanks, I will keep this in my mind next time.
> Apart from that Reviewed-by: Christian König <christian.koenig@amd.com>
>
> Next step should probably be to remove entry->entries.
Right, I will do that.
Regards,
Nirmoy
>
> Regards,
> Christian.
>
>>
>> memset(&bp, 0, sizeof(bp));
>>
>> @@ -886,7 +887,14 @@ static int amdgpu_vm_pt_create(struct
>> amdgpu_device *adev,
>> bp.domain = amdgpu_bo_get_preferred_pin_domain(adev, bp.domain);
>> bp.flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
>> AMDGPU_GEM_CREATE_CPU_GTT_USWC;
>> - bp.bo_ptr_size = sizeof(struct amdgpu_bo_vm);
>> +
>> + if (level < AMDGPU_VM_PTB)
>> + num_entries = amdgpu_vm_num_entries(adev, level);
>> + else
>> + num_entries = 0;
>> +
>> + bp.bo_ptr_size = struct_size((*vmbo), entries, num_entries);
>> +
>> if (vm->use_cpu_for_update)
>> bp.flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
>>
>> @@ -957,19 +965,14 @@ static int amdgpu_vm_alloc_pts(struct
>> amdgpu_device *adev,
>> struct amdgpu_bo_vm *pt;
>> int r;
>>
>> - if (cursor->level < AMDGPU_VM_PTB && !entry->entries) {
>> - unsigned num_entries;
>> -
>> - num_entries = amdgpu_vm_num_entries(adev, cursor->level);
>> - entry->entries = kvmalloc_array(num_entries,
>> - sizeof(*entry->entries),
>> - GFP_KERNEL | __GFP_ZERO);
>> - if (!entry->entries)
>> - return -ENOMEM;
>> - }
>> -
>> - if (entry->base.bo)
>> + if (entry->base.bo) {
>> + if (cursor->level < AMDGPU_VM_PTB)
>> + entry->entries =
>> + to_amdgpu_bo_vm(entry->base.bo)->entries;
>> + else
>> + entry->entries = NULL;
>> return 0;
>> + }
>>
>> r = amdgpu_vm_pt_create(adev, vm, cursor->level, immediate, &pt);
>> if (r)
>> @@ -981,6 +984,10 @@ static int amdgpu_vm_alloc_pts(struct
>> amdgpu_device *adev,
>> pt_bo = &pt->bo;
>> pt_bo->parent = amdgpu_bo_ref(cursor->parent->base.bo);
>> amdgpu_vm_bo_base_init(&entry->base, vm, pt_bo);
>> + if (cursor->level < AMDGPU_VM_PTB)
>> + entry->entries = pt->entries;
>> + else
>> + entry->entries = NULL;
>>
>> r = amdgpu_vm_clear_bo(adev, vm, pt, immediate);
>> if (r)
>> @@ -1010,7 +1017,6 @@ static void amdgpu_vm_free_table(struct
>> amdgpu_vm_pt *entry)
>> amdgpu_bo_unref(&shadow);
>> amdgpu_bo_unref(&entry->base.bo);
>> }
>> - kvfree(entry->entries);
>> entry->entries = NULL;
>> }
>>
>> --
>> 2.31.1
>>
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 3/6] drm/admgpu: add two shadow BO helper functions
2021-05-27 11:53 ` [PATCH 3/6] drm/admgpu: add two shadow BO helper functions Nirmoy Das
@ 2021-05-28 7:54 ` Christian König
0 siblings, 0 replies; 11+ messages in thread
From: Christian König @ 2021-05-28 7:54 UTC (permalink / raw)
To: Nirmoy Das, amd-gfx; +Cc: alexander.deucher
Am 27.05.21 um 13:53 schrieb Nirmoy Das:
> Add amdgpu_bo_add_to_shadow_list() to handle shadow list
> additions and amdgpu_bo_shadowed() to check if a BO is shadowed.
>
> Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 16 ++++++++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 17 +++++++++++++++++
> 2 files changed, 33 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 6870cc297ae6..a63b450cd603 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -760,6 +760,22 @@ int amdgpu_bo_validate(struct amdgpu_bo *bo)
> return r;
> }
>
> +/**
> + * amdgpu_bo_add_to_shadow_list - add a BO to the shadow list
> + *
> + * @bo: BO that will be inserted into the shadow list
> + *
> + * Insert a BO to the shadow list.
> + */
> +void amdgpu_bo_add_to_shadow_list(struct amdgpu_bo *bo)
> +{
> + struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
> +
> + mutex_lock(&adev->shadow_list_lock);
> + list_add_tail(&bo->shadow_list, &adev->shadow_list);
> + mutex_unlock(&adev->shadow_list_lock);
> +}
> +
> /**
> * amdgpu_bo_restore_shadow - restore an &amdgpu_bo shadow
> *
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> index a7fbf5f7051e..9afccf6c66f2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
> @@ -259,6 +259,22 @@ static inline bool amdgpu_bo_encrypted(struct amdgpu_bo *bo)
> return bo->flags & AMDGPU_GEM_CREATE_ENCRYPTED;
> }
>
> +/**
> + * amdgpu_bo_shadowed - check if the BO is shadowed
> + *
> + * @bo: BO to be tested.
> + *
> + * Returns:
> + * NULL if not shadowed or else return a BO pointer.
> + */
> +static inline struct amdgpu_bo *amdgpu_bo_shadowed(struct amdgpu_bo *bo)
> +{
> + if (bo->tbo.type == ttm_bo_type_kernel)
> + return to_amdgpu_bo_vm(bo)->shadow;
> +
> + return NULL;
> +}
> +
> bool amdgpu_bo_is_amdgpu_bo(struct ttm_buffer_object *bo);
> void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain);
>
> @@ -322,6 +338,7 @@ u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo);
> int amdgpu_bo_validate(struct amdgpu_bo *bo);
> void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
> uint64_t *gtt_mem, uint64_t *cpu_mem);
> +void amdgpu_bo_add_to_shadow_list(struct amdgpu_bo *bo);
> int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow,
> struct dma_fence **fence);
> uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev,
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 3/6] drm/admgpu: add two shadow BO helper functions
2021-05-27 11:53 [PATCH 1/6] drm/amdgpu: add amdgpu_bo_vm bo type Nirmoy Das
@ 2021-05-27 11:53 ` Nirmoy Das
2021-05-28 7:54 ` Christian König
0 siblings, 1 reply; 11+ messages in thread
From: Nirmoy Das @ 2021-05-27 11:53 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, Nirmoy Das, Christian.Koenig
Add amdgpu_bo_add_to_shadow_list() to handle shadow list
additions and amdgpu_bo_shadowed() to check if a BO is shadowed.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 16 ++++++++++++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 17 +++++++++++++++++
2 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 6870cc297ae6..a63b450cd603 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -760,6 +760,22 @@ int amdgpu_bo_validate(struct amdgpu_bo *bo)
return r;
}
+/**
+ * amdgpu_bo_add_to_shadow_list - add a BO to the shadow list
+ *
+ * @bo: BO that will be inserted into the shadow list
+ *
+ * Insert a BO to the shadow list.
+ */
+void amdgpu_bo_add_to_shadow_list(struct amdgpu_bo *bo)
+{
+ struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+
+ mutex_lock(&adev->shadow_list_lock);
+ list_add_tail(&bo->shadow_list, &adev->shadow_list);
+ mutex_unlock(&adev->shadow_list_lock);
+}
+
/**
* amdgpu_bo_restore_shadow - restore an &amdgpu_bo shadow
*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index a7fbf5f7051e..9afccf6c66f2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -259,6 +259,22 @@ static inline bool amdgpu_bo_encrypted(struct amdgpu_bo *bo)
return bo->flags & AMDGPU_GEM_CREATE_ENCRYPTED;
}
+/**
+ * amdgpu_bo_shadowed - check if the BO is shadowed
+ *
+ * @bo: BO to be tested.
+ *
+ * Returns:
+ * NULL if not shadowed or else return a BO pointer.
+ */
+static inline struct amdgpu_bo *amdgpu_bo_shadowed(struct amdgpu_bo *bo)
+{
+ if (bo->tbo.type == ttm_bo_type_kernel)
+ return to_amdgpu_bo_vm(bo)->shadow;
+
+ return NULL;
+}
+
bool amdgpu_bo_is_amdgpu_bo(struct ttm_buffer_object *bo);
void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain);
@@ -322,6 +338,7 @@ u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo);
int amdgpu_bo_validate(struct amdgpu_bo *bo);
void amdgpu_bo_get_memory(struct amdgpu_bo *bo, uint64_t *vram_mem,
uint64_t *gtt_mem, uint64_t *cpu_mem);
+void amdgpu_bo_add_to_shadow_list(struct amdgpu_bo *bo);
int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow,
struct dma_fence **fence);
uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev,
--
2.31.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
end of thread, other threads:[~2021-05-28 14:58 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-05-28 10:56 [PATCH 1/6] drm/amdgpu: add amdgpu_bo_vm bo type Nirmoy Das
2021-05-28 10:56 ` [PATCH v2 2/6] drm/amdgpu: move shadow bo validation to VM code Nirmoy Das
2021-05-28 10:56 ` [PATCH 3/6] drm/admgpu: add two shadow BO helper functions Nirmoy Das
2021-05-28 10:56 ` [PATCH v4 4/6] drm/amdgpu: switch to amdgpu_bo_vm for vm code Nirmoy Das
2021-05-28 14:06 ` Christian König
2021-05-28 10:56 ` [PATCH v2 5/6] drm/amdgpu: remove unused code Nirmoy Das
2021-05-28 10:56 ` [PATCH v2 6/6] drm/amdgpu: do not allocate entries separately Nirmoy Das
2021-05-28 14:09 ` Christian König
2021-05-28 14:58 ` Das, Nirmoy
-- strict thread matches above, loose matches on Subject: below --
2021-05-27 11:53 [PATCH 1/6] drm/amdgpu: add amdgpu_bo_vm bo type Nirmoy Das
2021-05-27 11:53 ` [PATCH 3/6] drm/admgpu: add two shadow BO helper functions Nirmoy Das
2021-05-28 7:54 ` Christian König
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.