From: Jianjun Wang <jianjun.wang@mediatek.com>
To: Ryder Lee <ryder.lee@mediatek.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>,
<linux-pci@vger.kernel.org>, <linux-mediatek@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Jianjun Wang <jianjun.wang@mediatek.com>,
Randy Wu <Randy.Wu@mediatek.com>, <youlin.pei@mediatek.com>
Subject: [PATCH 1/2] dt-bindings: PCI: mediatek-gen3: Add support for MT8195
Date: Tue, 1 Jun 2021 10:44:07 +0800 [thread overview]
Message-ID: <20210601024408.24485-2-jianjun.wang@mediatek.com> (raw)
In-Reply-To: <20210601024408.24485-1-jianjun.wang@mediatek.com>
MT8195 is an ARM platform SoC which has the same PCIe IP with MT8192.
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
---
Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index e7b1f9892da4..d5e4a3e63d97 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -48,7 +48,9 @@ allOf:
properties:
compatible:
- const: mediatek,mt8192-pcie
+ oneOf:
+ - const: mediatek,mt8192-pcie
+ - const: mediatek,mt8195-pcie
reg:
maxItems: 1
--
2.18.0
WARNING: multiple messages have this Message-ID (diff)
From: Jianjun Wang <jianjun.wang@mediatek.com>
To: Ryder Lee <ryder.lee@mediatek.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>,
<linux-pci@vger.kernel.org>, <linux-mediatek@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Jianjun Wang <jianjun.wang@mediatek.com>,
Randy Wu <Randy.Wu@mediatek.com>, <youlin.pei@mediatek.com>
Subject: [PATCH 1/2] dt-bindings: PCI: mediatek-gen3: Add support for MT8195
Date: Tue, 1 Jun 2021 10:44:07 +0800 [thread overview]
Message-ID: <20210601024408.24485-2-jianjun.wang@mediatek.com> (raw)
In-Reply-To: <20210601024408.24485-1-jianjun.wang@mediatek.com>
MT8195 is an ARM platform SoC which has the same PCIe IP with MT8192.
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
---
Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index e7b1f9892da4..d5e4a3e63d97 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -48,7 +48,9 @@ allOf:
properties:
compatible:
- const: mediatek,mt8192-pcie
+ oneOf:
+ - const: mediatek,mt8192-pcie
+ - const: mediatek,mt8195-pcie
reg:
maxItems: 1
--
2.18.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Jianjun Wang <jianjun.wang@mediatek.com>
To: Ryder Lee <ryder.lee@mediatek.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>,
<linux-pci@vger.kernel.org>, <linux-mediatek@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Jianjun Wang <jianjun.wang@mediatek.com>,
Randy Wu <Randy.Wu@mediatek.com>, <youlin.pei@mediatek.com>
Subject: [PATCH 1/2] dt-bindings: PCI: mediatek-gen3: Add support for MT8195
Date: Tue, 1 Jun 2021 10:44:07 +0800 [thread overview]
Message-ID: <20210601024408.24485-2-jianjun.wang@mediatek.com> (raw)
In-Reply-To: <20210601024408.24485-1-jianjun.wang@mediatek.com>
MT8195 is an ARM platform SoC which has the same PCIe IP with MT8192.
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
---
Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index e7b1f9892da4..d5e4a3e63d97 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -48,7 +48,9 @@ allOf:
properties:
compatible:
- const: mediatek,mt8192-pcie
+ oneOf:
+ - const: mediatek,mt8192-pcie
+ - const: mediatek,mt8195-pcie
reg:
maxItems: 1
--
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-06-01 2:44 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-01 2:44 [PATCH 0/2] PCI: mediatek-gen3: Add controller support for MT8195 Jianjun Wang
2021-06-01 2:44 ` Jianjun Wang
2021-06-01 2:44 ` Jianjun Wang
2021-06-01 2:44 ` Jianjun Wang [this message]
2021-06-01 2:44 ` [PATCH 1/2] dt-bindings: PCI: mediatek-gen3: Add " Jianjun Wang
2021-06-01 2:44 ` Jianjun Wang
2021-06-01 3:53 ` Chen-Yu Tsai
2021-06-01 3:53 ` Chen-Yu Tsai
2021-06-01 3:53 ` Chen-Yu Tsai
2021-06-01 5:49 ` Jianjun Wang
2021-06-01 5:49 ` Jianjun Wang
2021-06-01 5:49 ` Jianjun Wang
2021-06-01 6:07 ` Chen-Yu Tsai
2021-06-01 6:07 ` Chen-Yu Tsai
2021-06-01 6:07 ` Chen-Yu Tsai
2021-06-02 11:33 ` Matthias Brugger
2021-06-02 11:33 ` Matthias Brugger
2021-06-02 11:33 ` Matthias Brugger
2021-06-22 11:05 ` Lorenzo Pieralisi
2021-06-22 11:05 ` Lorenzo Pieralisi
2021-06-22 11:05 ` Lorenzo Pieralisi
2021-06-23 9:02 ` Jianjun Wang
2021-06-23 9:02 ` Jianjun Wang
2021-06-23 9:02 ` Jianjun Wang
2021-06-01 2:44 ` [PATCH 2/2] PCI: mediatek-gen3: Add controller " Jianjun Wang
2021-06-01 2:44 ` Jianjun Wang
2021-06-01 2:44 ` Jianjun Wang
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