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From: Rob Herring <robh@kernel.org>
To: Rajeev Nandan <rajeevny@codeaurora.org>
Cc: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org,
	freedreno@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, sean@poorly.run,
	robdclark@gmail.com, abhinavk@codeaurora.org,
	kalyan_t@codeaurora.org, mkrishn@codeaurora.org,
	jonathan@marek.ca
Subject: Re: [v1 1/3] dt-bindings: msm/dsi: Add yaml schema for 7nm DSI PHY
Date: Tue, 1 Jun 2021 15:58:48 -0500	[thread overview]
Message-ID: <20210601205848.GA1025498@robh.at.kernel.org> (raw)
In-Reply-To: <1622468035-8453-2-git-send-email-rajeevny@codeaurora.org>

On Mon, May 31, 2021 at 07:03:53PM +0530, Rajeev Nandan wrote:
> Add YAML schema for the device tree bindings for MSM 7nm DSI PHY driver.
> 
> Cc: Jonathan Marek <jonathan@marek.ca>
> Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
> ---
>  .../bindings/display/msm/dsi-phy-7nm.yaml          | 68 ++++++++++++++++++++++
>  1 file changed, 68 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
> 
> diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
> new file mode 100644
> index 00000000..f17cfde
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/msm/dsi-phy-7nm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Display DSI 7nm PHY
> +
> +maintainers:
> +  - Rajeev Nandan <rajeevny@codeaurora.org>
> +
> +allOf:
> +  - $ref: dsi-phy-common.yaml#
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - const: qcom,dsi-phy-7nm

When would one use this?

> +      - const: qcom,dsi-phy-7nm-7280
> +      - const: qcom,dsi-phy-7nm-8150

These don't look like full SoC names (sm8150?) and it's 
<vendor>,<soc>-<block>.

> +
> +  reg:
> +    items:
> +      - description: dsi phy register set
> +      - description: dsi phy lane register set
> +      - description: dsi pll register set
> +
> +  reg-names:
> +    items:
> +      - const: dsi_phy
> +      - const: dsi_phy_lane
> +      - const: dsi_pll
> +
> +  vdds-supply:
> +    description: Phandle to 0.9V power supply regulator device node.
> +
> +required:
> +  - compatible
> +  - reg
> +  - reg-names
> +  - vdds-supply
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +     #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
> +     #include <dt-bindings/clock/qcom,rpmh.h>
> +
> +     dsi-phy@ae94400 {
> +         compatible = "qcom,dsi-phy-7nm-7280";
> +         reg = <0x0ae94400 0x200>,
> +               <0x0ae94600 0x280>,
> +               <0x0ae94900 0x280>;
> +         reg-names = "dsi_phy",
> +                     "dsi_phy_lane",
> +                     "dsi_pll";
> +
> +         #clock-cells = <1>;
> +         #phy-cells = <0>;
> +
> +         clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> +                  <&rpmhcc RPMH_CXO_CLK>;
> +         clock-names = "iface", "ref";
> +
> +         vdds-supply = <&vreg_l10c_0p8>;
> +     };
> +...
> -- 
> 2.7.4

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Rajeev Nandan <rajeevny@codeaurora.org>
Cc: freedreno@lists.freedesktop.org, mkrishn@codeaurora.org,
	jonathan@marek.ca, devicetree@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org, abhinavk@codeaurora.org,
	kalyan_t@codeaurora.org, sean@poorly.run
Subject: Re: [v1 1/3] dt-bindings: msm/dsi: Add yaml schema for 7nm DSI PHY
Date: Tue, 1 Jun 2021 15:58:48 -0500	[thread overview]
Message-ID: <20210601205848.GA1025498@robh.at.kernel.org> (raw)
In-Reply-To: <1622468035-8453-2-git-send-email-rajeevny@codeaurora.org>

On Mon, May 31, 2021 at 07:03:53PM +0530, Rajeev Nandan wrote:
> Add YAML schema for the device tree bindings for MSM 7nm DSI PHY driver.
> 
> Cc: Jonathan Marek <jonathan@marek.ca>
> Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
> ---
>  .../bindings/display/msm/dsi-phy-7nm.yaml          | 68 ++++++++++++++++++++++
>  1 file changed, 68 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
> 
> diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
> new file mode 100644
> index 00000000..f17cfde
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/msm/dsi-phy-7nm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Display DSI 7nm PHY
> +
> +maintainers:
> +  - Rajeev Nandan <rajeevny@codeaurora.org>
> +
> +allOf:
> +  - $ref: dsi-phy-common.yaml#
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - const: qcom,dsi-phy-7nm

When would one use this?

> +      - const: qcom,dsi-phy-7nm-7280
> +      - const: qcom,dsi-phy-7nm-8150

These don't look like full SoC names (sm8150?) and it's 
<vendor>,<soc>-<block>.

> +
> +  reg:
> +    items:
> +      - description: dsi phy register set
> +      - description: dsi phy lane register set
> +      - description: dsi pll register set
> +
> +  reg-names:
> +    items:
> +      - const: dsi_phy
> +      - const: dsi_phy_lane
> +      - const: dsi_pll
> +
> +  vdds-supply:
> +    description: Phandle to 0.9V power supply regulator device node.
> +
> +required:
> +  - compatible
> +  - reg
> +  - reg-names
> +  - vdds-supply
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +     #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
> +     #include <dt-bindings/clock/qcom,rpmh.h>
> +
> +     dsi-phy@ae94400 {
> +         compatible = "qcom,dsi-phy-7nm-7280";
> +         reg = <0x0ae94400 0x200>,
> +               <0x0ae94600 0x280>,
> +               <0x0ae94900 0x280>;
> +         reg-names = "dsi_phy",
> +                     "dsi_phy_lane",
> +                     "dsi_pll";
> +
> +         #clock-cells = <1>;
> +         #phy-cells = <0>;
> +
> +         clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> +                  <&rpmhcc RPMH_CXO_CLK>;
> +         clock-names = "iface", "ref";
> +
> +         vdds-supply = <&vreg_l10c_0p8>;
> +     };
> +...
> -- 
> 2.7.4

  parent reply	other threads:[~2021-06-01 20:58 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-31 13:33 [v1 0/3] drm/msm/dsi: Add display DSI support for SC7280 target Rajeev Nandan
2021-05-31 13:33 ` Rajeev Nandan
2021-05-31 13:33 ` [v1 1/3] dt-bindings: msm/dsi: Add yaml schema for 7nm DSI PHY Rajeev Nandan
2021-05-31 13:33   ` Rajeev Nandan
2021-06-01 13:32   ` Rob Herring
2021-06-01 13:32     ` Rob Herring
2021-06-01 20:58   ` Rob Herring [this message]
2021-06-01 20:58     ` Rob Herring
2021-06-02 20:02     ` rajeevny
2021-06-02 20:02       ` rajeevny
2021-06-16  5:50       ` rajeevny
2021-06-16  5:50         ` rajeevny
2021-06-17 15:07         ` Jonathan Marek
2021-06-17 15:07           ` Jonathan Marek
2021-06-18 10:39           ` rajeevny
2021-06-18 10:39             ` rajeevny
2021-05-31 13:33 ` [v1 2/3] drm/msm/dsi: Add PHY configuration for SC7280 Rajeev Nandan
2021-05-31 13:33   ` Rajeev Nandan
2021-05-31 17:57   ` Dmitry Baryshkov
2021-05-31 17:57     ` Dmitry Baryshkov
2021-06-01 12:22     ` rajeevny
2021-06-01 12:22       ` rajeevny
2021-05-31 13:33 ` [v1 3/3] drm/msm/dsi: Add DSI support " Rajeev Nandan
2021-05-31 13:33   ` Rajeev Nandan
2021-05-31 17:57   ` Dmitry Baryshkov
2021-05-31 17:57     ` Dmitry Baryshkov

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