[v2, 0/3] Drop CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT

[v2, 0/3] Drop CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT

[Yangbo Lu]

For eSDHC, power supply is through peripheral circuit. So, 3.3V
power supply capability from register bit does not reflect the
truth. 3.3V is common for SD/MMC, and is supported for all boards
with eSDHC in current u-boot. So, let's use a Kconfig
CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT making 3.3V is supported in
default.

Then CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 can be dropped. And
i.MX eSDHC driver should drop it too, since it's not used by any
one of i.MX board.

Changes for v2:
	- Updated copyright.

Yangbo Lu (3):
  mmc: fsl_esdhc: convert to CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT
  mmc: fsl_esdhc_imx: drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
  armv8: layerscape: drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33

 drivers/mmc/Kconfig              | 7 +++++++
 drivers/mmc/fsl_esdhc.c          | 8 +++++---
 drivers/mmc/fsl_esdhc_imx.c      | 7 +------
 include/configs/T208xQDS.h       | 3 +--
 include/configs/T208xRDB.h       | 3 +--
 include/configs/T4240RDB.h       | 3 +--
 include/configs/kontron_sl28.h   | 8 +++-----
 include/configs/ls1012a2g5rdb.h  | 7 +------
 include/configs/ls1012afrwy.h    | 7 +------
 include/configs/ls1012aqds.h     | 6 +-----
 include/configs/ls1012ardb.h     | 8 +-------
 include/configs/ls1028a_common.h | 7 +------
 include/configs/ls1043a_common.h | 9 +--------
 include/configs/ls1046a_common.h | 9 +--------
 include/configs/ls1088aqds.h     | 3 +--
 include/configs/ls1088ardb.h     | 7 +------
 include/configs/ls2080aqds.h     | 7 +------
 include/configs/ls2080ardb.h     | 7 +------
 include/configs/lx2160a_common.h | 7 +------
 scripts/config_whitelist.txt     | 1 -
 20 files changed, 31 insertions(+), 93 deletions(-)


base-commit: 89be8e31ccd1c53b010385ed0807eb00f0eec06a
-- 
2.25.1

[v2, 1/3] mmc: fsl_esdhc: convert to CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT

[Yangbo Lu]

For eSDHC, power supply is through peripheral circuit. So, 3.3V
power supply capability from register bit does not reflect the
truth. 3.3V is common for SD/MMC, and is supported for all boards
with eSDHC in current u-boot. So, let's use a Kconfig
CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT making 3.3V is supported in
default.

This is also a fix-up for one previous patch, which converted to
use IS_ENABLED() for CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 that is
not a Kconfig option.

Fixes: 52faec31827e ("mmc: fsl_esdhc: replace most #ifdefs by IS_ENABLED()")
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
Changes for v2:
	- Updated copyright.
---
 drivers/mmc/Kconfig     | 7 +++++++
 drivers/mmc/fsl_esdhc.c | 8 +++++---
 2 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 8901456967..0909f502a1 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -798,6 +798,13 @@ config FSL_ESDHC_33V_IO_RELIABILITY_WORKAROUND
 	  This option assumes no hotplug, and u-boot has to make all the way to
 	  to linux to use 1.8v UHS-I speed mode if has card.
 
+config FSL_ESDHC_VS33_NOT_SUPPORT
+	bool "3.3V power supply not supported"
+	depends on FSL_ESDHC
+	help
+	  For eSDHC, power supply is through peripheral circuit. 3.3V support is
+	  common. Select this if 3.3V power supply not supported.
+
 config FSL_ESDHC_IMX
 	bool "Freescale/NXP i.MX eSDHC controller support"
 	help
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 7501fdb71e..b3c71c8695 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc
- * Copyright 2019-2020 NXP
+ * Copyright 2019-2021 NXP
  * Andy Fleming
  *
  * Based vaguely on the pxa mmc code:
@@ -795,10 +795,12 @@ static void fsl_esdhc_get_cfg_common(struct fsl_esdhc_priv *priv,
 	u32 caps;
 
 	caps = esdhc_read32(&regs->hostcapblt);
+
+	if (!IS_ENABLED(CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT))
+		caps |= HOSTCAPBLT_VS33;
+
 	if (IS_ENABLED(CONFIG_SYS_FSL_ERRATUM_ESDHC135))
 		caps &= ~(HOSTCAPBLT_SRS | HOSTCAPBLT_VS18 | HOSTCAPBLT_VS30);
-	if (IS_ENABLED(CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33))
-		caps |= HOSTCAPBLT_VS33;
 	if (caps & HOSTCAPBLT_VS18)
 		cfg->voltages |= MMC_VDD_165_195;
 	if (caps & HOSTCAPBLT_VS30)
-- 
2.25.1

Re: [v2, 1/3] mmc: fsl_esdhc: convert to CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT

[Jaehoon Chung]

Hi,

On 6/2/21 1:19 PM, Yangbo Lu wrote:
> For eSDHC, power supply is through peripheral circuit. So, 3.3V
> power supply capability from register bit does not reflect the
> truth. 3.3V is common for SD/MMC, and is supported for all boards
> with eSDHC in current u-boot. So, let's use a Kconfig
> CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT making 3.3V is supported in
> default.
> 
> This is also a fix-up for one previous patch, which converted to
> use IS_ENABLED() for CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 that is
> not a Kconfig option.
> 
> Fixes: 52faec31827e ("mmc: fsl_esdhc: replace most #ifdefs by IS_ENABLED()")
> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> ---
> Changes for v2:
> 	- Updated copyright.
> ---
>  drivers/mmc/Kconfig     | 7 +++++++
>  drivers/mmc/fsl_esdhc.c | 8 +++++---
>  2 files changed, 12 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> index 8901456967..0909f502a1 100644
> --- a/drivers/mmc/Kconfig
> +++ b/drivers/mmc/Kconfig
> @@ -798,6 +798,13 @@ config FSL_ESDHC_33V_IO_RELIABILITY_WORKAROUND
>  	  This option assumes no hotplug, and u-boot has to make all the way to
>  	  to linux to use 1.8v UHS-I speed mode if has card.
>  
> +config FSL_ESDHC_VS33_NOT_SUPPORT
> +	bool "3.3V power supply not supported"
> +	depends on FSL_ESDHC
> +	help
> +	  For eSDHC, power supply is through peripheral circuit. 3.3V support is
> +	  common. Select this if 3.3V power supply not supported.
> +
>  config FSL_ESDHC_IMX
>  	bool "Freescale/NXP i.MX eSDHC controller support"
>  	help
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> index 7501fdb71e..b3c71c8695 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -1,7 +1,7 @@
>  // SPDX-License-Identifier: GPL-2.0+
>  /*
>   * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc
> - * Copyright 2019-2020 NXP
> + * Copyright 2019-2021 NXP
>   * Andy Fleming
>   *
>   * Based vaguely on the pxa mmc code:
> @@ -795,10 +795,12 @@ static void fsl_esdhc_get_cfg_common(struct fsl_esdhc_priv *priv,
>  	u32 caps;
>  
>  	caps = esdhc_read32(&regs->hostcapblt);
> +
> +	if (!IS_ENABLED(CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT))
> +		caps |= HOSTCAPBLT_VS33;
> +

If 3.3V is supported by default, how about below code?

caps |= HOSTCAPBLT_VS33;
if (IS_ENABLED(CONFIG_xxx_NOT_SUPPORT))
	caps &= ~HOSTCAPBLT_VS33;

I don't know exactly about hostcapblt register. 
If possible to read wrong capability value from regsiter, I think that it's better.
Just my opinion. 

Best Regards,
Jaehoon Chung

>  	if (IS_ENABLED(CONFIG_SYS_FSL_ERRATUM_ESDHC135))
>  		caps &= ~(HOSTCAPBLT_SRS | HOSTCAPBLT_VS18 | HOSTCAPBLT_VS30);
> -	if (IS_ENABLED(CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33))
> -		caps |= HOSTCAPBLT_VS33;
>  	if (caps & HOSTCAPBLT_VS18)
>  		cfg->voltages |= MMC_VDD_165_195;
>  	if (caps & HOSTCAPBLT_VS30)
> 

RE: [v2, 1/3] mmc: fsl_esdhc: convert to CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT

[Y.b. Lu]

Hi Jaehoon,

> -----Original Message-----
> From: Jaehoon Chung <jh80.chung@samsung.com>
> Sent: 2021年6月2日 14:58
> To: Y.b. Lu <yangbo.lu@nxp.com>; u-boot@lists.denx.de; Peng Fan
> <peng.fan@nxp.com>
> Cc: Priyanka Jain <priyanka.jain@nxp.com>; Shengzhou Liu
> <shengzhou.liu@nxp.com>; Michael Walle <michael@walle.cc>; Pramod
> Kumar <pramod.kumar_1@nxp.com>; Rajesh Bhagat
> <rajesh.bhagat@nxp.com>; Andy Tang <andy.tang@nxp.com>; Ashish Kumar
> <ashish.kumar@nxp.com>; Meenakshi Aggarwal
> <meenakshi.aggarwal@nxp.com>
> Subject: Re: [v2, 1/3] mmc: fsl_esdhc: convert to
> CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT
> 
> Hi,
> 
> On 6/2/21 1:19 PM, Yangbo Lu wrote:
> > For eSDHC, power supply is through peripheral circuit. So, 3.3V power
> > supply capability from register bit does not reflect the truth. 3.3V
> > is common for SD/MMC, and is supported for all boards with eSDHC in
> > current u-boot. So, let's use a Kconfig
> > CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT making 3.3V is supported in
> default.
> >
> > This is also a fix-up for one previous patch, which converted to use
> > IS_ENABLED() for CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 that is not a
> > Kconfig option.
> >
> > Fixes: 52faec31827e ("mmc: fsl_esdhc: replace most #ifdefs by
> > IS_ENABLED()")
> > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> > ---
> > Changes for v2:
> > 	- Updated copyright.
> > ---
> >  drivers/mmc/Kconfig     | 7 +++++++
> >  drivers/mmc/fsl_esdhc.c | 8 +++++---
> >  2 files changed, 12 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index
> > 8901456967..0909f502a1 100644
> > --- a/drivers/mmc/Kconfig
> > +++ b/drivers/mmc/Kconfig
> > @@ -798,6 +798,13 @@ config
> FSL_ESDHC_33V_IO_RELIABILITY_WORKAROUND
> >  	  This option assumes no hotplug, and u-boot has to make all the way to
> >  	  to linux to use 1.8v UHS-I speed mode if has card.
> >
> > +config FSL_ESDHC_VS33_NOT_SUPPORT
> > +	bool "3.3V power supply not supported"
> > +	depends on FSL_ESDHC
> > +	help
> > +	  For eSDHC, power supply is through peripheral circuit. 3.3V support is
> > +	  common. Select this if 3.3V power supply not supported.
> > +
> >  config FSL_ESDHC_IMX
> >  	bool "Freescale/NXP i.MX eSDHC controller support"
> >  	help
> > diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index
> > 7501fdb71e..b3c71c8695 100644
> > --- a/drivers/mmc/fsl_esdhc.c
> > +++ b/drivers/mmc/fsl_esdhc.c
> > @@ -1,7 +1,7 @@
> >  // SPDX-License-Identifier: GPL-2.0+
> >  /*
> >   * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc
> > - * Copyright 2019-2020 NXP
> > + * Copyright 2019-2021 NXP
> >   * Andy Fleming
> >   *
> >   * Based vaguely on the pxa mmc code:
> > @@ -795,10 +795,12 @@ static void fsl_esdhc_get_cfg_common(struct
> fsl_esdhc_priv *priv,
> >  	u32 caps;
> >
> >  	caps = esdhc_read32(&regs->hostcapblt);
> > +
> > +	if (!IS_ENABLED(CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT))
> > +		caps |= HOSTCAPBLT_VS33;
> > +
> 
> If 3.3V is supported by default, how about below code?
> 
> caps |= HOSTCAPBLT_VS33;
> if (IS_ENABLED(CONFIG_xxx_NOT_SUPPORT))
> 	caps &= ~HOSTCAPBLT_VS33;

You are right. I should have used such logic...
Thanks. Updated in v2.

> 
> I don't know exactly about hostcapblt register.
> If possible to read wrong capability value from regsiter, I think that it's better.
> Just my opinion.
> 
> Best Regards,
> Jaehoon Chung
> 
> >  	if (IS_ENABLED(CONFIG_SYS_FSL_ERRATUM_ESDHC135))
> >  		caps &= ~(HOSTCAPBLT_SRS | HOSTCAPBLT_VS18 |
> HOSTCAPBLT_VS30);
> > -	if (IS_ENABLED(CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33))
> > -		caps |= HOSTCAPBLT_VS33;
> >  	if (caps & HOSTCAPBLT_VS18)
> >  		cfg->voltages |= MMC_VDD_165_195;
> >  	if (caps & HOSTCAPBLT_VS30)
> >

[v2, 2/3] mmc: fsl_esdhc_imx: drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33

[Yangbo Lu]

There is no i.MX board using such option. Drop it.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
Changes for v2:
	- Updated copyright.
---
 drivers/mmc/fsl_esdhc_imx.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index a4675838e5..566ce046ae 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc
- * Copyright 2019 NXP Semiconductors
+ * Copyright 2019, 2021 NXP
  * Andy Fleming
  * Yangbo Lu <yangbo.lu@nxp.com>
  *
@@ -1234,11 +1234,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv,
 			ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30);
 #endif
 
-/* T4240 host controller capabilities register should have VS33 bit */
-#ifdef CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-	caps = caps | ESDHC_HOSTCAPBLT_VS33;
-#endif
-
 	if (caps & ESDHC_HOSTCAPBLT_VS18)
 		voltage_caps |= MMC_VDD_165_195;
 	if (caps & ESDHC_HOSTCAPBLT_VS30)
-- 
2.25.1

[v2, 3/3] armv8: layerscape: drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33

[Yangbo Lu]

Drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33. CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT
is used instead.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
Changes for v2:
	- Updated copyright.
---
 include/configs/T208xQDS.h       | 3 +--
 include/configs/T208xRDB.h       | 3 +--
 include/configs/T4240RDB.h       | 3 +--
 include/configs/kontron_sl28.h   | 8 +++-----
 include/configs/ls1012a2g5rdb.h  | 7 +------
 include/configs/ls1012afrwy.h    | 7 +------
 include/configs/ls1012aqds.h     | 6 +-----
 include/configs/ls1012ardb.h     | 8 +-------
 include/configs/ls1028a_common.h | 7 +------
 include/configs/ls1043a_common.h | 9 +--------
 include/configs/ls1046a_common.h | 9 +--------
 include/configs/ls1088aqds.h     | 3 +--
 include/configs/ls1088ardb.h     | 7 +------
 include/configs/ls2080aqds.h     | 7 +------
 include/configs/ls2080ardb.h     | 7 +------
 include/configs/lx2160a_common.h | 7 +------
 scripts/config_whitelist.txt     | 1 -
 17 files changed, 18 insertions(+), 84 deletions(-)

diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index b1acb564c3..7bc792b8d1 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2011-2013 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
  */
 
 /*
@@ -618,7 +618,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_MMC
 #define CONFIG_SYS_FSL_ESDHC_ADDR	CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 #endif
 
 /*
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index e467ef453d..b5197b3ed9 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
  */
 
 /*
@@ -574,7 +574,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_MMC
 #define CONFIG_SYS_FSL_ESDHC_ADDR	CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 #endif
 
 /*
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index a04d9137b3..139beae08d 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
  */
 
 /*
@@ -585,7 +585,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_MMC
 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 #endif
 
 
diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h
index 5f11205802..4e9ea9d7fe 100644
--- a/include/configs/kontron_sl28.h
+++ b/include/configs/kontron_sl28.h
@@ -1,4 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2021 NXP
+ */
 
 #ifndef __SL28_H
 #define __SL28_H
@@ -56,11 +59,6 @@
 #define CONFIG_DDR_CLK_FREQ		100000000
 #define COUNTER_FREQUENCY_REAL		(CONFIG_SYS_CLK_FREQ / 4)
 
-/* MMC */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 /* ethernet */
 #define CONFIG_SYS_RX_ETH_BUFFER	8
 
diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h
index 9962b9872a..1c016dee97 100644
--- a/include/configs/ls1012a2g5rdb.h
+++ b/include/configs/ls1012a2g5rdb.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2017 NXP
+ * Copyright 2017, 2021 NXP
  */
 
 #ifndef __LS1012A2G5RDB_H__
@@ -13,11 +13,6 @@
 #define CONFIG_CHIP_SELECTS_PER_CTRL	1
 #define CONFIG_SYS_SDRAM_SIZE		0x40000000
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 /* SATA */
 #define CONFIG_LIBATA
 #define CONFIG_SCSI_AHCI
diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h
index ba152834d5..9024d5e10f 100644
--- a/include/configs/ls1012afrwy.h
+++ b/include/configs/ls1012afrwy.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2018 NXP
+ * Copyright 2018, 2021 NXP
  */
 
 #ifndef __LS1012AFRWY_H__
@@ -33,11 +33,6 @@
 	func(DHCP, dhcp, na)
 #endif
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 #define CONFIG_PCIE1		/* PCIE controller 1 */
 
 #define CONFIG_PCI_SCAN_SHOW
diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index 36be8f42c9..e76f5ef23b 100644
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2016 Freescale Semiconductor, Inc.
+ * Copyright 2021 NXP
  */
 
 #ifndef __LS1012AQDS_H__
@@ -93,11 +94,6 @@
 				DSPI_CTAR_DT(0))
 #define CONFIG_SPI_FLASH_EON /* cs3 */
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 #define CONFIG_PCIE1		/* PCIE controller 1 */
 
 #define CONFIG_PCI_SCAN_SHOW
diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
index 582945b2ab..1605c39fef 100644
--- a/include/configs/ls1012ardb.h
+++ b/include/configs/ls1012ardb.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
  * Copyright 2016 Freescale Semiconductor, Inc.
  */
 
@@ -38,12 +38,6 @@
 #define __PHY_ETH2_MASK		0xFB
 #define __PHY_ETH1_MASK		0xFD
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
-
 #define CONFIG_PCIE1		/* PCIE controller 1 */
 
 #define CONFIG_PCI_SCAN_SHOW
diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h
index 31fcdae986..5900b8f0e3 100644
--- a/include/configs/ls1028a_common.h
+++ b/include/configs/ls1028a_common.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2019-2020 NXP
+ * Copyright 2019-2021 NXP
  */
 
 #ifndef __L1028A_COMMON_H
@@ -93,11 +93,6 @@
 
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 #define OCRAM_NONSECURE_SIZE		0x00010000
 #define CONFIG_SYS_FSL_QSPI_BASE	0x20000000
 
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 29a3790c45..65d63e2fc9 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2015 Freescale Semiconductor
- * Copyright 2019-2020 NXP
+ * Copyright 2019-2021 NXP
  */
 
 #ifndef __LS1043A_COMMON_H
@@ -171,13 +171,6 @@
 #endif
 #endif
 
-/*  MMC  */
-#ifndef SPL_NO_MMC
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-#endif
-
 /*  DSPI  */
 #ifndef SPL_NO_DSPI
 #ifdef CONFIG_FSL_DSPI
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 0c3978a922..11e1a184c5 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2016 Freescale Semiconductor
- * Copyright 2019-2020 NXP
+ * Copyright 2019-2021 NXP
  */
 
 #ifndef __LS1046A_COMMON_H
@@ -165,13 +165,6 @@
 						CONFIG_SYS_SCSI_MAX_LUN)
 #endif
 
-/* MMC */
-#ifndef SPL_NO_MMC
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-#endif
-
 /* FMan ucode */
 #ifndef SPL_NO_FMAN
 #define CONFIG_SYS_DPAA_FMAN
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index 4d04833c50..d032a3d111 100644
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2017, 2020 NXP
+ * Copyright 2017, 2020-2021 NXP
  */
 
 #ifndef __LS1088A_QDS_H
@@ -361,7 +361,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_FSL_MEMAC
 
 /*  MMC  */
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 #define CONFIG_ESDHC_DETECT_QUIRK ((readb(QIXIS_BASE + QIXIS_STAT_PRES1) & \
 	QIXIS_SDID_MASK) != QIXIS_ESDHC_NO_ADAPTER)
 
diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
index 6f36dd417a..5ade0eb439 100644
--- a/include/configs/ls1088ardb.h
+++ b/include/configs/ls1088ardb.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2017, 2020 NXP
+ * Copyright 2017, 2020-2021 NXP
  */
 
 #ifndef __LS1088A_RDB_H
@@ -507,11 +507,6 @@
 #endif
 #endif
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 #ifndef SPL_NO_ENV
 
 #define BOOT_TARGET_DEVICES(func) \
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index b3fce1b7f7..41c1a86743 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2017, 2019-2020 NXP
+ * Copyright 2017, 2019-2021 NXP
  * Copyright 2015 Freescale Semiconductor
  */
 
@@ -318,11 +318,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_PCI_SCAN_SHOW
 #endif
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 /* Initial environment variables */
 #undef CONFIG_EXTRA_ENV_SETTINGS
 #ifdef CONFIG_NXP_ESBC
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 8626a1d5e6..f2dc495fbb 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2017, 2019-2020 NXP
+ * Copyright 2017, 2019-2021 NXP
  * Copyright 2015 Freescale Semiconductor
  */
 
@@ -300,11 +300,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_PCI_SCAN_SHOW
 #endif
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 #define BOOT_TARGET_DEVICES(func) \
 	func(USB, usb, 0) \
 	func(MMC, mmc, 0) \
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index 9f2b8999cd..15ea0e4ce1 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2018-2020 NXP
+ * Copyright 2018-2021 NXP
  */
 
 #ifndef __LX2_COMMON_H
@@ -129,11 +129,6 @@
 #define CONFIG_PCI_SCAN_SHOW
 #endif
 
-/* MMC */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 /* SATA */
 
 #ifdef CONFIG_SCSI
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 8f92b82719..3dbcc042a8 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -2307,7 +2307,6 @@ CONFIG_SYS_FSL_MAX_NUM_OF_SEC
 CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR
 CONFIG_SYS_FSL_MC_BASE
 CONFIG_SYS_FSL_MC_SIZE
-CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 CONFIG_SYS_FSL_NI_BASE
 CONFIG_SYS_FSL_NI_SIZE
 CONFIG_SYS_FSL_NO_SERDES
-- 
2.25.1

Re: [v2, 3/3] armv8: layerscape: drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33

[Michael Walle]

Am 2021-06-02 06:19, schrieb Yangbo Lu:
> Drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33. 
> CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT
> is used instead.
> 
> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> ---

> diff --git a/include/configs/kontron_sl28.h 
> b/include/configs/kontron_sl28.h
> index 5f11205802..4e9ea9d7fe 100644
> --- a/include/configs/kontron_sl28.h
> +++ b/include/configs/kontron_sl28.h
> @@ -1,4 +1,7 @@
>  /* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright 2021 NXP
> + */

NAK. Are you serious?

> 
>  #ifndef __SL28_H
>  #define __SL28_H
> @@ -56,11 +59,6 @@
>  #define CONFIG_DDR_CLK_FREQ		100000000
>  #define COUNTER_FREQUENCY_REAL		(CONFIG_SYS_CLK_FREQ / 4)
> 
> -/* MMC */
> -#ifdef CONFIG_MMC
> -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
> -#endif
> -
>  /* ethernet */
>  #define CONFIG_SYS_RX_ETH_BUFFER	8
> 
> diff --git a/include/configs/ls1012a2g5rdb.h 
> b/include/configs/ls1012a2g5rdb.h
> index 9962b9872a..1c016dee97 100644
> --- a/include/configs/ls1012a2g5rdb.h
> +++ b/include/configs/ls1012a2g5rdb.h

-michael

RE: [v2, 3/3] armv8: layerscape: drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33

[Y.b. Lu]

> -----Original Message-----
> From: Michael Walle <michael@walle.cc>
> Sent: 2021年6月2日 15:03
> To: Y.b. Lu <yangbo.lu@nxp.com>
> Cc: u-boot@lists.denx.de; Peng Fan <peng.fan@nxp.com>; Priyanka Jain
> <priyanka.jain@nxp.com>; Shengzhou Liu <shengzhou.liu@nxp.com>; Pramod
> Kumar <pramod.kumar_1@nxp.com>; Rajesh Bhagat
> <rajesh.bhagat@nxp.com>; Andy Tang <andy.tang@nxp.com>; Ashish Kumar
> <ashish.kumar@nxp.com>; Meenakshi Aggarwal
> <meenakshi.aggarwal@nxp.com>
> Subject: Re: [v2, 3/3] armv8: layerscape: drop
> CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
> 
> Am 2021-06-02 06:19, schrieb Yangbo Lu:
> > Drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33.
> > CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT
> > is used instead.
> >
> > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> > ---
> 
> > diff --git a/include/configs/kontron_sl28.h
> > b/include/configs/kontron_sl28.h index 5f11205802..4e9ea9d7fe 100644
> > --- a/include/configs/kontron_sl28.h
> > +++ b/include/configs/kontron_sl28.h
> > @@ -1,4 +1,7 @@
> >  /* SPDX-License-Identifier: GPL-2.0+ */
> > +/*
> > + * Copyright 2021 NXP
> > + */
> 
> NAK. Are you serious?

Sorry. I just realized this was not nxp file among these files.
Dropped it in v2.

Thank you.

> 
> >
> >  #ifndef __SL28_H
> >  #define __SL28_H
> > @@ -56,11 +59,6 @@
> >  #define CONFIG_DDR_CLK_FREQ		100000000
> >  #define COUNTER_FREQUENCY_REAL		(CONFIG_SYS_CLK_FREQ / 4)
> >
> > -/* MMC */
> > -#ifdef CONFIG_MMC
> > -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
> > -#endif
> > -
> >  /* ethernet */
> >  #define CONFIG_SYS_RX_ETH_BUFFER	8
> >
> > diff --git a/include/configs/ls1012a2g5rdb.h
> > b/include/configs/ls1012a2g5rdb.h index 9962b9872a..1c016dee97 100644
> > --- a/include/configs/ls1012a2g5rdb.h
> > +++ b/include/configs/ls1012a2g5rdb.h
> 
> -michael