From: Rob Herring <robh@kernel.org> To: Chun-Jie Chen <chun-jie.chen@mediatek.com> Cc: Matthias Brugger <matthias.bgg@gmail.com>, Stephen Boyd <sboyd@kernel.org>, Nicolas Boichat <drinkcat@chromium.org>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, srv_heupstream@mediatek.com, Project_Global_Chrome_Upstream_Group@mediatek.com, Weiyi Lu <weiyi.lu@mediatek.com> Subject: Re: [PATCH v9 05/22] dt-bindings: ARM: Mediatek: Document bindings of MT8192 clock controllers Date: Wed, 2 Jun 2021 12:20:36 -0500 [thread overview] Message-ID: <20210602172036.GA3601208@robh.at.kernel.org> (raw) In-Reply-To: <20210524122053.17155-6-chun-jie.chen@mediatek.com> On Mon, May 24, 2021 at 08:20:36PM +0800, Chun-Jie Chen wrote: > This patch adds the binding documentation of topckgen, apmixedsys, > infracfg, pericfg and subsystem clocks for Mediatek MT8192. I suspect all these could just be merged into 1 schema like the others if the only differences are compatible strings. > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: chun-jie.chen <chun-jie.chen@mediatek.com> > --- > .../arm/mediatek/mediatek,apmixedsys.txt | 1 + > .../bindings/arm/mediatek/mediatek,audsys.txt | 1 + > .../bindings/arm/mediatek/mediatek,camsys.txt | 22 +++++++++++++++++++ > .../bindings/arm/mediatek/mediatek,imgsys.txt | 2 ++ > .../arm/mediatek/mediatek,infracfg.txt | 1 + > .../bindings/arm/mediatek/mediatek,ipesys.txt | 1 + > .../bindings/arm/mediatek/mediatek,mfgcfg.txt | 1 + > .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 + > .../arm/mediatek/mediatek,pericfg.yaml | 1 + > .../arm/mediatek/mediatek,topckgen.txt | 1 + > .../arm/mediatek/mediatek,vdecsys.txt | 8 +++++++ > .../arm/mediatek/mediatek,vencsys.txt | 1 + > 12 files changed, 41 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > index ea827e8763de..551c30735cd7 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > @@ -18,6 +18,7 @@ Required Properties: > - "mediatek,mt8167-apmixedsys", "syscon" > - "mediatek,mt8173-apmixedsys" > - "mediatek,mt8183-apmixedsys", "syscon" > + - "mediatek,mt8192-apmixedsys", "syscon" > - "mediatek,mt8516-apmixedsys" > - #clock-cells: Must be 1 > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt > index b32d374193c7..699776be1dd3 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt > @@ -13,6 +13,7 @@ Required Properties: > - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon" > - "mediatek,mt8167-audiosys", "syscon" > - "mediatek,mt8183-audiosys", "syscon" > + - "mediatek,mt8192-audsys", "syscon" > - "mediatek,mt8516-audsys", "syscon" > - #clock-cells: Must be 1 > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt > index a0ce82085ad0..7d0b14e5c8ba 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt > @@ -9,6 +9,10 @@ Required Properties: > - "mediatek,mt6765-camsys", "syscon" > - "mediatek,mt6779-camsys", "syscon" > - "mediatek,mt8183-camsys", "syscon" > + - "mediatek,mt8192-camsys", "syscon" > + - "mediatek,mt8192-camsys_rawa", "syscon" > + - "mediatek,mt8192-camsys_rawb", "syscon" > + - "mediatek,mt8192-camsys_rawc", "syscon" > - #clock-cells: Must be 1 > > The camsys controller uses the common clk binding from > @@ -22,3 +26,21 @@ camsys: camsys@1a000000 { > reg = <0 0x1a000000 0 0x1000>; > #clock-cells = <1>; > }; > + > +camsys_rawa: syscon@1a04f000 { > + compatible = "mediatek,mt8192-camsys_rawa", "syscon"; > + reg = <0 0x1a04f000 0 0x1000>; > + #clock-cells = <1>; > +}; > + > +camsys_rawb: syscon@1a06f000 { > + compatible = "mediatek,mt8192-camsys_rawb", "syscon"; > + reg = <0 0x1a06f000 0 0x1000>; > + #clock-cells = <1>; > +}; > + > +camsys_rawc: syscon@1a08f000 { > + compatible = "mediatek,mt8192-camsys_rawc", "syscon"; > + reg = <0 0x1a08f000 0 0x1000>; > + #clock-cells = <1>; > +}; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt > index dce4c9241932..b9e599e116dc 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt > @@ -15,6 +15,8 @@ Required Properties: > - "mediatek,mt8167-imgsys", "syscon" > - "mediatek,mt8173-imgsys", "syscon" > - "mediatek,mt8183-imgsys", "syscon" > + - "mediatek,mt8192-imgsys", "syscon" > + - "mediatek,mt8192-imgsys2", "syscon" > - #clock-cells: Must be 1 > > The imgsys controller uses the common clk binding from > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > index eb3523c7a7be..6e05a0014cf7 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > @@ -19,6 +19,7 @@ Required Properties: > - "mediatek,mt8167-infracfg", "syscon" > - "mediatek,mt8173-infracfg", "syscon" > - "mediatek,mt8183-infracfg", "syscon" > + - "mediatek,mt8192-infracfg", "syscon" > - "mediatek,mt8516-infracfg", "syscon" > - #clock-cells: Must be 1 > - #reset-cells: Must be 1 > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt > index 2ce889b023d9..9cd10350ab9b 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt > @@ -7,6 +7,7 @@ Required Properties: > > - compatible: Should be one of: > - "mediatek,mt6779-ipesys", "syscon" > + - "mediatek,mt8192-ipesys", "syscon" > - #clock-cells: Must be 1 > > The ipesys controller uses the common clk binding from > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt > index 054424fb64b4..6bfb49a43ef9 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt > @@ -10,6 +10,7 @@ Required Properties: > - "mediatek,mt6779-mfgcfg", "syscon" > - "mediatek,mt8167-mfgcfg", "syscon" > - "mediatek,mt8183-mfgcfg", "syscon" > + - "mediatek,mt8192-mfgcfg", "syscon" > - #clock-cells: Must be 1 > > The mfgcfg controller uses the common clk binding from > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt > index 78c50733985c..9712a6831fab 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt > @@ -16,6 +16,7 @@ Required Properties: > - "mediatek,mt8167-mmsys", "syscon" > - "mediatek,mt8173-mmsys", "syscon" > - "mediatek,mt8183-mmsys", "syscon" > + - "mediatek,mt8192-mmsys", "syscon" > - #clock-cells: Must be 1 > > For the clock control, the mmsys controller uses the common clk binding from > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml > index 8723dfe34bab..b405cbcafb90 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml > @@ -26,6 +26,7 @@ properties: > - mediatek,mt8135-pericfg > - mediatek,mt8173-pericfg > - mediatek,mt8183-pericfg > + - mediatek,mt8192-pericfg > - mediatek,mt8516-pericfg > - const: syscon > - items: > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > index 5ce7578cf274..1627e384b2ba 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > @@ -18,6 +18,7 @@ Required Properties: > - "mediatek,mt8167-topckgen", "syscon" > - "mediatek,mt8173-topckgen" > - "mediatek,mt8183-topckgen", "syscon" > + - "mediatek,mt8192-topckgen", "syscon" > - "mediatek,mt8516-topckgen" > - #clock-cells: Must be 1 > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt > index 98195169176a..376c82ed09ab 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt > @@ -14,6 +14,8 @@ Required Properties: > - "mediatek,mt8167-vdecsys", "syscon" > - "mediatek,mt8173-vdecsys", "syscon" > - "mediatek,mt8183-vdecsys", "syscon" > + - "mediatek,mt8192-vdecsys", "syscon" > + - "mediatek,mt8192-vdecsys_soc", "syscon" > - #clock-cells: Must be 1 > > The vdecsys controller uses the common clk binding from > @@ -27,3 +29,9 @@ vdecsys: clock-controller@16000000 { > reg = <0 0x16000000 0 0x1000>; > #clock-cells = <1>; > }; > + > +vdecsys_soc: syscon@1600f000 { > + compatible = "mediatek,mt8192-vdecsys_soc", "syscon"; > + reg = <0 0x1600f000 0 0x1000>; > + #clock-cells = <1>; > +}; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt > index 6a6a14e15cd7..d22de01c24ec 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt > @@ -11,6 +11,7 @@ Required Properties: > - "mediatek,mt6797-vencsys", "syscon" > - "mediatek,mt8173-vencsys", "syscon" > - "mediatek,mt8183-vencsys", "syscon" > + - "mediatek,mt8192-vencsys", "syscon" > - #clock-cells: Must be 1 > > The vencsys controller uses the common clk binding from > -- > 2.18.0 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org> To: Chun-Jie Chen <chun-jie.chen@mediatek.com> Cc: Matthias Brugger <matthias.bgg@gmail.com>, Stephen Boyd <sboyd@kernel.org>, Nicolas Boichat <drinkcat@chromium.org>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, srv_heupstream@mediatek.com, Project_Global_Chrome_Upstream_Group@mediatek.com, Weiyi Lu <weiyi.lu@mediatek.com> Subject: Re: [PATCH v9 05/22] dt-bindings: ARM: Mediatek: Document bindings of MT8192 clock controllers Date: Wed, 2 Jun 2021 12:20:36 -0500 [thread overview] Message-ID: <20210602172036.GA3601208@robh.at.kernel.org> (raw) In-Reply-To: <20210524122053.17155-6-chun-jie.chen@mediatek.com> On Mon, May 24, 2021 at 08:20:36PM +0800, Chun-Jie Chen wrote: > This patch adds the binding documentation of topckgen, apmixedsys, > infracfg, pericfg and subsystem clocks for Mediatek MT8192. I suspect all these could just be merged into 1 schema like the others if the only differences are compatible strings. > > Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> > Signed-off-by: chun-jie.chen <chun-jie.chen@mediatek.com> > --- > .../arm/mediatek/mediatek,apmixedsys.txt | 1 + > .../bindings/arm/mediatek/mediatek,audsys.txt | 1 + > .../bindings/arm/mediatek/mediatek,camsys.txt | 22 +++++++++++++++++++ > .../bindings/arm/mediatek/mediatek,imgsys.txt | 2 ++ > .../arm/mediatek/mediatek,infracfg.txt | 1 + > .../bindings/arm/mediatek/mediatek,ipesys.txt | 1 + > .../bindings/arm/mediatek/mediatek,mfgcfg.txt | 1 + > .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 + > .../arm/mediatek/mediatek,pericfg.yaml | 1 + > .../arm/mediatek/mediatek,topckgen.txt | 1 + > .../arm/mediatek/mediatek,vdecsys.txt | 8 +++++++ > .../arm/mediatek/mediatek,vencsys.txt | 1 + > 12 files changed, 41 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > index ea827e8763de..551c30735cd7 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > @@ -18,6 +18,7 @@ Required Properties: > - "mediatek,mt8167-apmixedsys", "syscon" > - "mediatek,mt8173-apmixedsys" > - "mediatek,mt8183-apmixedsys", "syscon" > + - "mediatek,mt8192-apmixedsys", "syscon" > - "mediatek,mt8516-apmixedsys" > - #clock-cells: Must be 1 > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt > index b32d374193c7..699776be1dd3 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt > @@ -13,6 +13,7 @@ Required Properties: > - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon" > - "mediatek,mt8167-audiosys", "syscon" > - "mediatek,mt8183-audiosys", "syscon" > + - "mediatek,mt8192-audsys", "syscon" > - "mediatek,mt8516-audsys", "syscon" > - #clock-cells: Must be 1 > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt > index a0ce82085ad0..7d0b14e5c8ba 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt > @@ -9,6 +9,10 @@ Required Properties: > - "mediatek,mt6765-camsys", "syscon" > - "mediatek,mt6779-camsys", "syscon" > - "mediatek,mt8183-camsys", "syscon" > + - "mediatek,mt8192-camsys", "syscon" > + - "mediatek,mt8192-camsys_rawa", "syscon" > + - "mediatek,mt8192-camsys_rawb", "syscon" > + - "mediatek,mt8192-camsys_rawc", "syscon" > - #clock-cells: Must be 1 > > The camsys controller uses the common clk binding from > @@ -22,3 +26,21 @@ camsys: camsys@1a000000 { > reg = <0 0x1a000000 0 0x1000>; > #clock-cells = <1>; > }; > + > +camsys_rawa: syscon@1a04f000 { > + compatible = "mediatek,mt8192-camsys_rawa", "syscon"; > + reg = <0 0x1a04f000 0 0x1000>; > + #clock-cells = <1>; > +}; > + > +camsys_rawb: syscon@1a06f000 { > + compatible = "mediatek,mt8192-camsys_rawb", "syscon"; > + reg = <0 0x1a06f000 0 0x1000>; > + #clock-cells = <1>; > +}; > + > +camsys_rawc: syscon@1a08f000 { > + compatible = "mediatek,mt8192-camsys_rawc", "syscon"; > + reg = <0 0x1a08f000 0 0x1000>; > + #clock-cells = <1>; > +}; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt > index dce4c9241932..b9e599e116dc 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt > @@ -15,6 +15,8 @@ Required Properties: > - "mediatek,mt8167-imgsys", "syscon" > - "mediatek,mt8173-imgsys", "syscon" > - "mediatek,mt8183-imgsys", "syscon" > + - "mediatek,mt8192-imgsys", "syscon" > + - "mediatek,mt8192-imgsys2", "syscon" > - #clock-cells: Must be 1 > > The imgsys controller uses the common clk binding from > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > index eb3523c7a7be..6e05a0014cf7 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > @@ -19,6 +19,7 @@ Required Properties: > - "mediatek,mt8167-infracfg", "syscon" > - "mediatek,mt8173-infracfg", "syscon" > - "mediatek,mt8183-infracfg", "syscon" > + - "mediatek,mt8192-infracfg", "syscon" > - "mediatek,mt8516-infracfg", "syscon" > - #clock-cells: Must be 1 > - #reset-cells: Must be 1 > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt > index 2ce889b023d9..9cd10350ab9b 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ipesys.txt > @@ -7,6 +7,7 @@ Required Properties: > > - compatible: Should be one of: > - "mediatek,mt6779-ipesys", "syscon" > + - "mediatek,mt8192-ipesys", "syscon" > - #clock-cells: Must be 1 > > The ipesys controller uses the common clk binding from > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt > index 054424fb64b4..6bfb49a43ef9 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt > @@ -10,6 +10,7 @@ Required Properties: > - "mediatek,mt6779-mfgcfg", "syscon" > - "mediatek,mt8167-mfgcfg", "syscon" > - "mediatek,mt8183-mfgcfg", "syscon" > + - "mediatek,mt8192-mfgcfg", "syscon" > - #clock-cells: Must be 1 > > The mfgcfg controller uses the common clk binding from > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt > index 78c50733985c..9712a6831fab 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt > @@ -16,6 +16,7 @@ Required Properties: > - "mediatek,mt8167-mmsys", "syscon" > - "mediatek,mt8173-mmsys", "syscon" > - "mediatek,mt8183-mmsys", "syscon" > + - "mediatek,mt8192-mmsys", "syscon" > - #clock-cells: Must be 1 > > For the clock control, the mmsys controller uses the common clk binding from > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml > index 8723dfe34bab..b405cbcafb90 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml > @@ -26,6 +26,7 @@ properties: > - mediatek,mt8135-pericfg > - mediatek,mt8173-pericfg > - mediatek,mt8183-pericfg > + - mediatek,mt8192-pericfg > - mediatek,mt8516-pericfg > - const: syscon > - items: > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > index 5ce7578cf274..1627e384b2ba 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > @@ -18,6 +18,7 @@ Required Properties: > - "mediatek,mt8167-topckgen", "syscon" > - "mediatek,mt8173-topckgen" > - "mediatek,mt8183-topckgen", "syscon" > + - "mediatek,mt8192-topckgen", "syscon" > - "mediatek,mt8516-topckgen" > - #clock-cells: Must be 1 > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt > index 98195169176a..376c82ed09ab 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt > @@ -14,6 +14,8 @@ Required Properties: > - "mediatek,mt8167-vdecsys", "syscon" > - "mediatek,mt8173-vdecsys", "syscon" > - "mediatek,mt8183-vdecsys", "syscon" > + - "mediatek,mt8192-vdecsys", "syscon" > + - "mediatek,mt8192-vdecsys_soc", "syscon" > - #clock-cells: Must be 1 > > The vdecsys controller uses the common clk binding from > @@ -27,3 +29,9 @@ vdecsys: clock-controller@16000000 { > reg = <0 0x16000000 0 0x1000>; > #clock-cells = <1>; > }; > + > +vdecsys_soc: syscon@1600f000 { > + compatible = "mediatek,mt8192-vdecsys_soc", "syscon"; > + reg = <0 0x1600f000 0 0x1000>; > + #clock-cells = <1>; > +}; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt > index 6a6a14e15cd7..d22de01c24ec 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt > @@ -11,6 +11,7 @@ Required Properties: > - "mediatek,mt6797-vencsys", "syscon" > - "mediatek,mt8173-vencsys", "syscon" > - "mediatek,mt8183-vencsys", "syscon" > + - "mediatek,mt8192-vencsys", "syscon" > - #clock-cells: Must be 1 > > The vencsys controller uses the common clk binding from > -- > 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-06-02 17:30 UTC|newest] Thread overview: 116+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-24 12:20 [PATCH v9 00/22] Mediatek MT8192 clock support Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 01/22] dt-bindings: ARM: Mediatek: Add new document bindings of imp i2c wrapper controller Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-06-02 17:12 ` Rob Herring 2021-06-02 17:12 ` Rob Herring 2021-06-02 17:12 ` Rob Herring 2021-06-07 5:20 ` Chun-Jie Chen 2021-06-07 5:20 ` Chun-Jie Chen 2021-06-07 5:20 ` Chun-Jie Chen 2021-06-08 14:45 ` Matthias Brugger 2021-06-08 14:45 ` Matthias Brugger 2021-06-08 14:45 ` Matthias Brugger 2021-06-10 17:41 ` Stephen Boyd 2021-06-10 17:41 ` Stephen Boyd 2021-06-10 17:41 ` Stephen Boyd 2021-06-11 9:56 ` Matthias Brugger 2021-06-11 9:56 ` Matthias Brugger 2021-06-11 9:56 ` Matthias Brugger 2021-06-15 2:34 ` Chun-Jie Chen 2021-06-15 2:34 ` Chun-Jie Chen 2021-06-15 2:34 ` Chun-Jie Chen 2021-06-18 6:32 ` Chen-Yu Tsai 2021-06-18 6:32 ` Chen-Yu Tsai 2021-06-18 6:32 ` Chen-Yu Tsai 2021-06-18 13:50 ` Matthias Brugger 2021-06-18 13:50 ` Matthias Brugger 2021-06-18 13:50 ` Matthias Brugger 2021-06-28 12:56 ` Chun-Jie Chen 2021-06-28 12:56 ` Chun-Jie Chen 2021-06-28 12:56 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 02/22] dt-bindings: ARM: Mediatek: Add new document bindings of mdpsys controller Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-06-02 17:15 ` Rob Herring 2021-06-02 17:15 ` Rob Herring 2021-06-02 17:15 ` Rob Herring 2021-05-24 12:20 ` [PATCH v9 03/22] dt-bindings: ARM: Mediatek: Add new document bindings of msdc controller Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-06-02 17:17 ` Rob Herring 2021-06-02 17:17 ` Rob Herring 2021-06-02 17:17 ` Rob Herring 2021-05-24 12:20 ` [PATCH v9 04/22] dt-bindings: ARM: Mediatek: Add new document bindings of scp adsp controller Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-06-02 17:18 ` Rob Herring 2021-06-02 17:18 ` Rob Herring 2021-06-02 17:18 ` Rob Herring 2021-05-24 12:20 ` [PATCH v9 05/22] dt-bindings: ARM: Mediatek: Document bindings of MT8192 clock controllers Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-06-02 17:20 ` Rob Herring [this message] 2021-06-02 17:20 ` Rob Herring 2021-06-03 12:26 ` Chun-Jie Chen 2021-06-03 12:26 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 06/22] clk: mediatek: Add dt-bindings of MT8192 clocks Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 07/22] clk: mediatek: Fix asymmetrical PLL enable and disable control Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 08/22] clk: mediatek: Add configurable enable control to mtk_pll_data Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 09/22] clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 10/22] clk: mediatek: Add MT8192 basic clocks support Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 11/22] clk: mediatek: Add MT8192 audio clock support Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 12/22] clk: mediatek: Add MT8192 camsys " Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 13/22] clk: mediatek: Add MT8192 imgsys " Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 14/22] clk: mediatek: Add MT8192 imp i2c wrapper " Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 15/22] clk: mediatek: Add MT8192 ipesys " Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 16/22] clk: mediatek: Add MT8192 mdpsys " Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 17/22] clk: mediatek: Add MT8192 mfgcfg " Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 18/22] clk: mediatek: Add MT8192 mmsys " Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-06-08 14:44 ` Matthias Brugger 2021-06-08 14:44 ` Matthias Brugger 2021-06-08 14:44 ` Matthias Brugger 2021-06-08 22:38 ` Chun-Jie Chen 2021-06-08 22:38 ` Chun-Jie Chen 2021-06-09 8:08 ` Matthias Brugger 2021-06-09 8:08 ` Matthias Brugger 2021-06-09 8:08 ` Matthias Brugger 2021-05-24 12:20 ` [PATCH v9 19/22] clk: mediatek: Add MT8192 msdc " Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 20/22] clk: mediatek: Add MT8192 scp adsp " Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 21/22] clk: mediatek: Add MT8192 vdecsys " Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` [PATCH v9 22/22] clk: mediatek: Add MT8192 vencsys " Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen 2021-05-24 12:20 ` Chun-Jie Chen
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