* [PATCH V2] ARM: rmobile: beacon-renesom: Enable QSPI NOR Flash
@ 2021-06-03 13:22 Adam Ford
2021-08-23 12:23 ` Adam Ford
0 siblings, 1 reply; 5+ messages in thread
From: Adam Ford @ 2021-06-03 13:22 UTC (permalink / raw)
To: u-boot; +Cc: biju.das.jz, aford, Adam Ford
There is a QSPI NOR flash part on the board. Because this chip isn't
yet supported in Linux, but it is supported in U-Boot, and the
face that the RPC_SPI compatible names are different in U-Boot and
Linux, the device tree updates are confined to -u-boot.dtsi files.
In order to use the QSPI, TF-A must leave RPC unlocked by compiling
TF-A with RZG_RPC_HYPERFLASH_LOCKED=0.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Biju Bas <biju.das.jz@bp.renesas.com>
---
V2: Add note to commit message about TF-A
No functional changes
diff --git a/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi b/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
index a0c0a7f35c..06271537b7 100644
--- a/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
+++ b/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
@@ -4,11 +4,19 @@
*/
/ {
+ aliases {
+ spi0 = &rpc;
+ };
+
soc {
u-boot,dm-pre-reloc;
};
};
+&avb {
+ phy-mode = "rgmii-txid";
+};
+
&cpg {
u-boot,dm-pre-reloc;
};
@@ -25,6 +33,25 @@
u-boot,dm-pre-reloc;
};
+&rpc {
+ compatible = "renesas,rcar-gen3-rpc";
+ num-cs = <1>;
+ spi-max-frequency = <40000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ flash0: spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ compatible = "spi-flash", "jedec,spi-nor";
+ spi-max-frequency = <40000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ };
+};
+
&sdhi0 {
/delete-property/ cd-gpios;
};
diff --git a/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi b/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
index a0c0a7f35c..be0ce54e55 100644
--- a/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
+++ b/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
@@ -4,6 +4,10 @@
*/
/ {
+ aliases {
+ spi0 = &rpc;
+ };
+
soc {
u-boot,dm-pre-reloc;
};
@@ -25,6 +29,25 @@
u-boot,dm-pre-reloc;
};
+&rpc {
+ compatible = "renesas,rcar-gen3-rpc";
+ num-cs = <1>;
+ spi-max-frequency = <40000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ flash0: spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ compatible = "spi-flash", "jedec,spi-nor";
+ spi-max-frequency = <40000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ };
+};
+
&sdhi0 {
/delete-property/ cd-gpios;
};
diff --git a/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi b/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
index eef200af2d..228391e0df 100644
--- a/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
+++ b/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
@@ -4,6 +4,10 @@
*/
/ {
+ aliases {
+ spi0 = &rpc;
+ };
+
soc {
u-boot,dm-pre-reloc;
};
@@ -25,6 +29,25 @@
u-boot,dm-pre-reloc;
};
+&rpc {
+ compatible = "renesas,rcar-gen3-rpc";
+ num-cs = <1>;
+ spi-max-frequency = <40000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ flash0: spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ compatible = "spi-flash", "jedec,spi-nor";
+ spi-max-frequency = <40000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ };
+};
+
&sdhi0 {
/delete-property/ cd-gpios;
sd-uhs-sdr12;
diff --git a/configs/r8a774a1_beacon_defconfig b/configs/r8a774a1_beacon_defconfig
index 4a87a9a31f..c115f548a3 100644
--- a/configs/r8a774a1_beacon_defconfig
+++ b/configs/r8a774a1_beacon_defconfig
@@ -18,7 +18,9 @@ CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -47,6 +49,10 @@ CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
CONFIG_BITBANGMII=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
@@ -56,6 +62,9 @@ CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_RENESAS_RPC_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
diff --git a/configs/r8a774b1_beacon_defconfig b/configs/r8a774b1_beacon_defconfig
index 2c31222525..fe7bac048a 100644
--- a/configs/r8a774b1_beacon_defconfig
+++ b/configs/r8a774b1_beacon_defconfig
@@ -18,7 +18,9 @@ CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -48,6 +50,10 @@ CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_RENESAS_SDHI=y
CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_BITBANGMII=y
CONFIG_PHY_REALTEK=y
@@ -61,6 +67,9 @@ CONFIG_SCIF_CONSOLE=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_RENESAS_RPC_SPI=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_RENESAS_RPC_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
diff --git a/configs/r8a774e1_beacon_defconfig b/configs/r8a774e1_beacon_defconfig
index a814d6ad63..37097b0088 100644
--- a/configs/r8a774e1_beacon_defconfig
+++ b/configs/r8a774e1_beacon_defconfig
@@ -18,7 +18,9 @@ CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -47,6 +49,10 @@ CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
CONFIG_BITBANGMII=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
@@ -56,6 +62,9 @@ CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_RENESAS_RPC_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
--
2.17.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH V2] ARM: rmobile: beacon-renesom: Enable QSPI NOR Flash
2021-06-03 13:22 [PATCH V2] ARM: rmobile: beacon-renesom: Enable QSPI NOR Flash Adam Ford
@ 2021-08-23 12:23 ` Adam Ford
2021-08-23 13:50 ` Marek Vasut
0 siblings, 1 reply; 5+ messages in thread
From: Adam Ford @ 2021-08-23 12:23 UTC (permalink / raw)
To: U-Boot Mailing List, Marek Vasut; +Cc: Biju Das, Adam Ford-BE
On Thu, Jun 3, 2021 at 8:22 AM Adam Ford <aford173@gmail.com> wrote:
>
> There is a QSPI NOR flash part on the board. Because this chip isn't
> yet supported in Linux, but it is supported in U-Boot, and the
> face that the RPC_SPI compatible names are different in U-Boot and
> Linux, the device tree updates are confined to -u-boot.dtsi files.
>
> In order to use the QSPI, TF-A must leave RPC unlocked by compiling
> TF-A with RZG_RPC_HYPERFLASH_LOCKED=0.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>
> Reviewed-by: Biju Bas <biju.das.jz@bp.renesas.com>
Marek,
It looks like this [1] was assigned to you. its been a couple months.
any chance this could get applied or get feedback?
thanks,
adam
[1] - https://patchwork.ozlabs.org/project/uboot/patch/20210603132207.9469-1-aford173@gmail.com/
> ---
> V2: Add note to commit message about TF-A
> No functional changes
>
> diff --git a/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi b/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
> index a0c0a7f35c..06271537b7 100644
> --- a/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
> +++ b/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
> @@ -4,11 +4,19 @@
> */
>
> / {
> + aliases {
> + spi0 = &rpc;
> + };
> +
> soc {
> u-boot,dm-pre-reloc;
> };
> };
>
> +&avb {
> + phy-mode = "rgmii-txid";
> +};
> +
> &cpg {
> u-boot,dm-pre-reloc;
> };
> @@ -25,6 +33,25 @@
> u-boot,dm-pre-reloc;
> };
>
> +&rpc {
> + compatible = "renesas,rcar-gen3-rpc";
> + num-cs = <1>;
> + spi-max-frequency = <40000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + flash0: spi-flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0>;
> + compatible = "spi-flash", "jedec,spi-nor";
> + spi-max-frequency = <40000000>;
> + spi-tx-bus-width = <1>;
> + spi-rx-bus-width = <1>;
> + };
> +};
> +
> &sdhi0 {
> /delete-property/ cd-gpios;
> };
> diff --git a/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi b/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
> index a0c0a7f35c..be0ce54e55 100644
> --- a/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
> +++ b/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
> @@ -4,6 +4,10 @@
> */
>
> / {
> + aliases {
> + spi0 = &rpc;
> + };
> +
> soc {
> u-boot,dm-pre-reloc;
> };
> @@ -25,6 +29,25 @@
> u-boot,dm-pre-reloc;
> };
>
> +&rpc {
> + compatible = "renesas,rcar-gen3-rpc";
> + num-cs = <1>;
> + spi-max-frequency = <40000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + flash0: spi-flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0>;
> + compatible = "spi-flash", "jedec,spi-nor";
> + spi-max-frequency = <40000000>;
> + spi-tx-bus-width = <1>;
> + spi-rx-bus-width = <1>;
> + };
> +};
> +
> &sdhi0 {
> /delete-property/ cd-gpios;
> };
> diff --git a/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi b/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
> index eef200af2d..228391e0df 100644
> --- a/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
> +++ b/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
> @@ -4,6 +4,10 @@
> */
>
> / {
> + aliases {
> + spi0 = &rpc;
> + };
> +
> soc {
> u-boot,dm-pre-reloc;
> };
> @@ -25,6 +29,25 @@
> u-boot,dm-pre-reloc;
> };
>
> +&rpc {
> + compatible = "renesas,rcar-gen3-rpc";
> + num-cs = <1>;
> + spi-max-frequency = <40000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + flash0: spi-flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0>;
> + compatible = "spi-flash", "jedec,spi-nor";
> + spi-max-frequency = <40000000>;
> + spi-tx-bus-width = <1>;
> + spi-rx-bus-width = <1>;
> + };
> +};
> +
> &sdhi0 {
> /delete-property/ cd-gpios;
> sd-uhs-sdr12;
> diff --git a/configs/r8a774a1_beacon_defconfig b/configs/r8a774a1_beacon_defconfig
> index 4a87a9a31f..c115f548a3 100644
> --- a/configs/r8a774a1_beacon_defconfig
> +++ b/configs/r8a774a1_beacon_defconfig
> @@ -18,7 +18,9 @@ CONFIG_CMD_BOOTZ=y
> CONFIG_CMD_GPIO=y
> CONFIG_CMD_I2C=y
> CONFIG_CMD_MMC=y
> +CONFIG_CMD_MTD=y
> CONFIG_CMD_PART=y
> +CONFIG_CMD_SPI=y
> CONFIG_CMD_USB=y
> CONFIG_CMD_DHCP=y
> CONFIG_CMD_MII=y
> @@ -47,6 +49,10 @@ CONFIG_MMC_IO_VOLTAGE=y
> CONFIG_MMC_UHS_SUPPORT=y
> CONFIG_MMC_HS200_SUPPORT=y
> CONFIG_RENESAS_SDHI=y
> +CONFIG_MTD=y
> +CONFIG_DM_MTD=y
> +CONFIG_DM_SPI_FLASH=y
> +CONFIG_SPI_FLASH_WINBOND=y
> CONFIG_BITBANGMII=y
> CONFIG_PHY_REALTEK=y
> CONFIG_DM_ETH=y
> @@ -56,6 +62,9 @@ CONFIG_DM_REGULATOR_FIXED=y
> CONFIG_DM_REGULATOR_GPIO=y
> CONFIG_SPECIFY_CONSOLE_INDEX=y
> CONFIG_SCIF_CONSOLE=y
> +CONFIG_SPI=y
> +CONFIG_DM_SPI=y
> +CONFIG_RENESAS_RPC_SPI=y
> CONFIG_USB=y
> CONFIG_DM_USB=y
> CONFIG_USB_XHCI_HCD=y
> diff --git a/configs/r8a774b1_beacon_defconfig b/configs/r8a774b1_beacon_defconfig
> index 2c31222525..fe7bac048a 100644
> --- a/configs/r8a774b1_beacon_defconfig
> +++ b/configs/r8a774b1_beacon_defconfig
> @@ -18,7 +18,9 @@ CONFIG_CMD_BOOTZ=y
> CONFIG_CMD_GPIO=y
> CONFIG_CMD_I2C=y
> CONFIG_CMD_MMC=y
> +CONFIG_CMD_MTD=y
> CONFIG_CMD_PART=y
> +CONFIG_CMD_SPI=y
> CONFIG_CMD_USB=y
> CONFIG_CMD_DHCP=y
> CONFIG_CMD_MII=y
> @@ -48,6 +50,10 @@ CONFIG_MMC_UHS_SUPPORT=y
> CONFIG_MMC_HS200_SUPPORT=y
> CONFIG_RENESAS_SDHI=y
> CONFIG_MTD=y
> +CONFIG_DM_MTD=y
> +CONFIG_DM_SPI_FLASH=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_MTD=y
> CONFIG_DM_SPI_FLASH=y
> CONFIG_BITBANGMII=y
> CONFIG_PHY_REALTEK=y
> @@ -61,6 +67,9 @@ CONFIG_SCIF_CONSOLE=y
> CONFIG_SPI=y
> CONFIG_DM_SPI=y
> CONFIG_RENESAS_RPC_SPI=y
> +CONFIG_SPI=y
> +CONFIG_DM_SPI=y
> +CONFIG_RENESAS_RPC_SPI=y
> CONFIG_USB=y
> CONFIG_DM_USB=y
> CONFIG_USB_XHCI_HCD=y
> diff --git a/configs/r8a774e1_beacon_defconfig b/configs/r8a774e1_beacon_defconfig
> index a814d6ad63..37097b0088 100644
> --- a/configs/r8a774e1_beacon_defconfig
> +++ b/configs/r8a774e1_beacon_defconfig
> @@ -18,7 +18,9 @@ CONFIG_CMD_BOOTZ=y
> CONFIG_CMD_GPIO=y
> CONFIG_CMD_I2C=y
> CONFIG_CMD_MMC=y
> +CONFIG_CMD_MTD=y
> CONFIG_CMD_PART=y
> +CONFIG_CMD_SPI=y
> CONFIG_CMD_USB=y
> CONFIG_CMD_DHCP=y
> CONFIG_CMD_MII=y
> @@ -47,6 +49,10 @@ CONFIG_MMC_IO_VOLTAGE=y
> CONFIG_MMC_UHS_SUPPORT=y
> CONFIG_MMC_HS200_SUPPORT=y
> CONFIG_RENESAS_SDHI=y
> +CONFIG_MTD=y
> +CONFIG_DM_MTD=y
> +CONFIG_DM_SPI_FLASH=y
> +CONFIG_SPI_FLASH_WINBOND=y
> CONFIG_BITBANGMII=y
> CONFIG_PHY_REALTEK=y
> CONFIG_DM_ETH=y
> @@ -56,6 +62,9 @@ CONFIG_DM_REGULATOR_FIXED=y
> CONFIG_DM_REGULATOR_GPIO=y
> CONFIG_SPECIFY_CONSOLE_INDEX=y
> CONFIG_SCIF_CONSOLE=y
> +CONFIG_SPI=y
> +CONFIG_DM_SPI=y
> +CONFIG_RENESAS_RPC_SPI=y
> CONFIG_USB=y
> CONFIG_DM_USB=y
> CONFIG_USB_XHCI_HCD=y
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH V2] ARM: rmobile: beacon-renesom: Enable QSPI NOR Flash
2021-08-23 12:23 ` Adam Ford
@ 2021-08-23 13:50 ` Marek Vasut
2021-08-23 15:40 ` Adam Ford
0 siblings, 1 reply; 5+ messages in thread
From: Marek Vasut @ 2021-08-23 13:50 UTC (permalink / raw)
To: Adam Ford, U-Boot Mailing List; +Cc: Biju Das, Adam Ford-BE
On 8/23/21 2:23 PM, Adam Ford wrote:
> On Thu, Jun 3, 2021 at 8:22 AM Adam Ford <aford173@gmail.com> wrote:
>>
>> There is a QSPI NOR flash part on the board. Because this chip isn't
>> yet supported in Linux, but it is supported in U-Boot, and the
>> face that the RPC_SPI compatible names are different in U-Boot and
>> Linux, the device tree updates are confined to -u-boot.dtsi files.
>>
>> In order to use the QSPI, TF-A must leave RPC unlocked by compiling
>> TF-A with RZG_RPC_HYPERFLASH_LOCKED=0.
>>
>> Signed-off-by: Adam Ford <aford173@gmail.com>
>> Reviewed-by: Biju Bas <biju.das.jz@bp.renesas.com>
>
> Marek,
>
> It looks like this [1] was assigned to you. its been a couple months.
> any chance this could get applied or get feedback?
Rebase, fix the below, resend, I'll pick it.
Also, probably don't wait "a few months" and let the frustration grow
next time, week or two usually means the patch was missed.
>> / {
>> + aliases {
>> + spi0 = &rpc;
>> + };
>> +
>> soc {
>> u-boot,dm-pre-reloc;
>> };
>> };
>>
>> +&avb {
>> + phy-mode = "rgmii-txid";
>> +};
>> +
Do you really need ethernet for QSPI NOR ?
>> &cpg {
>> u-boot,dm-pre-reloc;
>> };
>> @@ -25,6 +33,25 @@
>> u-boot,dm-pre-reloc;
>> };
>>
>> +&rpc {
>> + compatible = "renesas,rcar-gen3-rpc";
>> + num-cs = <1>;
>> + spi-max-frequency = <40000000>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "okay";
btw. can those duplicate entries be somehow deduplicated into some
yourboard.dtsi file ?
>> + flash0: spi-flash@0 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + reg = <0>;
>> + compatible = "spi-flash", "jedec,spi-nor";
>> + spi-max-frequency = <40000000>;
>> + spi-tx-bus-width = <1>;
>> + spi-rx-bus-width = <1>;
>> + };
>> +};
[...]
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH V2] ARM: rmobile: beacon-renesom: Enable QSPI NOR Flash
2021-08-23 13:50 ` Marek Vasut
@ 2021-08-23 15:40 ` Adam Ford
2021-08-23 21:45 ` Marek Vasut
0 siblings, 1 reply; 5+ messages in thread
From: Adam Ford @ 2021-08-23 15:40 UTC (permalink / raw)
To: Marek Vasut; +Cc: U-Boot Mailing List, Biju Das, Adam Ford-BE
On Mon, Aug 23, 2021 at 8:50 AM Marek Vasut <marex@denx.de> wrote:
>
> On 8/23/21 2:23 PM, Adam Ford wrote:
> > On Thu, Jun 3, 2021 at 8:22 AM Adam Ford <aford173@gmail.com> wrote:
> >>
> >> There is a QSPI NOR flash part on the board. Because this chip isn't
> >> yet supported in Linux, but it is supported in U-Boot, and the
> >> face that the RPC_SPI compatible names are different in U-Boot and
> >> Linux, the device tree updates are confined to -u-boot.dtsi files.
> >>
> >> In order to use the QSPI, TF-A must leave RPC unlocked by compiling
> >> TF-A with RZG_RPC_HYPERFLASH_LOCKED=0.
> >>
> >> Signed-off-by: Adam Ford <aford173@gmail.com>
> >> Reviewed-by: Biju Bas <biju.das.jz@bp.renesas.com>
> >
> > Marek,
> >
> > It looks like this [1] was assigned to you. its been a couple months.
> > any chance this could get applied or get feedback?
>
> Rebase, fix the below, resend, I'll pick it.
no problem.
>
> Also, probably don't wait "a few months" and let the frustration grow
> next time, week or two usually means the patch was missed.
I would have sooner, but I was out on medical leave for 6 weeks with a
broken wrist. I am just trying to catch up now.
adam
>
> >> / {
> >> + aliases {
> >> + spi0 = &rpc;
> >> + };
> >> +
> >> soc {
> >> u-boot,dm-pre-reloc;
> >> };
> >> };
> >>
> >> +&avb {
> >> + phy-mode = "rgmii-txid";
> >> +};
> >> +
>
> Do you really need ethernet for QSPI NOR ?
>
> >> &cpg {
> >> u-boot,dm-pre-reloc;
> >> };
> >> @@ -25,6 +33,25 @@
> >> u-boot,dm-pre-reloc;
> >> };
> >>
> >> +&rpc {
> >> + compatible = "renesas,rcar-gen3-rpc";
> >> + num-cs = <1>;
> >> + spi-max-frequency = <40000000>;
> >> + #address-cells = <1>;
> >> + #size-cells = <0>;
> >> + status = "okay";
>
> btw. can those duplicate entries be somehow deduplicated into some
> yourboard.dtsi file ?
>
> >> + flash0: spi-flash@0 {
> >> + #address-cells = <1>;
> >> + #size-cells = <1>;
> >> + reg = <0>;
> >> + compatible = "spi-flash", "jedec,spi-nor";
> >> + spi-max-frequency = <40000000>;
> >> + spi-tx-bus-width = <1>;
> >> + spi-rx-bus-width = <1>;
> >> + };
> >> +};
>
> [...]
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH V2] ARM: rmobile: beacon-renesom: Enable QSPI NOR Flash
2021-08-23 15:40 ` Adam Ford
@ 2021-08-23 21:45 ` Marek Vasut
0 siblings, 0 replies; 5+ messages in thread
From: Marek Vasut @ 2021-08-23 21:45 UTC (permalink / raw)
To: Adam Ford; +Cc: U-Boot Mailing List, Biju Das, Adam Ford-BE
On 8/23/21 5:40 PM, Adam Ford wrote:
> On Mon, Aug 23, 2021 at 8:50 AM Marek Vasut <marex@denx.de> wrote:
>>
>> On 8/23/21 2:23 PM, Adam Ford wrote:
>>> On Thu, Jun 3, 2021 at 8:22 AM Adam Ford <aford173@gmail.com> wrote:
>>>>
>>>> There is a QSPI NOR flash part on the board. Because this chip isn't
>>>> yet supported in Linux, but it is supported in U-Boot, and the
>>>> face that the RPC_SPI compatible names are different in U-Boot and
>>>> Linux, the device tree updates are confined to -u-boot.dtsi files.
>>>>
>>>> In order to use the QSPI, TF-A must leave RPC unlocked by compiling
>>>> TF-A with RZG_RPC_HYPERFLASH_LOCKED=0.
>>>>
>>>> Signed-off-by: Adam Ford <aford173@gmail.com>
>>>> Reviewed-by: Biju Bas <biju.das.jz@bp.renesas.com>
>>>
>>> Marek,
>>>
>>> It looks like this [1] was assigned to you. its been a couple months.
>>> any chance this could get applied or get feedback?
>>
>> Rebase, fix the below, resend, I'll pick it.
>
> no problem.
>
>>
>> Also, probably don't wait "a few months" and let the frustration grow
>> next time, week or two usually means the patch was missed.
>
> I would have sooner, but I was out on medical leave for 6 weeks with a
> broken wrist. I am just trying to catch up now.
Oh well, then just fix the patch up and resend when you have time.
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-08-23 21:45 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-03 13:22 [PATCH V2] ARM: rmobile: beacon-renesom: Enable QSPI NOR Flash Adam Ford
2021-08-23 12:23 ` Adam Ford
2021-08-23 13:50 ` Marek Vasut
2021-08-23 15:40 ` Adam Ford
2021-08-23 21:45 ` Marek Vasut
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