* [PATCH] mtd: spinand: macronix: Add support for serial NAND flash
@ 2021-05-27 8:51 Jaime Liao
2021-05-27 8:58 ` Miquel Raynal
0 siblings, 1 reply; 11+ messages in thread
From: Jaime Liao @ 2021-05-27 8:51 UTC (permalink / raw)
To: u-boot, jagan, vigneshr, miquel.raynal; +Cc: zhengxunli, ycllin, Jaime Liao
Macronix NAND Flash devices are available in different configurations
and densities.
MX"35" means SPI NAND
MX35"LF"/"UF" , LF means 3V and UF meands 1.8V
MX35LF"2G" , 2G means 2Gbits
MX35LF2G"E4"/"24"/"14",
E4 means internal ECC and Quad I/O(x4)
24 means 8-bit ecc requirement and Quad I/O(x4)
14 means 4-bit ecc requirement and Quad I/O(x4)
MX35LF2G14AC is 3V 2Gbit serial NAND flash device
(without on-die ECC)
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7926/MX35LF2G14AC,%203V,%202Gb,%20v1.1.pdf
MX35UF4G24AD/MX35UF2G24AD/MX35UF1G24AD is 1.8V 4Gbit serial NAND flash device
(without on-die ECC)
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7980/MX35UF4G24AD,%201.8V,%204Gb,%20v0.00.pdf
MX35UF4GE4AD/MX35UF2GE4AD/MX35UF1GE4AD are 1.8V 4G/2Gbit serial
NAND flash device with 8-bit on-die ECC
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7983/MX35UF4GE4AD,%201.8V,%204Gb,%20v0.00.pdf
MX35UF2GE4AC/MX35UF1GE4AC are 1.8V 2G/1Gbit serial
NAND flash device with 8-bit on-die ECC
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7974/MX35UF2GE4AC,%201.8V,%202Gb,%20v1.0.pdf
MX35UF2G14AC/MX35UF1G14AC are 1.8V 2G/1Gbit serial
NAND flash device (without on-die ECC)
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7931/MX35UF2G14AC,%201.8V,%202Gb,%20v1.1.pdf
Validated via normal(default) and QUAD mode by read, erase, read back,
on Xilinx Zynq PicoZed FPGA board which included Macronix
SPI Host(drivers/spi/spi-mxic.c).
Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
---
drivers/mtd/nand/spi/macronix.c | 100 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 100 insertions(+)
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index 215f09a..8a33dce 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -114,6 +114,106 @@ static const struct spinand_info macronix_spinand_table[] = {
&update_cache_variants),
SPINAND_HAS_QE_BIT,
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
+ SPINAND_INFO("MX35LF2G14AC", 0x20,
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF4G24AD", 0xb5,
+ NAND_MEMORG(1, 4096, 256, 64, 2048, 2, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF4GE4AD", 0xb7,
+ NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF2G14AC", 0xa0,
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF2G24AD", 0xa4,
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 2, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF2GE4AD", 0xa6,
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF2GE4AC", 0xa2,
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF1G14AC", 0x90,
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF1G24AD", 0x94,
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF1GE4AD", 0x96,
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF1GE4AC", 0x92,
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+
};
static int macronix_spinand_detect(struct spinand_device *spinand)
--
1.9.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH] mtd: spinand: macronix: Add support for serial NAND flash
2021-05-27 8:51 [PATCH] mtd: spinand: macronix: Add support for serial NAND flash Jaime Liao
@ 2021-05-27 8:58 ` Miquel Raynal
2021-05-31 2:16 ` zhengxunli
0 siblings, 1 reply; 11+ messages in thread
From: Miquel Raynal @ 2021-05-27 8:58 UTC (permalink / raw)
To: Jaime Liao; +Cc: u-boot, jagan, vigneshr, zhengxunli, ycllin
Hi Jaime,
Jaime Liao <jaimeliao@mxic.com.tw> wrote on Thu, 27 May 2021 16:51:12
+0800:
> Macronix NAND Flash devices are available in different configurations
> and densities.
>
> MX"35" means SPI NAND
> MX35"LF"/"UF" , LF means 3V and UF meands 1.8V
> MX35LF"2G" , 2G means 2Gbits
> MX35LF2G"E4"/"24"/"14",
> E4 means internal ECC and Quad I/O(x4)
> 24 means 8-bit ecc requirement and Quad I/O(x4)
> 14 means 4-bit ecc requirement and Quad I/O(x4)
>
> MX35LF2G14AC is 3V 2Gbit serial NAND flash device
> (without on-die ECC)
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/7926/MX35LF2G14AC,%203V,%202Gb,%20v1.1.pdf
>
> MX35UF4G24AD/MX35UF2G24AD/MX35UF1G24AD is 1.8V 4Gbit serial NAND flash device
> (without on-die ECC)
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/7980/MX35UF4G24AD,%201.8V,%204Gb,%20v0.00.pdf
>
> MX35UF4GE4AD/MX35UF2GE4AD/MX35UF1GE4AD are 1.8V 4G/2Gbit serial
> NAND flash device with 8-bit on-die ECC
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/7983/MX35UF4GE4AD,%201.8V,%204Gb,%20v0.00.pdf
>
> MX35UF2GE4AC/MX35UF1GE4AC are 1.8V 2G/1Gbit serial
> NAND flash device with 8-bit on-die ECC
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/7974/MX35UF2GE4AC,%201.8V,%202Gb,%20v1.0.pdf
>
> MX35UF2G14AC/MX35UF1G14AC are 1.8V 2G/1Gbit serial
> NAND flash device (without on-die ECC)
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/7931/MX35UF2G14AC,%201.8V,%202Gb,%20v1.1.pdf
>
> Validated via normal(default) and QUAD mode by read, erase, read back,
> on Xilinx Zynq PicoZed FPGA board which included Macronix
> SPI Host(drivers/spi/spi-mxic.c).
>
> Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
> ---
> drivers/mtd/nand/spi/macronix.c | 100 ++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 100 insertions(+)
>
> diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
> index 215f09a..8a33dce 100644
> --- a/drivers/mtd/nand/spi/macronix.c
> +++ b/drivers/mtd/nand/spi/macronix.c
> @@ -114,6 +114,106 @@ static const struct spinand_info macronix_spinand_table[] = {
> &update_cache_variants),
> SPINAND_HAS_QE_BIT,
> SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
> + SPINAND_INFO("MX35LF2G14AC", 0x20,
> + NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
> + NAND_ECCREQ(4, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + SPINAND_HAS_QE_BIT,
> + SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
> + mx35lf1ge4ab_ecc_get_status)),
This looks like a copy of your previous patch, with the SPINAND_ID
macro dropped.
It would be great if you could clarify your intentions when sending
patches. This means:
- Counting up patch versions
- Explaining their differences and why
So, what is the purpose of this patch give the fact that I already
applied one very similar yesterday?
Thanks,
Miquèl
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH] mtd: spinand: macronix: Add support for serial NAND flash
2021-05-27 8:58 ` Miquel Raynal
@ 2021-05-31 2:16 ` zhengxunli
2021-06-07 6:13 ` Miquel Raynal
0 siblings, 1 reply; 11+ messages in thread
From: zhengxunli @ 2021-05-31 2:16 UTC (permalink / raw)
To: Miquel Raynal; +Cc: jagan, Jaime Liao, u-boot, vigneshr, ycllin
Hi Miquel,
"Miquel Raynal" <miquel.raynal@bootlin.com> wrote on 2021/05/27 下午
04:58:45:
> "Miquel Raynal" <miquel.raynal@bootlin.com>
> 2021/05/27 下午 04:59
>
> To
>
> "Jaime Liao" <jaimeliao@mxic.com.tw>,
>
> cc
>
> u-boot@lists.denx.de, jagan@amarulasolutions.com, vigneshr@ti.com,
> zhengxunli@mxic.com.tw, ycllin@mxic.com.tw
>
> Subject
>
> Re: [PATCH] mtd: spinand: macronix: Add support for serial NAND flash
>
> Hi Jaime,
>
> Jaime Liao <jaimeliao@mxic.com.tw> wrote on Thu, 27 May 2021 16:51:12
> +0800:
>
> > Macronix NAND Flash devices are available in different configurations
> > and densities.
> >
> > MX"35" means SPI NAND
> > MX35"LF"/"UF" , LF means 3V and UF meands 1.8V
> > MX35LF"2G" , 2G means 2Gbits
> > MX35LF2G"E4"/"24"/"14",
> > E4 means internal ECC and Quad I/O(x4)
> > 24 means 8-bit ecc requirement and Quad I/O(x4)
> > 14 means 4-bit ecc requirement and Quad I/O(x4)
> >
> > MX35LF2G14AC is 3V 2Gbit serial NAND flash device
> > (without on-die ECC)
> > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7926/
> MX35LF2G14AC,%203V,%202Gb,%20v1.1.pdf
> >
> > MX35UF4G24AD/MX35UF2G24AD/MX35UF1G24AD is 1.8V 4Gbit serial NAND
> flash device
> > (without on-die ECC)
> > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7980/
> MX35UF4G24AD,%201.8V,%204Gb,%20v0.00.pdf
> >
> > MX35UF4GE4AD/MX35UF2GE4AD/MX35UF1GE4AD are 1.8V 4G/2Gbit serial
> > NAND flash device with 8-bit on-die ECC
> > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7983/
> MX35UF4GE4AD,%201.8V,%204Gb,%20v0.00.pdf
> >
> > MX35UF2GE4AC/MX35UF1GE4AC are 1.8V 2G/1Gbit serial
> > NAND flash device with 8-bit on-die ECC
> > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7974/
> MX35UF2GE4AC,%201.8V,%202Gb,%20v1.0.pdf
> >
> > MX35UF2G14AC/MX35UF1G14AC are 1.8V 2G/1Gbit serial
> > NAND flash device (without on-die ECC)
> > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7931/
> MX35UF2G14AC,%201.8V,%202Gb,%20v1.1.pdf
> >
> > Validated via normal(default) and QUAD mode by read, erase, read back,
> > on Xilinx Zynq PicoZed FPGA board which included Macronix
> > SPI Host(drivers/spi/spi-mxic.c).
> >
> > Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
> > ---
> > drivers/mtd/nand/spi/macronix.c | 100 +++++++++++++++++++++++++++
> +++++++++++++
> > 1 file changed, 100 insertions(+)
> >
> > diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/
> spi/macronix.c
> > index 215f09a..8a33dce 100644
> > --- a/drivers/mtd/nand/spi/macronix.c
> > +++ b/drivers/mtd/nand/spi/macronix.c
> > @@ -114,6 +114,106 @@ static const struct spinand_info
> macronix_spinand_table[] = {
> > &update_cache_variants),
> > SPINAND_HAS_QE_BIT,
> > SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
> > + SPINAND_INFO("MX35LF2G14AC", 0x20,
> > + NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
> > + NAND_ECCREQ(4, 512),
> > + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> > + &write_cache_variants,
> > + &update_cache_variants),
> > + SPINAND_HAS_QE_BIT,
> > + SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
> > + mx35lf1ge4ab_ecc_get_status)),
>
> This looks like a copy of your previous patch, with the SPINAND_ID
> macro dropped.
>
> It would be great if you could clarify your intentions when sending
> patches. This means:
> - Counting up patch versions
> - Explaining their differences and why
>
> So, what is the purpose of this patch give the fact that I already
> applied one very similar yesterday?
>
> Thanks,
> Miquèl
Forward my colleague(Jaime)'s mail as below:
"It is grateful for your comments.
Two patches are different for linux kernel and u-boot.
In this u-boot patch, my purpose is add SPI-NAND IDs in u-boot.
For patching reasonable, I have a question.
AFAIK u-boot didn't include sw-ecc engine.
Is it suitable for Flash which are sw-ecc requirement?"
Thanks,
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(and/or its attachments) or any part thereof is prohibited. If you receive
this e-mail in error, please notify us immediately and delete this mail as
well as its attachment(s) from your system. In addition, please be
informed that collection, processing, and/or use of personal data is
prohibited unless expressly permitted by personal data protection laws.
Thank you for your attention and cooperation.
Macronix International Co., Ltd.
=====================================================================
============================================================================
CONFIDENTIALITY NOTE:
This e-mail and any attachments may contain confidential information and/or personal data, which is protected by applicable laws. Please be reminded that duplication, disclosure, distribution, or use of this e-mail (and/or its attachments) or any part thereof is prohibited. If you receive this e-mail in error, please notify us immediately and delete this mail as well as its attachment(s) from your system. In addition, please be informed that collection, processing, and/or use of personal data is prohibited unless expressly permitted by personal data protection laws. Thank you for your attention and cooperation.
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=====================================================================
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH] mtd: spinand: macronix: Add support for serial NAND flash
2021-05-31 2:16 ` zhengxunli
@ 2021-06-07 6:13 ` Miquel Raynal
2021-06-07 7:11 ` 回信: " jaimeliao
0 siblings, 1 reply; 11+ messages in thread
From: Miquel Raynal @ 2021-06-07 6:13 UTC (permalink / raw)
To: zhengxunli; +Cc: jagan, Jaime Liao, u-boot, vigneshr, ycllin
Hi zhengxunli@mxic.com.tw,
zhengxunli@mxic.com.tw wrote on Mon, 31 May 2021 10:16:24 +0800:
> Hi Miquel,
>
> "Miquel Raynal" <miquel.raynal@bootlin.com> wrote on 2021/05/27 下午
> 04:58:45:
>
> > "Miquel Raynal" <miquel.raynal@bootlin.com>
> > 2021/05/27 下午 04:59
> >
> > To
> >
> > "Jaime Liao" <jaimeliao@mxic.com.tw>,
> >
> > cc
> >
> > u-boot@lists.denx.de, jagan@amarulasolutions.com, vigneshr@ti.com,
> > zhengxunli@mxic.com.tw, ycllin@mxic.com.tw
> >
> > Subject
> >
> > Re: [PATCH] mtd: spinand: macronix: Add support for serial NAND flash
> >
> > Hi Jaime,
> >
> > Jaime Liao <jaimeliao@mxic.com.tw> wrote on Thu, 27 May 2021 16:51:12
> > +0800:
> >
> > > Macronix NAND Flash devices are available in different configurations
> > > and densities.
> > >
> > > MX"35" means SPI NAND
> > > MX35"LF"/"UF" , LF means 3V and UF meands 1.8V
> > > MX35LF"2G" , 2G means 2Gbits
> > > MX35LF2G"E4"/"24"/"14",
> > > E4 means internal ECC and Quad I/O(x4)
> > > 24 means 8-bit ecc requirement and Quad I/O(x4)
> > > 14 means 4-bit ecc requirement and Quad I/O(x4)
> > >
> > > MX35LF2G14AC is 3V 2Gbit serial NAND flash device
> > > (without on-die ECC)
> > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7926/
> > MX35LF2G14AC,%203V,%202Gb,%20v1.1.pdf
> > >
> > > MX35UF4G24AD/MX35UF2G24AD/MX35UF1G24AD is 1.8V 4Gbit serial NAND
> > flash device
> > > (without on-die ECC)
> > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7980/
> > MX35UF4G24AD,%201.8V,%204Gb,%20v0.00.pdf
> > >
> > > MX35UF4GE4AD/MX35UF2GE4AD/MX35UF1GE4AD are 1.8V 4G/2Gbit serial
> > > NAND flash device with 8-bit on-die ECC
> > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7983/
> > MX35UF4GE4AD,%201.8V,%204Gb,%20v0.00.pdf
> > >
> > > MX35UF2GE4AC/MX35UF1GE4AC are 1.8V 2G/1Gbit serial
> > > NAND flash device with 8-bit on-die ECC
> > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7974/
> > MX35UF2GE4AC,%201.8V,%202Gb,%20v1.0.pdf
> > >
> > > MX35UF2G14AC/MX35UF1G14AC are 1.8V 2G/1Gbit serial
> > > NAND flash device (without on-die ECC)
> > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7931/
> > MX35UF2G14AC,%201.8V,%202Gb,%20v1.1.pdf
> > >
> > > Validated via normal(default) and QUAD mode by read, erase, read back,
> > > on Xilinx Zynq PicoZed FPGA board which included Macronix
> > > SPI Host(drivers/spi/spi-mxic.c).
> > >
> > > Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
> > > ---
> > > drivers/mtd/nand/spi/macronix.c | 100 +++++++++++++++++++++++++++
> > +++++++++++++
> > > 1 file changed, 100 insertions(+)
> > >
> > > diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/
> > spi/macronix.c
> > > index 215f09a..8a33dce 100644
> > > --- a/drivers/mtd/nand/spi/macronix.c
> > > +++ b/drivers/mtd/nand/spi/macronix.c
> > > @@ -114,6 +114,106 @@ static const struct spinand_info
> > macronix_spinand_table[] = {
> > > &update_cache_variants),
> > > SPINAND_HAS_QE_BIT,
> > > SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
> > > + SPINAND_INFO("MX35LF2G14AC", 0x20,
> > > + NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
> > > + NAND_ECCREQ(4, 512),
> > > + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> > > + &write_cache_variants,
> > > + &update_cache_variants),
> > > + SPINAND_HAS_QE_BIT,
> > > + SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
> > > + mx35lf1ge4ab_ecc_get_status)),
> >
> > This looks like a copy of your previous patch, with the SPINAND_ID
> > macro dropped.
> >
> > It would be great if you could clarify your intentions when sending
> > patches. This means:
> > - Counting up patch versions
> > - Explaining their differences and why
> >
> > So, what is the purpose of this patch give the fact that I already
> > applied one very similar yesterday?
> >
> > Thanks,
> > Miquèl
>
> Forward my colleague(Jaime)'s mail as below:
>
> "It is grateful for your comments.
>
> Two patches are different for linux kernel and u-boot.
>
> In this u-boot patch, my purpose is add SPI-NAND IDs in u-boot.
Sorry for the misunderstanding, I thought this was intended for Linux.
> For patching reasonable, I have a question.
>
> AFAIK u-boot didn't include sw-ecc engine.
True.
> Is it suitable for Flash which are sw-ecc requirement?"
Not yet, if there are no on-die ECC engine the parts cannot be used in
U-Boot yet.
Thanks,
Miquèl
^ permalink raw reply [flat|nested] 11+ messages in thread* 回信: Re: [PATCH] mtd: spinand: macronix: Add support for serial NAND flash
2021-06-07 6:13 ` Miquel Raynal
@ 2021-06-07 7:11 ` jaimeliao
0 siblings, 0 replies; 11+ messages in thread
From: jaimeliao @ 2021-06-07 7:11 UTC (permalink / raw)
To: Miquel Raynal; +Cc: jagan, u-boot, vigneshr, ycllin, zhengxunli
Hi Miquel
> "Miquel Raynal" <miquel.raynal@bootlin.com>
> 2021/06/07 下午 02:13
>
> 收件人
>
> zhengxunli@mxic.com.tw,
>
> 副本抄送
>
> jagan@amarulasolutions.com, "Jaime Liao" <jaimeliao@mxic.com.tw>, u-
> boot@lists.denx.de, vigneshr@ti.com, ycllin@mxic.com.tw
>
> 主旨
>
> Re: [PATCH] mtd: spinand: macronix: Add support for serial NAND flash
>
> Hi zhengxunli@mxic.com.tw,
>
> zhengxunli@mxic.com.tw wrote on Mon, 31 May 2021 10:16:24 +0800:
>
> > Hi Miquel,
> >
> > "Miquel Raynal" <miquel.raynal@bootlin.com> wrote on 2021/05/27 下午
> > 04:58:45:
> >
> > > "Miquel Raynal" <miquel.raynal@bootlin.com>
> > > 2021/05/27 下午 04:59
> > >
> > > To
> > >
> > > "Jaime Liao" <jaimeliao@mxic.com.tw>,
> > >
> > > cc
> > >
> > > u-boot@lists.denx.de, jagan@amarulasolutions.com, vigneshr@ti.com,
> > > zhengxunli@mxic.com.tw, ycllin@mxic.com.tw
> > >
> > > Subject
> > >
> > > Re: [PATCH] mtd: spinand: macronix: Add support for serial NAND
flash
> > >
> > > Hi Jaime,
> > >
> > > Jaime Liao <jaimeliao@mxic.com.tw> wrote on Thu, 27 May 2021
16:51:12
> > > +0800:
> > >
> > > > Macronix NAND Flash devices are available in different
configurations
> > > > and densities.
> > > >
> > > > MX"35" means SPI NAND
> > > > MX35"LF"/"UF" , LF means 3V and UF meands 1.8V
> > > > MX35LF"2G" , 2G means 2Gbits
> > > > MX35LF2G"E4"/"24"/"14",
> > > > E4 means internal ECC and Quad I/O(x4)
> > > > 24 means 8-bit ecc requirement and Quad I/O(x4)
> > > > 14 means 4-bit ecc requirement and Quad I/O(x4)
> > > >
> > > > MX35LF2G14AC is 3V 2Gbit serial NAND flash device
> > > > (without on-die ECC)
> > > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7926/
> > > MX35LF2G14AC,%203V,%202Gb,%20v1.1.pdf
> > > >
> > > > MX35UF4G24AD/MX35UF2G24AD/MX35UF1G24AD is 1.8V 4Gbit serial NAND
> > > flash device
> > > > (without on-die ECC)
> > > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7980/
> > > MX35UF4G24AD,%201.8V,%204Gb,%20v0.00.pdf
> > > >
> > > > MX35UF4GE4AD/MX35UF2GE4AD/MX35UF1GE4AD are 1.8V 4G/2Gbit serial
> > > > NAND flash device with 8-bit on-die ECC
> > > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7983/
> > > MX35UF4GE4AD,%201.8V,%204Gb,%20v0.00.pdf
> > > >
> > > > MX35UF2GE4AC/MX35UF1GE4AC are 1.8V 2G/1Gbit serial
> > > > NAND flash device with 8-bit on-die ECC
> > > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7974/
> > > MX35UF2GE4AC,%201.8V,%202Gb,%20v1.0.pdf
> > > >
> > > > MX35UF2G14AC/MX35UF1G14AC are 1.8V 2G/1Gbit serial
> > > > NAND flash device (without on-die ECC)
> > > > https://www.mxic.com.tw/Lists/Datasheet/Attachments/7931/
> > > MX35UF2G14AC,%201.8V,%202Gb,%20v1.1.pdf
> > > >
> > > > Validated via normal(default) and QUAD mode by read, erase, read
back,
> > > > on Xilinx Zynq PicoZed FPGA board which included Macronix
> > > > SPI Host(drivers/spi/spi-mxic.c).
> > > >
> > > > Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
> > > > ---
> > > > drivers/mtd/nand/spi/macronix.c | 100 +++++++++++++++++++++++++++
> > > +++++++++++++
> > > > 1 file changed, 100 insertions(+)
> > > >
> > > > diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/
> > > spi/macronix.c
> > > > index 215f09a..8a33dce 100644
> > > > --- a/drivers/mtd/nand/spi/macronix.c
> > > > +++ b/drivers/mtd/nand/spi/macronix.c
> > > > @@ -114,6 +114,106 @@ static const struct spinand_info
> > > macronix_spinand_table[] = {
> > > > &update_cache_variants),
> > > > SPINAND_HAS_QE_BIT,
> > > > SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
> > > > + SPINAND_INFO("MX35LF2G14AC", 0x20,
> > > > + NAND_MEMORG(1, 2048, 64, 64, 2048, 2, 1, 1),
> > > > + NAND_ECCREQ(4, 512),
> > > > + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> > > > + &write_cache_variants,
> > > > + &update_cache_variants),
> > > > + SPINAND_HAS_QE_BIT,
> > > > + SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
> > > > + mx35lf1ge4ab_ecc_get_status)),
> > >
> > > This looks like a copy of your previous patch, with the SPINAND_ID
> > > macro dropped.
> > >
> > > It would be great if you could clarify your intentions when sending
> > > patches. This means:
> > > - Counting up patch versions
> > > - Explaining their differences and why
> > >
> > > So, what is the purpose of this patch give the fact that I already
> > > applied one very similar yesterday?
> > >
> > > Thanks,
> > > Miquèl
> >
> > Forward my colleague(Jaime)'s mail as below:
> >
> > "It is grateful for your comments.
> >
> > Two patches are different for linux kernel and u-boot.
> >
> > In this u-boot patch, my purpose is add SPI-NAND IDs in u-boot.
>
> Sorry for the misunderstanding, I thought this was intended for Linux.
>
> > For patching reasonable, I have a question.
> >
> > AFAIK u-boot didn't include sw-ecc engine.
>
> True.
>
> > Is it suitable for Flash which are sw-ecc requirement?"
>
> Not yet, if there are no on-die ECC engine the parts cannot be used in
> U-Boot yet.
Thanks for your reply, I will send a new patch later with on-die ECC only.
Thanks
Jaime
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=====================================================================
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH] mtd: spinand: macronix: Add support for serial NAND flash
@ 2023-06-08 5:43 Jaime Liao
2023-06-12 10:05 ` Greg KH
0 siblings, 1 reply; 11+ messages in thread
From: Jaime Liao @ 2023-06-08 5:43 UTC (permalink / raw)
To: gregkh, sashal, miquel.raynal, richard, stable
Cc: alvinzhou, juliensu, liangyanyu13, JaimeLiao
From: JaimeLiao <jaimeliao.tw@gmail.com>
MX35LFxGE4AD have been merge into Linux kernel mainline
Commit ID : 5ece78de88739b4c68263e9f2582380c1fd8314f
For SPI-NAND flash support on Linux kernel LTS v5.4.y
Add SPI-NAND flash MX35LF2GE4AD and MX35LF4GE4AD in id tables.
Those two flase have been validate on Xilinx zynq-picozed board and
Linux kernel LTS v5.4.242.
Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com>
---
drivers/mtd/nand/spi/macronix.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index 21def3f8fb36..bbb1d68bce4a 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -116,6 +116,22 @@ static const struct spinand_info macronix_spinand_table[] = {
&update_cache_variants),
SPINAND_HAS_QE_BIT,
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
+ SPINAND_INFO("MX35LF2GE4AD", 0x26,
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
+ SPINAND_INFO("MX35LF4GE4AD", 0x37,
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
};
static int macronix_spinand_detect(struct spinand_device *spinand)
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH] mtd: spinand: macronix: Add support for serial NAND flash
2023-06-08 5:43 Jaime Liao
@ 2023-06-12 10:05 ` Greg KH
0 siblings, 0 replies; 11+ messages in thread
From: Greg KH @ 2023-06-12 10:05 UTC (permalink / raw)
To: Jaime Liao
Cc: sashal, miquel.raynal, richard, stable, alvinzhou, juliensu,
liangyanyu13
On Thu, Jun 08, 2023 at 01:43:50PM +0800, Jaime Liao wrote:
> From: JaimeLiao <jaimeliao.tw@gmail.com>
>
> MX35LFxGE4AD have been merge into Linux kernel mainline
>
> Commit ID : 5ece78de88739b4c68263e9f2582380c1fd8314f
>
> For SPI-NAND flash support on Linux kernel LTS v5.4.y
>
> Add SPI-NAND flash MX35LF2GE4AD and MX35LF4GE4AD in id tables.
>
> Those two flase have been validate on Xilinx zynq-picozed board and
>
> Linux kernel LTS v5.4.242.
>
> Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com>
> ---
> drivers/mtd/nand/spi/macronix.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
Now queued up, thanks.
greg k-h
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH] mtd: spinand: macronix: Add support for serial NAND flash
@ 2023-06-08 5:21 Jaime Liao
2023-06-09 15:24 ` Miquel Raynal
0 siblings, 1 reply; 11+ messages in thread
From: Jaime Liao @ 2023-06-08 5:21 UTC (permalink / raw)
To: miquel.raynal, richard, linux-mtd
Cc: alvinzhou, juliensu, liangyanyu13, JaimeLiao
From: JaimeLiao <jaimeliao.tw@gmail.com>
MX31LF2GE4BC and MX31UF2GE4BC are Macroninx SPI NAND flash
with 8-bit on-die ECC.
Validated via normal(default) and QUAD mode by read ,read back,
on Xilinx Zynq PicoZed FPGA which include Macronix
SPI Host(drivers/spi/spi-mxic.c)
Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com>
---
drivers/mtd/nand/spi/macronix.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index 722a9738ba37..3dfc7e1e5241 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -299,6 +299,26 @@ static const struct spinand_info macronix_spinand_table[] = {
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX31LF2GE4BC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x2e),
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX3UF2GE4BC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xae),
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
};
static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = {
--
2.25.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH] mtd: spinand: macronix: Add support for serial NAND flash
2023-06-08 5:21 Jaime Liao
@ 2023-06-09 15:24 ` Miquel Raynal
0 siblings, 0 replies; 11+ messages in thread
From: Miquel Raynal @ 2023-06-09 15:24 UTC (permalink / raw)
To: Jaime Liao, miquel.raynal, richard, linux-mtd
Cc: alvinzhou, juliensu, liangyanyu13
On Thu, 2023-06-08 at 05:21:14 UTC, Jaime Liao wrote:
> From: JaimeLiao <jaimeliao.tw@gmail.com>
>
> MX31LF2GE4BC and MX31UF2GE4BC are Macroninx SPI NAND flash
> with 8-bit on-die ECC.
>
> Validated via normal(default) and QUAD mode by read ,read back,
> on Xilinx Zynq PicoZed FPGA which include Macronix
> SPI Host(drivers/spi/spi-mxic.c)
>
> Signed-off-by: JaimeLiao <jaimeliao.tw@gmail.com>
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next, thanks.
Miquel
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH] mtd: spinand: macronix: Add support for serial NAND flash
@ 2021-05-20 1:45 jaimeliao
2021-05-26 9:03 ` Miquel Raynal
0 siblings, 1 reply; 11+ messages in thread
From: jaimeliao @ 2021-05-20 1:45 UTC (permalink / raw)
To: linux-mtd; +Cc: miquel.raynal, zhengxunli, ycllin, Jaime Liao
From: Jaime Liao <jaimeliao@mxic.com.tw>
Macronix NAND Flash devices are available in different configurations
and densities.
MX"35" means SPI NAND
MX35"LF"/"UF" , LF means 3V and UF meands 1.8V
MX35LF"2G" , 2G means 2Gbits
MX35LF2G"E4"/"24"/"14",
E4 means internal ECC and Quad I/O(x4)
24 means 8-bit ecc requirement and Quad I/O(x4)
14 means 4-bit ecc requirement and Quad I/O(x4)
MX35LF2G14AC is 3V 2Gbit serial NAND flash device
(without on-die ECC)
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7926/MX35LF2G14AC,%203V,%202Gb,%20v1.1.pdf
MX35UF4G24AD is 1.8V 4Gbit serial NAND flash device
(without on-die ECC)
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7980/MX35UF4G24AD,%201.8V,%204Gb,%20v0.00.pdf
MX35UF4GE4AD/MX35UF2GE4AD are 1.8V 4G/2Gbit serial
NAND flash device with 8-bit on-die ECC
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7983/MX35UF4GE4AD,%201.8V,%204Gb,%20v0.00.pdf
MX35UF2GE4AC/MX35UF1GE4AC are 1.8V 2G/1Gbit serial
NAND flash device with 8-bit on-die ECC
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7974/MX35UF2GE4AC,%201.8V,%202Gb,%20v1.0.pdf
MX35UF2G14AC/MX35UF1G14AC are 1.8V 2G/1Gbit serial
NAND flash device (without on-die ECC)
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7931/MX35UF2G14AC,%201.8V,%202Gb,%20v1.1.pdf
Validated via normal(default) and QUAD mode by read, erase, read back,
on Xilinx Zynq PicoZed FPGA board which included Macronix
SPI Host(drivers/spi/spi-mxic.c).
Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
---
drivers/mtd/nand/spi/macronix.c | 112 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 112 insertions(+)
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index 6701aaa..a989035 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -186,6 +186,118 @@ static int mx35lf1ge4ab_ecc_get_status(struct spinand_device *spinand,
0 /*SPINAND_HAS_QE_BIT*/,
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
mx35lf1ge4ab_ecc_get_status)),
+
+ SPINAND_INFO("MX35LF2G14AC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x20),
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF4G24AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb5),
+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 2, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF4GE4AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb7),
+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF2G14AC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa0),
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF2G24AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa4),
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF2GE4AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa6),
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF2GE4AC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa2),
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF1G14AC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x90),
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF1G24AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x94),
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF1GE4AD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x96),
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+ SPINAND_INFO("MX35UF1GE4AC",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x92),
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
+
};
static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = {
--
1.9.1
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^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH] mtd: spinand: macronix: Add support for serial NAND flash
2021-05-20 1:45 jaimeliao
@ 2021-05-26 9:03 ` Miquel Raynal
0 siblings, 0 replies; 11+ messages in thread
From: Miquel Raynal @ 2021-05-26 9:03 UTC (permalink / raw)
To: jaimeliao, linux-mtd; +Cc: Miquel Raynal, zhengxunli, ycllin
On Thu, 2021-05-20 at 01:45:08 UTC, jaimeliao@mxic.com.tw wrote:
> From: Jaime Liao <jaimeliao@mxic.com.tw>
>
> Macronix NAND Flash devices are available in different configurations
> and densities.
>
> MX"35" means SPI NAND
> MX35"LF"/"UF" , LF means 3V and UF meands 1.8V
> MX35LF"2G" , 2G means 2Gbits
> MX35LF2G"E4"/"24"/"14",
> E4 means internal ECC and Quad I/O(x4)
> 24 means 8-bit ecc requirement and Quad I/O(x4)
> 14 means 4-bit ecc requirement and Quad I/O(x4)
>
> MX35LF2G14AC is 3V 2Gbit serial NAND flash device
> (without on-die ECC)
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/7926/MX35LF2G14AC,%203V,%202Gb,%20v1.1.pdf
>
> MX35UF4G24AD is 1.8V 4Gbit serial NAND flash device
> (without on-die ECC)
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/7980/MX35UF4G24AD,%201.8V,%204Gb,%20v0.00.pdf
>
> MX35UF4GE4AD/MX35UF2GE4AD are 1.8V 4G/2Gbit serial
> NAND flash device with 8-bit on-die ECC
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/7983/MX35UF4GE4AD,%201.8V,%204Gb,%20v0.00.pdf
>
> MX35UF2GE4AC/MX35UF1GE4AC are 1.8V 2G/1Gbit serial
> NAND flash device with 8-bit on-die ECC
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/7974/MX35UF2GE4AC,%201.8V,%202Gb,%20v1.0.pdf
>
> MX35UF2G14AC/MX35UF1G14AC are 1.8V 2G/1Gbit serial
> NAND flash device (without on-die ECC)
> https://www.mxic.com.tw/Lists/Datasheet/Attachments/7931/MX35UF2G14AC,%201.8V,%202Gb,%20v1.1.pdf
>
> Validated via normal(default) and QUAD mode by read, erase, read back,
> on Xilinx Zynq PicoZed FPGA board which included Macronix
> SPI Host(drivers/spi/spi-mxic.c).
>
> Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next, thanks.
Miquel
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^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2023-06-12 10:27 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-05-27 8:51 [PATCH] mtd: spinand: macronix: Add support for serial NAND flash Jaime Liao
2021-05-27 8:58 ` Miquel Raynal
2021-05-31 2:16 ` zhengxunli
2021-06-07 6:13 ` Miquel Raynal
2021-06-07 7:11 ` 回信: " jaimeliao
-- strict thread matches above, loose matches on Subject: below --
2023-06-08 5:43 Jaime Liao
2023-06-12 10:05 ` Greg KH
2023-06-08 5:21 Jaime Liao
2023-06-09 15:24 ` Miquel Raynal
2021-05-20 1:45 jaimeliao
2021-05-26 9:03 ` Miquel Raynal
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