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From: trix@redhat.com
To: mdf@kernel.org, robh+dt@kernel.org, hao.wu@intel.com,
	corbet@lwn.net, fbarrat@linux.ibm.com, ajd@linux.ibm.com,
	bbrezillon@kernel.org, arno@natisbad.org, schalla@marvell.com,
	herbert@gondor.apana.org.au, davem@davemloft.net,
	gregkh@linuxfoundation.org, Sven.Auhagen@voleatech.de,
	grandmaster@al2klimov.de
Cc: linux-fpga@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-crypto@vger.kernel.org,
	linux-staging@lists.linux.dev, Tom Rix <trix@redhat.com>
Subject: [PATCH 03/11] Documentation: ocxl.rst: change FPGA indirect article to an
Date: Tue,  8 Jun 2021 14:23:42 -0700	[thread overview]
Message-ID: <20210608212350.3029742-5-trix@redhat.com> (raw)
In-Reply-To: <20210608212350.3029742-1-trix@redhat.com>

From: Tom Rix <trix@redhat.com>

Change use of 'a fpga' to 'an fpga'

Signed-off-by: Tom Rix <trix@redhat.com>
---
 Documentation/userspace-api/accelerators/ocxl.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/userspace-api/accelerators/ocxl.rst b/Documentation/userspace-api/accelerators/ocxl.rst
index 14cefc020e2d5..db7570d5e50d1 100644
--- a/Documentation/userspace-api/accelerators/ocxl.rst
+++ b/Documentation/userspace-api/accelerators/ocxl.rst
@@ -6,7 +6,7 @@ OpenCAPI is an interface between processors and accelerators. It aims
 at being low-latency and high-bandwidth. The specification is
 developed by the `OpenCAPI Consortium <http://opencapi.org/>`_.
 
-It allows an accelerator (which could be a FPGA, ASICs, ...) to access
+It allows an accelerator (which could be an FPGA, ASICs, ...) to access
 the host memory coherently, using virtual addresses. An OpenCAPI
 device can also host its own memory, that can be accessed from the
 host.
-- 
2.26.3


WARNING: multiple messages have this Message-ID (diff)
From: trix@redhat.com
To: mdf@kernel.org, robh+dt@kernel.org, hao.wu@intel.com,
	corbet@lwn.net, fbarrat@linux.ibm.com, ajd@linux.ibm.com,
	bbrezillon@kernel.org, arno@natisbad.org, schalla@marvell.com,
	herbert@gondor.apana.org.au, davem@davemloft.net,
	gregkh@linuxfoundation.org, Sven.Auhagen@voleatech.de,
	grandmaster@al2klimov.de
Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	Tom Rix <trix@redhat.com>,
	linux-fpga@vger.kernel.org, linux-staging@lists.linux.dev,
	linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org
Subject: [PATCH 03/11] Documentation: ocxl.rst: change FPGA indirect article to an
Date: Tue,  8 Jun 2021 14:23:42 -0700	[thread overview]
Message-ID: <20210608212350.3029742-5-trix@redhat.com> (raw)
In-Reply-To: <20210608212350.3029742-1-trix@redhat.com>

From: Tom Rix <trix@redhat.com>

Change use of 'a fpga' to 'an fpga'

Signed-off-by: Tom Rix <trix@redhat.com>
---
 Documentation/userspace-api/accelerators/ocxl.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/userspace-api/accelerators/ocxl.rst b/Documentation/userspace-api/accelerators/ocxl.rst
index 14cefc020e2d5..db7570d5e50d1 100644
--- a/Documentation/userspace-api/accelerators/ocxl.rst
+++ b/Documentation/userspace-api/accelerators/ocxl.rst
@@ -6,7 +6,7 @@ OpenCAPI is an interface between processors and accelerators. It aims
 at being low-latency and high-bandwidth. The specification is
 developed by the `OpenCAPI Consortium <http://opencapi.org/>`_.
 
-It allows an accelerator (which could be a FPGA, ASICs, ...) to access
+It allows an accelerator (which could be an FPGA, ASICs, ...) to access
 the host memory coherently, using virtual addresses. An OpenCAPI
 device can also host its own memory, that can be accessed from the
 host.
-- 
2.26.3


  parent reply	other threads:[~2021-06-08 21:24 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-08 21:23 [PATCH 00/11] fpga: change FPGA indirect article to an trix
2021-06-08 21:23 ` trix
2021-06-08 21:23 ` trix
2021-06-08 21:23   ` trix
2021-06-08 21:23 ` [PATCH 01/11] dt-bindings: fpga: fpga-region: " trix
2021-06-08 21:23   ` trix
2021-06-08 21:23 ` [PATCH 02/11] Documentation: fpga: dfl: " trix
2021-06-08 21:23   ` trix
2021-06-08 21:23 ` trix [this message]
2021-06-08 21:23   ` [PATCH 03/11] Documentation: ocxl.rst: " trix
2021-06-09  3:10   ` Andrew Donnellan
2021-06-09  3:10     ` Andrew Donnellan
2021-06-08 21:23 ` [PATCH 04/11] crypto: marvell: cesa: " trix
2021-06-08 21:23   ` trix
2021-06-17  8:00   ` Herbert Xu
2021-06-17  8:00     ` Herbert Xu
2021-06-08 21:23 ` [PATCH 05/11] fpga: " trix
2021-06-08 21:23   ` trix
2021-06-08 21:23 ` [PATCH 06/11] fpga: bridge: " trix
2021-06-08 21:23   ` trix
2021-06-08 21:23 ` [PATCH 07/11] fpga-mgr: " trix
2021-06-08 21:23   ` trix
2021-06-08 21:23 ` [PATCH 08/11] fpga: region: " trix
2021-06-08 21:23   ` trix
2021-06-08 21:23 ` [PATCH 09/11] fpga: of-fpga-region: " trix
2021-06-08 21:23   ` trix
2021-06-08 21:23 ` [PATCH 10/11] fpga: stratix10-soc: " trix
2021-06-08 21:23   ` trix
2021-06-08 21:23 ` [PATCH 11/11] staging: fpgaboot: " trix
2021-06-08 21:23   ` trix

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