* [igt-dev] Add support for testing of 16 bpc fixed point framebuffers. II. @ 2021-06-11 4:21 Mario Kleiner 2021-06-11 4:21 ` [igt-dev] [PATCH i-g-t 1/2] drm-uapi: Re-synchronize drm_fourcc.h with kernel Mario Kleiner ` (4 more replies) 0 siblings, 5 replies; 14+ messages in thread From: Mario Kleiner @ 2021-06-11 4:21 UTC (permalink / raw) To: igt-dev; +Cc: mario.kleiner.de Now with the R-b by Ville added to patch 2/2, and drm_fourcc.h synchronized from the current drm-next branch's drm_fourcc.h, to provide the new 16 bpc fixed point fourcc's. Thanks, -mario _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 14+ messages in thread
* [igt-dev] [PATCH i-g-t 1/2] drm-uapi: Re-synchronize drm_fourcc.h with kernel. 2021-06-11 4:21 [igt-dev] Add support for testing of 16 bpc fixed point framebuffers. II Mario Kleiner @ 2021-06-11 4:21 ` Mario Kleiner 2021-06-11 5:54 ` Petri Latvala 2021-06-11 4:21 ` [igt-dev] [PATCH i-g-t 2/2] lib/igt_fb: Add support for testing of 16 bpc fixed point formats Mario Kleiner ` (3 subsequent siblings) 4 siblings, 1 reply; 14+ messages in thread From: Mario Kleiner @ 2021-06-11 4:21 UTC (permalink / raw) To: igt-dev; +Cc: Alex Deucher, mario.kleiner.de This aligns IGT's drm_fourcc.h to the latest kernel commit ff92ecf575a9 ("drm/fourcc: Add 16 bpc fixed point framebuffer formats.") in drm-next for upcoming Linux 5.14. Needed for lib/igt_fb support for testing of 16 bpc fixed point formats. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Alex Deucher <alexander.deucher@amd.com> --- include/drm-uapi/drm_fourcc.h | 72 +++++++++++++++++++++++++++++++++-- 1 file changed, 68 insertions(+), 4 deletions(-) diff --git a/include/drm-uapi/drm_fourcc.h b/include/drm-uapi/drm_fourcc.h index a7bc058c..f7156322 100644 --- a/include/drm-uapi/drm_fourcc.h +++ b/include/drm-uapi/drm_fourcc.h @@ -58,6 +58,30 @@ extern "C" { * may preserve meaning - such as number of planes - from the fourcc code, * whereas others may not. * + * Modifiers must uniquely encode buffer layout. In other words, a buffer must + * match only a single modifier. A modifier must not be a subset of layouts of + * another modifier. For instance, it's incorrect to encode pitch alignment in + * a modifier: a buffer may match a 64-pixel aligned modifier and a 32-pixel + * aligned modifier. That said, modifiers can have implicit minimal + * requirements. + * + * For modifiers where the combination of fourcc code and modifier can alias, + * a canonical pair needs to be defined and used by all drivers. Preferred + * combinations are also encouraged where all combinations might lead to + * confusion and unnecessarily reduced interoperability. An example for the + * latter is AFBC, where the ABGR layouts are preferred over ARGB layouts. + * + * There are two kinds of modifier users: + * + * - Kernel and user-space drivers: for drivers it's important that modifiers + * don't alias, otherwise two drivers might support the same format but use + * different aliases, preventing them from sharing buffers in an efficient + * format. + * - Higher-level programs interfacing with KMS/GBM/EGL/Vulkan/etc: these users + * see modifiers as opaque tokens they can check for equality and intersect. + * These users musn't need to know to reason about the modifier value + * (i.e. they are not expected to extract information out of the modifier). + * * Vendors should document their modifier usage in as much detail as * possible, to ensure maximum compatibility across devices, drivers and * applications. @@ -144,6 +168,13 @@ extern "C" { #define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little endian */ #define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little endian */ +/* 64 bpp RGB */ +#define DRM_FORMAT_XRGB16161616 fourcc_code('X', 'R', '4', '8') /* [63:0] x:R:G:B 16:16:16:16 little endian */ +#define DRM_FORMAT_XBGR16161616 fourcc_code('X', 'B', '4', '8') /* [63:0] x:B:G:R 16:16:16:16 little endian */ + +#define DRM_FORMAT_ARGB16161616 fourcc_code('A', 'R', '4', '8') /* [63:0] A:R:G:B 16:16:16:16 little endian */ +#define DRM_FORMAT_ABGR16161616 fourcc_code('A', 'B', '4', '8') /* [63:0] A:B:G:R 16:16:16:16 little endian */ + /* * Floating point 64bpp RGB * IEEE 754-2008 binary16 half-precision float @@ -155,6 +186,12 @@ extern "C" { #define DRM_FORMAT_ARGB16161616F fourcc_code('A', 'R', '4', 'H') /* [63:0] A:R:G:B 16:16:16:16 little endian */ #define DRM_FORMAT_ABGR16161616F fourcc_code('A', 'B', '4', 'H') /* [63:0] A:B:G:R 16:16:16:16 little endian */ +/* + * RGBA format with 10-bit components packed in 64-bit per pixel, with 6 bits + * of unused padding per component: + */ +#define DRM_FORMAT_AXBXGXRX106106106106 fourcc_code('A', 'B', '1', '0') /* [63:0] A:x:B:x:G:x:R:x 10:6:10:6:10:6:10:6 little endian */ + /* packed YCbCr */ #define DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */ #define DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */ @@ -320,7 +357,6 @@ extern "C" { */ /* Vendor Ids: */ -#define DRM_FORMAT_MOD_NONE 0 #define DRM_FORMAT_MOD_VENDOR_NONE 0 #define DRM_FORMAT_MOD_VENDOR_INTEL 0x01 #define DRM_FORMAT_MOD_VENDOR_AMD 0x02 @@ -392,6 +428,16 @@ extern "C" { */ #define DRM_FORMAT_MOD_LINEAR fourcc_mod_code(NONE, 0) +/* + * Deprecated: use DRM_FORMAT_MOD_LINEAR instead + * + * The "none" format modifier doesn't actually mean that the modifier is + * implicit, instead it means that the layout is linear. Whether modifiers are + * used is out-of-band information carried in an API-specific way (e.g. in a + * flag for drm_mode_fb_cmd2). + */ +#define DRM_FORMAT_MOD_NONE 0 + /* Intel framebuffer modifiers */ /* @@ -488,6 +534,25 @@ extern "C" { */ #define I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS fourcc_mod_code(INTEL, 7) +/* + * Intel Color Control Surface with Clear Color (CCS) for Gen-12 render + * compression. + * + * The main surface is Y-tiled and is at plane index 0 whereas CCS is linear + * and at index 1. The clear color is stored at index 2, and the pitch should + * be ignored. The clear color structure is 256 bits. The first 128 bits + * represents Raw Clear Color Red, Green, Blue and Alpha color each represented + * by 32 bits. The raw clear color is consumed by the 3d engine and generates + * the converted clear color of size 64 bits. The first 32 bits store the Lower + * Converted Clear Color value and the next 32 bits store the Higher Converted + * Clear Color value when applicable. The Converted Clear Color values are + * consumed by the DE. The last 64 bits are used to store Color Discard Enable + * and Depth Clear Value Valid which are ignored by the DE. A CCS cache line + * corresponds to an area of 4x1 tiles in the main surface. The main surface + * pitch is required to be a multiple of 4 tile widths. + */ +#define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC fourcc_mod_code(INTEL, 8) + /* * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks * @@ -997,9 +1062,9 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) * Not all combinations are valid, and different SoCs may support different * combinations of layout and options. */ -#define __fourcc_mod_amlogic_layout_mask 0xf +#define __fourcc_mod_amlogic_layout_mask 0xff #define __fourcc_mod_amlogic_options_shift 8 -#define __fourcc_mod_amlogic_options_mask 0xf +#define __fourcc_mod_amlogic_options_mask 0xff #define DRM_FORMAT_MOD_AMLOGIC_FBC(__layout, __options) \ fourcc_mod_code(AMLOGIC, \ @@ -1195,4 +1260,3 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) #endif #endif /* DRM_FOURCC_H */ - -- 2.25.1 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/2] drm-uapi: Re-synchronize drm_fourcc.h with kernel. 2021-06-11 4:21 ` [igt-dev] [PATCH i-g-t 1/2] drm-uapi: Re-synchronize drm_fourcc.h with kernel Mario Kleiner @ 2021-06-11 5:54 ` Petri Latvala 0 siblings, 0 replies; 14+ messages in thread From: Petri Latvala @ 2021-06-11 5:54 UTC (permalink / raw) To: Mario Kleiner; +Cc: igt-dev, Alex Deucher On Fri, Jun 11, 2021 at 06:21:22AM +0200, Mario Kleiner wrote: > This aligns IGT's drm_fourcc.h to the latest kernel commit ff92ecf575a9 > ("drm/fourcc: Add 16 bpc fixed point framebuffer formats.") > in drm-next for upcoming Linux 5.14. > > Needed for lib/igt_fb support for testing of 16 bpc fixed point formats. > > Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Alex Deucher <alexander.deucher@amd.com> Acked-by: Petri Latvala <petri.latvala@intel.com> > --- > include/drm-uapi/drm_fourcc.h | 72 +++++++++++++++++++++++++++++++++-- > 1 file changed, 68 insertions(+), 4 deletions(-) > > diff --git a/include/drm-uapi/drm_fourcc.h b/include/drm-uapi/drm_fourcc.h > index a7bc058c..f7156322 100644 > --- a/include/drm-uapi/drm_fourcc.h > +++ b/include/drm-uapi/drm_fourcc.h > @@ -58,6 +58,30 @@ extern "C" { > * may preserve meaning - such as number of planes - from the fourcc code, > * whereas others may not. > * > + * Modifiers must uniquely encode buffer layout. In other words, a buffer must > + * match only a single modifier. A modifier must not be a subset of layouts of > + * another modifier. For instance, it's incorrect to encode pitch alignment in > + * a modifier: a buffer may match a 64-pixel aligned modifier and a 32-pixel > + * aligned modifier. That said, modifiers can have implicit minimal > + * requirements. > + * > + * For modifiers where the combination of fourcc code and modifier can alias, > + * a canonical pair needs to be defined and used by all drivers. Preferred > + * combinations are also encouraged where all combinations might lead to > + * confusion and unnecessarily reduced interoperability. An example for the > + * latter is AFBC, where the ABGR layouts are preferred over ARGB layouts. > + * > + * There are two kinds of modifier users: > + * > + * - Kernel and user-space drivers: for drivers it's important that modifiers > + * don't alias, otherwise two drivers might support the same format but use > + * different aliases, preventing them from sharing buffers in an efficient > + * format. > + * - Higher-level programs interfacing with KMS/GBM/EGL/Vulkan/etc: these users > + * see modifiers as opaque tokens they can check for equality and intersect. > + * These users musn't need to know to reason about the modifier value > + * (i.e. they are not expected to extract information out of the modifier). > + * > * Vendors should document their modifier usage in as much detail as > * possible, to ensure maximum compatibility across devices, drivers and > * applications. > @@ -144,6 +168,13 @@ extern "C" { > #define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little endian */ > #define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little endian */ > > +/* 64 bpp RGB */ > +#define DRM_FORMAT_XRGB16161616 fourcc_code('X', 'R', '4', '8') /* [63:0] x:R:G:B 16:16:16:16 little endian */ > +#define DRM_FORMAT_XBGR16161616 fourcc_code('X', 'B', '4', '8') /* [63:0] x:B:G:R 16:16:16:16 little endian */ > + > +#define DRM_FORMAT_ARGB16161616 fourcc_code('A', 'R', '4', '8') /* [63:0] A:R:G:B 16:16:16:16 little endian */ > +#define DRM_FORMAT_ABGR16161616 fourcc_code('A', 'B', '4', '8') /* [63:0] A:B:G:R 16:16:16:16 little endian */ > + > /* > * Floating point 64bpp RGB > * IEEE 754-2008 binary16 half-precision float > @@ -155,6 +186,12 @@ extern "C" { > #define DRM_FORMAT_ARGB16161616F fourcc_code('A', 'R', '4', 'H') /* [63:0] A:R:G:B 16:16:16:16 little endian */ > #define DRM_FORMAT_ABGR16161616F fourcc_code('A', 'B', '4', 'H') /* [63:0] A:B:G:R 16:16:16:16 little endian */ > > +/* > + * RGBA format with 10-bit components packed in 64-bit per pixel, with 6 bits > + * of unused padding per component: > + */ > +#define DRM_FORMAT_AXBXGXRX106106106106 fourcc_code('A', 'B', '1', '0') /* [63:0] A:x:B:x:G:x:R:x 10:6:10:6:10:6:10:6 little endian */ > + > /* packed YCbCr */ > #define DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */ > #define DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */ > @@ -320,7 +357,6 @@ extern "C" { > */ > > /* Vendor Ids: */ > -#define DRM_FORMAT_MOD_NONE 0 > #define DRM_FORMAT_MOD_VENDOR_NONE 0 > #define DRM_FORMAT_MOD_VENDOR_INTEL 0x01 > #define DRM_FORMAT_MOD_VENDOR_AMD 0x02 > @@ -392,6 +428,16 @@ extern "C" { > */ > #define DRM_FORMAT_MOD_LINEAR fourcc_mod_code(NONE, 0) > > +/* > + * Deprecated: use DRM_FORMAT_MOD_LINEAR instead > + * > + * The "none" format modifier doesn't actually mean that the modifier is > + * implicit, instead it means that the layout is linear. Whether modifiers are > + * used is out-of-band information carried in an API-specific way (e.g. in a > + * flag for drm_mode_fb_cmd2). > + */ > +#define DRM_FORMAT_MOD_NONE 0 > + > /* Intel framebuffer modifiers */ > > /* > @@ -488,6 +534,25 @@ extern "C" { > */ > #define I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS fourcc_mod_code(INTEL, 7) > > +/* > + * Intel Color Control Surface with Clear Color (CCS) for Gen-12 render > + * compression. > + * > + * The main surface is Y-tiled and is at plane index 0 whereas CCS is linear > + * and at index 1. The clear color is stored at index 2, and the pitch should > + * be ignored. The clear color structure is 256 bits. The first 128 bits > + * represents Raw Clear Color Red, Green, Blue and Alpha color each represented > + * by 32 bits. The raw clear color is consumed by the 3d engine and generates > + * the converted clear color of size 64 bits. The first 32 bits store the Lower > + * Converted Clear Color value and the next 32 bits store the Higher Converted > + * Clear Color value when applicable. The Converted Clear Color values are > + * consumed by the DE. The last 64 bits are used to store Color Discard Enable > + * and Depth Clear Value Valid which are ignored by the DE. A CCS cache line > + * corresponds to an area of 4x1 tiles in the main surface. The main surface > + * pitch is required to be a multiple of 4 tile widths. > + */ > +#define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC fourcc_mod_code(INTEL, 8) > + > /* > * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks > * > @@ -997,9 +1062,9 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > * Not all combinations are valid, and different SoCs may support different > * combinations of layout and options. > */ > -#define __fourcc_mod_amlogic_layout_mask 0xf > +#define __fourcc_mod_amlogic_layout_mask 0xff > #define __fourcc_mod_amlogic_options_shift 8 > -#define __fourcc_mod_amlogic_options_mask 0xf > +#define __fourcc_mod_amlogic_options_mask 0xff > > #define DRM_FORMAT_MOD_AMLOGIC_FBC(__layout, __options) \ > fourcc_mod_code(AMLOGIC, \ > @@ -1195,4 +1260,3 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > #endif > > #endif /* DRM_FOURCC_H */ > - > -- > 2.25.1 > > _______________________________________________ > igt-dev mailing list > igt-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/igt-dev _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 14+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] lib/igt_fb: Add support for testing of 16 bpc fixed point formats. 2021-06-11 4:21 [igt-dev] Add support for testing of 16 bpc fixed point framebuffers. II Mario Kleiner 2021-06-11 4:21 ` [igt-dev] [PATCH i-g-t 1/2] drm-uapi: Re-synchronize drm_fourcc.h with kernel Mario Kleiner @ 2021-06-11 4:21 ` Mario Kleiner 2021-06-11 5:45 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/2] drm-uapi: Re-synchronize drm_fourcc.h with kernel Patchwork ` (2 subsequent siblings) 4 siblings, 0 replies; 14+ messages in thread From: Mario Kleiner @ 2021-06-11 4:21 UTC (permalink / raw) To: igt-dev; +Cc: Alex Deucher, mario.kleiner.de This is used to support testing the 16 bpc formats, e.g., via: kms_plane --run-subtest pixel-format-pipe-A-planes So far this was successfully tested on AMD RavenRidge with DCN-1 display hw. Ville also tested it against some of his patches for 16 bpc support on i915. The new conversion routines are slightly adapted copies of the convert_float_to_fp16() and convert_fp16_to_float() functions, with the conversion math modified for float <-> uint16 instead. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Alex Deucher <alexander.deucher@amd.com> --- lib/igt_fb.c | 123 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 123 insertions(+) diff --git a/lib/igt_fb.c b/lib/igt_fb.c index ab52ea9f..6c5241eb 100644 --- a/lib/igt_fb.c +++ b/lib/igt_fb.c @@ -220,6 +220,22 @@ static const struct format_desc_struct { .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, .num_planes = 1, .plane_bpp = { 64, }, }, + { .name = "XRGB16161616", .depth = -1, .drm_id = DRM_FORMAT_XRGB16161616, + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, + .num_planes = 1, .plane_bpp = { 64, }, + }, + { .name = "ARGB16161616", .depth = -1, .drm_id = DRM_FORMAT_ARGB16161616, + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, + .num_planes = 1, .plane_bpp = { 64, }, + }, + { .name = "XBGR16161616", .depth = -1, .drm_id = DRM_FORMAT_XBGR16161616, + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, + .num_planes = 1, .plane_bpp = { 64, }, + }, + { .name = "ABGR16161616", .depth = -1, .drm_id = DRM_FORMAT_ABGR16161616, + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, + .num_planes = 1, .plane_bpp = { 64, }, + }, { .name = "NV12", .depth = -1, .drm_id = DRM_FORMAT_NV12, .cairo_id = CAIRO_FORMAT_RGB24, .convert = true, .num_planes = 2, .plane_bpp = { 8, 16, }, @@ -3391,9 +3407,13 @@ static const unsigned char *rgbx_swizzle(uint32_t format) default: case DRM_FORMAT_XRGB16161616F: case DRM_FORMAT_ARGB16161616F: + case DRM_FORMAT_XRGB16161616: + case DRM_FORMAT_ARGB16161616: return swizzle_bgrx; case DRM_FORMAT_XBGR16161616F: case DRM_FORMAT_ABGR16161616F: + case DRM_FORMAT_XBGR16161616: + case DRM_FORMAT_ABGR16161616: return swizzle_rgbx; } } @@ -3477,6 +3497,97 @@ static void convert_float_to_fp16(struct fb_convert *cvt) } } +static void float_to_uint16(const float *f, uint16_t *h, unsigned int num) +{ + for (int i = 0; i < num; i++) + h[i] = f[i] * 65535.0f + 0.5f; +} + +static void uint16_to_float(const uint16_t *h, float *f, unsigned int num) +{ + for (int i = 0; i < num; i++) + f[i] = ((float) h[i]) / 65535.0f; +} + +static void convert_uint16_to_float(struct fb_convert *cvt) +{ + int i, j; + uint16_t *up16; + float *ptr = cvt->dst.ptr; + unsigned int float_stride = cvt->dst.fb->strides[0] / sizeof(*ptr); + unsigned int up16_stride = cvt->src.fb->strides[0] / sizeof(*up16); + const unsigned char *swz = rgbx_swizzle(cvt->src.fb->drm_format); + bool needs_reswizzle = swz != swizzle_rgbx; + + uint16_t *buf = convert_src_get(cvt); + up16 = buf + cvt->src.fb->offsets[0] / sizeof(*buf); + + for (i = 0; i < cvt->dst.fb->height; i++) { + if (needs_reswizzle) { + const uint16_t *u16_tmp = up16; + float *rgb_tmp = ptr; + + for (j = 0; j < cvt->dst.fb->width; j++) { + struct igt_vec4 rgb; + + uint16_to_float(u16_tmp, rgb.d, 4); + + rgb_tmp[0] = rgb.d[swz[0]]; + rgb_tmp[1] = rgb.d[swz[1]]; + rgb_tmp[2] = rgb.d[swz[2]]; + rgb_tmp[3] = rgb.d[swz[3]]; + + rgb_tmp += 4; + u16_tmp += 4; + } + } else { + uint16_to_float(up16, ptr, cvt->dst.fb->width * 4); + } + + ptr += float_stride; + up16 += up16_stride; + } + + convert_src_put(cvt, buf); +} + +static void convert_float_to_uint16(struct fb_convert *cvt) +{ + int i, j; + uint16_t *up16 = cvt->dst.ptr + cvt->dst.fb->offsets[0]; + const float *ptr = cvt->src.ptr; + unsigned float_stride = cvt->src.fb->strides[0] / sizeof(*ptr); + unsigned up16_stride = cvt->dst.fb->strides[0] / sizeof(*up16); + const unsigned char *swz = rgbx_swizzle(cvt->dst.fb->drm_format); + bool needs_reswizzle = swz != swizzle_rgbx; + + for (i = 0; i < cvt->dst.fb->height; i++) { + if (needs_reswizzle) { + const float *rgb_tmp = ptr; + uint16_t *u16_tmp = up16; + + for (j = 0; j < cvt->dst.fb->width; j++) { + struct igt_vec4 rgb; + + rgb.d[0] = rgb_tmp[swz[0]]; + rgb.d[1] = rgb_tmp[swz[1]]; + rgb.d[2] = rgb_tmp[swz[2]]; + rgb.d[3] = rgb_tmp[swz[3]]; + + float_to_uint16(rgb.d, u16_tmp, 4); + + rgb_tmp += 4; + u16_tmp += 4; + } + } else { + float_to_uint16(ptr, up16, cvt->dst.fb->width * 4); + } + + ptr += float_stride; + up16 += up16_stride; + } +} + static void convert_pixman(struct fb_convert *cvt) { pixman_format_code_t src_pixman = drm_format_to_pixman(cvt->src.fb->drm_format); @@ -3586,6 +3697,12 @@ static void fb_convert(struct fb_convert *cvt) case DRM_FORMAT_ABGR16161616F: convert_fp16_to_float(cvt); return; + case DRM_FORMAT_XRGB16161616: + case DRM_FORMAT_XBGR16161616: + case DRM_FORMAT_ARGB16161616: + case DRM_FORMAT_ABGR16161616: + convert_uint16_to_float(cvt); + return; } } else if (cvt->src.fb->drm_format == IGT_FORMAT_FLOAT) { switch (cvt->dst.fb->drm_format) { @@ -3615,6 +3732,12 @@ static void fb_convert(struct fb_convert *cvt) case DRM_FORMAT_ABGR16161616F: convert_float_to_fp16(cvt); return; + case DRM_FORMAT_XRGB16161616: + case DRM_FORMAT_XBGR16161616: + case DRM_FORMAT_ARGB16161616: + case DRM_FORMAT_ABGR16161616: + convert_float_to_uint16(cvt); + return; } } -- 2.25.1 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/2] drm-uapi: Re-synchronize drm_fourcc.h with kernel. 2021-06-11 4:21 [igt-dev] Add support for testing of 16 bpc fixed point framebuffers. II Mario Kleiner 2021-06-11 4:21 ` [igt-dev] [PATCH i-g-t 1/2] drm-uapi: Re-synchronize drm_fourcc.h with kernel Mario Kleiner 2021-06-11 4:21 ` [igt-dev] [PATCH i-g-t 2/2] lib/igt_fb: Add support for testing of 16 bpc fixed point formats Mario Kleiner @ 2021-06-11 5:45 ` Patchwork 2021-06-11 8:31 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork 2021-07-01 16:13 ` [igt-dev] Add support for testing of 16 bpc fixed point framebuffers. II Mario Kleiner 4 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2021-06-11 5:45 UTC (permalink / raw) To: Mario Kleiner; +Cc: igt-dev [-- Attachment #1.1: Type: text/plain, Size: 5943 bytes --] == Series Details == Series: series starting with [i-g-t,1/2] drm-uapi: Re-synchronize drm_fourcc.h with kernel. URL : https://patchwork.freedesktop.org/series/91369/ State : success == Summary == CI Bug Log - changes from CI_DRM_10209 -> IGTPW_5909 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/index.html Known issues ------------ Here are the changes found in IGTPW_5909 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@core_hotunplug@unbind-rebind: - fi-bdw-5557u: NOTRUN -> [WARN][1] ([i915#2283]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/fi-bdw-5557u/igt@core_hotunplug@unbind-rebind.html * igt@i915_selftest@live@execlists: - fi-bdw-5557u: NOTRUN -> [DMESG-FAIL][2] ([i915#3462]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/fi-bdw-5557u/igt@i915_selftest@live@execlists.html * igt@kms_psr@cursor_plane_move: - fi-bdw-5557u: NOTRUN -> [SKIP][3] ([fdo#109271]) +5 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/fi-bdw-5557u/igt@kms_psr@cursor_plane_move.html #### Possible fixes #### * igt@i915_selftest@live@gt_heartbeat: - {fi-tgl-1115g4}: [DMESG-FAIL][4] ([i915#541]) -> [PASS][5] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/fi-tgl-1115g4/igt@i915_selftest@live@gt_heartbeat.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/fi-tgl-1115g4/igt@i915_selftest@live@gt_heartbeat.html #### Warnings #### * igt@runner@aborted: - fi-cfl-8700k: [FAIL][6] ([i915#3363]) -> [FAIL][7] ([i915#2426] / [i915#3363]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/fi-cfl-8700k/igt@runner@aborted.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/fi-cfl-8700k/igt@runner@aborted.html - fi-skl-6600u: [FAIL][8] ([i915#1436] / [i915#3363]) -> [FAIL][9] ([i915#1436] / [i915#2426] / [i915#3363]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/fi-skl-6600u/igt@runner@aborted.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/fi-skl-6600u/igt@runner@aborted.html - fi-kbl-r: [FAIL][10] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][11] ([i915#1436] / [i915#3363]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/fi-kbl-r/igt@runner@aborted.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/fi-kbl-r/igt@runner@aborted.html - fi-bdw-5557u: [FAIL][12] ([i915#1602] / [i915#2029]) -> [FAIL][13] ([i915#3462]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/fi-bdw-5557u/igt@runner@aborted.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/fi-bdw-5557u/igt@runner@aborted.html - fi-kbl-soraka: [FAIL][14] ([i915#1436] / [i915#3363]) -> [FAIL][15] ([i915#1436] / [i915#2426] / [i915#3363]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/fi-kbl-soraka/igt@runner@aborted.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/fi-kbl-soraka/igt@runner@aborted.html - fi-cml-u2: [FAIL][16] ([i915#3363] / [i915#3462]) -> [FAIL][17] ([i915#2082] / [i915#2426] / [i915#3363] / [i915#3462]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/fi-cml-u2/igt@runner@aborted.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/fi-cml-u2/igt@runner@aborted.html - fi-cml-s: [FAIL][18] ([i915#3363] / [i915#3462]) -> [FAIL][19] ([i915#2082] / [i915#2426] / [i915#3363] / [i915#3462]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/fi-cml-s/igt@runner@aborted.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/fi-cml-s/igt@runner@aborted.html - fi-kbl-7567u: [FAIL][20] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][21] ([i915#1436] / [i915#3363]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/fi-kbl-7567u/igt@runner@aborted.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/fi-kbl-7567u/igt@runner@aborted.html - fi-skl-guc: [FAIL][22] ([i915#1436] / [i915#2426] / [i915#3363]) -> [FAIL][23] ([i915#1436] / [i915#3363]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/fi-skl-guc/igt@runner@aborted.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/fi-skl-guc/igt@runner@aborted.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436 [i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602 [i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029 [i915#2082]: https://gitlab.freedesktop.org/drm/intel/issues/2082 [i915#2283]: https://gitlab.freedesktop.org/drm/intel/issues/2283 [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426 [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363 [i915#3462]: https://gitlab.freedesktop.org/drm/intel/issues/3462 [i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541 Participating hosts (44 -> 39) ------------------------------ Missing (5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-dg1-1 fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_6104 -> IGTPW_5909 CI-20190529: 20190529 CI_DRM_10209: a86fe137c0ea2e44c75b4b6c3f447af677508679 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_5909: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/index.html IGT_6104: f8f81bd3752f3126a47d9dbba2d0ab29f7c17a19 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/index.html [-- Attachment #1.2: Type: text/html, Size: 9169 bytes --] [-- Attachment #2: Type: text/plain, Size: 154 bytes --] _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 14+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/2] drm-uapi: Re-synchronize drm_fourcc.h with kernel. 2021-06-11 4:21 [igt-dev] Add support for testing of 16 bpc fixed point framebuffers. II Mario Kleiner ` (2 preceding siblings ...) 2021-06-11 5:45 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/2] drm-uapi: Re-synchronize drm_fourcc.h with kernel Patchwork @ 2021-06-11 8:31 ` Patchwork 2021-07-01 16:13 ` [igt-dev] Add support for testing of 16 bpc fixed point framebuffers. II Mario Kleiner 4 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2021-06-11 8:31 UTC (permalink / raw) To: Mario Kleiner; +Cc: igt-dev [-- Attachment #1.1: Type: text/plain, Size: 30301 bytes --] == Series Details == Series: series starting with [i-g-t,1/2] drm-uapi: Re-synchronize drm_fourcc.h with kernel. URL : https://patchwork.freedesktop.org/series/91369/ State : success == Summary == CI Bug Log - changes from CI_DRM_10209_full -> IGTPW_5909_full ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/index.html Known issues ------------ Here are the changes found in IGTPW_5909_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_persistence@engines-queued: - shard-snb: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#1099]) +2 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-snb6/igt@gem_ctx_persistence@engines-queued.html * igt@gem_eio@unwedge-stress: - shard-tglb: [PASS][2] -> [TIMEOUT][3] ([i915#2369] / [i915#3063]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-tglb7/igt@gem_eio@unwedge-stress.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb5/igt@gem_eio@unwedge-stress.html - shard-snb: NOTRUN -> [FAIL][4] ([i915#3354]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-snb2/igt@gem_eio@unwedge-stress.html * igt@gem_exec_fair@basic-none-rrul@rcs0: - shard-glk: [PASS][5] -> [FAIL][6] ([i915#2842]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-glk5/igt@gem_exec_fair@basic-none-rrul@rcs0.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-glk6/igt@gem_exec_fair@basic-none-rrul@rcs0.html * igt@gem_exec_fair@basic-none@vcs1: - shard-kbl: [PASS][7] -> [FAIL][8] ([i915#2842]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-kbl2/igt@gem_exec_fair@basic-none@vcs1.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl3/igt@gem_exec_fair@basic-none@vcs1.html * igt@gem_exec_reloc@basic-wide-active@rcs0: - shard-kbl: NOTRUN -> [FAIL][9] ([i915#2389]) +4 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl7/igt@gem_exec_reloc@basic-wide-active@rcs0.html * igt@gem_mmap_gtt@big-copy-xy: - shard-glk: [PASS][10] -> [FAIL][11] ([i915#307]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-glk7/igt@gem_mmap_gtt@big-copy-xy.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-glk2/igt@gem_mmap_gtt@big-copy-xy.html * igt@gem_pread@exhaustion: - shard-apl: NOTRUN -> [WARN][12] ([i915#2658]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-apl7/igt@gem_pread@exhaustion.html * igt@gem_pwrite@basic-exhaustion: - shard-kbl: NOTRUN -> [WARN][13] ([i915#2658]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl6/igt@gem_pwrite@basic-exhaustion.html * igt@gem_userptr_blits@dmabuf-sync: - shard-apl: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#3323]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-apl7/igt@gem_userptr_blits@dmabuf-sync.html * igt@gen9_exec_parse@batch-invalid-length: - shard-snb: NOTRUN -> [SKIP][15] ([fdo#109271]) +345 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-snb2/igt@gen9_exec_parse@batch-invalid-length.html * igt@gen9_exec_parse@cmd-crossing-page: - shard-tglb: NOTRUN -> [SKIP][16] ([fdo#112306]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb1/igt@gen9_exec_parse@cmd-crossing-page.html - shard-iclb: NOTRUN -> [SKIP][17] ([fdo#112306]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb7/igt@gen9_exec_parse@cmd-crossing-page.html * igt@i915_pm_dc@dc6-psr: - shard-iclb: [PASS][18] -> [FAIL][19] ([i915#454]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-iclb8/igt@i915_pm_dc@dc6-psr.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb6/igt@i915_pm_dc@dc6-psr.html * igt@i915_pm_rpm@pm-caching: - shard-iclb: [PASS][20] -> [SKIP][21] ([i915#579]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-iclb1/igt@i915_pm_rpm@pm-caching.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb8/igt@i915_pm_rpm@pm-caching.html * igt@kms_big_joiner@basic: - shard-tglb: NOTRUN -> [SKIP][22] ([i915#2705]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb3/igt@kms_big_joiner@basic.html - shard-iclb: NOTRUN -> [SKIP][23] ([i915#2705]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb8/igt@kms_big_joiner@basic.html * igt@kms_chamelium@common-hpd-after-suspend: - shard-glk: NOTRUN -> [SKIP][24] ([fdo#109271] / [fdo#111827]) +3 similar issues [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-glk3/igt@kms_chamelium@common-hpd-after-suspend.html * igt@kms_chamelium@hdmi-mode-timings: - shard-snb: NOTRUN -> [SKIP][25] ([fdo#109271] / [fdo#111827]) +25 similar issues [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-snb2/igt@kms_chamelium@hdmi-mode-timings.html * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red: - shard-iclb: NOTRUN -> [SKIP][26] ([fdo#109284] / [fdo#111827]) +2 similar issues [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb3/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html * igt@kms_color_chamelium@pipe-c-ctm-0-25: - shard-apl: NOTRUN -> [SKIP][27] ([fdo#109271] / [fdo#111827]) +16 similar issues [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-apl1/igt@kms_color_chamelium@pipe-c-ctm-0-25.html * igt@kms_color_chamelium@pipe-d-ctm-max: - shard-tglb: NOTRUN -> [SKIP][28] ([fdo#109284] / [fdo#111827]) +3 similar issues [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb6/igt@kms_color_chamelium@pipe-d-ctm-max.html - shard-kbl: NOTRUN -> [SKIP][29] ([fdo#109271] / [fdo#111827]) +8 similar issues [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl6/igt@kms_color_chamelium@pipe-d-ctm-max.html - shard-iclb: NOTRUN -> [SKIP][30] ([fdo#109278] / [fdo#109284] / [fdo#111827]) [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb6/igt@kms_color_chamelium@pipe-d-ctm-max.html * igt@kms_content_protection@dp-mst-lic-type-0: - shard-iclb: NOTRUN -> [SKIP][31] ([i915#3116]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb7/igt@kms_content_protection@dp-mst-lic-type-0.html - shard-tglb: NOTRUN -> [SKIP][32] ([i915#3116]) [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb1/igt@kms_content_protection@dp-mst-lic-type-0.html * igt@kms_content_protection@legacy: - shard-iclb: NOTRUN -> [SKIP][33] ([fdo#109300] / [fdo#111066]) +1 similar issue [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb3/igt@kms_content_protection@legacy.html - shard-kbl: NOTRUN -> [TIMEOUT][34] ([i915#1319]) +2 similar issues [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl3/igt@kms_content_protection@legacy.html * igt@kms_content_protection@lic: - shard-apl: NOTRUN -> [TIMEOUT][35] ([i915#1319]) +1 similar issue [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-apl8/igt@kms_content_protection@lic.html * igt@kms_content_protection@srm: - shard-tglb: NOTRUN -> [SKIP][36] ([fdo#111828]) +1 similar issue [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb6/igt@kms_content_protection@srm.html * igt@kms_cursor_crc@pipe-b-cursor-32x10-random: - shard-tglb: NOTRUN -> [SKIP][37] ([i915#3359]) +2 similar issues [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb1/igt@kms_cursor_crc@pipe-b-cursor-32x10-random.html * igt@kms_cursor_crc@pipe-c-cursor-32x32-rapid-movement: - shard-tglb: NOTRUN -> [SKIP][38] ([i915#3319]) [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb1/igt@kms_cursor_crc@pipe-c-cursor-32x32-rapid-movement.html * igt@kms_cursor_crc@pipe-d-cursor-32x10-offscreen: - shard-iclb: NOTRUN -> [SKIP][39] ([fdo#109278]) +7 similar issues [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb6/igt@kms_cursor_crc@pipe-d-cursor-32x10-offscreen.html * igt@kms_cursor_crc@pipe-d-cursor-512x512-onscreen: - shard-tglb: NOTRUN -> [SKIP][40] ([fdo#109279] / [i915#3359]) [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb3/igt@kms_cursor_crc@pipe-d-cursor-512x512-onscreen.html * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size: - shard-iclb: NOTRUN -> [SKIP][41] ([fdo#109274] / [fdo#109278]) +1 similar issue [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb8/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html * igt@kms_flip@2x-modeset-vs-vblank-race-interruptible: - shard-iclb: NOTRUN -> [SKIP][42] ([fdo#109274]) +2 similar issues [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb2/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1: - shard-apl: [PASS][43] -> [DMESG-WARN][44] ([i915#180]) +1 similar issue [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile: - shard-apl: NOTRUN -> [SKIP][45] ([fdo#109271] / [i915#2642]) +1 similar issue [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-apl1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt: - shard-kbl: NOTRUN -> [SKIP][46] ([fdo#109271]) +131 similar issues [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-shrfb-fliptrack-mmap-gtt: - shard-iclb: NOTRUN -> [SKIP][47] ([fdo#109280]) +4 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-2p-shrfb-fliptrack-mmap-gtt.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-gtt: - shard-tglb: NOTRUN -> [SKIP][48] ([fdo#111825]) +9 similar issues [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render: - shard-glk: NOTRUN -> [SKIP][49] ([fdo#109271]) +22 similar issues [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-glk3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render.html * igt@kms_hdr@bpc-switch-suspend: - shard-kbl: [PASS][50] -> [DMESG-WARN][51] ([i915#180]) +2 similar issues [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-kbl3/igt@kms_hdr@bpc-switch-suspend.html [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl1/igt@kms_hdr@bpc-switch-suspend.html * igt@kms_hdr@static-toggle-suspend: - shard-tglb: NOTRUN -> [SKIP][52] ([i915#1187]) [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb5/igt@kms_hdr@static-toggle-suspend.html - shard-iclb: NOTRUN -> [SKIP][53] ([i915#1187]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb8/igt@kms_hdr@static-toggle-suspend.html * igt@kms_pipe_crc_basic@hang-read-crc-pipe-d: - shard-kbl: NOTRUN -> [SKIP][54] ([fdo#109271] / [i915#533]) [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl3/igt@kms_pipe_crc_basic@hang-read-crc-pipe-d.html * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc: - shard-apl: NOTRUN -> [FAIL][55] ([fdo#108145] / [i915#265]) +1 similar issue [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html * igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb: - shard-glk: NOTRUN -> [FAIL][56] ([i915#265]) [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-glk3/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html - shard-apl: NOTRUN -> [FAIL][57] ([i915#265]) [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-apl7/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html - shard-kbl: NOTRUN -> [FAIL][58] ([i915#265]) +1 similar issue [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl2/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html * igt@kms_plane_multiple@atomic-pipe-b-tiling-yf: - shard-tglb: NOTRUN -> [SKIP][59] ([fdo#111615]) +1 similar issue [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb2/igt@kms_plane_multiple@atomic-pipe-b-tiling-yf.html * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3: - shard-kbl: NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#658]) +2 similar issues [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl1/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html - shard-apl: NOTRUN -> [SKIP][61] ([fdo#109271] / [i915#658]) +2 similar issues [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-apl1/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html * igt@kms_psr@psr2_cursor_plane_move: - shard-iclb: [PASS][62] -> [SKIP][63] ([fdo#109441]) +1 similar issue [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb7/igt@kms_psr@psr2_cursor_plane_move.html * igt@kms_setmode@basic: - shard-snb: NOTRUN -> [FAIL][64] ([i915#31]) [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-snb5/igt@kms_setmode@basic.html * igt@nouveau_crc@pipe-a-source-rg: - shard-iclb: NOTRUN -> [SKIP][65] ([i915#2530]) +1 similar issue [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb6/igt@nouveau_crc@pipe-a-source-rg.html - shard-tglb: NOTRUN -> [SKIP][66] ([i915#2530]) +1 similar issue [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb6/igt@nouveau_crc@pipe-a-source-rg.html * igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame: - shard-apl: NOTRUN -> [SKIP][67] ([fdo#109271]) +201 similar issues [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-apl8/igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame.html * igt@prime_vgem@fence-flip-hang: - shard-iclb: NOTRUN -> [SKIP][68] ([fdo#109295]) [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb6/igt@prime_vgem@fence-flip-hang.html - shard-tglb: NOTRUN -> [SKIP][69] ([fdo#109295]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb6/igt@prime_vgem@fence-flip-hang.html * igt@sysfs_clients@sema-10: - shard-kbl: NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#2994]) +1 similar issue [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl2/igt@sysfs_clients@sema-10.html * igt@sysfs_clients@sema-50: - shard-apl: NOTRUN -> [SKIP][71] ([fdo#109271] / [i915#2994]) +1 similar issue [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-apl7/igt@sysfs_clients@sema-50.html #### Possible fixes #### * igt@gem_eio@in-flight-suspend: - shard-snb: [DMESG-WARN][72] -> [PASS][73] [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-snb2/igt@gem_eio@in-flight-suspend.html [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-snb5/igt@gem_eio@in-flight-suspend.html * igt@gem_exec_fair@basic-deadline: - shard-kbl: [FAIL][74] ([i915#2846]) -> [PASS][75] [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-kbl4/igt@gem_exec_fair@basic-deadline.html [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl2/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-iclb: [FAIL][76] ([i915#2842]) -> [PASS][77] [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-iclb1/igt@gem_exec_fair@basic-none-share@rcs0.html [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb3/igt@gem_exec_fair@basic-none-share@rcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-tglb: [FAIL][78] ([i915#2842]) -> [PASS][79] [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-tglb7/igt@gem_exec_fair@basic-pace-share@rcs0.html [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb3/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-glk: [FAIL][80] ([i915#2842]) -> [PASS][81] +1 similar issue [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-glk1/igt@gem_exec_fair@basic-throttle@rcs0.html [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-glk2/igt@gem_exec_fair@basic-throttle@rcs0.html * igt@kms_cursor_crc@pipe-b-cursor-suspend: - shard-apl: [DMESG-WARN][82] ([i915#180]) -> [PASS][83] [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-apl7/igt@kms_cursor_crc@pipe-b-cursor-suspend.html [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-apl3/igt@kms_cursor_crc@pipe-b-cursor-suspend.html * igt@kms_cursor_legacy@flip-vs-cursor-toggle: - shard-glk: [DMESG-FAIL][84] ([i915#118] / [i915#95]) -> [PASS][85] [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-glk8/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html * igt@kms_draw_crc@draw-method-rgb565-mmap-wc-untiled: - shard-glk: [FAIL][86] -> [PASS][87] +1 similar issue [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-glk2/igt@kms_draw_crc@draw-method-rgb565-mmap-wc-untiled.html [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-glk2/igt@kms_draw_crc@draw-method-rgb565-mmap-wc-untiled.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2: - shard-glk: [FAIL][88] ([i915#79]) -> [PASS][89] [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html * igt@kms_flip@flip-vs-suspend@c-dp1: - shard-kbl: [DMESG-WARN][90] ([i915#180]) -> [PASS][91] +6 similar issues [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-kbl6/igt@kms_flip@flip-vs-suspend@c-dp1.html [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl7/igt@kms_flip@flip-vs-suspend@c-dp1.html * igt@kms_psr2_su@page_flip: - shard-iclb: [SKIP][92] ([fdo#109642] / [fdo#111068] / [i915#658]) -> [PASS][93] [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-iclb5/igt@kms_psr2_su@page_flip.html [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb2/igt@kms_psr2_su@page_flip.html * igt@kms_psr@psr2_primary_mmap_cpu: - shard-iclb: [SKIP][94] ([fdo#109441]) -> [PASS][95] +1 similar issue [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-iclb1/igt@kms_psr@psr2_primary_mmap_cpu.html [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html * igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend: - shard-kbl: [INCOMPLETE][96] ([i915#155]) -> [PASS][97] [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-kbl3/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl6/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html #### Warnings #### * igt@i915_pm_dc@dc3co-vpb-simulation: - shard-iclb: [SKIP][98] ([i915#658]) -> [SKIP][99] ([i915#588]) [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-iclb7/igt@i915_pm_dc@dc3co-vpb-simulation.html [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html * igt@i915_pm_rc6_residency@rc6-fence: - shard-iclb: [WARN][100] ([i915#2684]) -> [WARN][101] ([i915#1804] / [i915#2684]) [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-iclb8/igt@i915_pm_rc6_residency@rc6-fence.html [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb3/igt@i915_pm_rc6_residency@rc6-fence.html * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2: - shard-iclb: [SKIP][102] ([i915#658]) -> [SKIP][103] ([i915#2920]) +2 similar issues [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-iclb1/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2.html [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1: - shard-iclb: [SKIP][104] ([i915#2920]) -> [SKIP][105] ([i915#658]) +1 similar issue [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb3/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html * igt@runner@aborted: - shard-kbl: ([FAIL][106], [FAIL][107], [FAIL][108], [FAIL][109], [FAIL][110], [FAIL][111], [FAIL][112], [FAIL][113]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#2505] / [i915#3002] / [i915#3363]) -> ([FAIL][114], [FAIL][115], [FAIL][116], [FAIL][117], [FAIL][118]) ([i915#1814] / [i915#2292] / [i915#3002] / [i915#3363] / [i915#602]) [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-kbl1/igt@runner@aborted.html [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-kbl1/igt@runner@aborted.html [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-kbl2/igt@runner@aborted.html [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-kbl1/igt@runner@aborted.html [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-kbl2/igt@runner@aborted.html [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-kbl2/igt@runner@aborted.html [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-kbl6/igt@runner@aborted.html [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-kbl4/igt@runner@aborted.html [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl1/igt@runner@aborted.html [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl1/igt@runner@aborted.html [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl3/igt@runner@aborted.html [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl2/igt@runner@aborted.html [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-kbl1/igt@runner@aborted.html - shard-iclb: ([FAIL][119], [FAIL][120], [FAIL][121]) ([i915#2782] / [i915#3002]) -> ([FAIL][122], [FAIL][123]) ([i915#3002]) [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-iclb1/igt@runner@aborted.html [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-iclb1/igt@runner@aborted.html [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-iclb4/igt@runner@aborted.html [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb2/igt@runner@aborted.html [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-iclb8/igt@runner@aborted.html - shard-apl: ([FAIL][124], [FAIL][125], [FAIL][126]) ([i915#1814] / [i915#3002] / [i915#3363]) -> ([FAIL][127], [FAIL][128]) ([i915#180] / [i915#3002] / [i915#3363]) [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-apl7/igt@runner@aborted.html [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-apl8/igt@runner@aborted.html [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-apl3/igt@runner@aborted.html [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-apl2/igt@runner@aborted.html [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-apl6/igt@runner@aborted.html - shard-tglb: ([FAIL][129], [FAIL][130], [FAIL][131]) ([i915#1436] / [i915#2966] / [i915#3002]) -> ([FAIL][132], [FAIL][133]) ([i915#3002]) [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-tglb1/igt@runner@aborted.html [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-tglb7/igt@runner@aborted.html [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10209/shard-tglb2/igt@runner@aborted.html [132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb7/igt@runner@aborted.html [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/shard-tglb3/igt@runner@aborted.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279 [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280 [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284 [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295 [fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#111066]: https://bugs.freedesktop.org/show_bug.cgi?id=111066 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [fdo#111828]: https://bugs.freedesktop.org/show_bug.cgi?id=111828 [fdo#112306]: https://bugs.freedesktop.org/show_bug.cgi?id=112306 [i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099 [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118 [i915#1187]: https://gitlab.freedesktop.org/drm/intel/issues/1187 [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319 [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436 [i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#1804]: https://gitlab.freedesktop.org/drm/intel/issues/1804 [i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814 [i915#2292]: https://gitlab.freedesktop.org/drm/intel/issues/2292 [i915#2369]: https://gitlab.freedesktop.org/drm/intel/issues/2369 [i915#2389]: https://gitlab.freedesktop.org/drm/intel/issues/2389 [i915#2505]: https://gitlab.freedesktop.org/drm/intel/issues/2505 [i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530 [i915#2642]: https://gitlab.freedesktop.org/drm/intel/issues/2642 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658 [i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684 [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705 [i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782 [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842 [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846 [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920 [i915#2966]: https://gitlab.freedesktop.org/drm/intel/issues/2966 [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994 [i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002 [i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063 [i915#307]: https://gitlab.freedesktop.org/drm/intel/issues/307 [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31 [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116 [i915#3319]: https://gitlab.freedesktop.org/drm/intel/issues/3319 [i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323 [i915#3354]: https://gitlab.freedesktop.org/drm/intel/issues/3354 [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359 [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363 [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454 [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533 [i915#579]: https://gitlab.freedesktop.org/drm/intel/issues/579 [i915#588]: https://gitlab.freedesktop.org/drm/intel/issues/588 [i915#602]: https://gitlab.freedesktop.org/drm/intel/issues/602 [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts ( == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5909/index.html [-- Attachment #1.2: Type: text/html, Size: 37823 bytes --] [-- Attachment #2: Type: text/plain, Size: 154 bytes --] _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] Add support for testing of 16 bpc fixed point framebuffers. II. 2021-06-11 4:21 [igt-dev] Add support for testing of 16 bpc fixed point framebuffers. II Mario Kleiner ` (3 preceding siblings ...) 2021-06-11 8:31 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork @ 2021-07-01 16:13 ` Mario Kleiner 2021-08-06 15:51 ` Mario Kleiner 4 siblings, 1 reply; 14+ messages in thread From: Mario Kleiner @ 2021-07-01 16:13 UTC (permalink / raw) To: igt-dev Ping. Can somebody merge this series please? Thanks, -mario On Fri, Jun 11, 2021 at 6:21 AM Mario Kleiner <mario.kleiner.de@gmail.com> wrote: > > Now with the R-b by Ville added to patch 2/2, and drm_fourcc.h > synchronized from the current drm-next branch's drm_fourcc.h, > to provide the new 16 bpc fixed point fourcc's. > > Thanks, > -mario > > _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] Add support for testing of 16 bpc fixed point framebuffers. II. 2021-07-01 16:13 ` [igt-dev] Add support for testing of 16 bpc fixed point framebuffers. II Mario Kleiner @ 2021-08-06 15:51 ` Mario Kleiner 2021-08-09 5:01 ` Petri Latvala 0 siblings, 1 reply; 14+ messages in thread From: Mario Kleiner @ 2021-08-06 15:51 UTC (permalink / raw) To: igt-dev; +Cc: Ville Syrjälä Another month has passed, another ping. The series... https://patchwork.freedesktop.org/series/91369/ ...has reviews and acks and passed the tests and should be ready to go. Could somebody exercise their commit rights please? It's a wonderfully satisfying way to spend a little time on a friday afternoon :) thanks, -mario On Thu, Jul 1, 2021 at 6:13 PM Mario Kleiner <mario.kleiner.de@gmail.com> wrote: > > Ping. Can somebody merge this series please? > > Thanks, > -mario > > On Fri, Jun 11, 2021 at 6:21 AM Mario Kleiner > <mario.kleiner.de@gmail.com> wrote: > > > > Now with the R-b by Ville added to patch 2/2, and drm_fourcc.h > > synchronized from the current drm-next branch's drm_fourcc.h, > > to provide the new 16 bpc fixed point fourcc's. > > > > Thanks, > > -mario > > > > ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] Add support for testing of 16 bpc fixed point framebuffers. II. 2021-08-06 15:51 ` Mario Kleiner @ 2021-08-09 5:01 ` Petri Latvala 0 siblings, 0 replies; 14+ messages in thread From: Petri Latvala @ 2021-08-09 5:01 UTC (permalink / raw) To: Mario Kleiner; +Cc: igt-dev, Ville Syrjälä On Fri, Aug 06, 2021 at 05:51:26PM +0200, Mario Kleiner wrote: > Another month has passed, another ping. The series... > > https://patchwork.freedesktop.org/series/91369/ > > ...has reviews and acks and passed the tests and should be ready to > go. Could somebody exercise their commit rights > please? It's a wonderfully satisfying way to spend a little time on a > friday afternoon :) Or on a monday morning! Merged now, sorry for the delay. -- Petri Latvala ^ permalink raw reply [flat|nested] 14+ messages in thread
* [igt-dev] Add support for testing of 16 bpc fixed point framebuffers. @ 2021-05-03 18:25 Mario Kleiner 2021-05-03 18:25 ` [igt-dev] [PATCH i-g-t 2/2] lib/igt_fb: Add support for testing of 16 bpc fixed point formats Mario Kleiner 0 siblings, 1 reply; 14+ messages in thread From: Mario Kleiner @ 2021-05-03 18:25 UTC (permalink / raw) To: igt-dev; +Cc: mario.kleiner.de This has been so far tested on AMD RaveRidge with DCN-1 display engine. It requires a Cairo 1.17.2 snapshot or later - tested with the current 1.17.4 snapshot. What was tested? kms_plane --run-subtest pixel-format-pipe-A-planes on current drm-next, with my 16 bpc framebuffer format patches for AMD DC applied. Thanks to Ville for pointers on what to change. Note that on my machine igt master needed additional hacks to make the kms_plane test sort of work at all on AMD, even without these new test case. Seems at least igt kms_plane is not quite up to date for current amdgpu-kms in recent kernels. E.g., it didn't get very far on Linux 5.8, but failed even faster on Linux 5.12 with the new DCC and DCC_RETILE modifiers exposed. Atm. only FMT_MOD_LINEAR seems to work on recent kernels. But this is a different topic... -mario _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 14+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] lib/igt_fb: Add support for testing of 16 bpc fixed point formats. 2021-05-03 18:25 [igt-dev] Add support for testing of 16 bpc fixed point framebuffers Mario Kleiner @ 2021-05-03 18:25 ` Mario Kleiner 2021-05-03 18:47 ` Ville Syrjälä 0 siblings, 1 reply; 14+ messages in thread From: Mario Kleiner @ 2021-05-03 18:25 UTC (permalink / raw) To: igt-dev; +Cc: Alex Deucher, mario.kleiner.de This is used to support testing the 16 bpc formats, e.g., via: kms_plane --run-subtest pixel-format-pipe-A-planes So far this was successfully tested on AMD RavenRidge with DCN-1 display hw. The new conversion routines are slightly adapted copies of the convert_float_to_fp16() and convert_fp16_to_float() functions, with the conversion math modified for float <-> uint16 instead. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Alex Deucher <alexander.deucher@amd.com> --- lib/igt_fb.c | 123 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 123 insertions(+) diff --git a/lib/igt_fb.c b/lib/igt_fb.c index 954e1181..148e6c0f 100644 --- a/lib/igt_fb.c +++ b/lib/igt_fb.c @@ -220,6 +220,22 @@ static const struct format_desc_struct { .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, .num_planes = 1, .plane_bpp = { 64, }, }, + { .name = "XRGB16161616", .depth = -1, .drm_id = DRM_FORMAT_XRGB16161616, + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, + .num_planes = 1, .plane_bpp = { 64, }, + }, + { .name = "ARGB16161616", .depth = -1, .drm_id = DRM_FORMAT_ARGB16161616, + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, + .num_planes = 1, .plane_bpp = { 64, }, + }, + { .name = "XBGR16161616", .depth = -1, .drm_id = DRM_FORMAT_XBGR16161616, + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, + .num_planes = 1, .plane_bpp = { 64, }, + }, + { .name = "ABGR16161616", .depth = -1, .drm_id = DRM_FORMAT_ABGR16161616, + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, + .num_planes = 1, .plane_bpp = { 64, }, + }, { .name = "NV12", .depth = -1, .drm_id = DRM_FORMAT_NV12, .cairo_id = CAIRO_FORMAT_RGB24, .convert = true, .num_planes = 2, .plane_bpp = { 8, 16, }, @@ -3365,9 +3381,13 @@ static const unsigned char *rgbx_swizzle(uint32_t format) default: case DRM_FORMAT_XRGB16161616F: case DRM_FORMAT_ARGB16161616F: + case DRM_FORMAT_XRGB16161616: + case DRM_FORMAT_ARGB16161616: return swizzle_bgrx; case DRM_FORMAT_XBGR16161616F: case DRM_FORMAT_ABGR16161616F: + case DRM_FORMAT_XBGR16161616: + case DRM_FORMAT_ABGR16161616: return swizzle_rgbx; } } @@ -3451,6 +3471,97 @@ static void convert_float_to_fp16(struct fb_convert *cvt) } } +static void float_to_uint16(const float *f, uint16_t *h, unsigned int num) +{ + for (int i = 0; i < num; i++) + h[i] = f[i] * 65535.0f + 0.5f; +} + +static void uint16_to_float(const uint16_t *h, float *f, unsigned int num) +{ + for (int i = 0; i < num; i++) + f[i] = ((float) h[i]) / 65535.0f; +} + +static void convert_uint16_to_float(struct fb_convert *cvt) +{ + int i, j; + uint16_t *up16; + float *ptr = cvt->dst.ptr; + unsigned int float_stride = cvt->dst.fb->strides[0] / sizeof(*ptr); + unsigned int up16_stride = cvt->src.fb->strides[0] / sizeof(*up16); + const unsigned char *swz = rgbx_swizzle(cvt->src.fb->drm_format); + bool needs_reswizzle = swz != swizzle_rgbx; + + uint16_t *buf = convert_src_get(cvt); + up16 = buf + cvt->src.fb->offsets[0] / sizeof(*buf); + + for (i = 0; i < cvt->dst.fb->height; i++) { + if (needs_reswizzle) { + const uint16_t *u16_tmp = up16; + float *rgb_tmp = ptr; + + for (j = 0; j < cvt->dst.fb->width; j++) { + struct igt_vec4 rgb; + + uint16_to_float(u16_tmp, rgb.d, 4); + + rgb_tmp[0] = rgb.d[swz[0]]; + rgb_tmp[1] = rgb.d[swz[1]]; + rgb_tmp[2] = rgb.d[swz[2]]; + rgb_tmp[3] = rgb.d[swz[3]]; + + rgb_tmp += 4; + u16_tmp += 4; + } + } else { + uint16_to_float(up16, ptr, cvt->dst.fb->width * 4); + } + + ptr += float_stride; + up16 += up16_stride; + } + + convert_src_put(cvt, buf); +} + +static void convert_float_to_uint16(struct fb_convert *cvt) +{ + int i, j; + uint16_t *up16 = cvt->dst.ptr + cvt->dst.fb->offsets[0]; + const float *ptr = cvt->src.ptr; + unsigned float_stride = cvt->src.fb->strides[0] / sizeof(*ptr); + unsigned up16_stride = cvt->dst.fb->strides[0] / sizeof(*up16); + const unsigned char *swz = rgbx_swizzle(cvt->dst.fb->drm_format); + bool needs_reswizzle = swz != swizzle_rgbx; + + for (i = 0; i < cvt->dst.fb->height; i++) { + if (needs_reswizzle) { + const float *rgb_tmp = ptr; + uint16_t *u16_tmp = up16; + + for (j = 0; j < cvt->dst.fb->width; j++) { + struct igt_vec4 rgb; + + rgb.d[0] = rgb_tmp[swz[0]]; + rgb.d[1] = rgb_tmp[swz[1]]; + rgb.d[2] = rgb_tmp[swz[2]]; + rgb.d[3] = rgb_tmp[swz[3]]; + + float_to_uint16(rgb.d, u16_tmp, 4); + + rgb_tmp += 4; + u16_tmp += 4; + } + } else { + float_to_uint16(ptr, up16, cvt->dst.fb->width * 4); + } + + ptr += float_stride; + up16 += up16_stride; + } +} + static void convert_pixman(struct fb_convert *cvt) { pixman_format_code_t src_pixman = drm_format_to_pixman(cvt->src.fb->drm_format); @@ -3560,6 +3671,12 @@ static void fb_convert(struct fb_convert *cvt) case DRM_FORMAT_ABGR16161616F: convert_fp16_to_float(cvt); return; + case DRM_FORMAT_XRGB16161616: + case DRM_FORMAT_XBGR16161616: + case DRM_FORMAT_ARGB16161616: + case DRM_FORMAT_ABGR16161616: + convert_uint16_to_float(cvt); + return; } } else if (cvt->src.fb->drm_format == IGT_FORMAT_FLOAT) { switch (cvt->dst.fb->drm_format) { @@ -3589,6 +3706,12 @@ static void fb_convert(struct fb_convert *cvt) case DRM_FORMAT_ABGR16161616F: convert_float_to_fp16(cvt); return; + case DRM_FORMAT_XRGB16161616: + case DRM_FORMAT_XBGR16161616: + case DRM_FORMAT_ARGB16161616: + case DRM_FORMAT_ABGR16161616: + convert_float_to_uint16(cvt); + return; } } -- 2.25.1 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] lib/igt_fb: Add support for testing of 16 bpc fixed point formats. 2021-05-03 18:25 ` [igt-dev] [PATCH i-g-t 2/2] lib/igt_fb: Add support for testing of 16 bpc fixed point formats Mario Kleiner @ 2021-05-03 18:47 ` Ville Syrjälä 2021-05-03 19:32 ` Mario Kleiner 0 siblings, 1 reply; 14+ messages in thread From: Ville Syrjälä @ 2021-05-03 18:47 UTC (permalink / raw) To: Mario Kleiner; +Cc: igt-dev, Alex Deucher On Mon, May 03, 2021 at 08:25:55PM +0200, Mario Kleiner wrote: > This is used to support testing the 16 bpc formats, e.g., via: > > kms_plane --run-subtest pixel-format-pipe-A-planes > > So far this was successfully tested on AMD RavenRidge with DCN-1 > display hw. > > The new conversion routines are slightly adapted copies of the > convert_float_to_fp16() and convert_fp16_to_float() functions, > with the conversion math modified for float <-> uint16 instead. > > Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Alex Deucher <alexander.deucher@amd.com> > --- > lib/igt_fb.c | 123 +++++++++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 123 insertions(+) > > diff --git a/lib/igt_fb.c b/lib/igt_fb.c > index 954e1181..148e6c0f 100644 > --- a/lib/igt_fb.c > +++ b/lib/igt_fb.c > @@ -220,6 +220,22 @@ static const struct format_desc_struct { > .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > .num_planes = 1, .plane_bpp = { 64, }, > }, > + { .name = "XRGB16161616", .depth = -1, .drm_id = DRM_FORMAT_XRGB16161616, > + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > + .num_planes = 1, .plane_bpp = { 64, }, > + }, > + { .name = "ARGB16161616", .depth = -1, .drm_id = DRM_FORMAT_ARGB16161616, > + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > + .num_planes = 1, .plane_bpp = { 64, }, > + }, > + { .name = "XBGR16161616", .depth = -1, .drm_id = DRM_FORMAT_XBGR16161616, > + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > + .num_planes = 1, .plane_bpp = { 64, }, > + }, > + { .name = "ABGR16161616", .depth = -1, .drm_id = DRM_FORMAT_ABGR16161616, > + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > + .num_planes = 1, .plane_bpp = { 64, }, > + }, > { .name = "NV12", .depth = -1, .drm_id = DRM_FORMAT_NV12, > .cairo_id = CAIRO_FORMAT_RGB24, .convert = true, > .num_planes = 2, .plane_bpp = { 8, 16, }, > @@ -3365,9 +3381,13 @@ static const unsigned char *rgbx_swizzle(uint32_t format) > default: > case DRM_FORMAT_XRGB16161616F: > case DRM_FORMAT_ARGB16161616F: > + case DRM_FORMAT_XRGB16161616: > + case DRM_FORMAT_ARGB16161616: > return swizzle_bgrx; > case DRM_FORMAT_XBGR16161616F: > case DRM_FORMAT_ABGR16161616F: > + case DRM_FORMAT_XBGR16161616: > + case DRM_FORMAT_ABGR16161616: > return swizzle_rgbx; > } > } > @@ -3451,6 +3471,97 @@ static void convert_float_to_fp16(struct fb_convert *cvt) > } > } > > +static void float_to_uint16(const float *f, uint16_t *h, unsigned int num) > +{ > + for (int i = 0; i < num; i++) > + h[i] = f[i] * 65535.0f + 0.5f; > +} > + > +static void uint16_to_float(const uint16_t *h, float *f, unsigned int num) > +{ > + for (int i = 0; i < num; i++) > + f[i] = ((float) h[i]) / 65535.0f; nit: the cast shouldn't be necessary. Looks good otherwise. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > +} > + > +static void convert_uint16_to_float(struct fb_convert *cvt) > +{ > + int i, j; > + uint16_t *up16; > + float *ptr = cvt->dst.ptr; > + unsigned int float_stride = cvt->dst.fb->strides[0] / sizeof(*ptr); > + unsigned int up16_stride = cvt->src.fb->strides[0] / sizeof(*up16); > + const unsigned char *swz = rgbx_swizzle(cvt->src.fb->drm_format); > + bool needs_reswizzle = swz != swizzle_rgbx; > + > + uint16_t *buf = convert_src_get(cvt); > + up16 = buf + cvt->src.fb->offsets[0] / sizeof(*buf); > + > + for (i = 0; i < cvt->dst.fb->height; i++) { > + if (needs_reswizzle) { > + const uint16_t *u16_tmp = up16; > + float *rgb_tmp = ptr; > + > + for (j = 0; j < cvt->dst.fb->width; j++) { > + struct igt_vec4 rgb; > + > + uint16_to_float(u16_tmp, rgb.d, 4); > + > + rgb_tmp[0] = rgb.d[swz[0]]; > + rgb_tmp[1] = rgb.d[swz[1]]; > + rgb_tmp[2] = rgb.d[swz[2]]; > + rgb_tmp[3] = rgb.d[swz[3]]; > + > + rgb_tmp += 4; > + u16_tmp += 4; > + } > + } else { > + uint16_to_float(up16, ptr, cvt->dst.fb->width * 4); > + } > + > + ptr += float_stride; > + up16 += up16_stride; > + } > + > + convert_src_put(cvt, buf); > +} > + > +static void convert_float_to_uint16(struct fb_convert *cvt) > +{ > + int i, j; > + uint16_t *up16 = cvt->dst.ptr + cvt->dst.fb->offsets[0]; > + const float *ptr = cvt->src.ptr; > + unsigned float_stride = cvt->src.fb->strides[0] / sizeof(*ptr); > + unsigned up16_stride = cvt->dst.fb->strides[0] / sizeof(*up16); > + const unsigned char *swz = rgbx_swizzle(cvt->dst.fb->drm_format); > + bool needs_reswizzle = swz != swizzle_rgbx; > + > + for (i = 0; i < cvt->dst.fb->height; i++) { > + if (needs_reswizzle) { > + const float *rgb_tmp = ptr; > + uint16_t *u16_tmp = up16; > + > + for (j = 0; j < cvt->dst.fb->width; j++) { > + struct igt_vec4 rgb; > + > + rgb.d[0] = rgb_tmp[swz[0]]; > + rgb.d[1] = rgb_tmp[swz[1]]; > + rgb.d[2] = rgb_tmp[swz[2]]; > + rgb.d[3] = rgb_tmp[swz[3]]; > + > + float_to_uint16(rgb.d, u16_tmp, 4); > + > + rgb_tmp += 4; > + u16_tmp += 4; > + } > + } else { > + float_to_uint16(ptr, up16, cvt->dst.fb->width * 4); > + } > + > + ptr += float_stride; > + up16 += up16_stride; > + } > +} > + > static void convert_pixman(struct fb_convert *cvt) > { > pixman_format_code_t src_pixman = drm_format_to_pixman(cvt->src.fb->drm_format); > @@ -3560,6 +3671,12 @@ static void fb_convert(struct fb_convert *cvt) > case DRM_FORMAT_ABGR16161616F: > convert_fp16_to_float(cvt); > return; > + case DRM_FORMAT_XRGB16161616: > + case DRM_FORMAT_XBGR16161616: > + case DRM_FORMAT_ARGB16161616: > + case DRM_FORMAT_ABGR16161616: > + convert_uint16_to_float(cvt); > + return; > } > } else if (cvt->src.fb->drm_format == IGT_FORMAT_FLOAT) { > switch (cvt->dst.fb->drm_format) { > @@ -3589,6 +3706,12 @@ static void fb_convert(struct fb_convert *cvt) > case DRM_FORMAT_ABGR16161616F: > convert_float_to_fp16(cvt); > return; > + case DRM_FORMAT_XRGB16161616: > + case DRM_FORMAT_XBGR16161616: > + case DRM_FORMAT_ARGB16161616: > + case DRM_FORMAT_ABGR16161616: > + convert_float_to_uint16(cvt); > + return; > } > } > > -- > 2.25.1 -- Ville Syrjälä Intel _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] lib/igt_fb: Add support for testing of 16 bpc fixed point formats. 2021-05-03 18:47 ` Ville Syrjälä @ 2021-05-03 19:32 ` Mario Kleiner 2021-05-03 19:43 ` Ville Syrjälä 0 siblings, 1 reply; 14+ messages in thread From: Mario Kleiner @ 2021-05-03 19:32 UTC (permalink / raw) To: Ville Syrjälä; +Cc: igt-dev, Alex Deucher On Mon, May 3, 2021 at 8:48 PM Ville Syrjälä <ville.syrjala@linux.intel.com> wrote: > > On Mon, May 03, 2021 at 08:25:55PM +0200, Mario Kleiner wrote: > > This is used to support testing the 16 bpc formats, e.g., via: > > > > kms_plane --run-subtest pixel-format-pipe-A-planes > > > > So far this was successfully tested on AMD RavenRidge with DCN-1 > > display hw. > > > > The new conversion routines are slightly adapted copies of the > > convert_float_to_fp16() and convert_fp16_to_float() functions, > > with the conversion math modified for float <-> uint16 instead. > > > > Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Cc: Alex Deucher <alexander.deucher@amd.com> > > --- > > lib/igt_fb.c | 123 +++++++++++++++++++++++++++++++++++++++++++++++++++ > > 1 file changed, 123 insertions(+) > > > > diff --git a/lib/igt_fb.c b/lib/igt_fb.c > > index 954e1181..148e6c0f 100644 > > --- a/lib/igt_fb.c > > +++ b/lib/igt_fb.c > > @@ -220,6 +220,22 @@ static const struct format_desc_struct { > > .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > > .num_planes = 1, .plane_bpp = { 64, }, > > }, > > + { .name = "XRGB16161616", .depth = -1, .drm_id = DRM_FORMAT_XRGB16161616, > > + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > > + .num_planes = 1, .plane_bpp = { 64, }, > > + }, > > + { .name = "ARGB16161616", .depth = -1, .drm_id = DRM_FORMAT_ARGB16161616, > > + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > > + .num_planes = 1, .plane_bpp = { 64, }, > > + }, > > + { .name = "XBGR16161616", .depth = -1, .drm_id = DRM_FORMAT_XBGR16161616, > > + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > > + .num_planes = 1, .plane_bpp = { 64, }, > > + }, > > + { .name = "ABGR16161616", .depth = -1, .drm_id = DRM_FORMAT_ABGR16161616, > > + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > > + .num_planes = 1, .plane_bpp = { 64, }, > > + }, > > { .name = "NV12", .depth = -1, .drm_id = DRM_FORMAT_NV12, > > .cairo_id = CAIRO_FORMAT_RGB24, .convert = true, > > .num_planes = 2, .plane_bpp = { 8, 16, }, > > @@ -3365,9 +3381,13 @@ static const unsigned char *rgbx_swizzle(uint32_t format) > > default: > > case DRM_FORMAT_XRGB16161616F: > > case DRM_FORMAT_ARGB16161616F: > > + case DRM_FORMAT_XRGB16161616: > > + case DRM_FORMAT_ARGB16161616: > > return swizzle_bgrx; > > case DRM_FORMAT_XBGR16161616F: > > case DRM_FORMAT_ABGR16161616F: > > + case DRM_FORMAT_XBGR16161616: > > + case DRM_FORMAT_ABGR16161616: > > return swizzle_rgbx; > > } > > } > > @@ -3451,6 +3471,97 @@ static void convert_float_to_fp16(struct fb_convert *cvt) > > } > > } > > > > +static void float_to_uint16(const float *f, uint16_t *h, unsigned int num) > > +{ > > + for (int i = 0; i < num; i++) > > + h[i] = f[i] * 65535.0f + 0.5f; > > +} > > + > > +static void uint16_to_float(const uint16_t *h, float *f, unsigned int num) > > +{ > > + for (int i = 0; i < num; i++) > > + f[i] = ((float) h[i]) / 65535.0f; > > nit: the cast shouldn't be necessary. > > Looks good otherwise. > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > Thanks for the quick review. Compiler and test results agree with you :). However, all other uintsomething_to_float() conversion routines, e.g., for the yuv formats and for fp16_to_float() all use that apparently redundant cast, which is why I left it for consistency with the rest of the code. And in case those wiser people who wrote those bits may know something that i don't see? Should I change the patch to drop the cast, and resend? -mario > > +} > > + > > +static void convert_uint16_to_float(struct fb_convert *cvt) > > +{ > > + int i, j; > > + uint16_t *up16; > > + float *ptr = cvt->dst.ptr; > > + unsigned int float_stride = cvt->dst.fb->strides[0] / sizeof(*ptr); > > + unsigned int up16_stride = cvt->src.fb->strides[0] / sizeof(*up16); > > + const unsigned char *swz = rgbx_swizzle(cvt->src.fb->drm_format); > > + bool needs_reswizzle = swz != swizzle_rgbx; > > + > > + uint16_t *buf = convert_src_get(cvt); > > + up16 = buf + cvt->src.fb->offsets[0] / sizeof(*buf); > > + > > + for (i = 0; i < cvt->dst.fb->height; i++) { > > + if (needs_reswizzle) { > > + const uint16_t *u16_tmp = up16; > > + float *rgb_tmp = ptr; > > + > > + for (j = 0; j < cvt->dst.fb->width; j++) { > > + struct igt_vec4 rgb; > > + > > + uint16_to_float(u16_tmp, rgb.d, 4); > > + > > + rgb_tmp[0] = rgb.d[swz[0]]; > > + rgb_tmp[1] = rgb.d[swz[1]]; > > + rgb_tmp[2] = rgb.d[swz[2]]; > > + rgb_tmp[3] = rgb.d[swz[3]]; > > + > > + rgb_tmp += 4; > > + u16_tmp += 4; > > + } > > + } else { > > + uint16_to_float(up16, ptr, cvt->dst.fb->width * 4); > > + } > > + > > + ptr += float_stride; > > + up16 += up16_stride; > > + } > > + > > + convert_src_put(cvt, buf); > > +} > > + > > +static void convert_float_to_uint16(struct fb_convert *cvt) > > +{ > > + int i, j; > > + uint16_t *up16 = cvt->dst.ptr + cvt->dst.fb->offsets[0]; > > + const float *ptr = cvt->src.ptr; > > + unsigned float_stride = cvt->src.fb->strides[0] / sizeof(*ptr); > > + unsigned up16_stride = cvt->dst.fb->strides[0] / sizeof(*up16); > > + const unsigned char *swz = rgbx_swizzle(cvt->dst.fb->drm_format); > > + bool needs_reswizzle = swz != swizzle_rgbx; > > + > > + for (i = 0; i < cvt->dst.fb->height; i++) { > > + if (needs_reswizzle) { > > + const float *rgb_tmp = ptr; > > + uint16_t *u16_tmp = up16; > > + > > + for (j = 0; j < cvt->dst.fb->width; j++) { > > + struct igt_vec4 rgb; > > + > > + rgb.d[0] = rgb_tmp[swz[0]]; > > + rgb.d[1] = rgb_tmp[swz[1]]; > > + rgb.d[2] = rgb_tmp[swz[2]]; > > + rgb.d[3] = rgb_tmp[swz[3]]; > > + > > + float_to_uint16(rgb.d, u16_tmp, 4); > > + > > + rgb_tmp += 4; > > + u16_tmp += 4; > > + } > > + } else { > > + float_to_uint16(ptr, up16, cvt->dst.fb->width * 4); > > + } > > + > > + ptr += float_stride; > > + up16 += up16_stride; > > + } > > +} > > + > > static void convert_pixman(struct fb_convert *cvt) > > { > > pixman_format_code_t src_pixman = drm_format_to_pixman(cvt->src.fb->drm_format); > > @@ -3560,6 +3671,12 @@ static void fb_convert(struct fb_convert *cvt) > > case DRM_FORMAT_ABGR16161616F: > > convert_fp16_to_float(cvt); > > return; > > + case DRM_FORMAT_XRGB16161616: > > + case DRM_FORMAT_XBGR16161616: > > + case DRM_FORMAT_ARGB16161616: > > + case DRM_FORMAT_ABGR16161616: > > + convert_uint16_to_float(cvt); > > + return; > > } > > } else if (cvt->src.fb->drm_format == IGT_FORMAT_FLOAT) { > > switch (cvt->dst.fb->drm_format) { > > @@ -3589,6 +3706,12 @@ static void fb_convert(struct fb_convert *cvt) > > case DRM_FORMAT_ABGR16161616F: > > convert_float_to_fp16(cvt); > > return; > > + case DRM_FORMAT_XRGB16161616: > > + case DRM_FORMAT_XBGR16161616: > > + case DRM_FORMAT_ARGB16161616: > > + case DRM_FORMAT_ABGR16161616: > > + convert_float_to_uint16(cvt); > > + return; > > } > > } > > > > -- > > 2.25.1 > > -- > Ville Syrjälä > Intel _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] lib/igt_fb: Add support for testing of 16 bpc fixed point formats. 2021-05-03 19:32 ` Mario Kleiner @ 2021-05-03 19:43 ` Ville Syrjälä 2021-05-03 19:47 ` Mario Kleiner 0 siblings, 1 reply; 14+ messages in thread From: Ville Syrjälä @ 2021-05-03 19:43 UTC (permalink / raw) To: Mario Kleiner; +Cc: igt-dev, Alex Deucher On Mon, May 03, 2021 at 09:32:19PM +0200, Mario Kleiner wrote: > On Mon, May 3, 2021 at 8:48 PM Ville Syrjälä > <ville.syrjala@linux.intel.com> wrote: > > > > On Mon, May 03, 2021 at 08:25:55PM +0200, Mario Kleiner wrote: > > > This is used to support testing the 16 bpc formats, e.g., via: > > > > > > kms_plane --run-subtest pixel-format-pipe-A-planes > > > > > > So far this was successfully tested on AMD RavenRidge with DCN-1 > > > display hw. > > > > > > The new conversion routines are slightly adapted copies of the > > > convert_float_to_fp16() and convert_fp16_to_float() functions, > > > with the conversion math modified for float <-> uint16 instead. > > > > > > Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > Cc: Alex Deucher <alexander.deucher@amd.com> > > > --- > > > lib/igt_fb.c | 123 +++++++++++++++++++++++++++++++++++++++++++++++++++ > > > 1 file changed, 123 insertions(+) > > > > > > diff --git a/lib/igt_fb.c b/lib/igt_fb.c > > > index 954e1181..148e6c0f 100644 > > > --- a/lib/igt_fb.c > > > +++ b/lib/igt_fb.c > > > @@ -220,6 +220,22 @@ static const struct format_desc_struct { > > > .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > > > .num_planes = 1, .plane_bpp = { 64, }, > > > }, > > > + { .name = "XRGB16161616", .depth = -1, .drm_id = DRM_FORMAT_XRGB16161616, > > > + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > > > + .num_planes = 1, .plane_bpp = { 64, }, > > > + }, > > > + { .name = "ARGB16161616", .depth = -1, .drm_id = DRM_FORMAT_ARGB16161616, > > > + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > > > + .num_planes = 1, .plane_bpp = { 64, }, > > > + }, > > > + { .name = "XBGR16161616", .depth = -1, .drm_id = DRM_FORMAT_XBGR16161616, > > > + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > > > + .num_planes = 1, .plane_bpp = { 64, }, > > > + }, > > > + { .name = "ABGR16161616", .depth = -1, .drm_id = DRM_FORMAT_ABGR16161616, > > > + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > > > + .num_planes = 1, .plane_bpp = { 64, }, > > > + }, > > > { .name = "NV12", .depth = -1, .drm_id = DRM_FORMAT_NV12, > > > .cairo_id = CAIRO_FORMAT_RGB24, .convert = true, > > > .num_planes = 2, .plane_bpp = { 8, 16, }, > > > @@ -3365,9 +3381,13 @@ static const unsigned char *rgbx_swizzle(uint32_t format) > > > default: > > > case DRM_FORMAT_XRGB16161616F: > > > case DRM_FORMAT_ARGB16161616F: > > > + case DRM_FORMAT_XRGB16161616: > > > + case DRM_FORMAT_ARGB16161616: > > > return swizzle_bgrx; > > > case DRM_FORMAT_XBGR16161616F: > > > case DRM_FORMAT_ABGR16161616F: > > > + case DRM_FORMAT_XBGR16161616: > > > + case DRM_FORMAT_ABGR16161616: > > > return swizzle_rgbx; > > > } > > > } > > > @@ -3451,6 +3471,97 @@ static void convert_float_to_fp16(struct fb_convert *cvt) > > > } > > > } > > > > > > +static void float_to_uint16(const float *f, uint16_t *h, unsigned int num) > > > +{ > > > + for (int i = 0; i < num; i++) > > > + h[i] = f[i] * 65535.0f + 0.5f; > > > +} > > > + > > > +static void uint16_to_float(const uint16_t *h, float *f, unsigned int num) > > > +{ > > > + for (int i = 0; i < num; i++) > > > + f[i] = ((float) h[i]) / 65535.0f; > > > > nit: the cast shouldn't be necessary. > > > > Looks good otherwise. > > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > Thanks for the quick review. Compiler and test results agree with you :). > > However, all other uintsomething_to_float() conversion routines, e.g., > for the yuv formats and for fp16_to_float() all use that apparently > redundant cast, which is why I left it for consistency with the rest > of the code. And in case those wiser people who wrote those bits may > know something that i don't see? > > Should I change the patch to drop the cast, and resend? Maybe not be worth the hassl esp. if there are redundant casts all over anyway. We could do a global pass later to clear them all up, or just squint and pretend they're not there :P -- Ville Syrjälä Intel _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] lib/igt_fb: Add support for testing of 16 bpc fixed point formats. 2021-05-03 19:43 ` Ville Syrjälä @ 2021-05-03 19:47 ` Mario Kleiner 0 siblings, 0 replies; 14+ messages in thread From: Mario Kleiner @ 2021-05-03 19:47 UTC (permalink / raw) To: Ville Syrjälä; +Cc: igt-dev, Alex Deucher On Mon, May 3, 2021 at 9:43 PM Ville Syrjälä <ville.syrjala@linux.intel.com> wrote: > > On Mon, May 03, 2021 at 09:32:19PM +0200, Mario Kleiner wrote: > > On Mon, May 3, 2021 at 8:48 PM Ville Syrjälä > > <ville.syrjala@linux.intel.com> wrote: > > > > > > On Mon, May 03, 2021 at 08:25:55PM +0200, Mario Kleiner wrote: > > > > This is used to support testing the 16 bpc formats, e.g., via: > > > > > > > > kms_plane --run-subtest pixel-format-pipe-A-planes > > > > > > > > So far this was successfully tested on AMD RavenRidge with DCN-1 > > > > display hw. > > > > > > > > The new conversion routines are slightly adapted copies of the > > > > convert_float_to_fp16() and convert_fp16_to_float() functions, > > > > with the conversion math modified for float <-> uint16 instead. > > > > > > > > Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > Cc: Alex Deucher <alexander.deucher@amd.com> > > > > --- > > > > lib/igt_fb.c | 123 +++++++++++++++++++++++++++++++++++++++++++++++++++ > > > > 1 file changed, 123 insertions(+) > > > > > > > > diff --git a/lib/igt_fb.c b/lib/igt_fb.c > > > > index 954e1181..148e6c0f 100644 > > > > --- a/lib/igt_fb.c > > > > +++ b/lib/igt_fb.c > > > > @@ -220,6 +220,22 @@ static const struct format_desc_struct { > > > > .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > > > > .num_planes = 1, .plane_bpp = { 64, }, > > > > }, > > > > + { .name = "XRGB16161616", .depth = -1, .drm_id = DRM_FORMAT_XRGB16161616, > > > > + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > > > > + .num_planes = 1, .plane_bpp = { 64, }, > > > > + }, > > > > + { .name = "ARGB16161616", .depth = -1, .drm_id = DRM_FORMAT_ARGB16161616, > > > > + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > > > > + .num_planes = 1, .plane_bpp = { 64, }, > > > > + }, > > > > + { .name = "XBGR16161616", .depth = -1, .drm_id = DRM_FORMAT_XBGR16161616, > > > > + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > > > > + .num_planes = 1, .plane_bpp = { 64, }, > > > > + }, > > > > + { .name = "ABGR16161616", .depth = -1, .drm_id = DRM_FORMAT_ABGR16161616, > > > > + .cairo_id = CAIRO_FORMAT_RGBA128F, .convert = true, > > > > + .num_planes = 1, .plane_bpp = { 64, }, > > > > + }, > > > > { .name = "NV12", .depth = -1, .drm_id = DRM_FORMAT_NV12, > > > > .cairo_id = CAIRO_FORMAT_RGB24, .convert = true, > > > > .num_planes = 2, .plane_bpp = { 8, 16, }, > > > > @@ -3365,9 +3381,13 @@ static const unsigned char *rgbx_swizzle(uint32_t format) > > > > default: > > > > case DRM_FORMAT_XRGB16161616F: > > > > case DRM_FORMAT_ARGB16161616F: > > > > + case DRM_FORMAT_XRGB16161616: > > > > + case DRM_FORMAT_ARGB16161616: > > > > return swizzle_bgrx; > > > > case DRM_FORMAT_XBGR16161616F: > > > > case DRM_FORMAT_ABGR16161616F: > > > > + case DRM_FORMAT_XBGR16161616: > > > > + case DRM_FORMAT_ABGR16161616: > > > > return swizzle_rgbx; > > > > } > > > > } > > > > @@ -3451,6 +3471,97 @@ static void convert_float_to_fp16(struct fb_convert *cvt) > > > > } > > > > } > > > > > > > > +static void float_to_uint16(const float *f, uint16_t *h, unsigned int num) > > > > +{ > > > > + for (int i = 0; i < num; i++) > > > > + h[i] = f[i] * 65535.0f + 0.5f; > > > > +} > > > > + > > > > +static void uint16_to_float(const uint16_t *h, float *f, unsigned int num) > > > > +{ > > > > + for (int i = 0; i < num; i++) > > > > + f[i] = ((float) h[i]) / 65535.0f; > > > > > > nit: the cast shouldn't be necessary. > > > > > > Looks good otherwise. > > > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > > Thanks for the quick review. Compiler and test results agree with you :). > > > > However, all other uintsomething_to_float() conversion routines, e.g., > > for the yuv formats and for fp16_to_float() all use that apparently > > redundant cast, which is why I left it for consistency with the rest > > of the code. And in case those wiser people who wrote those bits may > > know something that i don't see? > > > > Should I change the patch to drop the cast, and resend? > > Maybe not be worth the hassl esp. if there are redundant casts all over > anyway. We could do a global pass later to clear them all up, or just > squint and pretend they're not there :P > > -- > Ville Syrjälä > Intel Ok, then i'll leave it as is. -mario _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2021-08-09 4:59 UTC | newest] Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-06-11 4:21 [igt-dev] Add support for testing of 16 bpc fixed point framebuffers. II Mario Kleiner 2021-06-11 4:21 ` [igt-dev] [PATCH i-g-t 1/2] drm-uapi: Re-synchronize drm_fourcc.h with kernel Mario Kleiner 2021-06-11 5:54 ` Petri Latvala 2021-06-11 4:21 ` [igt-dev] [PATCH i-g-t 2/2] lib/igt_fb: Add support for testing of 16 bpc fixed point formats Mario Kleiner 2021-06-11 5:45 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/2] drm-uapi: Re-synchronize drm_fourcc.h with kernel Patchwork 2021-06-11 8:31 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork 2021-07-01 16:13 ` [igt-dev] Add support for testing of 16 bpc fixed point framebuffers. II Mario Kleiner 2021-08-06 15:51 ` Mario Kleiner 2021-08-09 5:01 ` Petri Latvala -- strict thread matches above, loose matches on Subject: below -- 2021-05-03 18:25 [igt-dev] Add support for testing of 16 bpc fixed point framebuffers Mario Kleiner 2021-05-03 18:25 ` [igt-dev] [PATCH i-g-t 2/2] lib/igt_fb: Add support for testing of 16 bpc fixed point formats Mario Kleiner 2021-05-03 18:47 ` Ville Syrjälä 2021-05-03 19:32 ` Mario Kleiner 2021-05-03 19:43 ` Ville Syrjälä 2021-05-03 19:47 ` Mario Kleiner
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