From: Suman Anna <s-anna@ti.com> To: Nishanth Menon <nm@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, Suman Anna <s-anna@ti.com> Subject: [PATCH v2 2/3] arm64: dts: ti: k3-am642-evm/sk: Add mailboxes to R5Fs Date: Tue, 15 Jun 2021 14:57:17 -0500 [thread overview] Message-ID: <20210615195718.15898-3-s-anna@ti.com> (raw) In-Reply-To: <20210615195718.15898-1-s-anna@ti.com> Add the required 'mboxes' property to all the R5F processors for the TI AM642 EVM and SK boards. The mailboxes and some shared memory are required for running the Remote Processor Messaging (RPMsg) stack between the host processor and each of the R5Fs. The chosen sub-mailboxes match the values used in the current firmware images. This can be changed, if needed, as per the system integration needs after making appropriate changes on the firmware side as well. Note that any R5F Core1 resources are needed and used only when that R5F cluster is configured for Split-mode. Signed-off-by: Suman Anna <s-anna@ti.com> --- v2: No code changes, rebased and retained the presence after the mailbox nodes arch/arm64/boot/dts/ti/k3-am642-evm.dts | 16 ++++++++++++++++ arch/arm64/boot/dts/ti/k3-am642-sk.dts | 16 ++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index dc69db2d10c3..2e75cd68f8b7 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -469,6 +469,22 @@ &mailbox0_cluster7 { status = "disabled"; }; +&main_r5fss0_core0 { + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>; +}; + +&main_r5fss0_core1 { + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>; +}; + +&main_r5fss1_core0 { + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>; +}; + +&main_r5fss1_core1 { + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>; +}; + &serdes_ln_ctrl { idle-states = <AM64_SERDES0_LANE0_PCIE0>; }; diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index 40124007259d..4abddea92cf5 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -368,6 +368,22 @@ &mailbox0_cluster7 { status = "disabled"; }; +&main_r5fss0_core0 { + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>; +}; + +&main_r5fss0_core1 { + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>; +}; + +&main_r5fss1_core0 { + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>; +}; + +&main_r5fss1_core1 { + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>; +}; + &pcie0_rc { status = "disabled"; }; -- 2.30.1
WARNING: multiple messages have this Message-ID (diff)
From: Suman Anna <s-anna@ti.com> To: Nishanth Menon <nm@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 2/3] arm64: dts: ti: k3-am642-evm/sk: Add mailboxes to R5Fs Date: Tue, 15 Jun 2021 14:57:17 -0500 [thread overview] Message-ID: <20210615195718.15898-3-s-anna@ti.com> (raw) In-Reply-To: <20210615195718.15898-1-s-anna@ti.com> Add the required 'mboxes' property to all the R5F processors for the TI AM642 EVM and SK boards. The mailboxes and some shared memory are required for running the Remote Processor Messaging (RPMsg) stack between the host processor and each of the R5Fs. The chosen sub-mailboxes match the values used in the current firmware images. This can be changed, if needed, as per the system integration needs after making appropriate changes on the firmware side as well. Note that any R5F Core1 resources are needed and used only when that R5F cluster is configured for Split-mode. Signed-off-by: Suman Anna <s-anna@ti.com> --- v2: No code changes, rebased and retained the presence after the mailbox nodes arch/arm64/boot/dts/ti/k3-am642-evm.dts | 16 ++++++++++++++++ arch/arm64/boot/dts/ti/k3-am642-sk.dts | 16 ++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index dc69db2d10c3..2e75cd68f8b7 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -469,6 +469,22 @@ &mailbox0_cluster7 { status = "disabled"; }; +&main_r5fss0_core0 { + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>; +}; + +&main_r5fss0_core1 { + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>; +}; + +&main_r5fss1_core0 { + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>; +}; + +&main_r5fss1_core1 { + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>; +}; + &serdes_ln_ctrl { idle-states = <AM64_SERDES0_LANE0_PCIE0>; }; diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index 40124007259d..4abddea92cf5 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -368,6 +368,22 @@ &mailbox0_cluster7 { status = "disabled"; }; +&main_r5fss0_core0 { + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>; +}; + +&main_r5fss0_core1 { + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>; +}; + +&main_r5fss1_core0 { + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>; +}; + +&main_r5fss1_core1 { + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>; +}; + &pcie0_rc { status = "disabled"; }; -- 2.30.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-06-15 19:57 UTC|newest] Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-06-15 19:57 [PATCH v2 0/3] Add R5F nodes on TI K3 AM64x SoCs Suman Anna 2021-06-15 19:57 ` Suman Anna 2021-06-15 19:57 ` [PATCH v2 1/3] arm64: dts: ti: k3-am64-main: Add MAIN domain R5F cluster nodes Suman Anna 2021-06-15 19:57 ` Suman Anna 2021-06-15 19:57 ` Suman Anna [this message] 2021-06-15 19:57 ` [PATCH v2 2/3] arm64: dts: ti: k3-am642-evm/sk: Add mailboxes to R5Fs Suman Anna 2021-06-15 19:57 ` [PATCH v2 3/3] arm64: dts: ti: k3-am642-evm/sk: Add DDR carveout memory nodes for R5Fs Suman Anna 2021-06-15 19:57 ` Suman Anna 2021-06-17 0:44 ` Nishanth Menon 2021-06-17 0:44 ` Nishanth Menon 2021-06-16 22:43 ` [PATCH v2 0/3] Add R5F nodes on TI K3 AM64x SoCs Bajjuri, Praneeth 2021-06-16 22:43 ` Bajjuri, Praneeth 2021-06-18 14:58 ` Nishanth Menon 2021-06-18 14:58 ` Nishanth Menon
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