* Re: [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
@ 2021-06-16 11:06 kernel test robot
0 siblings, 0 replies; 16+ messages in thread
From: kernel test robot @ 2021-06-16 11:06 UTC (permalink / raw)
To: kbuild
[-- Attachment #1: Type: text/plain, Size: 31827 bytes --]
CC: kbuild-all(a)lists.01.org
In-Reply-To: <20210610204626.2995262-4-John.C.Harrison@Intel.com>
References: <20210610204626.2995262-4-John.C.Harrison@Intel.com>
TO: John.C.Harrison(a)Intel.com
TO: Intel-GFX(a)Lists.FreeDesktop.Org
CC: DRI-Devel(a)Lists.FreeDesktop.Org
Hi,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on next-20210615]
[cannot apply to v5.13-rc6]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/John-C-Harrison-Intel-com/Add-support-for-querying-hw-info-that-UMDs-need/20210616-141805
base: git://anongit.freedesktop.org/drm-intel for-linux-next
:::::: branch date: 5 hours ago
:::::: commit date: 5 hours ago
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce:
cd tools/perf && ./check-headers.sh
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
perfheadercheck warnings: (new ones prefixed by >>)
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 65< /*
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 66< * i915_user_extension: Base class for defining a chain of extensions
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 65> /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 66> * struct i915_user_extension - Base class for defining a chain of extensions
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 79> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 80> * Example chaining:
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 81> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 82> * .. code-block:: C
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 83> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 84> * struct i915_user_extension ext3 {
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 85> * .next_extension = 0, // end
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 86> * .name = ...,
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 87> * };
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 88> * struct i915_user_extension ext2 {
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 89> * .next_extension = (uintptr_t)&ext3,
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 90> * .name = ...,
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 91> * };
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 92> * struct i915_user_extension ext1 {
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 93> * .next_extension = (uintptr_t)&ext2,
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 94> * .name = ...,
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 95> * };
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 96> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 97> * Typically the struct i915_user_extension would be embedded in some uAPI
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 98> * struct, and in this case we would feed it the head of the chain(i.e ext1),
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 99> * which would then apply all of the above extensions.
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 100> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 103> /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 104> * @next_extension:
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 105> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 106> * Pointer to the next struct i915_user_extension, or zero if the end.
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 107> */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 109> /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 110> * @name: Name of the extension.
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 111> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 112> * Note that the name here is just some integer.
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 113> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 114> * Also note that the name space for this is not global for the whole
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 115> * driver, but rather its scope/meaning is limited to the specific piece
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 116> * of uAPI which has embedded the struct i915_user_extension.
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 117> */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 83< __u32 flags; /* All undefined bits must be zero. */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 84< __u32 rsvd[4]; /* Reserved for future use; must be zero. */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 119> /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 120> * @flags: MBZ
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 121> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 122> * All undefined bits must be zero.
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 123> */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 124> __u32 flags;
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 125> /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 126> * @rsvd: MBZ
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 127> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 128> * Reserved for future use; must be zero.
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 129> */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 130> __u32 rsvd[4];
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 409> #define DRM_I915_GEM_CREATE_EXT 0x3c
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 442> #define DRM_IOCTL_I915_GEM_CREATE_EXT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE_EXT, struct drm_i915_gem_create_ext)
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 1057< /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 1105> /*
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 1062< /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 1110> /*
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 1703< /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 1751> /*
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2070< /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2118> /*
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2084< /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2132> /*
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2093< /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2141> /*
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2106< /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2154> /*
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2154< /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2202> /*
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2223> /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2224> * struct drm_i915_query_item - An individual query for the kernel to process.
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2225> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2226> * The behaviour is determined by the @query_id. Note that exactly what
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2227> * @data_ptr is also depends on the specific @query_id.
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2228> */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2230> /** @query_id: The id for this query */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2235> #define DRM_I915_QUERY_MEMORY_REGIONS 4
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2236> #define DRM_I915_QUERY_HWCONFIG_TABLE 5
>> Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2237> #define DRM_I915_QUERY_L3_BANK_COUNT 6
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2182< /*
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2240> /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2241> * @length:
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2242> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2184< * data to be written at the data_ptr pointer. The kernel sets this
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2244> * data to be written at the @data_ptr pointer. The kernel sets this
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2190< /*
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2250> /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2251> * @flags:
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2252> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2194< * following :
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2195< * - DRM_I915_QUERY_PERF_CONFIG_LIST
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2196< * - DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2197< * - DRM_I915_QUERY_PERF_CONFIG_FOR_UUID
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2256> * following:
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2257> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2258> * - DRM_I915_QUERY_PERF_CONFIG_LIST
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2259> * - DRM_I915_QUERY_PERF_CONFIG_DATA_FOR_UUID
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2260> * - DRM_I915_QUERY_PERF_CONFIG_FOR_UUID
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2204< /*
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2205< * Data will be written at the location pointed by data_ptr when the
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2206< * value of length matches the length of the data to be written by the
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2267> /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2268> * @data_ptr:
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2269> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2270> * Data will be written at the location pointed by @data_ptr when the
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2271> * value of @length matches the length of the data to be written by the
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2277> /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2278> * struct drm_i915_query - Supply an array of struct drm_i915_query_item for the
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2279> * kernel to fill out.
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2280> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2281> * Note that this is generally a two step process for each struct
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2282> * drm_i915_query_item in the array:
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2283> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2284> * 1. Call the DRM_IOCTL_I915_QUERY, giving it our array of struct
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2285> * drm_i915_query_item, with &drm_i915_query_item.length set to zero. The
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2286> * kernel will then fill in the size, in bytes, which tells userspace how
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2287> * memory it needs to allocate for the blob(say for an array of properties).
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2288> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2289> * 2. Next we call DRM_IOCTL_I915_QUERY again, this time with the
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2290> * &drm_i915_query_item.data_ptr equal to our newly allocated blob. Note that
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2291> * the &drm_i915_query_item.length should still be the same as what the
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2292> * kernel previously set. At this point the kernel can fill in the blob.
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2293> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2294> * Note that for some query items it can make sense for userspace to just pass
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2295> * in a buffer/blob equal to or larger than the required size. In this case only
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2296> * a single ioctl call is needed. For some smaller query items this can work
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2297> * quite well.
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2298> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2299> */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2301> /** @num_items: The number of elements in the @items_ptr array */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2215< /*
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2216< * Unused for now. Must be cleared to zero.
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2304> /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2305> * @flags: Unused for now. Must be cleared to zero.
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2220< /*
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2221< * This points to an array of num_items drm_i915_query_item structures.
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2309> /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2310> * @items_ptr:
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2311> *
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2312> * Pointer to an array of struct drm_i915_query_item. The number of
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2313> * array elements is @num_items.
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2295< /** Engine class and instance. */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2387> /** @engine: Engine class and instance. */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2298< /** Reserved field. */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2390> /** @rsvd0: Reserved field. */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2301< /** Engine flags. */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2393> /** @flags: Engine flags. */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2304< /** Capabilities of this engine. */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2396> /** @capabilities: Capabilities of this engine. */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2309< /** Reserved fields. */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2401> /** @rsvd1: Reserved fields. */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2320< /** Number of struct drm_i915_engine_info structs following. */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2412> /** @num_engines: Number of struct drm_i915_engine_info structs following. */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2323< /** MBZ */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2415> /** @rsvd: MBZ */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2326< /** Marker for drm_i915_engine_info structures. */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version@'include/uapi/drm/i915_drm.h': 2418> /** @engines: Marker for drm_i915_engine_info structures. */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2470> };
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2471>
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2472> /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2473> * enum drm_i915_gem_memory_class - Supported memory classes
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2474> */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2475> enum drm_i915_gem_memory_class {
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2476> /** @I915_MEMORY_CLASS_SYSTEM: System memory */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2477> I915_MEMORY_CLASS_SYSTEM = 0,
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2478> /** @I915_MEMORY_CLASS_DEVICE: Device local-memory */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2479> I915_MEMORY_CLASS_DEVICE,
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2480> };
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2481>
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2482> /**
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2483> * struct drm_i915_gem_memory_class_instance - Identify particular memory region
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2484> */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2485> struct drm_i915_gem_memory_class_instance {
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2486> /** @memory_class: See enum drm_i915_gem_memory_class */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2487> __u16 memory_class;
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2488>
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2489> /** @memory_instance: Which instance */
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2490> __u16 memory_instance;
Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h': 2491> };
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
2021-07-15 22:16 ` John Harrison
@ 2021-07-20 12:58 ` Daniel Vetter
-1 siblings, 0 replies; 16+ messages in thread
From: Daniel Vetter @ 2021-07-20 12:58 UTC (permalink / raw)
To: John Harrison; +Cc: intel-gfx, dri-devel
On Thu, Jul 15, 2021 at 03:16:08PM -0700, John Harrison wrote:
> On 6/16/2021 03:25, Daniel Vetter wrote:
> > On Thu, Jun 10, 2021 at 10:46 PM <John.C.Harrison@intel.com> wrote:
> > > From: John Harrison <John.C.Harrison@Intel.com>
> > >
> > > Various UMDs need to know the L3 bank count. So add a query API for it.
> > Please link to both the igt test submission for this (there's not even
> > a Test-with: on the cover letter)
> Is there a wiki page that describes all such tags? That is not one I was
> aware of and I can't find anything in the Kernel patch submission wiki or
> DRM maintainers wiki that mentions it.
It's in the CI docs (linked from the main page too)
https://intel-gfx-ci.01.org/test-with.html
> > and the merge requests for the
> > various UMD which uses new uapi.
> Is there a particular tag to use for this?
I think often just a link to the merge request in the cover letter.
Sometimes people also put the link in the uapi patch itself in the commit
message. Which I think would be best.
-Daniel
>
> John.
>
> > Also as other mentioned, full uapi
> > kerneldoc is needed too. Please fill in any gaps in the existing docs
> > that relate to your addition directly (like we've e.g. done for the
> > extension chaining when adding lmem support).
> >
> > Thanks, Daniel
> >
> > > Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> > > ---
> > > drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++++++++++++++
> > > drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
> > > drivers/gpu/drm/i915/i915_query.c | 22 ++++++++++++++++++++++
> > > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > > include/uapi/drm/i915_drm.h | 1 +
> > > 5 files changed, 40 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> > > index 2161bf01ef8b..708bb3581d83 100644
> > > --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> > > +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> > > @@ -704,3 +704,18 @@ void intel_gt_info_print(const struct intel_gt_info *info,
> > >
> > > intel_sseu_dump(&info->sseu, p);
> > > }
> > > +
> > > +int intel_gt_get_l3bank_count(struct intel_gt *gt)
> > > +{
> > > + struct drm_i915_private *i915 = gt->i915;
> > > + intel_wakeref_t wakeref;
> > > + u32 fuse3;
> > > +
> > > + if (GRAPHICS_VER(i915) < 12)
> > > + return -ENODEV;
> > > +
> > > + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> > > + fuse3 = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
> > > +
> > > + return hweight32(REG_FIELD_GET(GEN12_GT_L3_MODE_MASK, ~fuse3));
> > > +}
> > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> > > index 7ec395cace69..46aa1cf4cf30 100644
> > > --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> > > +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> > > @@ -77,6 +77,7 @@ static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
> > >
> > > void intel_gt_info_print(const struct intel_gt_info *info,
> > > struct drm_printer *p);
> > > +int intel_gt_get_l3bank_count(struct intel_gt *gt);
> > >
> > > void intel_gt_watchdog_work(struct work_struct *work);
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> > > index 96bd8fb3e895..0e92bb2d21b2 100644
> > > --- a/drivers/gpu/drm/i915/i915_query.c
> > > +++ b/drivers/gpu/drm/i915/i915_query.c
> > > @@ -10,6 +10,7 @@
> > > #include "i915_perf.h"
> > > #include "i915_query.h"
> > > #include <uapi/drm/i915_drm.h>
> > > +#include "gt/intel_gt.h"
> > >
> > > static int copy_query_item(void *query_hdr, size_t query_sz,
> > > u32 total_length,
> > > @@ -502,6 +503,26 @@ static int query_hwconfig_table(struct drm_i915_private *i915,
> > > return hwconfig->size;
> > > }
> > >
> > > +static int query_l3banks(struct drm_i915_private *i915,
> > > + struct drm_i915_query_item *query_item)
> > > +{
> > > + u32 banks;
> > > +
> > > + if (query_item->length == 0)
> > > + return sizeof(banks);
> > > +
> > > + if (query_item->length < sizeof(banks))
> > > + return -EINVAL;
> > > +
> > > + banks = intel_gt_get_l3bank_count(&i915->gt);
> > > +
> > > + if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
> > > + &banks, sizeof(banks)))
> > > + return -EFAULT;
> > > +
> > > + return sizeof(banks);
> > > +}
> > > +
> > > static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> > > struct drm_i915_query_item *query_item) = {
> > > query_topology_info,
> > > @@ -509,6 +530,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> > > query_perf_config,
> > > query_memregion_info,
> > > query_hwconfig_table,
> > > + query_l3banks,
> > > };
> > >
> > > int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > > index eb13c601d680..e9ba88fe3db7 100644
> > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > @@ -3099,6 +3099,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> > > #define GEN10_MIRROR_FUSE3 _MMIO(0x9118)
> > > #define GEN10_L3BANK_PAIR_COUNT 4
> > > #define GEN10_L3BANK_MASK 0x0F
> > > +#define GEN12_GT_L3_MODE_MASK 0xFF
> > >
> > > #define GEN8_EU_DISABLE0 _MMIO(0x9134)
> > > #define GEN8_EU_DIS0_S0_MASK 0xffffff
> > > diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> > > index 87d369cae22a..20d18cca5066 100644
> > > --- a/include/uapi/drm/i915_drm.h
> > > +++ b/include/uapi/drm/i915_drm.h
> > > @@ -2234,6 +2234,7 @@ struct drm_i915_query_item {
> > > #define DRM_I915_QUERY_PERF_CONFIG 3
> > > #define DRM_I915_QUERY_MEMORY_REGIONS 4
> > > #define DRM_I915_QUERY_HWCONFIG_TABLE 5
> > > +#define DRM_I915_QUERY_L3_BANK_COUNT 6
> > > /* Must be kept compact -- no holes and well documented */
> > >
> > > /**
> > > --
> > > 2.25.1
> > >
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >
> >
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
@ 2021-07-20 12:58 ` Daniel Vetter
0 siblings, 0 replies; 16+ messages in thread
From: Daniel Vetter @ 2021-07-20 12:58 UTC (permalink / raw)
To: John Harrison; +Cc: intel-gfx, dri-devel
On Thu, Jul 15, 2021 at 03:16:08PM -0700, John Harrison wrote:
> On 6/16/2021 03:25, Daniel Vetter wrote:
> > On Thu, Jun 10, 2021 at 10:46 PM <John.C.Harrison@intel.com> wrote:
> > > From: John Harrison <John.C.Harrison@Intel.com>
> > >
> > > Various UMDs need to know the L3 bank count. So add a query API for it.
> > Please link to both the igt test submission for this (there's not even
> > a Test-with: on the cover letter)
> Is there a wiki page that describes all such tags? That is not one I was
> aware of and I can't find anything in the Kernel patch submission wiki or
> DRM maintainers wiki that mentions it.
It's in the CI docs (linked from the main page too)
https://intel-gfx-ci.01.org/test-with.html
> > and the merge requests for the
> > various UMD which uses new uapi.
> Is there a particular tag to use for this?
I think often just a link to the merge request in the cover letter.
Sometimes people also put the link in the uapi patch itself in the commit
message. Which I think would be best.
-Daniel
>
> John.
>
> > Also as other mentioned, full uapi
> > kerneldoc is needed too. Please fill in any gaps in the existing docs
> > that relate to your addition directly (like we've e.g. done for the
> > extension chaining when adding lmem support).
> >
> > Thanks, Daniel
> >
> > > Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> > > ---
> > > drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++++++++++++++
> > > drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
> > > drivers/gpu/drm/i915/i915_query.c | 22 ++++++++++++++++++++++
> > > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > > include/uapi/drm/i915_drm.h | 1 +
> > > 5 files changed, 40 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> > > index 2161bf01ef8b..708bb3581d83 100644
> > > --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> > > +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> > > @@ -704,3 +704,18 @@ void intel_gt_info_print(const struct intel_gt_info *info,
> > >
> > > intel_sseu_dump(&info->sseu, p);
> > > }
> > > +
> > > +int intel_gt_get_l3bank_count(struct intel_gt *gt)
> > > +{
> > > + struct drm_i915_private *i915 = gt->i915;
> > > + intel_wakeref_t wakeref;
> > > + u32 fuse3;
> > > +
> > > + if (GRAPHICS_VER(i915) < 12)
> > > + return -ENODEV;
> > > +
> > > + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> > > + fuse3 = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
> > > +
> > > + return hweight32(REG_FIELD_GET(GEN12_GT_L3_MODE_MASK, ~fuse3));
> > > +}
> > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> > > index 7ec395cace69..46aa1cf4cf30 100644
> > > --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> > > +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> > > @@ -77,6 +77,7 @@ static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
> > >
> > > void intel_gt_info_print(const struct intel_gt_info *info,
> > > struct drm_printer *p);
> > > +int intel_gt_get_l3bank_count(struct intel_gt *gt);
> > >
> > > void intel_gt_watchdog_work(struct work_struct *work);
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> > > index 96bd8fb3e895..0e92bb2d21b2 100644
> > > --- a/drivers/gpu/drm/i915/i915_query.c
> > > +++ b/drivers/gpu/drm/i915/i915_query.c
> > > @@ -10,6 +10,7 @@
> > > #include "i915_perf.h"
> > > #include "i915_query.h"
> > > #include <uapi/drm/i915_drm.h>
> > > +#include "gt/intel_gt.h"
> > >
> > > static int copy_query_item(void *query_hdr, size_t query_sz,
> > > u32 total_length,
> > > @@ -502,6 +503,26 @@ static int query_hwconfig_table(struct drm_i915_private *i915,
> > > return hwconfig->size;
> > > }
> > >
> > > +static int query_l3banks(struct drm_i915_private *i915,
> > > + struct drm_i915_query_item *query_item)
> > > +{
> > > + u32 banks;
> > > +
> > > + if (query_item->length == 0)
> > > + return sizeof(banks);
> > > +
> > > + if (query_item->length < sizeof(banks))
> > > + return -EINVAL;
> > > +
> > > + banks = intel_gt_get_l3bank_count(&i915->gt);
> > > +
> > > + if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
> > > + &banks, sizeof(banks)))
> > > + return -EFAULT;
> > > +
> > > + return sizeof(banks);
> > > +}
> > > +
> > > static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> > > struct drm_i915_query_item *query_item) = {
> > > query_topology_info,
> > > @@ -509,6 +530,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> > > query_perf_config,
> > > query_memregion_info,
> > > query_hwconfig_table,
> > > + query_l3banks,
> > > };
> > >
> > > int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > > index eb13c601d680..e9ba88fe3db7 100644
> > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > @@ -3099,6 +3099,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> > > #define GEN10_MIRROR_FUSE3 _MMIO(0x9118)
> > > #define GEN10_L3BANK_PAIR_COUNT 4
> > > #define GEN10_L3BANK_MASK 0x0F
> > > +#define GEN12_GT_L3_MODE_MASK 0xFF
> > >
> > > #define GEN8_EU_DISABLE0 _MMIO(0x9134)
> > > #define GEN8_EU_DIS0_S0_MASK 0xffffff
> > > diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> > > index 87d369cae22a..20d18cca5066 100644
> > > --- a/include/uapi/drm/i915_drm.h
> > > +++ b/include/uapi/drm/i915_drm.h
> > > @@ -2234,6 +2234,7 @@ struct drm_i915_query_item {
> > > #define DRM_I915_QUERY_PERF_CONFIG 3
> > > #define DRM_I915_QUERY_MEMORY_REGIONS 4
> > > #define DRM_I915_QUERY_HWCONFIG_TABLE 5
> > > +#define DRM_I915_QUERY_L3_BANK_COUNT 6
> > > /* Must be kept compact -- no holes and well documented */
> > >
> > > /**
> > > --
> > > 2.25.1
> > >
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >
> >
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
2021-06-16 10:25 ` Daniel Vetter
@ 2021-07-15 22:16 ` John Harrison
-1 siblings, 0 replies; 16+ messages in thread
From: John Harrison @ 2021-07-15 22:16 UTC (permalink / raw)
To: Daniel Vetter; +Cc: intel-gfx, dri-devel
On 6/16/2021 03:25, Daniel Vetter wrote:
> On Thu, Jun 10, 2021 at 10:46 PM <John.C.Harrison@intel.com> wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> Various UMDs need to know the L3 bank count. So add a query API for it.
> Please link to both the igt test submission for this (there's not even
> a Test-with: on the cover letter)
Is there a wiki page that describes all such tags? That is not one I was
aware of and I can't find anything in the Kernel patch submission wiki
or DRM maintainers wiki that mentions it.
> and the merge requests for the
> various UMD which uses new uapi.
Is there a particular tag to use for this?
John.
> Also as other mentioned, full uapi
> kerneldoc is needed too. Please fill in any gaps in the existing docs
> that relate to your addition directly (like we've e.g. done for the
> extension chaining when adding lmem support).
>
> Thanks, Daniel
>
>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>> ---
>> drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++++++++++++++
>> drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
>> drivers/gpu/drm/i915/i915_query.c | 22 ++++++++++++++++++++++
>> drivers/gpu/drm/i915/i915_reg.h | 1 +
>> include/uapi/drm/i915_drm.h | 1 +
>> 5 files changed, 40 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
>> index 2161bf01ef8b..708bb3581d83 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
>> @@ -704,3 +704,18 @@ void intel_gt_info_print(const struct intel_gt_info *info,
>>
>> intel_sseu_dump(&info->sseu, p);
>> }
>> +
>> +int intel_gt_get_l3bank_count(struct intel_gt *gt)
>> +{
>> + struct drm_i915_private *i915 = gt->i915;
>> + intel_wakeref_t wakeref;
>> + u32 fuse3;
>> +
>> + if (GRAPHICS_VER(i915) < 12)
>> + return -ENODEV;
>> +
>> + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
>> + fuse3 = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
>> +
>> + return hweight32(REG_FIELD_GET(GEN12_GT_L3_MODE_MASK, ~fuse3));
>> +}
>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
>> index 7ec395cace69..46aa1cf4cf30 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
>> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
>> @@ -77,6 +77,7 @@ static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
>>
>> void intel_gt_info_print(const struct intel_gt_info *info,
>> struct drm_printer *p);
>> +int intel_gt_get_l3bank_count(struct intel_gt *gt);
>>
>> void intel_gt_watchdog_work(struct work_struct *work);
>>
>> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
>> index 96bd8fb3e895..0e92bb2d21b2 100644
>> --- a/drivers/gpu/drm/i915/i915_query.c
>> +++ b/drivers/gpu/drm/i915/i915_query.c
>> @@ -10,6 +10,7 @@
>> #include "i915_perf.h"
>> #include "i915_query.h"
>> #include <uapi/drm/i915_drm.h>
>> +#include "gt/intel_gt.h"
>>
>> static int copy_query_item(void *query_hdr, size_t query_sz,
>> u32 total_length,
>> @@ -502,6 +503,26 @@ static int query_hwconfig_table(struct drm_i915_private *i915,
>> return hwconfig->size;
>> }
>>
>> +static int query_l3banks(struct drm_i915_private *i915,
>> + struct drm_i915_query_item *query_item)
>> +{
>> + u32 banks;
>> +
>> + if (query_item->length == 0)
>> + return sizeof(banks);
>> +
>> + if (query_item->length < sizeof(banks))
>> + return -EINVAL;
>> +
>> + banks = intel_gt_get_l3bank_count(&i915->gt);
>> +
>> + if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
>> + &banks, sizeof(banks)))
>> + return -EFAULT;
>> +
>> + return sizeof(banks);
>> +}
>> +
>> static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
>> struct drm_i915_query_item *query_item) = {
>> query_topology_info,
>> @@ -509,6 +530,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
>> query_perf_config,
>> query_memregion_info,
>> query_hwconfig_table,
>> + query_l3banks,
>> };
>>
>> int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index eb13c601d680..e9ba88fe3db7 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -3099,6 +3099,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
>> #define GEN10_MIRROR_FUSE3 _MMIO(0x9118)
>> #define GEN10_L3BANK_PAIR_COUNT 4
>> #define GEN10_L3BANK_MASK 0x0F
>> +#define GEN12_GT_L3_MODE_MASK 0xFF
>>
>> #define GEN8_EU_DISABLE0 _MMIO(0x9134)
>> #define GEN8_EU_DIS0_S0_MASK 0xffffff
>> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
>> index 87d369cae22a..20d18cca5066 100644
>> --- a/include/uapi/drm/i915_drm.h
>> +++ b/include/uapi/drm/i915_drm.h
>> @@ -2234,6 +2234,7 @@ struct drm_i915_query_item {
>> #define DRM_I915_QUERY_PERF_CONFIG 3
>> #define DRM_I915_QUERY_MEMORY_REGIONS 4
>> #define DRM_I915_QUERY_HWCONFIG_TABLE 5
>> +#define DRM_I915_QUERY_L3_BANK_COUNT 6
>> /* Must be kept compact -- no holes and well documented */
>>
>> /**
>> --
>> 2.25.1
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
@ 2021-07-15 22:16 ` John Harrison
0 siblings, 0 replies; 16+ messages in thread
From: John Harrison @ 2021-07-15 22:16 UTC (permalink / raw)
To: Daniel Vetter; +Cc: intel-gfx, dri-devel
On 6/16/2021 03:25, Daniel Vetter wrote:
> On Thu, Jun 10, 2021 at 10:46 PM <John.C.Harrison@intel.com> wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> Various UMDs need to know the L3 bank count. So add a query API for it.
> Please link to both the igt test submission for this (there's not even
> a Test-with: on the cover letter)
Is there a wiki page that describes all such tags? That is not one I was
aware of and I can't find anything in the Kernel patch submission wiki
or DRM maintainers wiki that mentions it.
> and the merge requests for the
> various UMD which uses new uapi.
Is there a particular tag to use for this?
John.
> Also as other mentioned, full uapi
> kerneldoc is needed too. Please fill in any gaps in the existing docs
> that relate to your addition directly (like we've e.g. done for the
> extension chaining when adding lmem support).
>
> Thanks, Daniel
>
>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>> ---
>> drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++++++++++++++
>> drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
>> drivers/gpu/drm/i915/i915_query.c | 22 ++++++++++++++++++++++
>> drivers/gpu/drm/i915/i915_reg.h | 1 +
>> include/uapi/drm/i915_drm.h | 1 +
>> 5 files changed, 40 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
>> index 2161bf01ef8b..708bb3581d83 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
>> @@ -704,3 +704,18 @@ void intel_gt_info_print(const struct intel_gt_info *info,
>>
>> intel_sseu_dump(&info->sseu, p);
>> }
>> +
>> +int intel_gt_get_l3bank_count(struct intel_gt *gt)
>> +{
>> + struct drm_i915_private *i915 = gt->i915;
>> + intel_wakeref_t wakeref;
>> + u32 fuse3;
>> +
>> + if (GRAPHICS_VER(i915) < 12)
>> + return -ENODEV;
>> +
>> + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
>> + fuse3 = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
>> +
>> + return hweight32(REG_FIELD_GET(GEN12_GT_L3_MODE_MASK, ~fuse3));
>> +}
>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
>> index 7ec395cace69..46aa1cf4cf30 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
>> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
>> @@ -77,6 +77,7 @@ static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
>>
>> void intel_gt_info_print(const struct intel_gt_info *info,
>> struct drm_printer *p);
>> +int intel_gt_get_l3bank_count(struct intel_gt *gt);
>>
>> void intel_gt_watchdog_work(struct work_struct *work);
>>
>> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
>> index 96bd8fb3e895..0e92bb2d21b2 100644
>> --- a/drivers/gpu/drm/i915/i915_query.c
>> +++ b/drivers/gpu/drm/i915/i915_query.c
>> @@ -10,6 +10,7 @@
>> #include "i915_perf.h"
>> #include "i915_query.h"
>> #include <uapi/drm/i915_drm.h>
>> +#include "gt/intel_gt.h"
>>
>> static int copy_query_item(void *query_hdr, size_t query_sz,
>> u32 total_length,
>> @@ -502,6 +503,26 @@ static int query_hwconfig_table(struct drm_i915_private *i915,
>> return hwconfig->size;
>> }
>>
>> +static int query_l3banks(struct drm_i915_private *i915,
>> + struct drm_i915_query_item *query_item)
>> +{
>> + u32 banks;
>> +
>> + if (query_item->length == 0)
>> + return sizeof(banks);
>> +
>> + if (query_item->length < sizeof(banks))
>> + return -EINVAL;
>> +
>> + banks = intel_gt_get_l3bank_count(&i915->gt);
>> +
>> + if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
>> + &banks, sizeof(banks)))
>> + return -EFAULT;
>> +
>> + return sizeof(banks);
>> +}
>> +
>> static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
>> struct drm_i915_query_item *query_item) = {
>> query_topology_info,
>> @@ -509,6 +530,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
>> query_perf_config,
>> query_memregion_info,
>> query_hwconfig_table,
>> + query_l3banks,
>> };
>>
>> int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index eb13c601d680..e9ba88fe3db7 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -3099,6 +3099,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
>> #define GEN10_MIRROR_FUSE3 _MMIO(0x9118)
>> #define GEN10_L3BANK_PAIR_COUNT 4
>> #define GEN10_L3BANK_MASK 0x0F
>> +#define GEN12_GT_L3_MODE_MASK 0xFF
>>
>> #define GEN8_EU_DISABLE0 _MMIO(0x9134)
>> #define GEN8_EU_DIS0_S0_MASK 0xffffff
>> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
>> index 87d369cae22a..20d18cca5066 100644
>> --- a/include/uapi/drm/i915_drm.h
>> +++ b/include/uapi/drm/i915_drm.h
>> @@ -2234,6 +2234,7 @@ struct drm_i915_query_item {
>> #define DRM_I915_QUERY_PERF_CONFIG 3
>> #define DRM_I915_QUERY_MEMORY_REGIONS 4
>> #define DRM_I915_QUERY_HWCONFIG_TABLE 5
>> +#define DRM_I915_QUERY_L3_BANK_COUNT 6
>> /* Must be kept compact -- no holes and well documented */
>>
>> /**
>> --
>> 2.25.1
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
2021-06-10 20:46 ` [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count John.C.Harrison
@ 2021-06-16 10:25 ` Daniel Vetter
2021-06-10 23:03 ` Michal Wajdeczko
` (3 subsequent siblings)
4 siblings, 0 replies; 16+ messages in thread
From: Daniel Vetter @ 2021-06-16 10:25 UTC (permalink / raw)
To: John Harrison; +Cc: intel-gfx, dri-devel
On Thu, Jun 10, 2021 at 10:46 PM <John.C.Harrison@intel.com> wrote:
>
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Various UMDs need to know the L3 bank count. So add a query API for it.
Please link to both the igt test submission for this (there's not even
a Test-with: on the cover letter) and the merge requests for the
various UMD which uses new uapi. Also as other mentioned, full uapi
kerneldoc is needed too. Please fill in any gaps in the existing docs
that relate to your addition directly (like we've e.g. done for the
extension chaining when adding lmem support).
Thanks, Daniel
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++++++++++++++
> drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
> drivers/gpu/drm/i915/i915_query.c | 22 ++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> include/uapi/drm/i915_drm.h | 1 +
> 5 files changed, 40 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 2161bf01ef8b..708bb3581d83 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -704,3 +704,18 @@ void intel_gt_info_print(const struct intel_gt_info *info,
>
> intel_sseu_dump(&info->sseu, p);
> }
> +
> +int intel_gt_get_l3bank_count(struct intel_gt *gt)
> +{
> + struct drm_i915_private *i915 = gt->i915;
> + intel_wakeref_t wakeref;
> + u32 fuse3;
> +
> + if (GRAPHICS_VER(i915) < 12)
> + return -ENODEV;
> +
> + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> + fuse3 = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
> +
> + return hweight32(REG_FIELD_GET(GEN12_GT_L3_MODE_MASK, ~fuse3));
> +}
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 7ec395cace69..46aa1cf4cf30 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -77,6 +77,7 @@ static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
>
> void intel_gt_info_print(const struct intel_gt_info *info,
> struct drm_printer *p);
> +int intel_gt_get_l3bank_count(struct intel_gt *gt);
>
> void intel_gt_watchdog_work(struct work_struct *work);
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 96bd8fb3e895..0e92bb2d21b2 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -10,6 +10,7 @@
> #include "i915_perf.h"
> #include "i915_query.h"
> #include <uapi/drm/i915_drm.h>
> +#include "gt/intel_gt.h"
>
> static int copy_query_item(void *query_hdr, size_t query_sz,
> u32 total_length,
> @@ -502,6 +503,26 @@ static int query_hwconfig_table(struct drm_i915_private *i915,
> return hwconfig->size;
> }
>
> +static int query_l3banks(struct drm_i915_private *i915,
> + struct drm_i915_query_item *query_item)
> +{
> + u32 banks;
> +
> + if (query_item->length == 0)
> + return sizeof(banks);
> +
> + if (query_item->length < sizeof(banks))
> + return -EINVAL;
> +
> + banks = intel_gt_get_l3bank_count(&i915->gt);
> +
> + if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
> + &banks, sizeof(banks)))
> + return -EFAULT;
> +
> + return sizeof(banks);
> +}
> +
> static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> struct drm_i915_query_item *query_item) = {
> query_topology_info,
> @@ -509,6 +530,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> query_perf_config,
> query_memregion_info,
> query_hwconfig_table,
> + query_l3banks,
> };
>
> int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index eb13c601d680..e9ba88fe3db7 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3099,6 +3099,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> #define GEN10_MIRROR_FUSE3 _MMIO(0x9118)
> #define GEN10_L3BANK_PAIR_COUNT 4
> #define GEN10_L3BANK_MASK 0x0F
> +#define GEN12_GT_L3_MODE_MASK 0xFF
>
> #define GEN8_EU_DISABLE0 _MMIO(0x9134)
> #define GEN8_EU_DIS0_S0_MASK 0xffffff
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 87d369cae22a..20d18cca5066 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -2234,6 +2234,7 @@ struct drm_i915_query_item {
> #define DRM_I915_QUERY_PERF_CONFIG 3
> #define DRM_I915_QUERY_MEMORY_REGIONS 4
> #define DRM_I915_QUERY_HWCONFIG_TABLE 5
> +#define DRM_I915_QUERY_L3_BANK_COUNT 6
> /* Must be kept compact -- no holes and well documented */
>
> /**
> --
> 2.25.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
@ 2021-06-16 10:25 ` Daniel Vetter
0 siblings, 0 replies; 16+ messages in thread
From: Daniel Vetter @ 2021-06-16 10:25 UTC (permalink / raw)
To: John Harrison; +Cc: intel-gfx, dri-devel
On Thu, Jun 10, 2021 at 10:46 PM <John.C.Harrison@intel.com> wrote:
>
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Various UMDs need to know the L3 bank count. So add a query API for it.
Please link to both the igt test submission for this (there's not even
a Test-with: on the cover letter) and the merge requests for the
various UMD which uses new uapi. Also as other mentioned, full uapi
kerneldoc is needed too. Please fill in any gaps in the existing docs
that relate to your addition directly (like we've e.g. done for the
extension chaining when adding lmem support).
Thanks, Daniel
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++++++++++++++
> drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
> drivers/gpu/drm/i915/i915_query.c | 22 ++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> include/uapi/drm/i915_drm.h | 1 +
> 5 files changed, 40 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 2161bf01ef8b..708bb3581d83 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -704,3 +704,18 @@ void intel_gt_info_print(const struct intel_gt_info *info,
>
> intel_sseu_dump(&info->sseu, p);
> }
> +
> +int intel_gt_get_l3bank_count(struct intel_gt *gt)
> +{
> + struct drm_i915_private *i915 = gt->i915;
> + intel_wakeref_t wakeref;
> + u32 fuse3;
> +
> + if (GRAPHICS_VER(i915) < 12)
> + return -ENODEV;
> +
> + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> + fuse3 = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
> +
> + return hweight32(REG_FIELD_GET(GEN12_GT_L3_MODE_MASK, ~fuse3));
> +}
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 7ec395cace69..46aa1cf4cf30 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -77,6 +77,7 @@ static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
>
> void intel_gt_info_print(const struct intel_gt_info *info,
> struct drm_printer *p);
> +int intel_gt_get_l3bank_count(struct intel_gt *gt);
>
> void intel_gt_watchdog_work(struct work_struct *work);
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 96bd8fb3e895..0e92bb2d21b2 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -10,6 +10,7 @@
> #include "i915_perf.h"
> #include "i915_query.h"
> #include <uapi/drm/i915_drm.h>
> +#include "gt/intel_gt.h"
>
> static int copy_query_item(void *query_hdr, size_t query_sz,
> u32 total_length,
> @@ -502,6 +503,26 @@ static int query_hwconfig_table(struct drm_i915_private *i915,
> return hwconfig->size;
> }
>
> +static int query_l3banks(struct drm_i915_private *i915,
> + struct drm_i915_query_item *query_item)
> +{
> + u32 banks;
> +
> + if (query_item->length == 0)
> + return sizeof(banks);
> +
> + if (query_item->length < sizeof(banks))
> + return -EINVAL;
> +
> + banks = intel_gt_get_l3bank_count(&i915->gt);
> +
> + if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
> + &banks, sizeof(banks)))
> + return -EFAULT;
> +
> + return sizeof(banks);
> +}
> +
> static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> struct drm_i915_query_item *query_item) = {
> query_topology_info,
> @@ -509,6 +530,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> query_perf_config,
> query_memregion_info,
> query_hwconfig_table,
> + query_l3banks,
> };
>
> int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index eb13c601d680..e9ba88fe3db7 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3099,6 +3099,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> #define GEN10_MIRROR_FUSE3 _MMIO(0x9118)
> #define GEN10_L3BANK_PAIR_COUNT 4
> #define GEN10_L3BANK_MASK 0x0F
> +#define GEN12_GT_L3_MODE_MASK 0xFF
>
> #define GEN8_EU_DISABLE0 _MMIO(0x9134)
> #define GEN8_EU_DIS0_S0_MASK 0xffffff
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 87d369cae22a..20d18cca5066 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -2234,6 +2234,7 @@ struct drm_i915_query_item {
> #define DRM_I915_QUERY_PERF_CONFIG 3
> #define DRM_I915_QUERY_MEMORY_REGIONS 4
> #define DRM_I915_QUERY_HWCONFIG_TABLE 5
> +#define DRM_I915_QUERY_L3_BANK_COUNT 6
> /* Must be kept compact -- no holes and well documented */
>
> /**
> --
> 2.25.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
2021-06-10 20:46 ` [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count John.C.Harrison
@ 2021-06-16 10:08 ` Tvrtko Ursulin
2021-06-10 23:03 ` Michal Wajdeczko
` (3 subsequent siblings)
4 siblings, 0 replies; 16+ messages in thread
From: Tvrtko Ursulin @ 2021-06-16 10:08 UTC (permalink / raw)
To: John.C.Harrison, Intel-GFX; +Cc: DRI-Devel
On 10/06/2021 21:46, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Various UMDs need to know the L3 bank count. So add a query API for it.
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++++++++++++++
> drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
> drivers/gpu/drm/i915/i915_query.c | 22 ++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> include/uapi/drm/i915_drm.h | 1 +
> 5 files changed, 40 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 2161bf01ef8b..708bb3581d83 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -704,3 +704,18 @@ void intel_gt_info_print(const struct intel_gt_info *info,
>
> intel_sseu_dump(&info->sseu, p);
> }
> +
> +int intel_gt_get_l3bank_count(struct intel_gt *gt)
> +{
> + struct drm_i915_private *i915 = gt->i915;
> + intel_wakeref_t wakeref;
> + u32 fuse3;
> +
> + if (GRAPHICS_VER(i915) < 12)
> + return -ENODEV;
> +
> + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> + fuse3 = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
> +
> + return hweight32(REG_FIELD_GET(GEN12_GT_L3_MODE_MASK, ~fuse3));
> +}
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 7ec395cace69..46aa1cf4cf30 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -77,6 +77,7 @@ static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
>
> void intel_gt_info_print(const struct intel_gt_info *info,
> struct drm_printer *p);
> +int intel_gt_get_l3bank_count(struct intel_gt *gt);
>
> void intel_gt_watchdog_work(struct work_struct *work);
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 96bd8fb3e895..0e92bb2d21b2 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -10,6 +10,7 @@
> #include "i915_perf.h"
> #include "i915_query.h"
> #include <uapi/drm/i915_drm.h>
> +#include "gt/intel_gt.h"
>
> static int copy_query_item(void *query_hdr, size_t query_sz,
> u32 total_length,
> @@ -502,6 +503,26 @@ static int query_hwconfig_table(struct drm_i915_private *i915,
> return hwconfig->size;
> }
>
> +static int query_l3banks(struct drm_i915_private *i915,
> + struct drm_i915_query_item *query_item)
> +{
> + u32 banks;
> +
> + if (query_item->length == 0)
> + return sizeof(banks);
> +
> + if (query_item->length < sizeof(banks))
> + return -EINVAL;
> +
> + banks = intel_gt_get_l3bank_count(&i915->gt);
Having spotted i915->gt I am thinking whether this should be future
proofed to take, say, struct i915_engine_class_instance as input. If one
need different GTs will have different L3 config. Alternative is adding
a new query at that point. No strong opinion either way.
Otherwise yes, I agree with adding flags mbz check and documenting the
uapi as other people have suggested.
Regards,
Tvrtko
> +
> + if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
> + &banks, sizeof(banks)))
> + return -EFAULT;
> +
> + return sizeof(banks);
> +}
> +
> static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> struct drm_i915_query_item *query_item) = {
> query_topology_info,
> @@ -509,6 +530,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> query_perf_config,
> query_memregion_info,
> query_hwconfig_table,
> + query_l3banks,
> };
>
> int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index eb13c601d680..e9ba88fe3db7 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3099,6 +3099,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> #define GEN10_MIRROR_FUSE3 _MMIO(0x9118)
> #define GEN10_L3BANK_PAIR_COUNT 4
> #define GEN10_L3BANK_MASK 0x0F
> +#define GEN12_GT_L3_MODE_MASK 0xFF
>
> #define GEN8_EU_DISABLE0 _MMIO(0x9134)
> #define GEN8_EU_DIS0_S0_MASK 0xffffff
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 87d369cae22a..20d18cca5066 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -2234,6 +2234,7 @@ struct drm_i915_query_item {
> #define DRM_I915_QUERY_PERF_CONFIG 3
> #define DRM_I915_QUERY_MEMORY_REGIONS 4
> #define DRM_I915_QUERY_HWCONFIG_TABLE 5
> +#define DRM_I915_QUERY_L3_BANK_COUNT 6
> /* Must be kept compact -- no holes and well documented */
>
> /**
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
@ 2021-06-16 10:08 ` Tvrtko Ursulin
0 siblings, 0 replies; 16+ messages in thread
From: Tvrtko Ursulin @ 2021-06-16 10:08 UTC (permalink / raw)
To: John.C.Harrison, Intel-GFX; +Cc: DRI-Devel
On 10/06/2021 21:46, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Various UMDs need to know the L3 bank count. So add a query API for it.
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++++++++++++++
> drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
> drivers/gpu/drm/i915/i915_query.c | 22 ++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> include/uapi/drm/i915_drm.h | 1 +
> 5 files changed, 40 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 2161bf01ef8b..708bb3581d83 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -704,3 +704,18 @@ void intel_gt_info_print(const struct intel_gt_info *info,
>
> intel_sseu_dump(&info->sseu, p);
> }
> +
> +int intel_gt_get_l3bank_count(struct intel_gt *gt)
> +{
> + struct drm_i915_private *i915 = gt->i915;
> + intel_wakeref_t wakeref;
> + u32 fuse3;
> +
> + if (GRAPHICS_VER(i915) < 12)
> + return -ENODEV;
> +
> + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> + fuse3 = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
> +
> + return hweight32(REG_FIELD_GET(GEN12_GT_L3_MODE_MASK, ~fuse3));
> +}
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 7ec395cace69..46aa1cf4cf30 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -77,6 +77,7 @@ static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
>
> void intel_gt_info_print(const struct intel_gt_info *info,
> struct drm_printer *p);
> +int intel_gt_get_l3bank_count(struct intel_gt *gt);
>
> void intel_gt_watchdog_work(struct work_struct *work);
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 96bd8fb3e895..0e92bb2d21b2 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -10,6 +10,7 @@
> #include "i915_perf.h"
> #include "i915_query.h"
> #include <uapi/drm/i915_drm.h>
> +#include "gt/intel_gt.h"
>
> static int copy_query_item(void *query_hdr, size_t query_sz,
> u32 total_length,
> @@ -502,6 +503,26 @@ static int query_hwconfig_table(struct drm_i915_private *i915,
> return hwconfig->size;
> }
>
> +static int query_l3banks(struct drm_i915_private *i915,
> + struct drm_i915_query_item *query_item)
> +{
> + u32 banks;
> +
> + if (query_item->length == 0)
> + return sizeof(banks);
> +
> + if (query_item->length < sizeof(banks))
> + return -EINVAL;
> +
> + banks = intel_gt_get_l3bank_count(&i915->gt);
Having spotted i915->gt I am thinking whether this should be future
proofed to take, say, struct i915_engine_class_instance as input. If one
need different GTs will have different L3 config. Alternative is adding
a new query at that point. No strong opinion either way.
Otherwise yes, I agree with adding flags mbz check and documenting the
uapi as other people have suggested.
Regards,
Tvrtko
> +
> + if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
> + &banks, sizeof(banks)))
> + return -EFAULT;
> +
> + return sizeof(banks);
> +}
> +
> static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> struct drm_i915_query_item *query_item) = {
> query_topology_info,
> @@ -509,6 +530,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> query_perf_config,
> query_memregion_info,
> query_hwconfig_table,
> + query_l3banks,
> };
>
> int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index eb13c601d680..e9ba88fe3db7 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3099,6 +3099,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> #define GEN10_MIRROR_FUSE3 _MMIO(0x9118)
> #define GEN10_L3BANK_PAIR_COUNT 4
> #define GEN10_L3BANK_MASK 0x0F
> +#define GEN12_GT_L3_MODE_MASK 0xFF
>
> #define GEN8_EU_DISABLE0 _MMIO(0x9134)
> #define GEN8_EU_DIS0_S0_MASK 0xffffff
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 87d369cae22a..20d18cca5066 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -2234,6 +2234,7 @@ struct drm_i915_query_item {
> #define DRM_I915_QUERY_PERF_CONFIG 3
> #define DRM_I915_QUERY_MEMORY_REGIONS 4
> #define DRM_I915_QUERY_HWCONFIG_TABLE 5
> +#define DRM_I915_QUERY_L3_BANK_COUNT 6
> /* Must be kept compact -- no holes and well documented */
>
> /**
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
2021-06-10 20:46 ` [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count John.C.Harrison
@ 2021-06-11 6:03 ` Lionel Landwerlin
2021-06-10 23:03 ` Michal Wajdeczko
` (3 subsequent siblings)
4 siblings, 0 replies; 16+ messages in thread
From: Lionel Landwerlin @ 2021-06-11 6:03 UTC (permalink / raw)
To: John.C.Harrison, Intel-GFX; +Cc: DRI-Devel
On 10/06/2021 23:46, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Various UMDs need to know the L3 bank count. So add a query API for it.
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++++++++++++++
> drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
> drivers/gpu/drm/i915/i915_query.c | 22 ++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> include/uapi/drm/i915_drm.h | 1 +
> 5 files changed, 40 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 2161bf01ef8b..708bb3581d83 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -704,3 +704,18 @@ void intel_gt_info_print(const struct intel_gt_info *info,
>
> intel_sseu_dump(&info->sseu, p);
> }
> +
> +int intel_gt_get_l3bank_count(struct intel_gt *gt)
> +{
> + struct drm_i915_private *i915 = gt->i915;
> + intel_wakeref_t wakeref;
> + u32 fuse3;
> +
> + if (GRAPHICS_VER(i915) < 12)
> + return -ENODEV;
> +
> + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> + fuse3 = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
> +
> + return hweight32(REG_FIELD_GET(GEN12_GT_L3_MODE_MASK, ~fuse3));
> +}
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 7ec395cace69..46aa1cf4cf30 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -77,6 +77,7 @@ static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
>
> void intel_gt_info_print(const struct intel_gt_info *info,
> struct drm_printer *p);
> +int intel_gt_get_l3bank_count(struct intel_gt *gt);
>
> void intel_gt_watchdog_work(struct work_struct *work);
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 96bd8fb3e895..0e92bb2d21b2 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -10,6 +10,7 @@
> #include "i915_perf.h"
> #include "i915_query.h"
> #include <uapi/drm/i915_drm.h>
> +#include "gt/intel_gt.h"
>
> static int copy_query_item(void *query_hdr, size_t query_sz,
> u32 total_length,
> @@ -502,6 +503,26 @@ static int query_hwconfig_table(struct drm_i915_private *i915,
> return hwconfig->size;
> }
>
> +static int query_l3banks(struct drm_i915_private *i915,
> + struct drm_i915_query_item *query_item)
> +{
> + u32 banks;
> +
> + if (query_item->length == 0)
> + return sizeof(banks);
> +
> + if (query_item->length < sizeof(banks))
> + return -EINVAL;
> +
> + banks = intel_gt_get_l3bank_count(&i915->gt);
> +
> + if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
> + &banks, sizeof(banks)))
> + return -EFAULT;
> +
> + return sizeof(banks);
> +}
> +
> static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> struct drm_i915_query_item *query_item) = {
> query_topology_info,
> @@ -509,6 +530,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> query_perf_config,
> query_memregion_info,
> query_hwconfig_table,
> + query_l3banks,
> };
>
> int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index eb13c601d680..e9ba88fe3db7 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3099,6 +3099,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> #define GEN10_MIRROR_FUSE3 _MMIO(0x9118)
> #define GEN10_L3BANK_PAIR_COUNT 4
> #define GEN10_L3BANK_MASK 0x0F
> +#define GEN12_GT_L3_MODE_MASK 0xFF
>
> #define GEN8_EU_DISABLE0 _MMIO(0x9134)
> #define GEN8_EU_DIS0_S0_MASK 0xffffff
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 87d369cae22a..20d18cca5066 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -2234,6 +2234,7 @@ struct drm_i915_query_item {
> #define DRM_I915_QUERY_PERF_CONFIG 3
> #define DRM_I915_QUERY_MEMORY_REGIONS 4
> #define DRM_I915_QUERY_HWCONFIG_TABLE 5
> +#define DRM_I915_QUERY_L3_BANK_COUNT 6
A little bit of documentation about the format of the return data would
be nice :)
-Lionel
> /* Must be kept compact -- no holes and well documented */
>
> /**
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
@ 2021-06-11 6:03 ` Lionel Landwerlin
0 siblings, 0 replies; 16+ messages in thread
From: Lionel Landwerlin @ 2021-06-11 6:03 UTC (permalink / raw)
To: John.C.Harrison, Intel-GFX; +Cc: DRI-Devel
On 10/06/2021 23:46, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Various UMDs need to know the L3 bank count. So add a query API for it.
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++++++++++++++
> drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
> drivers/gpu/drm/i915/i915_query.c | 22 ++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> include/uapi/drm/i915_drm.h | 1 +
> 5 files changed, 40 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 2161bf01ef8b..708bb3581d83 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -704,3 +704,18 @@ void intel_gt_info_print(const struct intel_gt_info *info,
>
> intel_sseu_dump(&info->sseu, p);
> }
> +
> +int intel_gt_get_l3bank_count(struct intel_gt *gt)
> +{
> + struct drm_i915_private *i915 = gt->i915;
> + intel_wakeref_t wakeref;
> + u32 fuse3;
> +
> + if (GRAPHICS_VER(i915) < 12)
> + return -ENODEV;
> +
> + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> + fuse3 = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
> +
> + return hweight32(REG_FIELD_GET(GEN12_GT_L3_MODE_MASK, ~fuse3));
> +}
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 7ec395cace69..46aa1cf4cf30 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -77,6 +77,7 @@ static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
>
> void intel_gt_info_print(const struct intel_gt_info *info,
> struct drm_printer *p);
> +int intel_gt_get_l3bank_count(struct intel_gt *gt);
>
> void intel_gt_watchdog_work(struct work_struct *work);
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 96bd8fb3e895..0e92bb2d21b2 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -10,6 +10,7 @@
> #include "i915_perf.h"
> #include "i915_query.h"
> #include <uapi/drm/i915_drm.h>
> +#include "gt/intel_gt.h"
>
> static int copy_query_item(void *query_hdr, size_t query_sz,
> u32 total_length,
> @@ -502,6 +503,26 @@ static int query_hwconfig_table(struct drm_i915_private *i915,
> return hwconfig->size;
> }
>
> +static int query_l3banks(struct drm_i915_private *i915,
> + struct drm_i915_query_item *query_item)
> +{
> + u32 banks;
> +
> + if (query_item->length == 0)
> + return sizeof(banks);
> +
> + if (query_item->length < sizeof(banks))
> + return -EINVAL;
> +
> + banks = intel_gt_get_l3bank_count(&i915->gt);
> +
> + if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
> + &banks, sizeof(banks)))
> + return -EFAULT;
> +
> + return sizeof(banks);
> +}
> +
> static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> struct drm_i915_query_item *query_item) = {
> query_topology_info,
> @@ -509,6 +530,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> query_perf_config,
> query_memregion_info,
> query_hwconfig_table,
> + query_l3banks,
> };
>
> int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index eb13c601d680..e9ba88fe3db7 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3099,6 +3099,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> #define GEN10_MIRROR_FUSE3 _MMIO(0x9118)
> #define GEN10_L3BANK_PAIR_COUNT 4
> #define GEN10_L3BANK_MASK 0x0F
> +#define GEN12_GT_L3_MODE_MASK 0xFF
>
> #define GEN8_EU_DISABLE0 _MMIO(0x9134)
> #define GEN8_EU_DIS0_S0_MASK 0xffffff
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 87d369cae22a..20d18cca5066 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -2234,6 +2234,7 @@ struct drm_i915_query_item {
> #define DRM_I915_QUERY_PERF_CONFIG 3
> #define DRM_I915_QUERY_MEMORY_REGIONS 4
> #define DRM_I915_QUERY_HWCONFIG_TABLE 5
> +#define DRM_I915_QUERY_L3_BANK_COUNT 6
A little bit of documentation about the format of the return data would
be nice :)
-Lionel
> /* Must be kept compact -- no holes and well documented */
>
> /**
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
2021-06-10 20:46 ` [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count John.C.Harrison
@ 2021-06-10 23:03 ` Michal Wajdeczko
2021-06-10 23:03 ` Michal Wajdeczko
` (3 subsequent siblings)
4 siblings, 0 replies; 16+ messages in thread
From: Michal Wajdeczko @ 2021-06-10 23:03 UTC (permalink / raw)
To: John.C.Harrison, Intel-GFX; +Cc: DRI-Devel
On 10.06.2021 22:46, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Various UMDs need to know the L3 bank count. So add a query API for it.
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++++++++++++++
> drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
> drivers/gpu/drm/i915/i915_query.c | 22 ++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> include/uapi/drm/i915_drm.h | 1 +
> 5 files changed, 40 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 2161bf01ef8b..708bb3581d83 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -704,3 +704,18 @@ void intel_gt_info_print(const struct intel_gt_info *info,
>
> intel_sseu_dump(&info->sseu, p);
> }
> +
> +int intel_gt_get_l3bank_count(struct intel_gt *gt)
> +{
> + struct drm_i915_private *i915 = gt->i915;
> + intel_wakeref_t wakeref;
> + u32 fuse3;
> +
> + if (GRAPHICS_VER(i915) < 12)
> + return -ENODEV;
> +
> + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> + fuse3 = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
> +
> + return hweight32(REG_FIELD_GET(GEN12_GT_L3_MODE_MASK, ~fuse3));
> +}
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 7ec395cace69..46aa1cf4cf30 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -77,6 +77,7 @@ static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
>
> void intel_gt_info_print(const struct intel_gt_info *info,
> struct drm_printer *p);
> +int intel_gt_get_l3bank_count(struct intel_gt *gt);
>
> void intel_gt_watchdog_work(struct work_struct *work);
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 96bd8fb3e895..0e92bb2d21b2 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -10,6 +10,7 @@
> #include "i915_perf.h"
> #include "i915_query.h"
> #include <uapi/drm/i915_drm.h>
> +#include "gt/intel_gt.h"
>
> static int copy_query_item(void *query_hdr, size_t query_sz,
> u32 total_length,
> @@ -502,6 +503,26 @@ static int query_hwconfig_table(struct drm_i915_private *i915,
> return hwconfig->size;
> }
>
> +static int query_l3banks(struct drm_i915_private *i915,
> + struct drm_i915_query_item *query_item)
> +{
> + u32 banks;
likely we also need to check:
if (query_item->flags != 0)
return -EINVAL;
> +
> + if (query_item->length == 0)
> + return sizeof(banks);
> +
> + if (query_item->length < sizeof(banks))
> + return -EINVAL;
> +
> + banks = intel_gt_get_l3bank_count(&i915->gt);
> +
> + if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
> + &banks, sizeof(banks)))
> + return -EFAULT;
> +
> + return sizeof(banks);
> +}
> +
> static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> struct drm_i915_query_item *query_item) = {
> query_topology_info,
> @@ -509,6 +530,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> query_perf_config,
> query_memregion_info,
> query_hwconfig_table,
> + query_l3banks,
> };
>
> int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index eb13c601d680..e9ba88fe3db7 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3099,6 +3099,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> #define GEN10_MIRROR_FUSE3 _MMIO(0x9118)
> #define GEN10_L3BANK_PAIR_COUNT 4
> #define GEN10_L3BANK_MASK 0x0F
> +#define GEN12_GT_L3_MODE_MASK 0xFF
>
> #define GEN8_EU_DISABLE0 _MMIO(0x9134)
> #define GEN8_EU_DIS0_S0_MASK 0xffffff
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 87d369cae22a..20d18cca5066 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -2234,6 +2234,7 @@ struct drm_i915_query_item {
> #define DRM_I915_QUERY_PERF_CONFIG 3
> #define DRM_I915_QUERY_MEMORY_REGIONS 4
> #define DRM_I915_QUERY_HWCONFIG_TABLE 5
> +#define DRM_I915_QUERY_L3_BANK_COUNT 6
> /* Must be kept compact -- no holes and well documented */
>
> /**
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
@ 2021-06-10 23:03 ` Michal Wajdeczko
0 siblings, 0 replies; 16+ messages in thread
From: Michal Wajdeczko @ 2021-06-10 23:03 UTC (permalink / raw)
To: John.C.Harrison, Intel-GFX; +Cc: DRI-Devel
On 10.06.2021 22:46, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Various UMDs need to know the L3 bank count. So add a query API for it.
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++++++++++++++
> drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
> drivers/gpu/drm/i915/i915_query.c | 22 ++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> include/uapi/drm/i915_drm.h | 1 +
> 5 files changed, 40 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 2161bf01ef8b..708bb3581d83 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -704,3 +704,18 @@ void intel_gt_info_print(const struct intel_gt_info *info,
>
> intel_sseu_dump(&info->sseu, p);
> }
> +
> +int intel_gt_get_l3bank_count(struct intel_gt *gt)
> +{
> + struct drm_i915_private *i915 = gt->i915;
> + intel_wakeref_t wakeref;
> + u32 fuse3;
> +
> + if (GRAPHICS_VER(i915) < 12)
> + return -ENODEV;
> +
> + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> + fuse3 = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
> +
> + return hweight32(REG_FIELD_GET(GEN12_GT_L3_MODE_MASK, ~fuse3));
> +}
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 7ec395cace69..46aa1cf4cf30 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -77,6 +77,7 @@ static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
>
> void intel_gt_info_print(const struct intel_gt_info *info,
> struct drm_printer *p);
> +int intel_gt_get_l3bank_count(struct intel_gt *gt);
>
> void intel_gt_watchdog_work(struct work_struct *work);
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 96bd8fb3e895..0e92bb2d21b2 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -10,6 +10,7 @@
> #include "i915_perf.h"
> #include "i915_query.h"
> #include <uapi/drm/i915_drm.h>
> +#include "gt/intel_gt.h"
>
> static int copy_query_item(void *query_hdr, size_t query_sz,
> u32 total_length,
> @@ -502,6 +503,26 @@ static int query_hwconfig_table(struct drm_i915_private *i915,
> return hwconfig->size;
> }
>
> +static int query_l3banks(struct drm_i915_private *i915,
> + struct drm_i915_query_item *query_item)
> +{
> + u32 banks;
likely we also need to check:
if (query_item->flags != 0)
return -EINVAL;
> +
> + if (query_item->length == 0)
> + return sizeof(banks);
> +
> + if (query_item->length < sizeof(banks))
> + return -EINVAL;
> +
> + banks = intel_gt_get_l3bank_count(&i915->gt);
> +
> + if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
> + &banks, sizeof(banks)))
> + return -EFAULT;
> +
> + return sizeof(banks);
> +}
> +
> static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> struct drm_i915_query_item *query_item) = {
> query_topology_info,
> @@ -509,6 +530,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> query_perf_config,
> query_memregion_info,
> query_hwconfig_table,
> + query_l3banks,
> };
>
> int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index eb13c601d680..e9ba88fe3db7 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3099,6 +3099,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> #define GEN10_MIRROR_FUSE3 _MMIO(0x9118)
> #define GEN10_L3BANK_PAIR_COUNT 4
> #define GEN10_L3BANK_MASK 0x0F
> +#define GEN12_GT_L3_MODE_MASK 0xFF
>
> #define GEN8_EU_DISABLE0 _MMIO(0x9134)
> #define GEN8_EU_DIS0_S0_MASK 0xffffff
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 87d369cae22a..20d18cca5066 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -2234,6 +2234,7 @@ struct drm_i915_query_item {
> #define DRM_I915_QUERY_PERF_CONFIG 3
> #define DRM_I915_QUERY_MEMORY_REGIONS 4
> #define DRM_I915_QUERY_HWCONFIG_TABLE 5
> +#define DRM_I915_QUERY_L3_BANK_COUNT 6
> /* Must be kept compact -- no holes and well documented */
>
> /**
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
2021-06-10 20:46 ` [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count John.C.Harrison
@ 2021-06-10 22:09 ` Matthew Brost
2021-06-10 23:03 ` Michal Wajdeczko
` (3 subsequent siblings)
4 siblings, 0 replies; 16+ messages in thread
From: Matthew Brost @ 2021-06-10 22:09 UTC (permalink / raw)
To: John.C.Harrison; +Cc: Intel-GFX, DRI-Devel
On Thu, Jun 10, 2021 at 01:46:26PM -0700, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Various UMDs need to know the L3 bank count. So add a query API for it.
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++++++++++++++
> drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
> drivers/gpu/drm/i915/i915_query.c | 22 ++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> include/uapi/drm/i915_drm.h | 1 +
> 5 files changed, 40 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 2161bf01ef8b..708bb3581d83 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -704,3 +704,18 @@ void intel_gt_info_print(const struct intel_gt_info *info,
>
> intel_sseu_dump(&info->sseu, p);
> }
> +
> +int intel_gt_get_l3bank_count(struct intel_gt *gt)
Small nit, this function is ..'l3bank_count' while the define for query
is ..'L3_BANK_COUNT'. I'm thinking this function should have a space
between l3 & bank for consistency.
> +{
> + struct drm_i915_private *i915 = gt->i915;
> + intel_wakeref_t wakeref;
> + u32 fuse3;
> +
> + if (GRAPHICS_VER(i915) < 12)
> + return -ENODEV;
> +
> + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> + fuse3 = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
> +
> + return hweight32(REG_FIELD_GET(GEN12_GT_L3_MODE_MASK, ~fuse3));
> +}
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 7ec395cace69..46aa1cf4cf30 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -77,6 +77,7 @@ static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
>
> void intel_gt_info_print(const struct intel_gt_info *info,
> struct drm_printer *p);
> +int intel_gt_get_l3bank_count(struct intel_gt *gt);
>
> void intel_gt_watchdog_work(struct work_struct *work);
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 96bd8fb3e895..0e92bb2d21b2 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -10,6 +10,7 @@
> #include "i915_perf.h"
> #include "i915_query.h"
> #include <uapi/drm/i915_drm.h>
> +#include "gt/intel_gt.h"
>
> static int copy_query_item(void *query_hdr, size_t query_sz,
> u32 total_length,
> @@ -502,6 +503,26 @@ static int query_hwconfig_table(struct drm_i915_private *i915,
> return hwconfig->size;
> }
>
> +static int query_l3banks(struct drm_i915_private *i915,
> + struct drm_i915_query_item *query_item)
> +{
> + u32 banks;
> +
> + if (query_item->length == 0)
> + return sizeof(banks);
> +
> + if (query_item->length < sizeof(banks))
> + return -EINVAL;
> +
> + banks = intel_gt_get_l3bank_count(&i915->gt);
> +
> + if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
> + &banks, sizeof(banks)))
> + return -EFAULT;
> +
> + return sizeof(banks);
> +}
> +
> static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> struct drm_i915_query_item *query_item) = {
> query_topology_info,
> @@ -509,6 +530,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> query_perf_config,
> query_memregion_info,
> query_hwconfig_table,
> + query_l3banks,
Another nit, for consistency query_l3banks -> query_l3_bank_count.
With these nits fixed:
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> };
>
> int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index eb13c601d680..e9ba88fe3db7 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3099,6 +3099,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> #define GEN10_MIRROR_FUSE3 _MMIO(0x9118)
> #define GEN10_L3BANK_PAIR_COUNT 4
> #define GEN10_L3BANK_MASK 0x0F
> +#define GEN12_GT_L3_MODE_MASK 0xFF
>
> #define GEN8_EU_DISABLE0 _MMIO(0x9134)
> #define GEN8_EU_DIS0_S0_MASK 0xffffff
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 87d369cae22a..20d18cca5066 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -2234,6 +2234,7 @@ struct drm_i915_query_item {
> #define DRM_I915_QUERY_PERF_CONFIG 3
> #define DRM_I915_QUERY_MEMORY_REGIONS 4
> #define DRM_I915_QUERY_HWCONFIG_TABLE 5
> +#define DRM_I915_QUERY_L3_BANK_COUNT 6
> /* Must be kept compact -- no holes and well documented */
>
> /**
> --
> 2.25.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
@ 2021-06-10 22:09 ` Matthew Brost
0 siblings, 0 replies; 16+ messages in thread
From: Matthew Brost @ 2021-06-10 22:09 UTC (permalink / raw)
To: John.C.Harrison; +Cc: Intel-GFX, DRI-Devel
On Thu, Jun 10, 2021 at 01:46:26PM -0700, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Various UMDs need to know the L3 bank count. So add a query API for it.
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++++++++++++++
> drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
> drivers/gpu/drm/i915/i915_query.c | 22 ++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> include/uapi/drm/i915_drm.h | 1 +
> 5 files changed, 40 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 2161bf01ef8b..708bb3581d83 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -704,3 +704,18 @@ void intel_gt_info_print(const struct intel_gt_info *info,
>
> intel_sseu_dump(&info->sseu, p);
> }
> +
> +int intel_gt_get_l3bank_count(struct intel_gt *gt)
Small nit, this function is ..'l3bank_count' while the define for query
is ..'L3_BANK_COUNT'. I'm thinking this function should have a space
between l3 & bank for consistency.
> +{
> + struct drm_i915_private *i915 = gt->i915;
> + intel_wakeref_t wakeref;
> + u32 fuse3;
> +
> + if (GRAPHICS_VER(i915) < 12)
> + return -ENODEV;
> +
> + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> + fuse3 = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
> +
> + return hweight32(REG_FIELD_GET(GEN12_GT_L3_MODE_MASK, ~fuse3));
> +}
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 7ec395cace69..46aa1cf4cf30 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -77,6 +77,7 @@ static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
>
> void intel_gt_info_print(const struct intel_gt_info *info,
> struct drm_printer *p);
> +int intel_gt_get_l3bank_count(struct intel_gt *gt);
>
> void intel_gt_watchdog_work(struct work_struct *work);
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 96bd8fb3e895..0e92bb2d21b2 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -10,6 +10,7 @@
> #include "i915_perf.h"
> #include "i915_query.h"
> #include <uapi/drm/i915_drm.h>
> +#include "gt/intel_gt.h"
>
> static int copy_query_item(void *query_hdr, size_t query_sz,
> u32 total_length,
> @@ -502,6 +503,26 @@ static int query_hwconfig_table(struct drm_i915_private *i915,
> return hwconfig->size;
> }
>
> +static int query_l3banks(struct drm_i915_private *i915,
> + struct drm_i915_query_item *query_item)
> +{
> + u32 banks;
> +
> + if (query_item->length == 0)
> + return sizeof(banks);
> +
> + if (query_item->length < sizeof(banks))
> + return -EINVAL;
> +
> + banks = intel_gt_get_l3bank_count(&i915->gt);
> +
> + if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
> + &banks, sizeof(banks)))
> + return -EFAULT;
> +
> + return sizeof(banks);
> +}
> +
> static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> struct drm_i915_query_item *query_item) = {
> query_topology_info,
> @@ -509,6 +530,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
> query_perf_config,
> query_memregion_info,
> query_hwconfig_table,
> + query_l3banks,
Another nit, for consistency query_l3banks -> query_l3_bank_count.
With these nits fixed:
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> };
>
> int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index eb13c601d680..e9ba88fe3db7 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3099,6 +3099,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> #define GEN10_MIRROR_FUSE3 _MMIO(0x9118)
> #define GEN10_L3BANK_PAIR_COUNT 4
> #define GEN10_L3BANK_MASK 0x0F
> +#define GEN12_GT_L3_MODE_MASK 0xFF
>
> #define GEN8_EU_DISABLE0 _MMIO(0x9134)
> #define GEN8_EU_DIS0_S0_MASK 0xffffff
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 87d369cae22a..20d18cca5066 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -2234,6 +2234,7 @@ struct drm_i915_query_item {
> #define DRM_I915_QUERY_PERF_CONFIG 3
> #define DRM_I915_QUERY_MEMORY_REGIONS 4
> #define DRM_I915_QUERY_HWCONFIG_TABLE 5
> +#define DRM_I915_QUERY_L3_BANK_COUNT 6
> /* Must be kept compact -- no holes and well documented */
>
> /**
> --
> 2.25.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 16+ messages in thread
* [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
2021-06-10 20:46 [PATCH 0/3] Add support for querying hw info that UMDs need John.C.Harrison
@ 2021-06-10 20:46 ` John.C.Harrison
2021-06-10 22:09 ` Matthew Brost
` (4 more replies)
0 siblings, 5 replies; 16+ messages in thread
From: John.C.Harrison @ 2021-06-10 20:46 UTC (permalink / raw)
To: Intel-GFX; +Cc: DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
Various UMDs need to know the L3 bank count. So add a query API for it.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++++++++++++++
drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
drivers/gpu/drm/i915/i915_query.c | 22 ++++++++++++++++++++++
drivers/gpu/drm/i915/i915_reg.h | 1 +
include/uapi/drm/i915_drm.h | 1 +
5 files changed, 40 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 2161bf01ef8b..708bb3581d83 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -704,3 +704,18 @@ void intel_gt_info_print(const struct intel_gt_info *info,
intel_sseu_dump(&info->sseu, p);
}
+
+int intel_gt_get_l3bank_count(struct intel_gt *gt)
+{
+ struct drm_i915_private *i915 = gt->i915;
+ intel_wakeref_t wakeref;
+ u32 fuse3;
+
+ if (GRAPHICS_VER(i915) < 12)
+ return -ENODEV;
+
+ with_intel_runtime_pm(gt->uncore->rpm, wakeref)
+ fuse3 = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
+
+ return hweight32(REG_FIELD_GET(GEN12_GT_L3_MODE_MASK, ~fuse3));
+}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
index 7ec395cace69..46aa1cf4cf30 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -77,6 +77,7 @@ static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
void intel_gt_info_print(const struct intel_gt_info *info,
struct drm_printer *p);
+int intel_gt_get_l3bank_count(struct intel_gt *gt);
void intel_gt_watchdog_work(struct work_struct *work);
diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
index 96bd8fb3e895..0e92bb2d21b2 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -10,6 +10,7 @@
#include "i915_perf.h"
#include "i915_query.h"
#include <uapi/drm/i915_drm.h>
+#include "gt/intel_gt.h"
static int copy_query_item(void *query_hdr, size_t query_sz,
u32 total_length,
@@ -502,6 +503,26 @@ static int query_hwconfig_table(struct drm_i915_private *i915,
return hwconfig->size;
}
+static int query_l3banks(struct drm_i915_private *i915,
+ struct drm_i915_query_item *query_item)
+{
+ u32 banks;
+
+ if (query_item->length == 0)
+ return sizeof(banks);
+
+ if (query_item->length < sizeof(banks))
+ return -EINVAL;
+
+ banks = intel_gt_get_l3bank_count(&i915->gt);
+
+ if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
+ &banks, sizeof(banks)))
+ return -EFAULT;
+
+ return sizeof(banks);
+}
+
static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
struct drm_i915_query_item *query_item) = {
query_topology_info,
@@ -509,6 +530,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
query_perf_config,
query_memregion_info,
query_hwconfig_table,
+ query_l3banks,
};
int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index eb13c601d680..e9ba88fe3db7 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3099,6 +3099,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
#define GEN10_MIRROR_FUSE3 _MMIO(0x9118)
#define GEN10_L3BANK_PAIR_COUNT 4
#define GEN10_L3BANK_MASK 0x0F
+#define GEN12_GT_L3_MODE_MASK 0xFF
#define GEN8_EU_DISABLE0 _MMIO(0x9134)
#define GEN8_EU_DIS0_S0_MASK 0xffffff
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 87d369cae22a..20d18cca5066 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -2234,6 +2234,7 @@ struct drm_i915_query_item {
#define DRM_I915_QUERY_PERF_CONFIG 3
#define DRM_I915_QUERY_MEMORY_REGIONS 4
#define DRM_I915_QUERY_HWCONFIG_TABLE 5
+#define DRM_I915_QUERY_L3_BANK_COUNT 6
/* Must be kept compact -- no holes and well documented */
/**
--
2.25.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 16+ messages in thread
end of thread, other threads:[~2021-07-20 12:58 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-16 11:06 [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count kernel test robot
-- strict thread matches above, loose matches on Subject: below --
2021-06-10 20:46 [PATCH 0/3] Add support for querying hw info that UMDs need John.C.Harrison
2021-06-10 20:46 ` [Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count John.C.Harrison
2021-06-10 22:09 ` Matthew Brost
2021-06-10 22:09 ` Matthew Brost
2021-06-10 23:03 ` Michal Wajdeczko
2021-06-10 23:03 ` Michal Wajdeczko
2021-06-11 6:03 ` Lionel Landwerlin
2021-06-11 6:03 ` Lionel Landwerlin
2021-06-16 10:08 ` Tvrtko Ursulin
2021-06-16 10:08 ` Tvrtko Ursulin
2021-06-16 10:25 ` Daniel Vetter
2021-06-16 10:25 ` Daniel Vetter
2021-07-15 22:16 ` John Harrison
2021-07-15 22:16 ` John Harrison
2021-07-20 12:58 ` Daniel Vetter
2021-07-20 12:58 ` Daniel Vetter
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