From: Matteo Croce <mcroce@linux.microsoft.com> To: linux-riscv@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Atish Patra <atish.patra@wdc.com>, Emil Renner Berthing <kernel@esmil.dk>, Akira Tsukamoto <akira.tsukamoto@gmail.com>, Drew Fustini <drew@beagleboard.org>, Bin Meng <bmeng.cn@gmail.com>, David Laight <David.Laight@aculab.com>, Guo Ren <guoren@kernel.org> Subject: [PATCH v3 0/3] riscv: optimized mem* functions Date: Thu, 17 Jun 2021 17:27:51 +0200 [thread overview] Message-ID: <20210617152754.17960-1-mcroce@linux.microsoft.com> (raw) From: Matteo Croce <mcroce@microsoft.com> Replace the assembly mem{cpy,move,set} with C equivalent. Try to access RAM with the largest bit width possible, but without doing unaligned accesses. Tested on a BeagleV Starlight with a SiFive U74 core, where the improvement is noticeable. v2 -> v3: - alias mem* to __mem* and not viceversa - use __alias instead of a tail call v1 -> v2: - reduce the threshold from 64 to 16 bytes - fix KASAN build - optimize memset Matteo Croce (3): riscv: optimized memcpy riscv: optimized memmove riscv: optimized memset arch/riscv/include/asm/string.h | 18 ++-- arch/riscv/kernel/Makefile | 1 - arch/riscv/kernel/riscv_ksyms.c | 17 ---- arch/riscv/lib/Makefile | 4 +- arch/riscv/lib/memcpy.S | 108 ---------------------- arch/riscv/lib/memmove.S | 64 ------------- arch/riscv/lib/memset.S | 113 ----------------------- arch/riscv/lib/string.c | 153 ++++++++++++++++++++++++++++++++ 8 files changed, 163 insertions(+), 315 deletions(-) delete mode 100644 arch/riscv/kernel/riscv_ksyms.c delete mode 100644 arch/riscv/lib/memcpy.S delete mode 100644 arch/riscv/lib/memmove.S delete mode 100644 arch/riscv/lib/memset.S create mode 100644 arch/riscv/lib/string.c -- 2.31.1
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From: Matteo Croce <mcroce@linux.microsoft.com> To: linux-riscv@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Atish Patra <atish.patra@wdc.com>, Emil Renner Berthing <kernel@esmil.dk>, Akira Tsukamoto <akira.tsukamoto@gmail.com>, Drew Fustini <drew@beagleboard.org>, Bin Meng <bmeng.cn@gmail.com>, David Laight <David.Laight@aculab.com>, Guo Ren <guoren@kernel.org> Subject: [PATCH v3 0/3] riscv: optimized mem* functions Date: Thu, 17 Jun 2021 17:27:51 +0200 [thread overview] Message-ID: <20210617152754.17960-1-mcroce@linux.microsoft.com> (raw) From: Matteo Croce <mcroce@microsoft.com> Replace the assembly mem{cpy,move,set} with C equivalent. Try to access RAM with the largest bit width possible, but without doing unaligned accesses. Tested on a BeagleV Starlight with a SiFive U74 core, where the improvement is noticeable. v2 -> v3: - alias mem* to __mem* and not viceversa - use __alias instead of a tail call v1 -> v2: - reduce the threshold from 64 to 16 bytes - fix KASAN build - optimize memset Matteo Croce (3): riscv: optimized memcpy riscv: optimized memmove riscv: optimized memset arch/riscv/include/asm/string.h | 18 ++-- arch/riscv/kernel/Makefile | 1 - arch/riscv/kernel/riscv_ksyms.c | 17 ---- arch/riscv/lib/Makefile | 4 +- arch/riscv/lib/memcpy.S | 108 ---------------------- arch/riscv/lib/memmove.S | 64 ------------- arch/riscv/lib/memset.S | 113 ----------------------- arch/riscv/lib/string.c | 153 ++++++++++++++++++++++++++++++++ 8 files changed, 163 insertions(+), 315 deletions(-) delete mode 100644 arch/riscv/kernel/riscv_ksyms.c delete mode 100644 arch/riscv/lib/memcpy.S delete mode 100644 arch/riscv/lib/memmove.S delete mode 100644 arch/riscv/lib/memset.S create mode 100644 arch/riscv/lib/string.c -- 2.31.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next reply other threads:[~2021-06-17 15:28 UTC|newest] Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-06-17 15:27 Matteo Croce [this message] 2021-06-17 15:27 ` [PATCH v3 0/3] riscv: optimized mem* functions Matteo Croce 2021-06-17 15:27 ` [PATCH v3 1/3] riscv: optimized memcpy Matteo Croce 2021-06-17 15:27 ` Matteo Croce 2021-06-18 14:06 ` kernel test robot 2021-06-18 14:06 ` kernel test robot 2021-06-18 14:06 ` kernel test robot 2021-06-21 14:26 ` Christoph Hellwig 2021-06-21 14:26 ` Christoph Hellwig 2021-06-22 8:19 ` David Laight 2021-06-22 8:19 ` David Laight 2021-06-22 22:53 ` Matteo Croce 2021-06-22 22:53 ` Matteo Croce 2021-06-22 22:00 ` Matteo Croce 2021-06-22 22:00 ` Matteo Croce 2021-06-22 0:14 ` Nick Kossifidis 2021-06-22 0:14 ` Nick Kossifidis 2021-06-22 23:35 ` Matteo Croce 2021-06-22 23:35 ` Matteo Croce 2021-06-23 9:48 ` Nick Kossifidis 2021-06-23 9:48 ` Nick Kossifidis 2021-06-17 15:27 ` [PATCH v3 2/3] riscv: optimized memmove Matteo Croce 2021-06-17 15:27 ` Matteo Croce 2021-06-21 14:28 ` Christoph Hellwig 2021-06-21 14:28 ` Christoph Hellwig 2021-06-22 0:46 ` Nick Kossifidis 2021-06-22 0:46 ` Nick Kossifidis 2021-06-30 4:40 ` kernel test robot 2021-06-30 4:40 ` kernel test robot 2021-06-30 4:40 ` kernel test robot 2021-06-17 15:27 ` [PATCH v3 3/3] riscv: optimized memset Matteo Croce 2021-06-17 15:27 ` Matteo Croce 2021-06-21 14:32 ` Christoph Hellwig 2021-06-21 14:32 ` Christoph Hellwig 2021-06-22 1:07 ` Nick Kossifidis 2021-06-22 1:07 ` Nick Kossifidis 2021-06-22 8:38 ` David Laight 2021-06-22 8:38 ` David Laight 2021-06-23 1:14 ` Matteo Croce 2021-06-23 1:14 ` Matteo Croce 2021-06-23 9:05 ` David Laight 2021-06-23 9:05 ` David Laight 2021-06-23 0:08 ` Matteo Croce 2021-06-23 0:08 ` Matteo Croce 2021-06-22 1:09 ` [PATCH v3 0/3] riscv: optimized mem* functions Nick Kossifidis 2021-06-22 1:09 ` Nick Kossifidis 2021-06-22 2:39 ` Guo Ren 2021-06-22 2:39 ` Guo Ren
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