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From: viktor.barna@celeno.com
To: linux-wireless@vger.kernel.org
Cc: Kalle Valo <kvalo@codeaurora.org>,
	"David S . Miller" <davem@davemloft.net>,
	Jakub Kicinski <kuba@kernel.org>,
	Aviad Brikman <aviad.brikman@celeno.com>,
	Eliav Farber <eliav.farber@gmail.com>,
	Oleksandr Savchenko <oleksandr.savchenko@celeno.com>,
	Shay Bar <shay.bar@celeno.com>,
	Viktor Barna <viktor.barna@celeno.com>
Subject: [RFC v1 172/256] cl8k: add rx/rx.c
Date: Thu, 17 Jun 2021 16:00:59 +0000	[thread overview]
Message-ID: <20210617160223.160998-173-viktor.barna@celeno.com> (raw)
In-Reply-To: <20210617160223.160998-1-viktor.barna@celeno.com>

From: Viktor Barna <viktor.barna@celeno.com>

(Part of the split. Please, take a look at the cover letter for more
details).

Signed-off-by: Viktor Barna <viktor.barna@celeno.com>
---
 drivers/net/wireless/celeno/cl8k/rx/rx.c | 1108 ++++++++++++++++++++++
 1 file changed, 1108 insertions(+)
 create mode 100644 drivers/net/wireless/celeno/cl8k/rx/rx.c

diff --git a/drivers/net/wireless/celeno/cl8k/rx/rx.c b/drivers/net/wireless/celeno/cl8k/rx/rx.c
new file mode 100644
index 000000000000..d55038ae2e85
--- /dev/null
+++ b/drivers/net/wireless/celeno/cl8k/rx/rx.c
@@ -0,0 +1,1108 @@
+// SPDX-License-Identifier: MIT
+/* Copyright(c) 2019-2021, Celeno Communications Ltd. */
+
+#include "tx/tx.h"
+#include "rx/rx.h"
+#include "rx/rx_amsdu.h"
+#include "stats.h"
+#include "rate_ctrl.h"
+#include "rssi.h"
+#include "band.h"
+#include "utils/utils.h"
+#include "vns.h"
+#include "dfs/dfs.h"
+#include "wrs/wrs_api.h"
+#include "twt.h"
+#include "recovery.h"
+#include "fw/fw_dbg.h"
+#include "def.h"
+#include "rx/rx_reorder.h"
+#include "ops.h"
+#include "chip.h"
+#include "channel.h"
+#ifdef CONFIG_CL_PCIE
+#include "bus/pci/rx_pci.h"
+#endif
+#ifdef TRACE_SUPPORT
+#include "trace.h"
+#endif
+
+/* Must correspond to FW definition of MM_SEC_DEFAULT_KEY_COUNT */
+#define MM_SEC_DEFAULT_KEY_COUNT 64
+
+#define VHT_MCS_MASK 0x0F
+#define VHT_MCS_OFT  0
+
+/* Number of entries in HW legacy rate conversion table */
+#define LEGACY_RATE_MAX 16
+
+static const s8 legacy_rates_lut[LEGACY_RATE_MAX] = {
+       0,      /* 0: 1 Mbps   */
+       1,      /* 1: 2 Mbps   */
+       2,      /* 2: 5.5 Mbps */
+       3,      /* 3: 11 Mbps  */
+       -1,     /* 4: Invalid  */
+       -1,     /* 5: Invalid  */
+       -1,     /* 6: Invalid  */
+       -1,     /* 7: Invalid  */
+       10,     /* 8: 48 Mbps  */
+       8,      /* 9: 24 Mbps  */
+       6,      /* 10: 12 Mbps */
+       4,      /* 11: 6 Mbps  */
+       11,     /* 12: 54 Mbps */
+       9,      /* 13: 36 Mbps */
+       7,      /* 14: 18 Mbps */
+       5       /* 15: 9 Mbps  */
+};
+
+/*
+ * rx_skb_cnt is an atomic counter that tracks the total number of skbs in
+ * the entire host.
+ * The counter is incremented when skb is allocated, and freed when the skb
+ * is freed (=destructor function called).
+ * Therefore the counter is global (and not part of cl_hw or cl_chip).
+ *
+ * rx_skb_max is the configured to:
+ * max(chip0->conf->ci_rx_skb_max, chip1->conf->ci_rx_skb_max)
+ */
+static atomic_t rx_skb_cnt = ATOMIC_INIT(0);
+static u32 rx_skb_max;
+
+static void cl_rx_skb_destructor(struct sk_buff *skb)
+{
+       atomic_dec(&rx_skb_cnt);
+}
+
+static DEFINE_PER_CPU(struct tasklet_struct, rx_remote_tasklet_mac[TCV_TOTAL]);
+
+static void cl_rx_remote_cpu_mac(struct cl_hw *cl_hw)
+{
+       int cpu = cl_hw->conf->ci_rx_remote_cpu_mac;
+       struct tasklet_struct *t = &per_cpu(rx_remote_tasklet_mac[cl_hw->idx], cpu);
+
+       if (!test_bit(TASKLET_STATE_SCHED, &t->state))
+               smp_call_function_single(cpu, cl_rx_remote_tasklet_sched, t, 0);
+}
+
+static int cl_rx_check_err(struct cl_hw *cl_hw, struct sk_buff *skb, struct hw_rxhdr *rxhdr)
+{
+       u32 status;
+
+       if (rxhdr->frm_successful_rx)
+               return 0;
+
+       /* The status field is in offset of 14 u32's */
+       status = *((u32 *)rxhdr + 14);
+
+       if (rxhdr->fcs_err) {
+               cl_hw->radio_stats[CL_RADIO_FCS_ERROR]++;
+               cl_dbg_err(cl_hw, "fcs_err (status 0x%x)\n", status);
+       }
+
+       if (rxhdr->rx_fifo_oflow) {
+               cl_hw->radio_stats[CL_RADIO_RX_FIFO_OVERFLOW]++;
+               cl_dbg_err(cl_hw, "rx_fifo_oflow (status 0x%x)\n", status);
+       }
+
+       if (rxhdr->undef_err) {
+               cl_hw->radio_stats[CL_RADIO_UNDEFINED_ERROR]++;
+               cl_dbg_err(cl_hw, "undef_err (status 0x%x)\n", status);
+       }
+
+       if (rxhdr->phy_err) {
+               cl_hw->radio_stats[CL_RADIO_PHY_ERROR]++;
+               cl_dbg_err(cl_hw, "phy_err (status 0x%x)\n", status);
+       }
+
+       if (rxhdr->addr_mismatch) {
+               cl_hw->radio_stats[CL_RADIO_ADDRESS_MISMATCH]++;
+               cl_dbg_err(cl_hw, "addr_mismatch (status 0x%x)\n", status);
+       }
+
+       cl_hw->rx_info.pkt_drop_not_success++;
+       kfree_skb(skb);
+
+       return -1;
+}
+
+static u8 chnl_bw_to_rate_info_bw[CHNL_BW_MAX] = {
+       [CHNL_BW_20] = RATE_INFO_BW_20,
+       [CHNL_BW_40] = RATE_INFO_BW_40,
+       [CHNL_BW_80] = RATE_INFO_BW_80,
+       [CHNL_BW_160] = RATE_INFO_BW_160,
+};
+
+static u8 chnl_bw_factor[CHNL_BW_MAX] = {
+       [CHNL_BW_20] = 0,
+       [CHNL_BW_40] = 3,
+       [CHNL_BW_80] = 6,
+       [CHNL_BW_160] = 9,
+};
+
+static int cl_rx_fill_status(struct cl_hw *cl_hw, struct cl_sta *cl_sta, struct sk_buff *skb,
+                            struct hw_rxhdr *rxhdr, u8 *encrypt_len)
+{
+       s8 rssi[MAX_ANTENNAS] = RX_HDR_RSSI(rxhdr);
+       struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
+       struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
+       u8 tid = ieee80211_get_tid(hdr);
+       u8 factor;
+
+       memset(status, 0, sizeof(struct ieee80211_rx_status));
+
+       status->mactime = ((u64)le32_to_cpu((rxhdr->tsf_hi)) << 32) | le32_to_cpu(rxhdr->tsf_lo);
+       status->flag |= RX_FLAG_MACTIME_END;
+
+       if (cl_sta && cl_sta->tid_agg_rx[tid])
+               status->flag |= RX_FLAG_DUP_VALIDATED;
+
+       status->antenna = rxhdr->antenna_set;
+       status->band = cl_band_from_fw_idx(rxhdr->phy_band);
+
+       if (rxhdr->format_mod >= FORMATMOD_HE_SU) {
+               status->encoding = RX_ENC_HE;
+               status->rate_idx = (rxhdr->mcs & VHT_MCS_MASK) >> VHT_MCS_OFT;
+               status->nss = rxhdr->n_sts + 1;
+
+               /* he_gi expectes to get values according to enum nl80211_he_gi */
+               status->he_gi = convert_gi_format_wrs_to_fw(WRS_MODE_HE, rxhdr->gi_type);
+       } else if (rxhdr->format_mod == FORMATMOD_VHT) {
+               status->encoding = RX_ENC_VHT;
+               status->rate_idx = (rxhdr->mcs & VHT_MCS_MASK) >> VHT_MCS_OFT;
+               status->nss = rxhdr->n_sts + 1;
+
+               if (rxhdr->gi_type)
+                       status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
+       } else if (rxhdr->format_mod == FORMATMOD_HT_GF) {
+               status->encoding = RX_ENC_HT;
+               status->enc_flags |= RX_ENC_FLAG_HT_GF;
+               status->rate_idx = rxhdr->mcs;
+
+               if (rxhdr->gi_type)
+                       status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
+
+       } else if (rxhdr->format_mod == FORMATMOD_HT_MF) {
+               status->encoding = RX_ENC_HT;
+               status->rate_idx = rxhdr->mcs;
+
+               if (rxhdr->gi_type)
+                       status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
+       } else {
+               if (legacy_rates_lut[rxhdr->leg_rate] != -1)
+                       status->rate_idx = legacy_rates_lut[rxhdr->leg_rate];
+               if (status->band != NL80211_BAND_2GHZ)
+                       status->rate_idx -= RATE_CTRL_OFFSET_OFDM;
+               if (!rxhdr->pre_type)
+                       status->enc_flags |= RX_ENC_FLAG_SHORTPRE;
+       }
+
+       if (rxhdr->aggregation) {
+               status->flag |= RX_FLAG_AMPDU_DETAILS;
+               status->ampdu_reference = rxhdr->ampdu_cnt;
+       }
+
+       /* Set bw field */
+       status->bw = chnl_bw_to_rate_info_bw[rxhdr->ch_bw];
+
+       factor = chnl_bw_factor[rxhdr->ch_bw];
+       cl_rssi_bw_adjust(cl_hw, rxhdr, factor);
+
+       /*
+        * Todo check if when a frame is received on 40MHz or more bandwidth,
+        * we need to take the center1_freq instead of the prim20_freq
+        */
+       status->freq = le16_to_cpu(Q2_TO_FREQ(rxhdr->phy_prim20_freq));
+
+       status->signal = cl_rssi_calc_equivalent(cl_hw, rssi);
+
+       switch (rxhdr->decr_status) {
+       case CL_RX_HDR_DECR_UNENC:
+               if (ieee80211_has_protected(hdr->frame_control)) {
+                       cl_dbg_warn(cl_hw, "Protected frame unencrypted\n");
+                       cl_hw->rx_info.pkt_drop_unencrypted++;
+                       return -1;
+               }
+               break;
+       case CL_RX_HDR_DECR_ICVFAIL:
+       case CL_RX_HDR_DECR_AMSDUDISCARD:
+       case CL_RX_HDR_DECR_NULLKEY:
+       case CL_RX_HDR_DECR_CCMPFAIL:
+               cl_dbg_warn(cl_hw, "Decryption failed (%u)\n", rxhdr->decr_status);
+               cl_hw->rx_info.pkt_drop_decrypt_fail++;
+               *encrypt_len = 0;
+               return -1;
+       case CL_RX_HDR_DECR_WEPSUCCESS:
+       case CL_RX_HDR_DECR_TKIPSUCCESS:
+               *encrypt_len = IEEE80211_WEP_ICV_LEN;
+               status->flag |= (RX_FLAG_DECRYPTED | RX_FLAG_ICV_STRIPPED);
+               break;
+       case CL_RX_HDR_DECR_CCMPSUCCESS:
+               *encrypt_len = IEEE80211_CCMP_HDR_LEN;
+               status->flag |= (RX_FLAG_DECRYPTED | RX_FLAG_MIC_STRIPPED);
+               status->flag |= RX_FLAG_PN_VALIDATED;
+               break;
+       }
+
+       return 0;
+}
+
+static void cl_rx_action_twt_setup(struct cl_hw *cl_hw, struct cl_ieee80211_mgmt *mgmt,
+                                  int len, struct cl_sta *cl_sta)
+{
+       u32 min_size = 0;
+       u8 negotiation_type =
+               mgmt->u.action.u.twt_individual_setup.twt_elem.control.fields.negotiation_type;
+
+       /* Individual TWT */
+       if ((negotiation_type & 0x2) == 0) {
+               /* Verify min size */
+               min_size = IEEE80211_MIN_ACTION_SIZE  + 4 +
+                       sizeof(mgmt->u.action.u.twt_individual_setup.twt_elem);
+
+               if (len < min_size) {
+                       cl_dbg_err(cl_hw, "TWT: Individual setup action frame length error\n");
+                       return;
+               }
+
+               /* Regular individual TWT */
+               if (negotiation_type == 0)
+                       cl_twt_handle_individual_setup_request(cl_hw, cl_sta, mgmt);
+       } else { /* Broadcast TWT */
+               /* Verify min size */
+               min_size = IEEE80211_MIN_ACTION_SIZE  + 4 +
+                       sizeof(mgmt->u.action.u.twt_broadcast_setup.twt_elem);
+
+               if (len < min_size) {
+                       cl_dbg_err(cl_hw, "TWT: Broadcast setup action frame length error\n");
+                       return;
+               }
+       }
+}
+
+static void cl_rx_action_twt_teardown(struct cl_hw *cl_hw, struct cl_ieee80211_mgmt *mgmt,
+                                     int len, struct cl_sta *cl_sta)
+{
+       u8 negotiation_type;
+
+       if (len < IEEE80211_MIN_ACTION_SIZE + 2) {
+               cl_dbg_err(cl_hw, "Invalid length of TWT teardown action frame\n");
+               return;
+       }
+
+       negotiation_type = mgmt->u.action.u.twt_individual_teardown.negotiation_type;
+
+       if (negotiation_type <= 1)
+               cl_twt_handle_individual_teardown_request(cl_hw, cl_sta, mgmt);
+}
+
+static void cl_rx_action_frame_handler(struct cl_hw *cl_hw, struct cl_ieee80211_mgmt *mgmt,
+                                      int len, struct cl_sta *cl_sta)
+{
+       /* Verify action code is present */
+       if (len < IEEE80211_MIN_ACTION_SIZE + 1)
+               return;
+
+       switch (mgmt->u.action.category) {
+       case WLAN_CATEGORY_UNPROTECTED_S1G:
+               if (!cl_twt_is_enabled(cl_hw))
+                       break;
+
+               if (cl_sta->cl_vif->vif->type != NL80211_IFTYPE_AP)
+                       break;
+
+               switch (mgmt->u.action.u.twt_individual_setup.action_code) {
+               case WLAN_UNPROT_S1G_ACTION_TWT_SETUP:
+                       cl_rx_action_twt_setup(cl_hw, mgmt, len, cl_sta);
+                       break;
+               case WLAN_UNPROT_S1G_ACTION_TWT_TEARDOWN:
+                       cl_rx_action_twt_teardown(cl_hw, mgmt, len, cl_sta);
+                       break;
+               default:
+                       break;
+               }
+               break;
+       case WLAN_CATEGORY_WNM:
+               /* TODO: Here may be bss_color_check_action */
+               break;
+       default:
+               break;
+       }
+}
+
+static void cl_rx_mgmt_check(struct cl_hw *cl_hw, struct sk_buff *skb,
+                            struct cl_sta *cl_sta, struct hw_rxhdr *rxhdr)
+{
+       struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
+       __le16 fc = mgmt->frame_control;
+
+       if (!ieee80211_is_mgmt(fc))
+               return;
+
+       if (cl_sta) {
+               if (ieee80211_is_action(fc))
+                       cl_rx_action_frame_handler(cl_hw, (struct cl_ieee80211_mgmt *)mgmt,
+                                                  skb->len, cl_sta);
+       } else {
+               s8 rssi[MAX_ANTENNAS] = RX_HDR_RSSI(rxhdr);
+
+               cl_vns_mgmt_handler(cl_hw, mgmt->sa, rssi);
+
+               if (ieee80211_is_assoc_req(fc) || ieee80211_is_assoc_resp(fc))
+                       cl_rssi_assoc_handle(cl_hw, mgmt->sa, rxhdr);
+       }
+}
+
+static void cl_rx_data_check(struct cl_hw *cl_hw, struct sk_buff *skb,
+                            struct cl_sta *cl_sta, u32 packet_len, struct hw_rxhdr *rxhdr)
+{
+       if (cl_sta) {
+               cl_traffic_rx_handler(cl_hw, cl_sta, packet_len);
+
+               if (!rxhdr->aggregation || (rxhdr->aggregation && rxhdr->mpdu_cnt == 0))
+                       cl_motion_sense_rssi_data(cl_hw, cl_sta, rxhdr);
+       }
+}
+
+static bool cl_rx_skb_done(struct cl_hw *cl_hw, struct sk_buff *skb,
+                          struct cl_sta *cl_sta, struct hw_rxhdr *rxhdr)
+{
+       struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
+       struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
+       __le16 fc = hdr->frame_control;
+       struct cl_vif *cl_vif = NULL;
+
+       /* Update trigger base statistics */
+       cl_fw_dbg_trigger_based_update(cl_hw, rxhdr, hdr);
+
+       if (cl_sta) {
+               cl_vif = cl_sta->cl_vif;
+               skb->dev = cl_vif->dev;
+
+               cl_stats_update_rx_rate(cl_hw, cl_sta, rxhdr);
+
+               if (!rxhdr->aggregation || (rxhdr->aggregation && rxhdr->mpdu_cnt == 0))
+                       cl_rssi_rx_handler(cl_hw, cl_sta, rxhdr, status->signal);
+       } else {
+               cl_vif = cl_vif_get_by_mac(cl_hw, hdr->addr3);
+               skb->dev = cl_vif ? cl_vif->dev : NULL;
+
+               if (cl_hw->chip->conf->ce_production_mode)
+                       cl_stats_update_rx_rate_production(cl_hw, rxhdr);
+       }
+
+       /* DATA */
+       if (ieee80211_is_data(fc)) {
+               cl_rx_data_check(cl_hw, skb, cl_sta, skb->len, rxhdr);
+               goto out;
+       }
+
+       /* MGMT/CTL */
+       if (cl_sta)
+               cl_motion_sense_rssi_mgmt_ctl(cl_hw, cl_sta, rxhdr);
+
+       /* MGMT */
+       cl_rx_mgmt_check(cl_hw, skb, cl_sta, rxhdr);
+
+out:
+       if (rx_skb_max &&
+           atomic_read(&rx_skb_cnt) >= rx_skb_max) {
+               cl_hw->rx_info.pkt_drop_host_limit++;
+               kfree_skb(skb);
+               return false;
+       }
+
+       return true;
+}
+
+static void cl_rx_pass_to_mac(struct cl_hw *cl_hw,
+                             struct ieee80211_sta *sta,
+                             struct sk_buff_head *frames)
+{
+       if (cl_hw->conf->ci_rx_remote_cpu_mac == -1) {
+               struct sk_buff *skb = NULL;
+
+               while ((skb = __skb_dequeue(frames)))
+                       ieee80211_rx_napi(cl_hw->hw, sta, skb, NULL);
+       } else {
+               struct sk_buff_head *rx_remote_queue_mac = &cl_hw->rx_remote_queue_mac;
+
+               spin_lock(&rx_remote_queue_mac->lock);
+               skb_queue_splice_tail_init(frames, rx_remote_queue_mac);
+               spin_unlock(&rx_remote_queue_mac->lock);
+
+               cl_rx_remote_cpu_mac(cl_hw);
+       }
+}
+
+static void cl_rx_amsdu_done_reorder(struct cl_hw *cl_hw, struct cl_sta *cl_sta,
+                                    struct sk_buff_head *frames)
+{
+       struct sk_buff *skb = NULL;
+       struct sk_buff_head reorder_buf;
+
+       /* Init the reorder buffer */
+       __skb_queue_head_init(&reorder_buf);
+
+       while ((skb = __skb_dequeue(frames)))
+               cl_rx_reorder_ampdu(cl_hw, cl_sta, skb, &reorder_buf);
+
+       if (!skb_queue_empty(&reorder_buf))
+               cl_rx_pass_to_mac(cl_hw, &cl_sta->stainfo->sta, &reorder_buf);
+}
+
+static void cl_rx_amsdu_done(struct cl_hw *cl_hw, struct cl_amsdu_rx_state *amsdu_rx_state)
+{
+       struct sk_buff_head *frames = &amsdu_rx_state->frames;
+       struct sk_buff *skb = __skb_peek(frames);
+       struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
+       struct cl_sta *cl_sta;
+       struct cl_vif *cl_vif;
+       struct hw_rxhdr *rxhdr = amsdu_rx_state->rxhdr;
+       u32 packet_len = amsdu_rx_state->packet_len;
+       struct ieee80211_sta *sta;
+
+       /* START - cl_sta protected block */
+       cl_sta_lock(cl_hw);
+       cl_sta = cl_sta_get(cl_hw, amsdu_rx_state->sta_idx);
+
+       if (!cl_sta) {
+               cl_sta_unlock(cl_hw);
+               cl_hw->rx_info.pkt_drop_sta_null += amsdu_rx_state->msdu_cnt;
+               __skb_queue_purge(frames);
+               return;
+       }
+
+       sta = &cl_sta->stainfo->sta;
+       cl_vif = cl_sta->cl_vif;
+       skb->dev = cl_vif->dev;
+
+       cl_rx_data_check(cl_hw, skb, cl_sta, packet_len, rxhdr);
+       cl_stats_update_rx_rate(cl_hw, cl_sta, rxhdr);
+
+       if (!rxhdr->aggregation || (rxhdr->aggregation && rxhdr->mpdu_cnt == 0))
+               cl_rssi_rx_handler(cl_hw, cl_sta, rxhdr, status->signal);
+
+       cl_sta_unlock(cl_hw);
+       /* END - cl_sta protected block */
+
+       if (rx_skb_max &&
+           (atomic_read(&rx_skb_cnt) + amsdu_rx_state->msdu_cnt) >= rx_skb_max) {
+               cl_hw->rx_info.pkt_drop_host_limit += amsdu_rx_state->msdu_cnt;
+               __skb_queue_purge(frames);
+               return;
+       }
+
+       if (cl_sta->tid_agg_rx[amsdu_rx_state->tid])
+               cl_rx_amsdu_done_reorder(cl_hw, cl_sta, frames);
+       else
+               cl_rx_pass_to_mac(cl_hw, sta, frames);
+}
+
+static void cl_rx_invalid_tailroom(struct cl_hw *cl_hw, struct sk_buff *skb, u32 len)
+{
+       cl_dbg_err(cl_hw, "Invalid RX header length - tailroom=%d, len=%u\n",
+                  skb_tailroom(skb), len);
+       cl_hw->rx_info.pkt_drop_rxhdr_len_error++;
+       kfree_skb(skb);
+}
+
+static void cl_rx_invalid_pattern(struct cl_hw *cl_hw, struct sk_buff *skb, u32 pattern)
+{
+       cl_dbg_err(cl_hw, "WRONG PATTERN - 0x%x\n", pattern);
+       cl_hw->rx_info.pkt_drop_wrong_pattern++;
+       kfree_skb(skb);
+}
+
+static int cl_rx_get_sta_idx(struct cl_hw *cl_hw, struct hw_rxhdr *rxhdr)
+{
+       int sta_idx = rxhdr->key_sram_index - MM_SEC_DEFAULT_KEY_COUNT;
+
+       if (sta_idx >= 0 && sta_idx < CL_MAX_NUM_STA)
+               return sta_idx;
+
+       cl_dbg_err(cl_hw, "invalid sta_idx %d, key_sram_index=%d\n",
+                  sta_idx, rxhdr->key_sram_index);
+
+       return -1;
+}
+
+static void cl_rx_handle_first_amsdu(struct cl_hw *cl_hw, struct sk_buff *skb,
+                                    struct cl_amsdu_rx_state *amsdu_rx_state,
+                                    struct hw_rxhdr *rxhdr, u8 sta_idx, u8 tid, u8 encrypt_len)
+{
+       /*
+        * First MSDU recived frame:
+        * ------------------------------------------
+        * || WLAN_HDR || MSDU HDR || MSDU PAYLOAD ||
+        * ------------------------------------------
+        */
+       cl_rx_amsdu_stats(cl_hw, rxhdr->msdu_cnt);
+
+       if (rxhdr->corrupted_amsdu) {
+               cl_rx_amsdu_first_corrupted(cl_hw, skb, rxhdr);
+       } else {
+               cl_rx_amsdu_first(cl_hw, skb, rxhdr, sta_idx, tid, encrypt_len);
+
+               /* If there are more MSDU's, hold on with the update
+                * to the upper layer until A-MSDU is complete
+                */
+               if (amsdu_rx_state->msdu_remaining_cnt == 0)
+                       cl_rx_amsdu_done(cl_hw, amsdu_rx_state);
+       }
+}
+
+static void cl_rx_handle_sub_amsdu(struct cl_hw *cl_hw, struct sk_buff *skb,
+                                  struct cl_amsdu_rx_state *amsdu_rx_state)
+{
+       /* Update the remaining MSDU counter */
+       amsdu_rx_state->msdu_remaining_cnt--;
+
+       /* Free MSDU with error */
+       if (amsdu_rx_state->amsdu_error) {
+               cl_rx_amsdu_sub_error(cl_hw, skb);
+               return;
+       }
+
+       /* Add the sub-MSDU to the existing ones */
+       if (!cl_rx_amsdu_sub(cl_hw, skb))
+               return;
+
+       /* This is the last MSDU, A-MSDU is complete, push to upper layer */
+       if (amsdu_rx_state->msdu_remaining_cnt == 0)
+               cl_rx_amsdu_done(cl_hw, amsdu_rx_state);
+}
+
+static void cl_rx_handle_ps(struct cl_hw *cl_hw, struct cl_sta *cl_sta, struct sk_buff *skb)
+{
+       struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
+       struct ieee80211_sta *sta = &cl_sta->stainfo->sta;
+       bool is_ps;
+       __le16 fc = hdr->frame_control;
+
+       if (ieee80211_is_pspoll(fc) ||
+           ieee80211_has_morefrags(fc) ||
+           !(ieee80211_is_mgmt(fc) ||
+             ieee80211_is_data(fc)))
+               return;
+
+       is_ps = ieee80211_has_pm(hdr->frame_control);
+
+       cl_sta_ps_notify(cl_hw, cl_sta, is_ps);
+       ieee80211_sta_ps_transition(sta, is_ps);
+}
+
+static void cl_rx_handle_skb(struct cl_hw *cl_hw, struct sk_buff *skb)
+{
+       u8 encrypt_len = 0;
+       u8 tid = 0;
+       u32 mpdu_offset = 0;
+       u32 len = 0;
+       int sta_idx = -1;
+       bool is_amsdu = false;
+       bool skb_done = false;
+       struct cl_sta *cl_sta = NULL;
+       struct ieee80211_sta *sta = NULL;
+       struct hw_rxhdr *rxhdr = NULL;
+       struct cl_tid_ampdu_rx *tid_agg_rx = NULL;
+       struct cl_amsdu_rx_state *amsdu_rx_state = &cl_hw->amsdu_rx_state;
+       s8 remote_cpu_mac = cl_hw->conf->ci_rx_remote_cpu_mac;
+
+       if (amsdu_rx_state->msdu_remaining_cnt > 0) {
+               cl_rx_handle_sub_amsdu(cl_hw, skb, amsdu_rx_state);
+               return;
+       }
+
+       rxhdr = (struct hw_rxhdr *)skb->data;
+       mpdu_offset = sizeof(struct hw_rxhdr);
+
+       if (rxhdr->rx_padding_done)
+               mpdu_offset += CL_PADDING_IN_BYTES;
+
+       /* Pull the HW RX header */
+       skb_reserve(skb, mpdu_offset);
+
+       /*
+        * Sanity check - the embedded layer is responsible to validate the pattern correctness.
+        * If pattern is invalid then it is likely that the embedded layer did some thing wrong.
+        */
+       if (rxhdr->pattern != IPC_RX_DMA_OVER_PATTERN) {
+               cl_rx_invalid_pattern(cl_hw, skb, rxhdr->pattern);
+               return;
+       }
+
+       if (cl_rx_check_err(cl_hw, skb, rxhdr))
+               return;
+
+       /* Convert gi from firmware format to driver format */
+       rxhdr->gi_type = convert_gi_format_fw_to_wrs(rxhdr->format_mod, rxhdr->gi_type);
+
+       /*
+        * For TCV1 fill in the rxhdr rssi "holes" so that values will start from rssi1.
+        * The implementation below takes into account elastic mimo, and maximum number
+        * of antennas for TCV1.
+        */
+       if (cl_hw_is_tcv1(cl_hw)) {
+               if (cl_chip_is_6ant(cl_hw->chip)) {
+                       rxhdr->rssi1 = rxhdr->rssi2;
+                       rxhdr->rssi2 = rxhdr->rssi3;
+                       rxhdr->rssi3 = rxhdr->rssi4;
+                       rxhdr->rssi4 = rxhdr->rssi5;
+                       rxhdr->rssi5 = rxhdr->rssi6;
+               } else if (cl_chip_is_4ant(cl_hw->chip)) {
+                       rxhdr->rssi1 = rxhdr->rssi3;
+                       rxhdr->rssi2 = rxhdr->rssi4;
+                       rxhdr->rssi3 = rxhdr->rssi5;
+                       rxhdr->rssi4 = rxhdr->rssi6;
+               }
+       }
+
+       if (rxhdr->key_sram_v)
+               sta_idx = cl_rx_get_sta_idx(cl_hw, rxhdr);
+
+       cl_sta_lock(cl_hw);
+
+       if (sta_idx != -1) {
+               cl_sta = cl_sta_get(cl_hw, sta_idx);
+
+               if (cl_sta) {
+                       sta = &cl_sta->stainfo->sta;
+
+                       if (cl_hw->conf->ci_fast_rx_en) {
+                               tid = ieee80211_get_tid((struct ieee80211_hdr *)skb->data);
+                               tid_agg_rx = cl_sta->tid_agg_rx[tid];
+                               cl_rx_handle_ps(cl_hw, cl_sta, skb);
+                       }
+
+                       /* Store the pointer to sta in the skb->sk field */
+                       if (remote_cpu_mac != -1)
+                               skb->sk = (struct sock *)sta;
+               }
+       }
+
+       if (unlikely(cl_rx_fill_status(cl_hw, cl_sta, skb, rxhdr, &encrypt_len))) {
+               cl_sta_unlock(cl_hw);
+               kfree_skb(skb);
+               return;
+       }
+
+       /*
+        * RXM sets rxhdr->msdu_cnt=1 also for non AMSDU, so the correct check
+        * is the new amsdu_present bit.
+        */
+       is_amsdu = rxhdr->amsdu_present;
+
+       /* Is A-MSDU frame? */
+       if (is_amsdu) {
+               cl_rx_handle_first_amsdu(cl_hw, skb, amsdu_rx_state, rxhdr, sta_idx,
+                                        tid, encrypt_len);
+               cl_sta_unlock(cl_hw);
+               return;
+       }
+
+       len = le32_to_cpu(rxhdr->len);
+
+       if (skb_tailroom(skb) >= len) {
+               /* Push the WLAN HDR + MDPU payload to the skb data */
+               skb_put(skb, len);
+               cl_hw->rx_info.non_amsdu++;
+       } else {
+               cl_sta_unlock(cl_hw);
+               cl_rx_invalid_tailroom(cl_hw, skb, len);
+               return;
+       }
+
+       skb_done = cl_rx_skb_done(cl_hw, skb, cl_sta, rxhdr);
+
+       cl_sta_unlock(cl_hw);
+
+       if (!skb_done)
+               return;
+
+       if (tid_agg_rx) {
+               struct sk_buff_head reorder_buf;
+
+               /* Init the reorder buffer */
+               __skb_queue_head_init(&reorder_buf);
+               cl_rx_reorder_ampdu(cl_hw, cl_sta, skb, &reorder_buf);
+
+               if (!skb_queue_empty(&reorder_buf))
+                       cl_rx_pass_to_mac(cl_hw, sta, &reorder_buf);
+       } else {
+               if (remote_cpu_mac == -1) {
+                       ieee80211_rx_napi(cl_hw->hw, sta, skb, NULL);
+               } else {
+                       skb_queue_tail(&cl_hw->rx_remote_queue_mac, skb);
+                       cl_rx_remote_cpu_mac(cl_hw);
+               }
+       }
+}
+
+static void cl_rx_tasklet(unsigned long data)
+{
+       struct cl_hw *cl_hw = (struct cl_hw *)data;
+       struct sk_buff *skb = NULL;
+       u16 pkt_cnt = 0;
+
+       if (cl_recovery_in_progress(cl_hw))
+               return;
+
+#ifdef TRACE_SUPPORT
+       trace_cl_trace_rx_tasklet_start(cl_hw->idx);
+#endif
+
+       while ((skb = skb_dequeue(&cl_hw->rx_skb_queue))) {
+               cl_rx_handle_skb(cl_hw, skb);
+
+               if (++pkt_cnt > cl_hw->conf->ce_rx_pkts_budget) {
+                       if (cl_hw->chip->conf->ci_rx_resched_tasklet)
+                               tasklet_schedule(&cl_hw->rx_resched_tasklet);
+                       else
+                               tasklet_schedule(&cl_hw->rx_tasklet);
+
+                       cl_hw->rx_info.exceed_pkt_budget++;
+                       return;
+               }
+       }
+
+#ifdef TRACE_SUPPORT
+       trace_cl_trace_rx_tasklet_end(cl_hw->idx, pkt_cnt);
+#endif
+}
+
+static void cl_rx_resched_tasklet(unsigned long data)
+{
+       struct cl_hw *cl_hw = (struct cl_hw *)data;
+
+       tasklet_schedule(&cl_hw->rx_tasklet);
+}
+
+static void cl_rx_remote_tasklet_mac(unsigned long data)
+{
+       struct cl_hw *cl_hw = (struct cl_hw *)data;
+       struct sk_buff *skb = NULL;
+       struct ieee80211_sta *sta;
+
+       if (cl_recovery_in_progress(cl_hw))
+               return;
+
+       cl_rx_remote_cpu_info(cl_hw);
+
+       while ((skb = skb_dequeue(&cl_hw->rx_remote_queue_mac))) {
+               /*
+                * Get sta pointer from skb->sk (stored their in cl_rx_remote_cpu_mac)
+                * and reset skb->sk.
+                */
+               sta = (struct ieee80211_sta *)skb->sk;
+               skb->sk = NULL;
+
+               ieee80211_rx_napi(cl_hw->hw, sta, skb, NULL);
+       }
+}
+
+void cl_rx_init(struct cl_hw *cl_hw)
+{
+       s8 cpu_mac = cl_hw->conf->ci_rx_remote_cpu_mac;
+
+       /* Set rx_skb_max to be the maximum of ci_rx_skb_max configured for each chip */
+       rx_skb_max = max(cl_hw->chip->conf->ci_rx_skb_max, rx_skb_max);
+
+       skb_queue_head_init(&cl_hw->rx_remote_queue_mac);
+       skb_queue_head_init(&cl_hw->rx_skb_queue);
+       __skb_queue_head_init(&cl_hw->amsdu_rx_state.frames);
+
+       tasklet_init(&cl_hw->rx_tasklet, cl_rx_tasklet, (unsigned long)cl_hw);
+       tasklet_init(&cl_hw->rx_resched_tasklet, cl_rx_resched_tasklet, (unsigned long)cl_hw);
+
+       if (cpu_mac >= 0)
+               tasklet_init(&per_cpu(rx_remote_tasklet_mac[cl_hw->idx], cpu_mac),
+                            cl_rx_remote_tasklet_mac,
+                            (unsigned long)cl_hw);
+#ifdef CONFIG_CL_PCIE
+       cl_rx_pci_init(cl_hw);
+#endif
+}
+
+void cl_rx_off(struct cl_hw *cl_hw)
+{
+       s8 cpu_mac = cl_hw->conf->ci_rx_remote_cpu_mac;
+
+       if (cpu_mac >= 0)
+               tasklet_kill(&per_cpu(rx_remote_tasklet_mac[cl_hw->idx], cpu_mac));
+
+       tasklet_kill(&cl_hw->rx_tasklet);
+       tasklet_kill(&cl_hw->rx_resched_tasklet);
+
+       skb_queue_purge(&cl_hw->rx_remote_queue_mac);
+       skb_queue_purge(&cl_hw->rx_skb_queue);
+
+       cl_rx_amsdu_reset(cl_hw);
+#ifdef CONFIG_CL_PCIE
+       cl_rx_pci_deinit(cl_hw);
+#endif
+}
+
+void cl_rx_remote_tasklet_sched(void *t)
+{
+       tasklet_schedule((struct tasklet_struct *)t);
+}
+
+void cl_rx_remote_cpu_info(struct cl_hw *cl_hw)
+{
+       u32 processor_id = smp_processor_id();
+
+       if (processor_id < CPU_MAX_NUM)
+               cl_hw->rx_info.remote_cpu[processor_id]++;
+}
+
+void cl_rx_push_queue(struct cl_hw *cl_hw, struct sk_buff *skb)
+{
+       skb_queue_tail(&cl_hw->rx_skb_queue, skb);
+       tasklet_schedule(&cl_hw->rx_tasklet);
+}
+
+void cl_rx_skb_alloc_handler(struct sk_buff *skb)
+{
+       skb->destructor = cl_rx_skb_destructor;
+       atomic_inc(&rx_skb_cnt);
+}
+
+void cl_rx_post_recovery(struct cl_hw *cl_hw)
+{
+       if (!skb_queue_empty(&cl_hw->rx_skb_queue))
+               tasklet_schedule(&cl_hw->rx_tasklet);
+
+       if (!skb_queue_empty(&cl_hw->rx_remote_queue_mac))
+               tasklet_schedule(&per_cpu(rx_remote_tasklet_mac[cl_hw->idx],
+                                         cl_hw->conf->ci_rx_remote_cpu_mac));
+}
+
+void cl_rx_info_reset(struct cl_hw *cl_hw)
+{
+       pr_debug("Reset uplink stats\n");
+       memset(&cl_hw->rx_info, 0, sizeof(struct cl_rx_path_info));
+}
+
+int cl_rx_info_print(struct cl_hw *cl_hw)
+{
+       struct cl_rx_path_info *rx_info = &cl_hw->rx_info;
+       struct ieee80211_local *local = hw_to_local(cl_hw->hw);
+       int i;
+       bool uplink_amsdu = false;
+       char *buf = NULL;
+       ssize_t buf_size;
+       int err = 0;
+       int len = 0;
+
+       for (i = 0; i < RX_MAX_MSDU_IN_AMSDU; i++)
+               if (rx_info->amsdu_cnt[i] > 0) {
+                       uplink_amsdu = true;
+                       break;
+               }
+
+       cl_snprintf(&buf, &len, &buf_size,
+                   "Uplink counters\n"
+                   "-----------------------------------\n");
+       cl_snprintf(&buf, &len, &buf_size,
+                   "rx_desc[RXM]                 = %u\n",
+                   rx_info->rx_desc[CL_RX_BUF_RXM]);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "rx_desc[FW]                  = %u\n",
+                   rx_info->rx_desc[CL_RX_BUF_FW]);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "elem_alloc_fail              = %u\n",
+                   rx_info->elem_alloc_fail);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "skb_null                     = %u\n",
+                   rx_info->skb_null);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "pkt_drop_amsdu_corrupted     = %u\n",
+                   rx_info->pkt_drop_amsdu_corrupted);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "pkt_drop_sub_amsdu_corrupted = %u\n",
+                   rx_info->pkt_drop_sub_amsdu_corrupted);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "pkt_drop_amsdu_len_error     = %u\n",
+                   rx_info->pkt_drop_amsdu_len_error);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "pkt_drop_sub_amsdu_len_error = %u\n",
+                   rx_info->pkt_drop_sub_amsdu_len_error);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "pkt_drop_wrong_pattern       = %u\n",
+                   rx_info->pkt_drop_wrong_pattern);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "pkt_drop_not_success         = %u\n",
+                   rx_info->pkt_drop_not_success);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "pkt_drop_unencrypted         = %u\n",
+                   rx_info->pkt_drop_unencrypted);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "pkt_drop_decrypt_fail        = %u\n",
+                   rx_info->pkt_drop_decrypt_fail);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "pkt_drop_rxhdr_len_error     = %u\n",
+                   rx_info->pkt_drop_rxhdr_len_error);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "pkt_drop_sta_null            = %u\n",
+                   rx_info->pkt_drop_sta_null);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "pkt_drop_host_limit          = %u\n",
+                   rx_info->pkt_drop_host_limit);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "netif_rx                     = %u\n",
+                   rx_info->netif_rx);
+
+       len += snprintf(buf + len, PAGE_SIZE - len,
+                       "\nQueue length\n"
+                       "-----------------------------------\n");
+       len += snprintf(buf + len, PAGE_SIZE - len,
+                       "rx_skb_queue                 = %u\n",
+                       skb_queue_len(&cl_hw->rx_skb_queue));
+       len += snprintf(buf + len, PAGE_SIZE - len,
+                       "rx_remote_queue_mac          = %u\n",
+                       skb_queue_len(&cl_hw->rx_remote_queue_mac));
+       len += snprintf(buf + len, PAGE_SIZE - len,
+                       "local_skb_queue              = %u\n",
+                       skb_queue_len(&local->skb_queue));
+
+       cl_snprintf(&buf, &len, &buf_size,
+                   "\nSKB count\n"
+                   "-----------------------------------\n");
+       cl_snprintf(&buf, &len, &buf_size,
+                   "rx_skb_max                   = %u\n",
+                   rx_skb_max);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "rx_skb_cnt                   = %u\n",
+                   atomic_read(&rx_skb_cnt));
+
+       cl_snprintf(&buf, &len, &buf_size,
+                   "\nBuffer processing\n"
+                   "-----------------------------------\n");
+       cl_snprintf(&buf, &len, &buf_size,
+                   "IRQ                          = %u\n",
+                   rx_info->buffer_process_irq);
+       cl_snprintf(&buf, &len, &buf_size,
+                   "Tasklet                      = %u\n",
+                   rx_info->buffer_process_tasklet);
+
+       cl_snprintf(&buf, &len, &buf_size,
+                   "\nUplink Non AMSDU\n"
+                   "-----------------------------------\n"
+                   "NON AMSDU = %u\n", rx_info->non_amsdu);
+
+       if (uplink_amsdu) {
+               cl_snprintf(&buf, &len, &buf_size,
+                           "\nUplink AMSDU\n"
+                           "-----------------------------------\n");
+
+               for (i = 0; i < RX_MAX_MSDU_IN_AMSDU; i++)
+                       if (rx_info->amsdu_cnt[i] > 0)
+                               cl_snprintf(&buf, &len, &buf_size,
+                                           "AMSDU[%d] = %u\n", i + 1, rx_info->amsdu_cnt[i]);
+       }
+
+       if (cl_hw->conf->ci_rx_remote_cpu_drv != -1 ||
+           cl_hw->conf->ci_rx_remote_cpu_mac != -1) {
+               cl_snprintf(&buf, &len, &buf_size,
+                           "\nRemote CPU\n"
+                           "-----------------------------------\n");
+
+               for (i = 0; i < CPU_MAX_NUM; i++) {
+                       if (rx_info->remote_cpu[i] == 0)
+                               continue;
+
+                       cl_snprintf(&buf, &len, &buf_size, "cpu #%u: %u\n",
+                                   i, rx_info->remote_cpu[i]);
+               }
+       }
+
+       cl_snprintf(&buf, &len, &buf_size,
+                   "\nUplink schedule\n"
+                   "-----------------------------------\n"
+                   "exceed_pkt_budget = %u\n",
+                   rx_info->exceed_pkt_budget);
+
+       cl_snprintf(&buf, &len, &buf_size,
+                   "\nUplink buckets RXM\n"
+                   "-----------------------------------\n");
+
+       for (i = 0; i < IPC_RXBUF_NUM_BUCKETS_RXM; i++) {
+               if (rx_info->pkt_handle_bucket_rxm[i] == 0)
+                       continue;
+
+               cl_snprintf(&buf, &len, &buf_size,
+                           "Bucket [%lu -> %lu]: %u\n",
+                           i * IPC_RXBUF_BUCKET_SIZE,
+                           (i + 1) * IPC_RXBUF_BUCKET_SIZE - 1,
+                           rx_info->pkt_handle_bucket_rxm[i]);
+       }
+
+       cl_snprintf(&buf, &len, &buf_size,
+                   "\nUplink buckets FW\n"
+                   "-----------------------------------\n");
+
+       for (i = 0; i < IPC_RXBUF_NUM_BUCKETS_FW; i++) {
+               if (rx_info->pkt_handle_bucket_fw[i] == 0)
+                       continue;
+
+               cl_snprintf(&buf, &len, &buf_size,
+                           "Bucket [%lu -> %lu]: %u\n",
+                           i * IPC_RXBUF_BUCKET_SIZE,
+                           (i + 1) * IPC_RXBUF_BUCKET_SIZE - 1,
+                           rx_info->pkt_handle_bucket_fw[i]);
+       }
+
+       err = cl_vendor_reply(cl_hw, buf, len);
+       kfree(buf);
+
+       return err;
+}
+
+void cl_rx_netif(struct cl_hw *cl_hw, struct cl_vif *cl_vif, struct sk_buff *skb)
+{
+#ifdef TRACE_SUPPORT
+       trace_cl_trace_netif_rx_start(cl_hw->idx);
+#endif
+
+       cl_hw->rx_info.netif_rx++;
+
+       netif_receive_skb(skb);
+
+#ifdef TRACE_SUPPORT
+       trace_cl_trace_netif_rx_end(cl_hw->idx);
+#endif
+}
+
+void cl_rx_finish(struct cl_hw *cl_hw, struct sk_buff *skb)
+{
+       struct cl_vif *cl_vif = NETDEV_TO_CL_VIF(skb->dev);
+
+       cl_rx_netif(cl_hw, cl_vif, skb);
+}
+
+u8 cl_rx_get_skb_ac(struct ieee80211_hdr *hdr)
+{
+       if (ieee80211_is_data_qos(hdr->frame_control)) {
+               u8 *qos_ctl = ieee80211_get_qos_ctl(hdr);
+               u8 tid = *qos_ctl & IEEE80211_QOS_CTL_TAG1D_MASK;
+               return tid_to_ac[tid];
+       }
+
+       return AC_BE;
+}
+
+bool cl_rx_process_in_irq(struct cl_hw *cl_hw)
+{
+       struct cl_ipc_ring_indices *indices = cl_hw->ipc_env->ring_indices_elem->indices;
+       u32 read_idx = le32_to_cpu(indices->rxdesc_read_idx[CL_RX_BUF_RXM]);
+       u32 write_idx = le32_to_cpu(indices->rxdesc_write_idx[CL_RX_BUF_RXM]);
+       u32 free_buffers = read_idx - write_idx;
+
+       if (free_buffers < (IPC_RXBUF_CNT_RXM / 2)) {
+               cl_hw->rx_info.buffer_process_irq++;
+               return true;
+       }
+
+       cl_hw->rx_info.buffer_process_tasklet++;
+       return false;
+}
+
--
2.30.0

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________________________________


  parent reply	other threads:[~2021-06-17 16:08 UTC|newest]

Thread overview: 262+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-17 15:58 [RFC v1 000/256] wireless: cl8k driver for Celeno IEEE 802.11ax devices viktor.barna
2021-06-17 15:58 ` [RFC v1 001/256] celeno: add Kconfig viktor.barna
2021-06-17 15:58 ` [RFC v1 002/256] celeno: add Makefile viktor.barna
2021-06-17 15:58 ` [RFC v1 003/256] cl8k: add Kconfig viktor.barna
2021-06-17 15:58 ` [RFC v1 004/256] cl8k: add Makefile viktor.barna
2021-06-17 15:58 ` [RFC v1 005/256] cl8k: add afe.c viktor.barna
2021-06-17 15:58 ` [RFC v1 006/256] cl8k: add afe.h viktor.barna
2021-06-17 15:58 ` [RFC v1 007/256] cl8k: add agc_params.c viktor.barna
2021-06-17 15:58 ` [RFC v1 008/256] cl8k: add agc_params.h viktor.barna
2021-06-17 15:58 ` [RFC v1 009/256] cl8k: add ampdu.c viktor.barna
2021-06-17 15:58 ` [RFC v1 010/256] cl8k: add ampdu.h viktor.barna
2021-06-17 15:58 ` [RFC v1 011/256] cl8k: add ate.c viktor.barna
2021-06-17 15:58 ` [RFC v1 012/256] cl8k: add ate.h viktor.barna
2021-06-17 15:58 ` [RFC v1 013/256] cl8k: add band.c viktor.barna
2021-06-17 15:58 ` [RFC v1 014/256] cl8k: add band.h viktor.barna
2021-06-17 15:58 ` [RFC v1 015/256] cl8k: add bf.c viktor.barna
2021-06-17 15:58 ` [RFC v1 016/256] cl8k: add bf.h viktor.barna
2021-06-17 15:58 ` [RFC v1 017/256] cl8k: add bus/pci/ipc.c viktor.barna
2021-06-17 15:58 ` [RFC v1 018/256] cl8k: add bus/pci/ipc.h viktor.barna
2021-06-17 15:58 ` [RFC v1 019/256] cl8k: add bus/pci/irq.c viktor.barna
2021-06-17 15:58 ` [RFC v1 020/256] cl8k: add bus/pci/irq.h viktor.barna
2021-06-17 15:58 ` [RFC v1 021/256] cl8k: add bus/pci/msg_pci.c viktor.barna
2021-06-17 15:58 ` [RFC v1 022/256] cl8k: add bus/pci/msg_pci.h viktor.barna
2021-06-17 15:58 ` [RFC v1 023/256] cl8k: add bus/pci/pci.c viktor.barna
2021-06-17 15:58 ` [RFC v1 024/256] cl8k: add bus/pci/rx_pci.c viktor.barna
2021-06-17 15:58 ` [RFC v1 025/256] cl8k: add bus/pci/rx_pci.h viktor.barna
2021-06-17 15:58 ` [RFC v1 026/256] cl8k: add bus/pci/tx_pci.c viktor.barna
2021-06-17 15:58 ` [RFC v1 027/256] cl8k: add bus/pci/tx_pci.h viktor.barna
2021-06-17 15:58 ` [RFC v1 028/256] cl8k: add calib.c viktor.barna
2021-06-17 15:58 ` [RFC v1 029/256] cl8k: add calib.h viktor.barna
2021-06-17 15:58 ` [RFC v1 030/256] cl8k: add cap.c viktor.barna
2021-06-17 15:58 ` [RFC v1 031/256] cl8k: add cap.h viktor.barna
2021-06-17 15:58 ` [RFC v1 032/256] cl8k: add cca.c viktor.barna
2021-06-17 15:58 ` [RFC v1 033/256] cl8k: add cca.h viktor.barna
2021-06-17 15:58 ` [RFC v1 034/256] cl8k: add cecli.c viktor.barna
2021-06-17 15:58 ` [RFC v1 035/256] cl8k: add cecli.h viktor.barna
2021-06-17 15:58 ` [RFC v1 036/256] cl8k: add chandef.c viktor.barna
2021-06-17 15:58 ` [RFC v1 037/256] cl8k: add chandef.h viktor.barna
2021-06-17 15:58 ` [RFC v1 038/256] cl8k: add channel.c viktor.barna
2021-06-17 15:58 ` [RFC v1 039/256] cl8k: add channel.h viktor.barna
2021-06-17 15:58 ` [RFC v1 040/256] cl8k: add chan_info.c viktor.barna
2021-06-17 15:58 ` [RFC v1 041/256] cl8k: add chan_info.h viktor.barna
2021-06-17 15:58 ` [RFC v1 042/256] cl8k: add chip.c viktor.barna
2021-06-17 15:58 ` [RFC v1 043/256] cl8k: add chip.h viktor.barna
2021-06-17 15:58 ` [RFC v1 044/256] cl8k: add chip_config.c viktor.barna
2021-06-17 15:58 ` [RFC v1 045/256] cl8k: add chip_config.h viktor.barna
2021-06-17 15:58 ` [RFC v1 046/256] cl8k: add config.c viktor.barna
2021-06-17 15:58 ` [RFC v1 047/256] cl8k: add config.h viktor.barna
2021-06-17 15:58 ` [RFC v1 048/256] cl8k: add coredump.c viktor.barna
2021-06-17 15:58 ` [RFC v1 049/256] cl8k: add coredump.h viktor.barna
2021-06-17 15:58 ` [RFC v1 050/256] cl8k: add data_rates.c viktor.barna
2021-06-17 15:58 ` [RFC v1 051/256] cl8k: add data_rates.h viktor.barna
2021-06-17 15:58 ` [RFC v1 052/256] cl8k: add dbgfile.c viktor.barna
2021-06-17 15:59 ` [RFC v1 053/256] cl8k: add dbgfile.h viktor.barna
2021-06-17 15:59 ` [RFC v1 054/256] cl8k: add debug.h viktor.barna
2021-06-17 15:59 ` [RFC v1 055/256] cl8k: add debugfs.c viktor.barna
2021-06-17 15:59 ` [RFC v1 056/256] cl8k: add debugfs.h viktor.barna
2021-06-17 15:59 ` [RFC v1 057/256] cl8k: add debugfs_defs.h viktor.barna
2021-06-17 15:59 ` [RFC v1 058/256] cl8k: add def.h viktor.barna
2021-06-17 15:59 ` [RFC v1 059/256] cl8k: add dfs/dfs.c viktor.barna
2021-06-17 15:59 ` [RFC v1 060/256] cl8k: add dfs/dfs.h viktor.barna
2021-06-17 15:59 ` [RFC v1 061/256] cl8k: add dfs/dfs_db.h viktor.barna
2021-06-17 15:59 ` [RFC v1 062/256] cl8k: add dfs/radar.c viktor.barna
2021-06-17 15:59 ` [RFC v1 063/256] cl8k: add dfs/radar.h viktor.barna
2021-06-17 15:59 ` [RFC v1 064/256] cl8k: add drv_ops.h viktor.barna
2021-06-17 15:59 ` [RFC v1 065/256] cl8k: add dsp.c viktor.barna
2021-06-17 15:59 ` [RFC v1 066/256] cl8k: add dsp.h viktor.barna
2021-06-17 15:59 ` [RFC v1 067/256] cl8k: add e2p.c viktor.barna
2021-06-17 15:59 ` [RFC v1 068/256] cl8k: add e2p.h viktor.barna
2021-06-17 15:59 ` [RFC v1 069/256] cl8k: add edca.c viktor.barna
2021-06-17 15:59 ` [RFC v1 070/256] cl8k: add edca.h viktor.barna
2021-06-17 15:59 ` [RFC v1 071/256] cl8k: add ela.c viktor.barna
2021-06-17 15:59 ` [RFC v1 072/256] cl8k: add ela.h viktor.barna
2021-06-17 15:59 ` [RFC v1 073/256] cl8k: add enhanced_tim.c viktor.barna
2021-06-17 15:59 ` [RFC v1 074/256] cl8k: add enhanced_tim.h viktor.barna
2021-06-17 15:59 ` [RFC v1 075/256] cl8k: add env_det.c viktor.barna
2021-06-17 15:59 ` [RFC v1 076/256] cl8k: add env_det.h viktor.barna
2021-06-17 15:59 ` [RFC v1 077/256] cl8k: add ext/dyn_bcast_rate.c viktor.barna
2021-06-17 15:59 ` [RFC v1 078/256] cl8k: add ext/dyn_bcast_rate.h viktor.barna
2021-06-17 15:59 ` [RFC v1 079/256] cl8k: add ext/dyn_mcast_rate.c viktor.barna
2021-06-17 15:59 ` [RFC v1 080/256] cl8k: add ext/dyn_mcast_rate.h viktor.barna
2021-06-17 15:59 ` [RFC v1 081/256] cl8k: add ext/vlan_dscp.c viktor.barna
2021-06-17 15:59 ` [RFC v1 082/256] cl8k: add ext/vlan_dscp.h viktor.barna
2021-06-17 15:59 ` [RFC v1 083/256] cl8k: add fem.c viktor.barna
2021-06-17 15:59 ` [RFC v1 084/256] cl8k: add fem.h viktor.barna
2021-06-17 15:59 ` [RFC v1 085/256] cl8k: add fem_common.h viktor.barna
2021-06-17 15:59 ` [RFC v1 086/256] cl8k: add fw/fw_dbg.c viktor.barna
2021-06-17 15:59 ` [RFC v1 087/256] cl8k: add fw/fw_dbg.h viktor.barna
2021-06-17 15:59 ` [RFC v1 088/256] cl8k: add fw/fw_file.c viktor.barna
2021-06-17 15:59 ` [RFC v1 089/256] cl8k: add fw/fw_file.h viktor.barna
2021-06-17 15:59 ` [RFC v1 090/256] cl8k: add fw/fw_msg.c viktor.barna
2021-06-17 15:59 ` [RFC v1 091/256] cl8k: add fw/fw_msg.h viktor.barna
2021-06-17 15:59 ` [RFC v1 092/256] cl8k: add fw/msg_cfm.c viktor.barna
2021-06-17 15:59 ` [RFC v1 093/256] cl8k: add fw/msg_cfm.h viktor.barna
2021-06-17 15:59 ` [RFC v1 094/256] cl8k: add fw/msg_rx.c viktor.barna
2021-06-17 15:59 ` [RFC v1 095/256] cl8k: add fw/msg_rx.h viktor.barna
2021-06-17 15:59 ` [RFC v1 096/256] cl8k: add fw/msg_tx.c viktor.barna
2021-06-17 15:59 ` [RFC v1 097/256] cl8k: add fw/msg_tx.h viktor.barna
2021-06-17 15:59 ` [RFC v1 098/256] cl8k: add hw.c viktor.barna
2021-06-17 15:59 ` [RFC v1 099/256] cl8k: add hw.h viktor.barna
2021-06-17 15:59 ` [RFC v1 100/256] cl8k: add hw_assert.c viktor.barna
2021-06-17 15:59 ` [RFC v1 101/256] cl8k: add hw_assert.h viktor.barna
2021-06-17 15:59 ` [RFC v1 102/256] cl8k: add ipc_shared.h viktor.barna
2021-06-17 15:59 ` [RFC v1 103/256] cl8k: add key.c viktor.barna
2021-06-17 15:59 ` [RFC v1 104/256] cl8k: add key.h viktor.barna
2021-06-17 15:59 ` [RFC v1 105/256] cl8k: add mac80211.c viktor.barna
2021-06-17 15:59 ` [RFC v1 106/256] cl8k: add mac80211.h viktor.barna
2021-06-17 15:59 ` [RFC v1 107/256] cl8k: add mac_addr.c viktor.barna
2021-06-17 15:59 ` [RFC v1 108/256] cl8k: add mac_addr.h viktor.barna
2021-06-17 15:59 ` [RFC v1 109/256] cl8k: add main.c viktor.barna
2021-06-17 15:59 ` [RFC v1 110/256] cl8k: add main.h viktor.barna
2021-06-17 15:59 ` [RFC v1 111/256] cl8k: add maintenance.c viktor.barna
2021-06-17 15:59 ` [RFC v1 112/256] cl8k: add maintenance.h viktor.barna
2021-06-17 16:00 ` [RFC v1 113/256] cl8k: add mib.c viktor.barna
2021-06-17 16:00 ` [RFC v1 114/256] cl8k: add mib.h viktor.barna
2021-06-17 16:00 ` [RFC v1 115/256] cl8k: add motion_sense.c viktor.barna
2021-06-17 16:00 ` [RFC v1 116/256] cl8k: add motion_sense.h viktor.barna
2021-06-17 16:00 ` [RFC v1 117/256] cl8k: add netlink.c viktor.barna
2021-06-17 16:00 ` [RFC v1 118/256] cl8k: add netlink.h viktor.barna
2021-06-17 16:00 ` [RFC v1 119/256] cl8k: add noise.c viktor.barna
2021-06-17 16:00 ` [RFC v1 120/256] cl8k: add noise.h viktor.barna
2021-06-17 16:00 ` [RFC v1 121/256] cl8k: add omi.c viktor.barna
2021-06-17 16:00 ` [RFC v1 122/256] cl8k: add omi.h viktor.barna
2021-06-17 16:00 ` [RFC v1 123/256] cl8k: add ops.c viktor.barna
2021-06-17 16:00 ` [RFC v1 124/256] cl8k: add ops.h viktor.barna
2021-06-17 16:00 ` [RFC v1 125/256] cl8k: add phy/phy.c viktor.barna
2021-06-17 16:00 ` [RFC v1 126/256] cl8k: add phy/phy.h viktor.barna
2021-06-17 16:00 ` [RFC v1 127/256] cl8k: add phy/phy_athos_lut.c viktor.barna
2021-06-17 16:00 ` [RFC v1 128/256] cl8k: add phy/phy_athos_lut.h viktor.barna
2021-06-17 16:00 ` [RFC v1 129/256] cl8k: add phy/phy_common_lut.c viktor.barna
2021-06-17 16:00 ` [RFC v1 130/256] cl8k: add phy/phy_common_lut.h viktor.barna
2021-06-17 16:00 ` [RFC v1 131/256] cl8k: add phy/phy_olympus_lut.c viktor.barna
2021-06-17 16:00 ` [RFC v1 132/256] cl8k: add phy/phy_olympus_lut.h viktor.barna
2021-06-17 16:00 ` [RFC v1 133/256] cl8k: add power.c viktor.barna
2021-06-17 16:00 ` [RFC v1 134/256] cl8k: add power.h viktor.barna
2021-06-17 16:00 ` [RFC v1 135/256] cl8k: add power_cli.c viktor.barna
2021-06-17 16:00 ` [RFC v1 136/256] cl8k: add power_cli.h viktor.barna
2021-06-17 16:00 ` [RFC v1 137/256] cl8k: add power_table.c viktor.barna
2021-06-17 16:00 ` [RFC v1 138/256] cl8k: add power_table.h viktor.barna
2021-06-17 16:00 ` [RFC v1 139/256] cl8k: add prot_mode.c viktor.barna
2021-06-17 16:00 ` [RFC v1 140/256] cl8k: add prot_mode.h viktor.barna
2021-06-17 16:00 ` [RFC v1 141/256] cl8k: add radio.c viktor.barna
2021-06-17 16:00 ` [RFC v1 142/256] cl8k: add radio.h viktor.barna
2021-06-17 16:00 ` [RFC v1 143/256] cl8k: add rate_ctrl.c viktor.barna
2021-06-17 16:00 ` [RFC v1 144/256] cl8k: add rate_ctrl.h viktor.barna
2021-06-17 16:00 ` [RFC v1 145/256] cl8k: add recovery.c viktor.barna
2021-06-17 16:00 ` [RFC v1 146/256] cl8k: add recovery.h viktor.barna
2021-06-17 16:00 ` [RFC v1 147/256] cl8k: add reg/ceva.h viktor.barna
2021-06-17 16:00 ` [RFC v1 148/256] cl8k: add reg/reg_access.h viktor.barna
2021-06-17 16:00 ` [RFC v1 149/256] cl8k: add reg/reg_cli.c viktor.barna
2021-06-17 16:00 ` [RFC v1 150/256] cl8k: add reg/reg_cli.h viktor.barna
2021-06-17 16:00 ` [RFC v1 151/256] cl8k: add reg/reg_cmu.h viktor.barna
2021-06-17 16:00 ` [RFC v1 152/256] cl8k: add reg/reg_fem.h viktor.barna
2021-06-17 16:00 ` [RFC v1 153/256] cl8k: add reg/reg_io_ctrl.h viktor.barna
2021-06-17 16:00 ` [RFC v1 154/256] cl8k: add reg/reg_ipc.h viktor.barna
2021-06-17 16:00 ` [RFC v1 155/256] cl8k: add reg/reg_lcu_common.h viktor.barna
2021-06-17 16:00 ` [RFC v1 156/256] cl8k: add reg/reg_lcu_phy.h viktor.barna
2021-06-17 16:00 ` [RFC v1 157/256] cl8k: add reg/reg_macdsp_api.h viktor.barna
2021-06-17 16:00 ` [RFC v1 158/256] cl8k: add reg/reg_macsys_gcu.h viktor.barna
2021-06-17 16:00 ` [RFC v1 159/256] cl8k: add reg/reg_mac_hw.h viktor.barna
2021-06-17 16:00 ` [RFC v1 160/256] cl8k: add reg/reg_mac_hw_mu.h viktor.barna
2021-06-17 16:00 ` [RFC v1 161/256] cl8k: add reg/reg_modem_gcu.h viktor.barna
2021-06-17 16:00 ` [RFC v1 162/256] cl8k: add reg/reg_otp_pvt.h viktor.barna
2021-06-17 16:00 ` [RFC v1 163/256] cl8k: add reg/reg_ricu.h viktor.barna
2021-06-17 16:00 ` [RFC v1 164/256] cl8k: add reg/reg_riu.h viktor.barna
2021-06-17 16:00 ` [RFC v1 165/256] cl8k: add reg/reg_riu_rc.h viktor.barna
2021-06-17 16:00 ` [RFC v1 166/256] cl8k: add rf_boot.c viktor.barna
2021-06-17 16:00 ` [RFC v1 167/256] cl8k: add rf_boot.h viktor.barna
2021-06-17 16:00 ` [RFC v1 168/256] cl8k: add rsrc_mgmt.c viktor.barna
2021-06-17 16:00 ` [RFC v1 169/256] cl8k: add rsrc_mgmt.h viktor.barna
2021-06-17 16:00 ` [RFC v1 170/256] cl8k: add rssi.c viktor.barna
2021-06-17 16:00 ` [RFC v1 171/256] cl8k: add rssi.h viktor.barna
2021-06-17 16:00 ` viktor.barna [this message]
2021-06-17 16:01 ` [RFC v1 173/256] cl8k: add rx/rx.h viktor.barna
2021-06-17 16:01 ` [RFC v1 174/256] cl8k: add rx/rx_amsdu.c viktor.barna
2021-06-17 16:01 ` [RFC v1 175/256] cl8k: add rx/rx_amsdu.h viktor.barna
2021-06-17 16:01 ` [RFC v1 176/256] cl8k: add rx/rx_filter.c viktor.barna
2021-06-17 16:01 ` [RFC v1 177/256] cl8k: add rx/rx_filter.h viktor.barna
2021-06-17 16:01 ` [RFC v1 178/256] cl8k: add rx/rx_reorder.c viktor.barna
2021-06-17 16:01 ` [RFC v1 179/256] cl8k: add rx/rx_reorder.h viktor.barna
2021-06-17 16:01 ` [RFC v1 180/256] cl8k: add sounding.c viktor.barna
2021-06-17 16:01 ` [RFC v1 181/256] cl8k: add sounding.h viktor.barna
2021-06-17 16:01 ` [RFC v1 182/256] cl8k: add sta.c viktor.barna
2021-06-17 16:01 ` [RFC v1 183/256] cl8k: add sta.h viktor.barna
2021-06-17 16:01 ` [RFC v1 184/256] cl8k: add stats.c viktor.barna
2021-06-17 16:01 ` [RFC v1 185/256] cl8k: add stats.h viktor.barna
2021-06-17 16:01 ` [RFC v1 186/256] cl8k: add tcv_config.c viktor.barna
2021-06-17 16:01 ` [RFC v1 187/256] cl8k: add tcv_config.h viktor.barna
2021-06-17 16:01 ` [RFC v1 188/256] cl8k: add temperature.c viktor.barna
2021-06-17 16:01 ` [RFC v1 189/256] cl8k: add temperature.h viktor.barna
2021-06-17 16:01 ` [RFC v1 190/256] cl8k: add trace.c viktor.barna
2021-06-17 16:01 ` [RFC v1 191/256] cl8k: add trace.h viktor.barna
2021-06-17 16:01 ` [RFC v1 192/256] cl8k: add traffic.c viktor.barna
2021-06-17 16:01 ` [RFC v1 193/256] cl8k: add traffic.h viktor.barna
2021-06-17 16:01 ` [RFC v1 194/256] cl8k: add twt.c viktor.barna
2021-06-17 16:01 ` [RFC v1 195/256] cl8k: add twt.h viktor.barna
2021-06-17 16:01 ` [RFC v1 196/256] cl8k: add twt_cli.c viktor.barna
2021-06-17 16:01 ` [RFC v1 197/256] cl8k: add twt_cli.h viktor.barna
2021-06-17 16:01 ` [RFC v1 198/256] cl8k: add twt_frame.c viktor.barna
2021-06-17 16:01 ` [RFC v1 199/256] cl8k: add twt_frame.h viktor.barna
2021-06-17 16:01 ` [RFC v1 200/256] cl8k: add tx/agg_cfm.c viktor.barna
2021-06-17 16:01 ` [RFC v1 201/256] cl8k: add tx/agg_cfm.h viktor.barna
2021-06-17 16:01 ` [RFC v1 202/256] cl8k: add tx/agg_tx_report.c viktor.barna
2021-06-17 16:01 ` [RFC v1 203/256] cl8k: add tx/agg_tx_report.h viktor.barna
2021-06-17 16:01 ` [RFC v1 204/256] cl8k: add tx/baw.c viktor.barna
2021-06-17 16:01 ` [RFC v1 205/256] cl8k: add tx/baw.h viktor.barna
2021-06-17 16:01 ` [RFC v1 206/256] cl8k: add tx/bcmc_cfm.c viktor.barna
2021-06-17 16:01 ` [RFC v1 207/256] cl8k: add tx/bcmc_cfm.h viktor.barna
2021-06-17 16:01 ` [RFC v1 208/256] cl8k: add tx/single_cfm.c viktor.barna
2021-06-17 16:01 ` [RFC v1 209/256] cl8k: add tx/single_cfm.h viktor.barna
2021-06-17 16:01 ` [RFC v1 210/256] cl8k: add tx/sw_txhdr.c viktor.barna
2021-06-17 16:01 ` [RFC v1 211/256] cl8k: add tx/sw_txhdr.h viktor.barna
2021-06-17 16:01 ` [RFC v1 212/256] cl8k: add tx/tx.c viktor.barna
2021-06-17 16:01 ` [RFC v1 213/256] cl8k: add tx/tx.h viktor.barna
2021-06-17 16:01 ` [RFC v1 214/256] cl8k: add tx/tx_amsdu.c viktor.barna
2021-06-17 16:01 ` [RFC v1 215/256] cl8k: add tx/tx_amsdu.h viktor.barna
2021-06-17 16:01 ` [RFC v1 216/256] cl8k: add tx/tx_inject.c viktor.barna
2021-06-17 16:01 ` [RFC v1 217/256] cl8k: add tx/tx_inject.h viktor.barna
2021-06-17 16:01 ` [RFC v1 218/256] cl8k: add tx/tx_queue.c viktor.barna
2021-06-17 16:01 ` [RFC v1 219/256] cl8k: add tx/tx_queue.h viktor.barna
2021-06-17 16:01 ` [RFC v1 220/256] cl8k: add utils/file.c viktor.barna
2021-06-17 16:01 ` [RFC v1 221/256] cl8k: add utils/file.h viktor.barna
2021-06-17 16:01 ` [RFC v1 222/256] cl8k: add utils/ip.c viktor.barna
2021-06-17 16:01 ` [RFC v1 223/256] cl8k: add utils/ip.h viktor.barna
2021-06-17 16:01 ` [RFC v1 224/256] cl8k: add utils/math.h viktor.barna
2021-06-17 16:01 ` [RFC v1 225/256] cl8k: add utils/string.c viktor.barna
2021-06-17 16:01 ` [RFC v1 226/256] cl8k: add utils/string.h viktor.barna
2021-06-17 16:01 ` [RFC v1 227/256] cl8k: add utils/timer.c viktor.barna
2021-06-17 16:01 ` [RFC v1 228/256] cl8k: add utils/timer.h viktor.barna
2021-06-17 16:01 ` [RFC v1 229/256] cl8k: add utils/utils.c viktor.barna
2021-06-17 16:01 ` [RFC v1 230/256] cl8k: add utils/utils.h viktor.barna
2021-06-17 16:01 ` [RFC v1 231/256] cl8k: add vendor_cmd.c viktor.barna
2021-06-17 16:01 ` [RFC v1 232/256] cl8k: add vendor_cmd.h viktor.barna
2021-06-17 16:02 ` [RFC v1 233/256] cl8k: add version.c viktor.barna
2021-06-17 16:02 ` [RFC v1 234/256] cl8k: add version.h viktor.barna
2021-06-17 16:02 ` [RFC v1 235/256] cl8k: add vif.c viktor.barna
2021-06-17 16:02 ` [RFC v1 236/256] cl8k: add vif.h viktor.barna
2021-06-17 16:02 ` [RFC v1 237/256] cl8k: add vns.c viktor.barna
2021-06-17 16:02 ` [RFC v1 238/256] cl8k: add vns.h viktor.barna
2021-06-17 16:02 ` [RFC v1 239/256] cl8k: add wrs/wrs.c viktor.barna
2021-06-17 16:02 ` [RFC v1 240/256] cl8k: add wrs/wrs.h viktor.barna
2021-06-17 16:02 ` [RFC v1 241/256] cl8k: add wrs/wrs_ap.c viktor.barna
2021-06-17 16:02 ` [RFC v1 242/256] cl8k: add wrs/wrs_ap.h viktor.barna
2021-06-17 16:02 ` [RFC v1 243/256] cl8k: add wrs/wrs_api.c viktor.barna
2021-06-17 16:02 ` [RFC v1 244/256] cl8k: add wrs/wrs_api.h viktor.barna
2021-06-17 16:02 ` [RFC v1 245/256] cl8k: add wrs/wrs_cli.c viktor.barna
2021-06-17 16:02 ` [RFC v1 246/256] cl8k: add wrs/wrs_cli.h viktor.barna
2021-06-17 16:02 ` [RFC v1 247/256] cl8k: add wrs/wrs_db.h viktor.barna
2021-06-17 16:02 ` [RFC v1 248/256] cl8k: add wrs/wrs_rssi.c viktor.barna
2021-06-17 16:02 ` [RFC v1 249/256] cl8k: add wrs/wrs_rssi.h viktor.barna
2021-06-17 16:02 ` [RFC v1 250/256] cl8k: add wrs/wrs_sta.c viktor.barna
2021-06-17 16:02 ` [RFC v1 251/256] cl8k: add wrs/wrs_sta.h viktor.barna
2021-06-17 16:02 ` [RFC v1 252/256] cl8k: add wrs/wrs_stats.c viktor.barna
2021-06-17 16:02 ` [RFC v1 253/256] cl8k: add wrs/wrs_stats.h viktor.barna
2021-06-17 16:02 ` [RFC v1 254/256] cl8k: add wrs/wrs_tables.c viktor.barna
2021-06-17 16:02 ` [RFC v1 255/256] cl8k: add wrs/wrs_tables.h viktor.barna
2021-06-17 16:02 ` [RFC v1 256/256] wireless: add Celeno vendor viktor.barna
2021-06-17 17:23 ` [RFC v1 000/256] wireless: cl8k driver for Celeno IEEE 802.11ax devices Johannes Berg
2022-05-22 17:51   ` viktor.barna
2021-06-19  6:39 ` Kalle Valo
2022-05-13 21:11   ` viktor.barna
2022-05-14  4:25     ` Kalle Valo

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