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From: Pratyush Yadav <p.yadav@ti.com>
To: Jagan Teki <jagan@amarulasolutions.com>,
	Vignesh R <vigneshr@ti.com>, Ryder Lee <ryder.lee@mediatek.com>,
	Weijie Gao <weijie.gao@mediatek.com>,
	Chunfeng Yun <chunfeng.yun@mediatek.com>,
	GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,
	<u-boot@lists.denx.de>
Cc: Pratyush Yadav <p.yadav@ti.com>
Subject: [PATCH v10 25/27] mtd: spi-nor-core: Add non-uniform erase for Spansion/Cypress
Date: Sat, 26 Jun 2021 00:47:27 +0530	[thread overview]
Message-ID: <20210625191729.31798-26-p.yadav@ti.com> (raw)
In-Reply-To: <20210625191729.31798-1-p.yadav@ti.com>

From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>

Some of Spansion/Cypress chips have overlaid 4KB sectors at top and/or
bottom, depending on the device configuration, while U-Boot supports
uniform sector layout only.

The spansion_erase_non_uniform()  erases overlaid 4KB sectors,
non-overlaid portion of normal sector, and remaining normal sectors, by
selecting correct erase command and size based on the address to erase
and size of overlaid portion in parameters. Since different Spansion
flashes can use different opcode for erasing the 4K sectors, the opcode
must be passed in as a parameter based on the flash being used.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
[p.yadav@ti.com: Refactor the function to be compatible with nor->erase,
make 4K opcode customizable, call spi_nor_setup_op() before executing
the op.]
---
 drivers/mtd/spi/spi-nor-core.c | 61 ++++++++++++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index ece4bc9e84..f2354fea7f 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -887,6 +887,67 @@ erase_err:
 	return ret;
 }
 
+#ifdef CONFIG_SPI_FLASH_S28HS512T
+/**
+ * spansion_erase_non_uniform() - erase non-uniform sectors for Spansion/Cypress
+ *                                chips
+ * @nor:	pointer to a 'struct spi_nor'
+ * @addr:	address of the sector to erase
+ * @opcode_4k:	opcode for 4K sector erase
+ * @ovlsz_top:	size of overlaid portion at the top address
+ * @ovlsz_btm:	size of overlaid portion at the bottom address
+ *
+ * Erase an address range on the nor chip that can contain 4KB sectors overlaid
+ * on top and/or bottom. The appropriate erase opcode and size are chosen by
+ * address to erase and size of overlaid portion.
+ *
+ * Return: number of bytes erased on success, -errno otherwise.
+ */
+static int spansion_erase_non_uniform(struct spi_nor *nor, u32 addr,
+				      u8 opcode_4k, u32 ovlsz_top,
+				      u32 ovlsz_btm)
+{
+	struct spi_mem_op op =
+		SPI_MEM_OP(SPI_MEM_OP_CMD(nor->erase_opcode, 0),
+			   SPI_MEM_OP_ADDR(nor->addr_width, addr, 0),
+			   SPI_MEM_OP_NO_DUMMY,
+			   SPI_MEM_OP_NO_DATA);
+	struct mtd_info *mtd = &nor->mtd;
+	u32 erasesize;
+	int ret;
+
+	/* 4KB sectors */
+	if (op.addr.val < ovlsz_btm ||
+	    op.addr.val >= mtd->size - ovlsz_top) {
+		op.cmd.opcode = opcode_4k;
+		erasesize = SZ_4K;
+
+	/* Non-overlaid portion in the normal sector at the bottom */
+	} else if (op.addr.val == ovlsz_btm) {
+		op.cmd.opcode = nor->erase_opcode;
+		erasesize = mtd->erasesize - ovlsz_btm;
+
+	/* Non-overlaid portion in the normal sector at the top */
+	} else if (op.addr.val == mtd->size - mtd->erasesize) {
+		op.cmd.opcode = nor->erase_opcode;
+		erasesize = mtd->erasesize - ovlsz_top;
+
+	/* Normal sectors */
+	} else {
+		op.cmd.opcode = nor->erase_opcode;
+		erasesize = mtd->erasesize;
+	}
+
+	spi_nor_setup_op(nor, &op, nor->write_proto);
+
+	ret = spi_mem_exec_op(nor->spi, &op);
+	if (ret)
+		return ret;
+
+	return erasesize;
+}
+#endif
+
 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
 /* Write status register and ensure bits in mask match written values */
 static int write_sr_and_check(struct spi_nor *nor, u8 status_new, u8 mask)
-- 
2.30.0


  parent reply	other threads:[~2021-06-25 19:22 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-25 19:17 [PATCH v10 00/27] mtd: spi-nor-core: add xSPI Octal DTR support Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 01/27] spi: spi-mem: allow specifying whether an op is DTR or not Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 02/27] spi: spi-mem: allow specifying a command's extension Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 03/27] spi: spi-mem: export spi_mem_default_supports_op() Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 04/27] spi: spi-mem: add spi_mem_dtr_supports_op() Pratyush Yadav
2021-06-26  9:14   ` Jagan Teki
2021-06-27  8:35     ` Pratyush Yadav
2021-06-28  6:39       ` Jagan Teki
2021-06-28  9:17         ` Pratyush Yadav
2021-06-28  9:23           ` Jagan Teki
2021-06-25 19:17 ` [PATCH v10 05/27] spi: cadence-qspi: Do not calibrate when device tree sets read delay Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 06/27] spi: cadence-qspi: Add a small delay before indirect writes Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 07/27] spi: cadence-qspi: Add support for octal DTR flashes Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 08/27] mtd: spi-nor-core: Fix address width on flash chips > 16MB Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 09/27] mtd: spi-nor-core: Add a ->setup() hook Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 10/27] mtd: spi-nor-core: Move SFDP related declarations to top Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 11/27] mtd: spi-nor-core: Introduce flash-specific fixup hooks Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 12/27] mtd: spi-nor-core: Rework hwcaps selection Pratyush Yadav
2021-07-28 10:13   ` Bin Meng
2021-07-28 10:44     ` Pratyush Yadav
2021-07-28 15:56       ` Bin Meng
2021-06-25 19:17 ` [PATCH v10 13/27] mtd: spi-nor-core: Do not set data direction when there is no data Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 14/27] mtd: spi-nor-core: Add support for DTR protocol Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 15/27] mtd: spi-nor-core: prepare BFPT parsing for JESD216 rev D Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 16/27] mtd: spi-nor-core: Get command opcode extension type from BFPT Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 17/27] mtd: spi-nor-core: Parse xSPI Profile 1.0 table Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 18/27] mtd: spi-nor-core: Prepare Read SR and FSR for Octal DTR mode Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 19/27] mtd: spi-nor-core: Enable octal DTR mode when possible Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 20/27] mtd: spi-nor-core: Do not make invalid quad enable fatal Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 21/27] mtd: spi-nor-core: Detect Soft Reset sequence support from BFPT Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 22/27] mtd: spi-nor-core: Perform a Soft Reset on shutdown Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 23/27] mtd: spi-nor-core: Perform a Soft Reset on boot Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 24/27] mtd: spi-nor-core: allow truncated erases Pratyush Yadav
2021-06-25 19:17 ` Pratyush Yadav [this message]
2021-06-25 19:17 ` [PATCH v10 26/27] mtd: spi-nor-core: Add support for Cypress Semper flash Pratyush Yadav
2021-06-25 19:17 ` [PATCH v10 27/27] mtd: spi-nor-core: Allow using Micron mt35xu512aba in Octal DTR mode Pratyush Yadav
2021-06-28 15:52 ` [PATCH v10 00/27] mtd: spi-nor-core: add xSPI Octal DTR support Jagan Teki

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