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From: Simon Glass <sjg@chromium.org>
To: U-Boot Mailing List <u-boot@lists.denx.de>
Cc: Simon Glass <sjg@chromium.org>, Bin Meng <bmeng.cn@gmail.com>,
	Stefan Reinauer <reinauer@chromium.org>,
	Vadim Bendebury <vbendeb@chromium.org>
Subject: [PATCH v3 12/16] x86: coreboot: Use vendor in the Kconfig
Date: Sun, 27 Jun 2021 17:51:07 -0600	[thread overview]
Message-ID: <20210627175102.v3.12.Ic028f6df43c9740024371590bbe8ea1be27ec45f@changeid> (raw)
In-Reply-To: <20210627235111.485507-1-sjg@chromium.org>

Use VENDOR_COREBOOT instead of TARGET_COREBOOT so we can have multiple
coreboot boards, sharing options. Only SYS_CONFIG_NAME needs to be
defined TARGET_COREBOOT.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---

(no changes since v1)

 arch/x86/cpu/coreboot/Kconfig   |  2 +-
 board/coreboot/coreboot/Kconfig | 12 ++++++++----
 2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig
index 497d6284ac1..b97c2779041 100644
--- a/arch/x86/cpu/coreboot/Kconfig
+++ b/arch/x86/cpu/coreboot/Kconfig
@@ -1,4 +1,4 @@
-if TARGET_COREBOOT
+if VENDOR_COREBOOT
 
 config SYS_COREBOOT
 	bool
diff --git a/board/coreboot/coreboot/Kconfig b/board/coreboot/coreboot/Kconfig
index 5bd6465d989..05e9b3b6f75 100644
--- a/board/coreboot/coreboot/Kconfig
+++ b/board/coreboot/coreboot/Kconfig
@@ -1,4 +1,4 @@
-if TARGET_COREBOOT
+if VENDOR_COREBOOT
 
 config SYS_BOARD
 	default "coreboot"
@@ -9,9 +9,6 @@ config SYS_VENDOR
 config SYS_SOC
 	default "coreboot"
 
-config SYS_CONFIG_NAME
-	default "coreboot"
-
 config SYS_TEXT_BASE
 	default 0x01110000
 
@@ -31,4 +28,11 @@ config SYS_CAR_SIZE
 	help
 	  This option specifies the board specific Cache-As-RAM (CAR) size.
 
+endif  # CONFIG_VENDOR_COREBOOT
+
+if TARGET_COREBOOT
+
+config SYS_CONFIG_NAME
+	default "coreboot"
+
 endif
-- 
2.32.0.93.g670b81a890-goog


  parent reply	other threads:[~2021-06-27 23:53 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-27 23:50 [PATCH v3 00/16] misc: Some more misc patches Simon Glass
2021-06-27 23:50 ` [PATCH v3 01/16] pci: Use const for pci_find_device_id() etc Simon Glass
2021-06-27 23:50 ` [PATCH v3 02/16] x86: pci: Allow binding of some devices before relocation Simon Glass
2021-06-27 23:50 ` [PATCH v3 03/16] x86: Allow coreboot serial driver to guess the UART Simon Glass
2021-07-15 11:44   ` Bin Meng
2021-07-15 15:18     ` Simon Glass
2021-06-27 23:50 ` [PATCH v3 04/16] spi: ich: Don't require the PCH Simon Glass
2021-06-28  6:19   ` Jagan Teki
2021-06-27 23:51 ` [PATCH v3 05/16] tpm: cr50: Drop unnecessary coral headers Simon Glass
2021-06-27 23:51 ` [PATCH v3 06/16] x86: Don't set up MTRRs if previously done Simon Glass
2021-06-27 23:51 ` [PATCH v3 07/16] x86: Update the MP constants to avoid conflicts Simon Glass
2021-06-27 23:51 ` [PATCH v3 08/16] x86: Do cache set-up by default when booting from coreboot Simon Glass
2021-06-27 23:51 ` [PATCH v3 09/16] x86: coreboot: Show the BIOS date Simon Glass
2021-06-27 23:51 ` [PATCH v3 10/16] x86: coral: Allow booting from coreboot Simon Glass
2021-06-27 23:51 ` [PATCH v3 11/16] x86: Add function comments to cb_sysinfo.h Simon Glass
2021-06-27 23:51 ` Simon Glass [this message]
2021-06-27 23:51 ` [PATCH v3 13/16] x86: coreboot: Document the memory map Simon Glass
2021-06-27 23:51 ` [PATCH v3 14/16] x86: cros: Check ROM exists before building vboot Simon Glass
2021-06-27 23:51 ` [PATCH v3 15/16] dtoc: Check that a parent is not missing Simon Glass
2021-06-27 23:51 ` [PATCH v3 16/16] doc: Update documentation for cros-2021.04 release Simon Glass
2021-07-14 15:47 ` [PATCH v3 00/16] misc: Some more misc patches Simon Glass
2021-07-15 11:51   ` Bin Meng
2021-08-01 22:01     ` Simon Glass

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