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From: Simon Glass <sjg@chromium.org>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	 U-Boot Mailing List <u-boot@lists.denx.de>
Subject: Re: [PATCH v3 03/16] x86: Allow coreboot serial driver to guess the UART
Date: Thu, 15 Jul 2021 09:18:10 -0600	[thread overview]
Message-ID: <CAPnjgZ0hJ+mvKRvf9Oxz5RTiob38fnsCp0cGkLEsU=x0ATekNw@mail.gmail.com> (raw)
In-Reply-To: <CAEUhbmWeN+UJVmYRrpePu_6aretotF0g-TV3L0acxzQgoeDrcQ@mail.gmail.com>

Hi Bin,

On Thu, 15 Jul 2021 at 05:44, Bin Meng <bmeng.cn@gmail.com> wrote:
>
> Hi Simon,
>
> On Mon, Jun 28, 2021 at 7:51 AM Simon Glass <sjg@chromium.org> wrote:
> >
> > At present this driver relies on coreboot to provide information about
> > the console UART. However if coreboot is not compiled with the UART
> > enabled, the information is left out. This configuration is quite
> > common, e.g. with shipping x86-based Chrome OS Chromebooks.
> >
> > Add a way to determine the UART settings in this case, using a
> > hard-coded list of PCI IDs.
> >
> > Signed-off-by: Simon Glass <sjg@chromium.org>
> > ---
> >
> > (no changes since v1)
> >
> >  drivers/serial/serial_coreboot.c | 68 ++++++++++++++++++++++++++++----
> >  include/pci_ids.h                |  1 +
> >  2 files changed, 61 insertions(+), 8 deletions(-)
> >
>
> Based on discussion of the last version, this patch should be dropped.
> I will see if I can drop it when applying.

OK thanks, I'll see what other ideas I can come up with.

Regards,
Simon

  reply	other threads:[~2021-07-15 15:18 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-27 23:50 [PATCH v3 00/16] misc: Some more misc patches Simon Glass
2021-06-27 23:50 ` [PATCH v3 01/16] pci: Use const for pci_find_device_id() etc Simon Glass
2021-06-27 23:50 ` [PATCH v3 02/16] x86: pci: Allow binding of some devices before relocation Simon Glass
2021-06-27 23:50 ` [PATCH v3 03/16] x86: Allow coreboot serial driver to guess the UART Simon Glass
2021-07-15 11:44   ` Bin Meng
2021-07-15 15:18     ` Simon Glass [this message]
2021-06-27 23:50 ` [PATCH v3 04/16] spi: ich: Don't require the PCH Simon Glass
2021-06-28  6:19   ` Jagan Teki
2021-06-27 23:51 ` [PATCH v3 05/16] tpm: cr50: Drop unnecessary coral headers Simon Glass
2021-06-27 23:51 ` [PATCH v3 06/16] x86: Don't set up MTRRs if previously done Simon Glass
2021-06-27 23:51 ` [PATCH v3 07/16] x86: Update the MP constants to avoid conflicts Simon Glass
2021-06-27 23:51 ` [PATCH v3 08/16] x86: Do cache set-up by default when booting from coreboot Simon Glass
2021-06-27 23:51 ` [PATCH v3 09/16] x86: coreboot: Show the BIOS date Simon Glass
2021-06-27 23:51 ` [PATCH v3 10/16] x86: coral: Allow booting from coreboot Simon Glass
2021-06-27 23:51 ` [PATCH v3 11/16] x86: Add function comments to cb_sysinfo.h Simon Glass
2021-06-27 23:51 ` [PATCH v3 12/16] x86: coreboot: Use vendor in the Kconfig Simon Glass
2021-06-27 23:51 ` [PATCH v3 13/16] x86: coreboot: Document the memory map Simon Glass
2021-06-27 23:51 ` [PATCH v3 14/16] x86: cros: Check ROM exists before building vboot Simon Glass
2021-06-27 23:51 ` [PATCH v3 15/16] dtoc: Check that a parent is not missing Simon Glass
2021-06-27 23:51 ` [PATCH v3 16/16] doc: Update documentation for cros-2021.04 release Simon Glass
2021-07-14 15:47 ` [PATCH v3 00/16] misc: Some more misc patches Simon Glass
2021-07-15 11:51   ` Bin Meng
2021-08-01 22:01     ` Simon Glass

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