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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>
Subject: [Intel-gfx] [PATCH 3/8] drm/i915/fbc: Move the "recompress on activate" to a central place
Date: Fri,  2 Jul 2021 23:45:58 +0300	[thread overview]
Message-ID: <20210702204603.596-4-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20210702204603.596-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

On ILK+ we current do a nuke right after activating FBC. If my
memory isn't playing tricks on me this is actially required if
FBC didn't stay disabled for a full frame. In that case the
deactivate+reactivate may not invalidate the cfb. I'd have to
double chekc to be sure though.

So let's keep the nuke, and just extend it backwards to cover
all the platforms by doing it a bit higher up.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 20 +++++++++++---------
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 8b721c8cdd6c..c9cde96f330b 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -232,16 +232,16 @@ static void i965_fbc_recompress(struct drm_i915_private *dev_priv)
 /* This function forces a CFB recompression through the nuke operation. */
 static void snb_fbc_recompress(struct drm_i915_private *dev_priv)
 {
-	struct intel_fbc *fbc = &dev_priv->fbc;
-
-	trace_intel_fbc_nuke(fbc->crtc);
-
 	intel_de_write(dev_priv, MSG_FBC_REND_STATE, FBC_REND_NUKE);
 	intel_de_posting_read(dev_priv, MSG_FBC_REND_STATE);
 }
 
 static void intel_fbc_recompress(struct drm_i915_private *dev_priv)
 {
+	struct intel_fbc *fbc = &dev_priv->fbc;
+
+	trace_intel_fbc_nuke(fbc->crtc);
+
 	if (DISPLAY_VER(dev_priv) >= 6)
 		snb_fbc_recompress(dev_priv);
 	else if (DISPLAY_VER(dev_priv) >= 4)
@@ -280,8 +280,6 @@ static void ilk_fbc_activate(struct drm_i915_private *dev_priv)
 		       params->fence_y_offset);
 	/* enable it... */
 	intel_de_write(dev_priv, ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
-
-	intel_fbc_recompress(dev_priv);
 }
 
 static void ilk_fbc_deactivate(struct drm_i915_private *dev_priv)
@@ -339,8 +337,6 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv)
 		dpfc_ctl |= FBC_CTL_FALSE_COLOR;
 
 	intel_de_write(dev_priv, ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
-
-	intel_fbc_recompress(dev_priv);
 }
 
 static bool intel_fbc_hw_is_active(struct drm_i915_private *dev_priv)
@@ -402,6 +398,12 @@ bool intel_fbc_is_active(struct drm_i915_private *dev_priv)
 	return dev_priv->fbc.active;
 }
 
+static void intel_fbc_activate(struct drm_i915_private *dev_priv)
+{
+	intel_fbc_hw_activate(dev_priv);
+	intel_fbc_recompress(dev_priv);
+}
+
 static void intel_fbc_deactivate(struct drm_i915_private *dev_priv,
 				 const char *reason)
 {
@@ -1088,7 +1090,7 @@ static void __intel_fbc_post_update(struct intel_crtc *crtc)
 		return;
 
 	if (!fbc->busy_bits)
-		intel_fbc_hw_activate(dev_priv);
+		intel_fbc_activate(dev_priv);
 	else
 		intel_fbc_deactivate(dev_priv, "frontbuffer write");
 }
-- 
2.31.1

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  parent reply	other threads:[~2021-07-02 20:46 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-02 20:45 [Intel-gfx] [PATCH 0/8] drm/i915/fbc: Rework CFB stride/size calculations Ville Syrjala
2021-07-02 20:45 ` [Intel-gfx] [PATCH 1/8] drm/i915/fbc: Rewrite the FBC tiling check a bit Ville Syrjala
2021-07-02 20:45 ` [Intel-gfx] [PATCH 2/8] drm/i915/fbc: Extract intel_fbc_update() Ville Syrjala
2021-07-02 20:45 ` Ville Syrjala [this message]
2021-07-02 20:45 ` [Intel-gfx] [PATCH 4/8] drm/i915/fbc: Polish the skl+ FBC stride override handling Ville Syrjala
2021-07-05  8:02   ` Jani Nikula
2021-07-02 20:46 ` [Intel-gfx] [PATCH 5/8] drm/i915/fbc: Rework cfb stride/size calculations Ville Syrjala
2021-09-06  5:23   ` Shankar, Uma
2021-09-21 14:56     ` Ville Syrjälä
2021-09-22 18:09       ` Shankar, Uma
2021-07-02 20:46 ` [Intel-gfx] [PATCH 6/8] drm/i915/fbc: Align FBC segments to 512B on glk+ Ville Syrjala
2021-08-19 10:50   ` Juha-Pekka Heikkila
2021-07-02 20:46 ` [Intel-gfx] [PATCH 7/8] drm/i915/fbc: Implement Wa_16011863758 for icl+ Ville Syrjala
2021-08-19 10:52   ` Juha-Pekka Heikkila
2021-07-02 20:46 ` [Intel-gfx] [PATCH 8/8] drm/i915/fbc: Allow higher compression limits on FBC1 Ville Syrjala
2021-08-23 17:52   ` Juha-Pekka Heikkilä
2021-07-02 22:02 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/fbc: Rework CFB stride/size calculations Patchwork
2021-07-02 22:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-03  1:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-07-07 15:31 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/fbc: Rework CFB stride/size calculations (rev2) Patchwork
2021-07-07 15:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-07 20:05 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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