* [Intel-gfx] [PATCH 1/8] drm/i915/step: s/<platform>_revid_tbl/<platform>_revids
2021-07-07 5:06 [Intel-gfx] [PATCH 0/8] Abstract steppings for all platforms Anusha Srivatsa
@ 2021-07-07 5:06 ` Anusha Srivatsa
2021-07-07 8:24 ` Jani Nikula
2021-07-07 5:06 ` [Intel-gfx] [PATCH 2/8] drm/i915/dmc: Use RUNTIME_INFO->step for DMC Anusha Srivatsa
` (9 subsequent siblings)
10 siblings, 1 reply; 15+ messages in thread
From: Anusha Srivatsa @ 2021-07-07 5:06 UTC (permalink / raw)
To: intel-gfx
Simplify the stepping info array name.
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/intel_step.c | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index ba9479a67521..93ccd42f2514 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -26,7 +26,7 @@ static const struct intel_step_info kbl_revids[] = {
[7] = { .gt_step = STEP_G0, .display_step = STEP_C0 },
};
-static const struct intel_step_info tgl_uy_revid_step_tbl[] = {
+static const struct intel_step_info tgl_uy_revids[] = {
[0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
[1] = { .gt_step = STEP_B0, .display_step = STEP_C0 },
[2] = { .gt_step = STEP_B1, .display_step = STEP_C0 },
@@ -34,12 +34,12 @@ static const struct intel_step_info tgl_uy_revid_step_tbl[] = {
};
/* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
-static const struct intel_step_info tgl_revid_step_tbl[] = {
+static const struct intel_step_info tgl_revids[] = {
[0] = { .gt_step = STEP_A0, .display_step = STEP_B0 },
[1] = { .gt_step = STEP_B0, .display_step = STEP_D0 },
};
-static const struct intel_step_info adls_revid_step_tbl[] = {
+static const struct intel_step_info adls_revids[] = {
[0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
[0x1] = { .gt_step = STEP_A0, .display_step = STEP_A2 },
[0x4] = { .gt_step = STEP_B0, .display_step = STEP_B0 },
@@ -47,7 +47,7 @@ static const struct intel_step_info adls_revid_step_tbl[] = {
[0xC] = { .gt_step = STEP_D0, .display_step = STEP_C0 },
};
-static const struct intel_step_info adlp_revid_step_tbl[] = {
+static const struct intel_step_info adlp_revids[] = {
[0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
[0x4] = { .gt_step = STEP_B0, .display_step = STEP_B0 },
[0x8] = { .gt_step = STEP_C0, .display_step = STEP_C0 },
@@ -62,17 +62,17 @@ void intel_step_init(struct drm_i915_private *i915)
struct intel_step_info step = {};
if (IS_ALDERLAKE_P(i915)) {
- revids = adlp_revid_step_tbl;
- size = ARRAY_SIZE(adlp_revid_step_tbl);
+ revids = adlp_revids;
+ size = ARRAY_SIZE(adlp_revids);
} else if (IS_ALDERLAKE_S(i915)) {
- revids = adls_revid_step_tbl;
- size = ARRAY_SIZE(adls_revid_step_tbl);
+ revids = adls_revids;
+ size = ARRAY_SIZE(adls_revids);
} else if (IS_TGL_U(i915) || IS_TGL_Y(i915)) {
- revids = tgl_uy_revid_step_tbl;
- size = ARRAY_SIZE(tgl_uy_revid_step_tbl);
+ revids = tgl_uy_revids;
+ size = ARRAY_SIZE(tgl_uy_revids);
} else if (IS_TIGERLAKE(i915)) {
- revids = tgl_revid_step_tbl;
- size = ARRAY_SIZE(tgl_revid_step_tbl);
+ revids = tgl_revids;
+ size = ARRAY_SIZE(tgl_revids);
} else if (IS_KABYLAKE(i915)) {
revids = kbl_revids;
size = ARRAY_SIZE(kbl_revids);
--
2.32.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH 1/8] drm/i915/step: s/<platform>_revid_tbl/<platform>_revids
2021-07-07 5:06 ` [Intel-gfx] [PATCH 1/8] drm/i915/step: s/<platform>_revid_tbl/<platform>_revids Anusha Srivatsa
@ 2021-07-07 8:24 ` Jani Nikula
0 siblings, 0 replies; 15+ messages in thread
From: Jani Nikula @ 2021-07-07 8:24 UTC (permalink / raw)
To: Anusha Srivatsa, intel-gfx
On Tue, 06 Jul 2021, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> Simplify the stepping info array name.
>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/intel_step.c | 24 ++++++++++++------------
> 1 file changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
> index ba9479a67521..93ccd42f2514 100644
> --- a/drivers/gpu/drm/i915/intel_step.c
> +++ b/drivers/gpu/drm/i915/intel_step.c
> @@ -26,7 +26,7 @@ static const struct intel_step_info kbl_revids[] = {
> [7] = { .gt_step = STEP_G0, .display_step = STEP_C0 },
> };
>
> -static const struct intel_step_info tgl_uy_revid_step_tbl[] = {
> +static const struct intel_step_info tgl_uy_revids[] = {
> [0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
> [1] = { .gt_step = STEP_B0, .display_step = STEP_C0 },
> [2] = { .gt_step = STEP_B1, .display_step = STEP_C0 },
> @@ -34,12 +34,12 @@ static const struct intel_step_info tgl_uy_revid_step_tbl[] = {
> };
>
> /* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
> -static const struct intel_step_info tgl_revid_step_tbl[] = {
> +static const struct intel_step_info tgl_revids[] = {
> [0] = { .gt_step = STEP_A0, .display_step = STEP_B0 },
> [1] = { .gt_step = STEP_B0, .display_step = STEP_D0 },
> };
>
> -static const struct intel_step_info adls_revid_step_tbl[] = {
> +static const struct intel_step_info adls_revids[] = {
> [0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
> [0x1] = { .gt_step = STEP_A0, .display_step = STEP_A2 },
> [0x4] = { .gt_step = STEP_B0, .display_step = STEP_B0 },
> @@ -47,7 +47,7 @@ static const struct intel_step_info adls_revid_step_tbl[] = {
> [0xC] = { .gt_step = STEP_D0, .display_step = STEP_C0 },
> };
>
> -static const struct intel_step_info adlp_revid_step_tbl[] = {
> +static const struct intel_step_info adlp_revids[] = {
> [0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
> [0x4] = { .gt_step = STEP_B0, .display_step = STEP_B0 },
> [0x8] = { .gt_step = STEP_C0, .display_step = STEP_C0 },
> @@ -62,17 +62,17 @@ void intel_step_init(struct drm_i915_private *i915)
> struct intel_step_info step = {};
>
> if (IS_ALDERLAKE_P(i915)) {
> - revids = adlp_revid_step_tbl;
> - size = ARRAY_SIZE(adlp_revid_step_tbl);
> + revids = adlp_revids;
> + size = ARRAY_SIZE(adlp_revids);
> } else if (IS_ALDERLAKE_S(i915)) {
> - revids = adls_revid_step_tbl;
> - size = ARRAY_SIZE(adls_revid_step_tbl);
> + revids = adls_revids;
> + size = ARRAY_SIZE(adls_revids);
> } else if (IS_TGL_U(i915) || IS_TGL_Y(i915)) {
> - revids = tgl_uy_revid_step_tbl;
> - size = ARRAY_SIZE(tgl_uy_revid_step_tbl);
> + revids = tgl_uy_revids;
> + size = ARRAY_SIZE(tgl_uy_revids);
> } else if (IS_TIGERLAKE(i915)) {
> - revids = tgl_revid_step_tbl;
> - size = ARRAY_SIZE(tgl_revid_step_tbl);
> + revids = tgl_revids;
> + size = ARRAY_SIZE(tgl_revids);
> } else if (IS_KABYLAKE(i915)) {
> revids = kbl_revids;
> size = ARRAY_SIZE(kbl_revids);
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH 2/8] drm/i915/dmc: Use RUNTIME_INFO->step for DMC
2021-07-07 5:06 [Intel-gfx] [PATCH 0/8] Abstract steppings for all platforms Anusha Srivatsa
2021-07-07 5:06 ` [Intel-gfx] [PATCH 1/8] drm/i915/step: s/<platform>_revid_tbl/<platform>_revids Anusha Srivatsa
@ 2021-07-07 5:06 ` Anusha Srivatsa
2021-07-07 8:29 ` Jani Nikula
2021-07-07 5:06 ` [Intel-gfx] [PATCH 3/8] drm/i915/skl: s/IS_SKL_REVID/IS_SKL_GT_STEP Anusha Srivatsa
` (8 subsequent siblings)
10 siblings, 1 reply; 15+ messages in thread
From: Anusha Srivatsa @ 2021-07-07 5:06 UTC (permalink / raw)
To: intel-gfx
Instead of adding new table for every new platform, lets ues
the stepping info from RUNTIME_INFO(dev_priv)->step
This patch uses RUNTIME_INFO->step only for recent
platforms.
Patches that follow this will address this change for
remaining platforms + missing platforms.
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/display/intel_dmc.c | 61 +++++++++++++++++++++---
1 file changed, 54 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index f8789d4543bf..a38720f25910 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -266,10 +266,12 @@ static const struct stepping_info icl_stepping_info[] = {
};
static const struct stepping_info no_stepping_info = { '*', '*' };
+struct stepping_info *display_step;
static const struct stepping_info *
intel_get_stepping_info(struct drm_i915_private *dev_priv)
{
+ struct intel_step_info step = RUNTIME_INFO(dev_priv)->step;
const struct stepping_info *si;
unsigned int size;
@@ -282,15 +284,60 @@ intel_get_stepping_info(struct drm_i915_private *dev_priv)
} else if (IS_BROXTON(dev_priv)) {
size = ARRAY_SIZE(bxt_stepping_info);
si = bxt_stepping_info;
- } else {
- size = 0;
- si = NULL;
}
- if (INTEL_REVID(dev_priv) < size)
- return si + INTEL_REVID(dev_priv);
-
- return &no_stepping_info;
+ if (IS_ICELAKE(dev_priv) || IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv))
+ return INTEL_REVID(dev_priv) < size ? si + INTEL_REVID(dev_priv) : &no_stepping_info;
+
+ else {
+ switch (step.display_step) {
+ case STEP_A0:
+ display_step->stepping = 'A';
+ display_step->substepping = '0';
+ break;
+ case STEP_A2:
+ display_step->stepping = 'A';
+ display_step->substepping = '2';
+ break;
+ case STEP_B0:
+ display_step->stepping = 'B';
+ display_step->substepping = '0';
+ break;
+ case STEP_B1:
+ display_step->stepping = 'B';
+ display_step->substepping = '1';
+ break;
+ case STEP_C0:
+ display_step->stepping = 'C';
+ display_step->substepping = '0';
+ break;
+ case STEP_D0:
+ display_step->stepping = 'D';
+ display_step->substepping = '0';
+ break;
+ case STEP_D1:
+ display_step->stepping = 'D';
+ display_step->substepping = '1';
+ break;
+ case STEP_E0:
+ display_step->stepping = 'E';
+ display_step->substepping = '0';
+ break;
+ case STEP_F0:
+ display_step->stepping = 'F';
+ display_step->substepping = '0';
+ break;
+ case STEP_G0:
+ display_step->stepping = 'G';
+ display_step->substepping = '0';
+ break;
+ default:
+ display_step->stepping = '*';
+ display_step->substepping = '*';
+ break;
+ }
+ }
+ return display_step;
}
static void gen9_set_dc_state_debugmask(struct drm_i915_private *dev_priv)
--
2.32.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH 2/8] drm/i915/dmc: Use RUNTIME_INFO->step for DMC
2021-07-07 5:06 ` [Intel-gfx] [PATCH 2/8] drm/i915/dmc: Use RUNTIME_INFO->step for DMC Anusha Srivatsa
@ 2021-07-07 8:29 ` Jani Nikula
2021-07-07 9:08 ` Jani Nikula
0 siblings, 1 reply; 15+ messages in thread
From: Jani Nikula @ 2021-07-07 8:29 UTC (permalink / raw)
To: Anusha Srivatsa, intel-gfx
On Tue, 06 Jul 2021, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> Instead of adding new table for every new platform, lets ues
> the stepping info from RUNTIME_INFO(dev_priv)->step
> This patch uses RUNTIME_INFO->step only for recent
> platforms.
>
> Patches that follow this will address this change for
> remaining platforms + missing platforms.
>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dmc.c | 61 +++++++++++++++++++++---
> 1 file changed, 54 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> index f8789d4543bf..a38720f25910 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -266,10 +266,12 @@ static const struct stepping_info icl_stepping_info[] = {
> };
>
> static const struct stepping_info no_stepping_info = { '*', '*' };
> +struct stepping_info *display_step;
We can't have driver specific mutable data for this. Almost everything
has to be either device specific or const. The above would be shared
between all devices.
BR,
Jani.
>
> static const struct stepping_info *
> intel_get_stepping_info(struct drm_i915_private *dev_priv)
> {
> + struct intel_step_info step = RUNTIME_INFO(dev_priv)->step;
> const struct stepping_info *si;
> unsigned int size;
>
> @@ -282,15 +284,60 @@ intel_get_stepping_info(struct drm_i915_private *dev_priv)
> } else if (IS_BROXTON(dev_priv)) {
> size = ARRAY_SIZE(bxt_stepping_info);
> si = bxt_stepping_info;
> - } else {
> - size = 0;
> - si = NULL;
> }
>
> - if (INTEL_REVID(dev_priv) < size)
> - return si + INTEL_REVID(dev_priv);
> -
> - return &no_stepping_info;
> + if (IS_ICELAKE(dev_priv) || IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv))
> + return INTEL_REVID(dev_priv) < size ? si + INTEL_REVID(dev_priv) : &no_stepping_info;
> +
> + else {
> + switch (step.display_step) {
> + case STEP_A0:
> + display_step->stepping = 'A';
> + display_step->substepping = '0';
> + break;
> + case STEP_A2:
> + display_step->stepping = 'A';
> + display_step->substepping = '2';
> + break;
> + case STEP_B0:
> + display_step->stepping = 'B';
> + display_step->substepping = '0';
> + break;
> + case STEP_B1:
> + display_step->stepping = 'B';
> + display_step->substepping = '1';
> + break;
> + case STEP_C0:
> + display_step->stepping = 'C';
> + display_step->substepping = '0';
> + break;
> + case STEP_D0:
> + display_step->stepping = 'D';
> + display_step->substepping = '0';
> + break;
> + case STEP_D1:
> + display_step->stepping = 'D';
> + display_step->substepping = '1';
> + break;
> + case STEP_E0:
> + display_step->stepping = 'E';
> + display_step->substepping = '0';
> + break;
> + case STEP_F0:
> + display_step->stepping = 'F';
> + display_step->substepping = '0';
> + break;
> + case STEP_G0:
> + display_step->stepping = 'G';
> + display_step->substepping = '0';
> + break;
> + default:
> + display_step->stepping = '*';
> + display_step->substepping = '*';
> + break;
> + }
> + }
> + return display_step;
> }
>
> static void gen9_set_dc_state_debugmask(struct drm_i915_private *dev_priv)
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH 2/8] drm/i915/dmc: Use RUNTIME_INFO->step for DMC
2021-07-07 8:29 ` Jani Nikula
@ 2021-07-07 9:08 ` Jani Nikula
0 siblings, 0 replies; 15+ messages in thread
From: Jani Nikula @ 2021-07-07 9:08 UTC (permalink / raw)
To: Anusha Srivatsa, intel-gfx
On Wed, 07 Jul 2021, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Tue, 06 Jul 2021, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
>> Instead of adding new table for every new platform, lets ues
>> the stepping info from RUNTIME_INFO(dev_priv)->step
>> This patch uses RUNTIME_INFO->step only for recent
>> platforms.
>>
>> Patches that follow this will address this change for
>> remaining platforms + missing platforms.
>>
>> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_dmc.c | 61 +++++++++++++++++++++---
>> 1 file changed, 54 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
>> index f8789d4543bf..a38720f25910 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
>> @@ -266,10 +266,12 @@ static const struct stepping_info icl_stepping_info[] = {
>> };
>>
>> static const struct stepping_info no_stepping_info = { '*', '*' };
>> +struct stepping_info *display_step;
>
> We can't have driver specific mutable data for this. Almost everything
> has to be either device specific or const. The above would be shared
> between all devices.
I think the solution to your problem is two-fold.
First, I think you should add a *generic* function in intel_step.c to
get the chars or a string for an enum intel_step. Maybe a string,
because it'll also be useful for logging?
const char *intel_step_name(enum intel_step step)
{
switch (step) {
case STEP_A0:
return "A0";
case STEP_B0;
/* etc ... */
default:
return "??";
}
}
Second, I think you should modify intel_get_stepping_info() to let you
pass in the struct stepping_info pointer to fill in. Then you can have a
local struct stepping_info si variable in parse_dmc_fw(). We don't need
to store the data anywhere, it's only used once.
static void intel_get_stepping_info(struct drm_i915_private *dev_priv,
struct stepping_info *si)
There you'd do something like:
const char *step_name = intel_step_name(step);
si->stepping = step_name[0];
si->stepping = step_name[1];
And potentially handle the ?? case separately. Something along those
lines.
BR,
Jani.
>
> BR,
> Jani.
>
>>
>> static const struct stepping_info *
>> intel_get_stepping_info(struct drm_i915_private *dev_priv)
>> {
>> + struct intel_step_info step = RUNTIME_INFO(dev_priv)->step;
>> const struct stepping_info *si;
>> unsigned int size;
>>
>> @@ -282,15 +284,60 @@ intel_get_stepping_info(struct drm_i915_private *dev_priv)
>> } else if (IS_BROXTON(dev_priv)) {
>> size = ARRAY_SIZE(bxt_stepping_info);
>> si = bxt_stepping_info;
>> - } else {
>> - size = 0;
>> - si = NULL;
>> }
>>
>> - if (INTEL_REVID(dev_priv) < size)
>> - return si + INTEL_REVID(dev_priv);
>> -
>> - return &no_stepping_info;
>> + if (IS_ICELAKE(dev_priv) || IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv))
>> + return INTEL_REVID(dev_priv) < size ? si + INTEL_REVID(dev_priv) : &no_stepping_info;
>> +
>> + else {
>> + switch (step.display_step) {
>> + case STEP_A0:
>> + display_step->stepping = 'A';
>> + display_step->substepping = '0';
>> + break;
>> + case STEP_A2:
>> + display_step->stepping = 'A';
>> + display_step->substepping = '2';
>> + break;
>> + case STEP_B0:
>> + display_step->stepping = 'B';
>> + display_step->substepping = '0';
>> + break;
>> + case STEP_B1:
>> + display_step->stepping = 'B';
>> + display_step->substepping = '1';
>> + break;
>> + case STEP_C0:
>> + display_step->stepping = 'C';
>> + display_step->substepping = '0';
>> + break;
>> + case STEP_D0:
>> + display_step->stepping = 'D';
>> + display_step->substepping = '0';
>> + break;
>> + case STEP_D1:
>> + display_step->stepping = 'D';
>> + display_step->substepping = '1';
>> + break;
>> + case STEP_E0:
>> + display_step->stepping = 'E';
>> + display_step->substepping = '0';
>> + break;
>> + case STEP_F0:
>> + display_step->stepping = 'F';
>> + display_step->substepping = '0';
>> + break;
>> + case STEP_G0:
>> + display_step->stepping = 'G';
>> + display_step->substepping = '0';
>> + break;
>> + default:
>> + display_step->stepping = '*';
>> + display_step->substepping = '*';
>> + break;
>> + }
>> + }
>> + return display_step;
>> }
>>
>> static void gen9_set_dc_state_debugmask(struct drm_i915_private *dev_priv)
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH 3/8] drm/i915/skl: s/IS_SKL_REVID/IS_SKL_GT_STEP
2021-07-07 5:06 [Intel-gfx] [PATCH 0/8] Abstract steppings for all platforms Anusha Srivatsa
2021-07-07 5:06 ` [Intel-gfx] [PATCH 1/8] drm/i915/step: s/<platform>_revid_tbl/<platform>_revids Anusha Srivatsa
2021-07-07 5:06 ` [Intel-gfx] [PATCH 2/8] drm/i915/dmc: Use RUNTIME_INFO->step for DMC Anusha Srivatsa
@ 2021-07-07 5:06 ` Anusha Srivatsa
2021-07-07 5:06 ` [Intel-gfx] [PATCH 4/8] drm/i915/bxt: s/IS_BXT_REVID/IS_BXT_GT_STEP Anusha Srivatsa
` (7 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Anusha Srivatsa @ 2021-07-07 5:06 UTC (permalink / raw)
To: intel-gfx
Start using the latest STEP_ macro for all
purposes.
For SKL, GT step is same as display step, lets us
avoid initializing both
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/display/intel_dmc.c | 24 +++++++++++----------
drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +-
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 14 ++++--------
drivers/gpu/drm/i915/intel_step.c | 18 ++++++++++++++++
drivers/gpu/drm/i915/intel_step.h | 3 +++
6 files changed, 40 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index a38720f25910..19c8b9022370 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -247,13 +247,6 @@ bool intel_dmc_has_payload(struct drm_i915_private *i915)
return i915->dmc.dmc_info[DMC_FW_MAIN].payload;
}
-static const struct stepping_info skl_stepping_info[] = {
- {'A', '0'}, {'B', '0'}, {'C', '0'},
- {'D', '0'}, {'E', '0'}, {'F', '0'},
- {'G', '0'}, {'H', '0'}, {'I', '0'},
- {'J', '0'}, {'K', '0'}
-};
-
static const struct stepping_info bxt_stepping_info[] = {
{'A', '0'}, {'A', '1'}, {'A', '2'},
{'B', '0'}, {'B', '1'}, {'B', '2'}
@@ -278,15 +271,12 @@ intel_get_stepping_info(struct drm_i915_private *dev_priv)
if (IS_ICELAKE(dev_priv)) {
size = ARRAY_SIZE(icl_stepping_info);
si = icl_stepping_info;
- } else if (IS_SKYLAKE(dev_priv)) {
- size = ARRAY_SIZE(skl_stepping_info);
- si = skl_stepping_info;
} else if (IS_BROXTON(dev_priv)) {
size = ARRAY_SIZE(bxt_stepping_info);
si = bxt_stepping_info;
}
- if (IS_ICELAKE(dev_priv) || IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv))
+ if (IS_ICELAKE(dev_priv) || IS_BROXTON(dev_priv))
return INTEL_REVID(dev_priv) < size ? si + INTEL_REVID(dev_priv) : &no_stepping_info;
else {
@@ -331,6 +321,18 @@ intel_get_stepping_info(struct drm_i915_private *dev_priv)
display_step->stepping = 'G';
display_step->substepping = '0';
break;
+ case STEP_H0:
+ display_step->stepping = 'H';
+ display_step->substepping = '0';
+ break;
+ case STEP_I0:
+ display_step->stepping = 'I';
+ display_step->substepping = '0';
+ break;
+ case STEP_J0:
+ display_step->stepping = 'J';
+ display_step->substepping = '0';
+ break;
default:
display_step->stepping = '*';
display_step->substepping = '*';
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index d9a5a445ceec..6dfd564e078f 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -883,7 +883,7 @@ skl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
/* WaInPlaceDecompressionHang:skl */
- if (IS_SKL_REVID(i915, SKL_REVID_H0, REVID_FOREVER))
+ if (IS_SKL_GT_STEP(i915, STEP_H0, STEP_FOREVER))
wa_write_or(wal,
GEN9_GAMT_ECO_REG_RW_IA,
GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 30d8cd8c69b1..9a4a623ad6d4 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -271,7 +271,7 @@ static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv)
bool pre = false;
pre |= IS_HSW_EARLY_SDV(dev_priv);
- pre |= IS_SKL_REVID(dev_priv, 0, SKL_REVID_F0);
+ pre |= IS_SKL_GT_STEP(dev_priv, 0, STEP_F0);
pre |= IS_BXT_REVID(dev_priv, 0, BXT_REVID_B_LAST);
pre |= IS_KBL_GT_STEP(dev_priv, 0, STEP_A0);
pre |= IS_GLK_REVID(dev_priv, 0, GLK_REVID_A2);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6dff4ca01241..b4a7652d0c50 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1462,16 +1462,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define IS_TGL_Y(dev_priv) \
IS_SUBPLATFORM(dev_priv, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_ULX)
-#define SKL_REVID_A0 0x0
-#define SKL_REVID_B0 0x1
-#define SKL_REVID_C0 0x2
-#define SKL_REVID_D0 0x3
-#define SKL_REVID_E0 0x4
-#define SKL_REVID_F0 0x5
-#define SKL_REVID_G0 0x6
-#define SKL_REVID_H0 0x7
-
-#define IS_SKL_REVID(p, since, until) (IS_SKYLAKE(p) && IS_REVID(p, since, until))
+#define IS_SKL_GT_STEP(__i915, since, until) \
+ (IS_SKYLAKE(__i915) && \
+ IS_GT_STEP(__i915, since, until))
+
#define BXT_REVID_A0 0x0
#define BXT_REVID_A1 0x1
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index 93ccd42f2514..3f07b994d58a 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -13,6 +13,18 @@
* can test against in a regular manner.
*/
+static const struct intel_step_info skl_revids[] = {
+ [0] = { .gt_step = STEP_A0 },
+ [1] = { .gt_step = STEP_B0 },
+ [2] = { .gt_step = STEP_C0 },
+ [3] = { .gt_step = STEP_D0 },
+ [4] = { .gt_step = STEP_E0 },
+ [5] = { .gt_step = STEP_F0 },
+ [6] = { .gt_step = STEP_G0 },
+ [7] = { .gt_step = STEP_H0 },
+ [8] = { .gt_step = STEP_I0 },
+ [9] = { .gt_step = STEP_J0 },
+};
/* FIXME: what about REVID_E0 */
static const struct intel_step_info kbl_revids[] = {
@@ -76,6 +88,9 @@ void intel_step_init(struct drm_i915_private *i915)
} else if (IS_KABYLAKE(i915)) {
revids = kbl_revids;
size = ARRAY_SIZE(kbl_revids);
+ } else if (IS_SKYLAKE(i915)) {
+ revids = skl_revids;
+ size = ARRAY_SIZE(skl_revids);
}
/* Not using the stepping scheme for the platform yet. */
@@ -112,5 +127,8 @@ void intel_step_init(struct drm_i915_private *i915)
if (drm_WARN_ON(&i915->drm, step.gt_step == STEP_NONE))
return;
+ if (step.display_step == STEP_NONE)
+ step.display_step = step.gt_step;
+
RUNTIME_INFO(i915)->step = step;
}
diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
index 958a8bb5d677..3655944daf81 100644
--- a/drivers/gpu/drm/i915/intel_step.h
+++ b/drivers/gpu/drm/i915/intel_step.h
@@ -31,6 +31,9 @@ enum intel_step {
STEP_E0,
STEP_F0,
STEP_G0,
+ STEP_H0,
+ STEP_I0,
+ STEP_J0,
STEP_FUTURE,
STEP_FOREVER,
};
--
2.32.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH 4/8] drm/i915/bxt: s/IS_BXT_REVID/IS_BXT_GT_STEP
2021-07-07 5:06 [Intel-gfx] [PATCH 0/8] Abstract steppings for all platforms Anusha Srivatsa
` (2 preceding siblings ...)
2021-07-07 5:06 ` [Intel-gfx] [PATCH 3/8] drm/i915/skl: s/IS_SKL_REVID/IS_SKL_GT_STEP Anusha Srivatsa
@ 2021-07-07 5:06 ` Anusha Srivatsa
2021-07-07 5:06 ` [Intel-gfx] [PATCH 5/8] drm/i915/icl: s/IS_ICL_REVID/IS_ICL_GT_STEP Anusha Srivatsa
` (6 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Anusha Srivatsa @ 2021-07-07 5:06 UTC (permalink / raw)
To: intel-gfx
Add stepping info table for BXT.
Remove stepping info table from intel_dmc.c and
instead use the centralized stepping_info from
intel_step.c
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/display/intel_dmc.c | 18 +++++++++---------
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 11 +++--------
drivers/gpu/drm/i915/intel_step.c | 12 ++++++++++++
drivers/gpu/drm/i915/intel_step.h | 2 ++
5 files changed, 27 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 19c8b9022370..a1fa44ec4ca8 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -247,11 +247,6 @@ bool intel_dmc_has_payload(struct drm_i915_private *i915)
return i915->dmc.dmc_info[DMC_FW_MAIN].payload;
}
-static const struct stepping_info bxt_stepping_info[] = {
- {'A', '0'}, {'A', '1'}, {'A', '2'},
- {'B', '0'}, {'B', '1'}, {'B', '2'}
-};
-
static const struct stepping_info icl_stepping_info[] = {
{'A', '0'}, {'A', '1'}, {'A', '2'},
{'B', '0'}, {'B', '2'},
@@ -271,12 +266,9 @@ intel_get_stepping_info(struct drm_i915_private *dev_priv)
if (IS_ICELAKE(dev_priv)) {
size = ARRAY_SIZE(icl_stepping_info);
si = icl_stepping_info;
- } else if (IS_BROXTON(dev_priv)) {
- size = ARRAY_SIZE(bxt_stepping_info);
- si = bxt_stepping_info;
}
- if (IS_ICELAKE(dev_priv) || IS_BROXTON(dev_priv))
+ if (IS_ICELAKE(dev_priv))
return INTEL_REVID(dev_priv) < size ? si + INTEL_REVID(dev_priv) : &no_stepping_info;
else {
@@ -285,6 +277,10 @@ intel_get_stepping_info(struct drm_i915_private *dev_priv)
display_step->stepping = 'A';
display_step->substepping = '0';
break;
+ case STEP_A1:
+ display_step->stepping = 'A';
+ display_step->substepping = '1';
+ break;
case STEP_A2:
display_step->stepping = 'A';
display_step->substepping = '2';
@@ -297,6 +293,10 @@ intel_get_stepping_info(struct drm_i915_private *dev_priv)
display_step->stepping = 'B';
display_step->substepping = '1';
break;
+ case STEP_B2:
+ display_step->stepping = 'B';
+ display_step->substepping = '2';
+ break;
case STEP_C0:
display_step->stepping = 'C';
display_step->substepping = '0';
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 9a4a623ad6d4..eaddb18e4762 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -272,7 +272,7 @@ static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv)
pre |= IS_HSW_EARLY_SDV(dev_priv);
pre |= IS_SKL_GT_STEP(dev_priv, 0, STEP_F0);
- pre |= IS_BXT_REVID(dev_priv, 0, BXT_REVID_B_LAST);
+ pre |= IS_BXT_GT_STEP(dev_priv, 0, STEP_B2);
pre |= IS_KBL_GT_STEP(dev_priv, 0, STEP_A0);
pre |= IS_GLK_REVID(dev_priv, 0, GLK_REVID_A2);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b4a7652d0c50..defa084ccd08 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1466,15 +1466,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
(IS_SKYLAKE(__i915) && \
IS_GT_STEP(__i915, since, until))
+#define IS_BXT_GT_STEP(__i915, since, until) \
+ (IS_BROXTON(__i915) && \
+ IS_GT_STEP(__i915, since, until))
-#define BXT_REVID_A0 0x0
-#define BXT_REVID_A1 0x1
-#define BXT_REVID_B0 0x3
-#define BXT_REVID_B_LAST 0x8
-#define BXT_REVID_C0 0x9
-
-#define IS_BXT_REVID(dev_priv, since, until) \
- (IS_BROXTON(dev_priv) && IS_REVID(dev_priv, since, until))
#define IS_KBL_GT_STEP(dev_priv, since, until) \
(IS_KABYLAKE(dev_priv) && IS_GT_STEP(dev_priv, since, until))
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index 3f07b994d58a..b00c192c6c3d 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -26,6 +26,15 @@ static const struct intel_step_info skl_revids[] = {
[9] = { .gt_step = STEP_J0 },
};
+static const struct intel_step_info bxt_revids[] = {
+ [0] = { .gt_step = STEP_A0 },
+ [1] = { .gt_step = STEP_A1 },
+ [2] = { .gt_step = STEP_A2 },
+ [6] = { .gt_step = STEP_B0 },
+ [7] = { .gt_step = STEP_B1 },
+ [8] = { .gt_step = STEP_B2 },
+};
+
/* FIXME: what about REVID_E0 */
static const struct intel_step_info kbl_revids[] = {
[0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
@@ -91,6 +100,9 @@ void intel_step_init(struct drm_i915_private *i915)
} else if (IS_SKYLAKE(i915)) {
revids = skl_revids;
size = ARRAY_SIZE(skl_revids);
+ } else if (IS_BROXTON(i915)) {
+ revids = bxt_revids;
+ size = ARRAY_SIZE(bxt_revids);
}
/* Not using the stepping scheme for the platform yet. */
diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
index 3655944daf81..09acd822cabc 100644
--- a/drivers/gpu/drm/i915/intel_step.h
+++ b/drivers/gpu/drm/i915/intel_step.h
@@ -22,9 +22,11 @@ struct intel_step_info {
enum intel_step {
STEP_NONE = 0,
STEP_A0,
+ STEP_A1,
STEP_A2,
STEP_B0,
STEP_B1,
+ STEP_B2,
STEP_C0,
STEP_D0,
STEP_D1,
--
2.32.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH 5/8] drm/i915/icl: s/IS_ICL_REVID/IS_ICL_GT_STEP
2021-07-07 5:06 [Intel-gfx] [PATCH 0/8] Abstract steppings for all platforms Anusha Srivatsa
` (3 preceding siblings ...)
2021-07-07 5:06 ` [Intel-gfx] [PATCH 4/8] drm/i915/bxt: s/IS_BXT_REVID/IS_BXT_GT_STEP Anusha Srivatsa
@ 2021-07-07 5:06 ` Anusha Srivatsa
2021-07-07 5:06 ` [Intel-gfx] [PATCH 6/8] drm/i915/glk: s/IS_GLK_REVID/IS_GLK_GT_STEP Anusha Srivatsa
` (5 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Anusha Srivatsa @ 2021-07-07 5:06 UTC (permalink / raw)
To: intel-gfx
Add stepping info table for ICL.
Remove stepping info table from intel_dmc.c and
instead use the centralized stepping_info from
intel_step.c
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/display/intel_dmc.c | 153 +++++++++-----------
drivers/gpu/drm/i915/gt/intel_workarounds.c | 12 +-
drivers/gpu/drm/i915/i915_drv.h | 12 +-
drivers/gpu/drm/i915/intel_step.c | 12 ++
drivers/gpu/drm/i915/intel_step.h | 1 +
5 files changed, 92 insertions(+), 98 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index a1fa44ec4ca8..783a3a2a3dd7 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -247,97 +247,82 @@ bool intel_dmc_has_payload(struct drm_i915_private *i915)
return i915->dmc.dmc_info[DMC_FW_MAIN].payload;
}
-static const struct stepping_info icl_stepping_info[] = {
- {'A', '0'}, {'A', '1'}, {'A', '2'},
- {'B', '0'}, {'B', '2'},
- {'C', '0'}
-};
-
-static const struct stepping_info no_stepping_info = { '*', '*' };
struct stepping_info *display_step;
static const struct stepping_info *
intel_get_stepping_info(struct drm_i915_private *dev_priv)
{
struct intel_step_info step = RUNTIME_INFO(dev_priv)->step;
- const struct stepping_info *si;
- unsigned int size;
- if (IS_ICELAKE(dev_priv)) {
- size = ARRAY_SIZE(icl_stepping_info);
- si = icl_stepping_info;
- }
-
- if (IS_ICELAKE(dev_priv))
- return INTEL_REVID(dev_priv) < size ? si + INTEL_REVID(dev_priv) : &no_stepping_info;
-
- else {
- switch (step.display_step) {
- case STEP_A0:
- display_step->stepping = 'A';
- display_step->substepping = '0';
- break;
- case STEP_A1:
- display_step->stepping = 'A';
- display_step->substepping = '1';
- break;
- case STEP_A2:
- display_step->stepping = 'A';
- display_step->substepping = '2';
- break;
- case STEP_B0:
- display_step->stepping = 'B';
- display_step->substepping = '0';
- break;
- case STEP_B1:
- display_step->stepping = 'B';
- display_step->substepping = '1';
- break;
- case STEP_B2:
- display_step->stepping = 'B';
- display_step->substepping = '2';
- break;
- case STEP_C0:
- display_step->stepping = 'C';
- display_step->substepping = '0';
- break;
- case STEP_D0:
- display_step->stepping = 'D';
- display_step->substepping = '0';
- break;
- case STEP_D1:
- display_step->stepping = 'D';
- display_step->substepping = '1';
- break;
- case STEP_E0:
- display_step->stepping = 'E';
- display_step->substepping = '0';
- break;
- case STEP_F0:
- display_step->stepping = 'F';
- display_step->substepping = '0';
- break;
- case STEP_G0:
- display_step->stepping = 'G';
- display_step->substepping = '0';
- break;
- case STEP_H0:
- display_step->stepping = 'H';
- display_step->substepping = '0';
- break;
- case STEP_I0:
- display_step->stepping = 'I';
- display_step->substepping = '0';
- break;
- case STEP_J0:
- display_step->stepping = 'J';
- display_step->substepping = '0';
- break;
- default:
- display_step->stepping = '*';
- display_step->substepping = '*';
- break;
- }
+ switch (step.display_step) {
+ case STEP_A0:
+ display_step->stepping = 'A';
+ display_step->substepping = '0';
+ break;
+ case STEP_A1:
+ display_step->stepping = 'A';
+ display_step->substepping = '1';
+ break;
+ case STEP_A2:
+ display_step->stepping = 'A';
+ display_step->substepping = '2';
+ break;
+ case STEP_B0:
+ display_step->stepping = 'B';
+ display_step->substepping = '0';
+ break;
+ case STEP_B1:
+ display_step->stepping = 'B';
+ display_step->substepping = '1';
+ break;
+ case STEP_B2:
+ display_step->stepping = 'B';
+ display_step->substepping = '2';
+ break;
+ case STEP_C0:
+ display_step->stepping = 'C';
+ display_step->substepping = '0';
+ break;
+ case STEP_C1:
+ display_step->stepping = 'C';
+ display_step->substepping = '1';
+ break;
+ case STEP_D0:
+ display_step->stepping = 'D';
+ display_step->substepping = '0';
+ break;
+ case STEP_D1:
+ display_step->stepping = 'D';
+ display_step->substepping = '1';
+ break;
+ case STEP_E0:
+ display_step->stepping = 'E';
+ display_step->substepping = '0';
+ break;
+ case STEP_F0:
+ display_step->stepping = 'F';
+ display_step->substepping = '0';
+ break;
+ case STEP_G0:
+ display_step->stepping = 'G';
+ display_step->substepping = '0';
+ break;
+ case STEP_H0:
+ display_step->stepping = 'H';
+ display_step->substepping = '0';
+ break;
+ case STEP_I0:
+ display_step->stepping = 'I';
+ display_step->substepping = '0';
+ break;
+ case STEP_J0:
+ display_step->stepping = 'J';
+ display_step->substepping = '0';
+ break;
+ default:
+ display_step->stepping = '*';
+ display_step->substepping = '*';
+ break;
}
return display_step;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 6dfd564e078f..e2d8acb8c1c9 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -557,7 +557,7 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine,
/* Wa_1604370585:icl (pre-prod)
* Formerly known as WaPushConstantDereferenceHoldDisable
*/
- if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_B0))
+ if (IS_ICL_GT_STEP(i915, STEP_A0, STEP_B0))
wa_masked_en(wal, GEN7_ROW_CHICKEN2,
PUSH_CONSTANT_DEREF_DISABLE);
@@ -573,12 +573,12 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine,
/* Wa_2006611047:icl (pre-prod)
* Formerly known as WaDisableImprovedTdlClkGating
*/
- if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_A0))
+ if (IS_ICL_GT_STEP(i915, STEP_A0, STEP_A0))
wa_masked_en(wal, GEN7_ROW_CHICKEN2,
GEN11_TDL_CLOCK_GATING_FIX_DISABLE);
/* Wa_2006665173:icl (pre-prod) */
- if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_A0))
+ if (IS_ICL_GT_STEP(i915, STEP_A0, STEP_A0))
wa_masked_en(wal, GEN11_COMMON_SLICE_CHICKEN3,
GEN11_BLEND_EMB_FIX_DISABLE_IN_RCC);
@@ -1023,13 +1023,13 @@ icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
GAMW_ECO_DEV_CTX_RELOAD_DISABLE);
/* Wa_1405779004:icl (pre-prod) */
- if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_A0))
+ if (IS_ICL_GT_STEP(i915, STEP_A0, STEP_A0))
wa_write_or(wal,
SLICE_UNIT_LEVEL_CLKGATE,
MSCUNIT_CLKGATE_DIS);
/* Wa_1406838659:icl (pre-prod) */
- if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_B0))
+ if (IS_ICL_GT_STEP(i915, STEP_A0, STEP_B0))
wa_write_or(wal,
INF_UNIT_LEVEL_CLKGATE,
CGPSF_CLKGATE_DIS);
@@ -1725,7 +1725,7 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
PMFLUSHDONE_LNEBLK);
/* Wa_1406609255:icl (pre-prod) */
- if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_B0))
+ if (IS_ICL_GT_STEP(i915, STEP_A0, STEP_B0))
wa_write_or(wal,
GEN7_SARCHKMD,
GEN7_DISABLE_DEMAND_PREFETCH);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index defa084ccd08..217c58c14a88 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1491,14 +1491,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define IS_CNL_REVID(p, since, until) \
(IS_CANNONLAKE(p) && IS_REVID(p, since, until))
-#define ICL_REVID_A0 0x0
-#define ICL_REVID_A2 0x1
-#define ICL_REVID_B0 0x3
-#define ICL_REVID_B2 0x4
-#define ICL_REVID_C0 0x5
-
-#define IS_ICL_REVID(p, since, until) \
- (IS_ICELAKE(p) && IS_REVID(p, since, until))
+#define IS_ICL_GT_STEP(__i915, since, until) \
+ (IS_ICELAKE(__i915) && \
+ IS_GT_STEP(__i915, since, until))
+
#define EHL_REVID_A0 0x0
#define EHL_REVID_B0 0x1
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index b00c192c6c3d..e1e5698d4998 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -35,6 +35,15 @@ static const struct intel_step_info bxt_revids[] = {
[8] = { .gt_step = STEP_B2 },
};
+static const struct intel_step_info icl_revids[] = {
+ [0] = { .gt_step = STEP_A0 },
+ [3] = { .gt_step = STEP_B0 },
+ [4] = { .gt_step = STEP_B2 },
+ [5] = { .gt_step = STEP_C0 },
+ [6] = { .gt_step = STEP_C1 },
+ [7] = { .gt_step = STEP_D0 },
+};
+
/* FIXME: what about REVID_E0 */
static const struct intel_step_info kbl_revids[] = {
[0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
@@ -103,6 +112,9 @@ void intel_step_init(struct drm_i915_private *i915)
} else if (IS_BROXTON(i915)) {
revids = bxt_revids;
size = ARRAY_SIZE(bxt_revids);
+ } else if (IS_ICELAKE(i915)) {
+ revids = icl_revids;
+ size = ARRAY_SIZE(icl_revids);
}
/* Not using the stepping scheme for the platform yet. */
diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
index 09acd822cabc..adfe0369508b 100644
--- a/drivers/gpu/drm/i915/intel_step.h
+++ b/drivers/gpu/drm/i915/intel_step.h
@@ -28,6 +28,7 @@ enum intel_step {
STEP_B1,
STEP_B2,
STEP_C0,
+ STEP_C1,
STEP_D0,
STEP_D1,
STEP_E0,
--
2.32.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH 6/8] drm/i915/glk: s/IS_GLK_REVID/IS_GLK_GT_STEP
2021-07-07 5:06 [Intel-gfx] [PATCH 0/8] Abstract steppings for all platforms Anusha Srivatsa
` (4 preceding siblings ...)
2021-07-07 5:06 ` [Intel-gfx] [PATCH 5/8] drm/i915/icl: s/IS_ICL_REVID/IS_ICL_GT_STEP Anusha Srivatsa
@ 2021-07-07 5:06 ` Anusha Srivatsa
2021-07-07 5:06 ` [Intel-gfx] [PATCH 7/8] drm/i915/rkl: s/IS_RKL_REVID/IS_RKL_GT_STEP Anusha Srivatsa
` (4 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Anusha Srivatsa @ 2021-07-07 5:06 UTC (permalink / raw)
To: intel-gfx
Add stepping info table for GLK.
Remove stepping info table from intel_dmc.c and
instead use the centralized stepping_info from
intel_step.c
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 9 +++------
drivers/gpu/drm/i915/intel_step.c | 10 ++++++++++
3 files changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index eaddb18e4762..9f433194c4e6 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -274,7 +274,7 @@ static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv)
pre |= IS_SKL_GT_STEP(dev_priv, 0, STEP_F0);
pre |= IS_BXT_GT_STEP(dev_priv, 0, STEP_B2);
pre |= IS_KBL_GT_STEP(dev_priv, 0, STEP_A0);
- pre |= IS_GLK_REVID(dev_priv, 0, GLK_REVID_A2);
+ pre |= IS_GLK_GT_STEP(dev_priv, 0, STEP_A2);
if (pre) {
drm_err(&dev_priv->drm, "This is a pre-production stepping. "
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 217c58c14a88..e9156d1a89a7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1476,13 +1476,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define IS_KBL_DISPLAY_STEP(dev_priv, since, until) \
(IS_KABYLAKE(dev_priv) && IS_DISPLAY_STEP(dev_priv, since, until))
-#define GLK_REVID_A0 0x0
-#define GLK_REVID_A1 0x1
-#define GLK_REVID_A2 0x2
-#define GLK_REVID_B0 0x3
+#define IS_GLK_GT_STEP(__i915, since, until) \
+ (IS_GEMINILAKE(__i915) && \
+ IS_GT_STEP(__i915, since, until))
-#define IS_GLK_REVID(dev_priv, since, until) \
- (IS_GEMINILAKE(dev_priv) && IS_REVID(dev_priv, since, until))
#define CNL_REVID_A0 0x0
#define CNL_REVID_B0 0x1
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index e1e5698d4998..a7144f24921e 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -35,6 +35,13 @@ static const struct intel_step_info bxt_revids[] = {
[8] = { .gt_step = STEP_B2 },
};
+static const struct intel_step_info glk_revids[] = {
+ [0] = { .gt_step = STEP_A0 },
+ [1] = { .gt_step = STEP_A1 },
+ [2] = { .gt_step = STEP_A2 },
+ [3] = { .gt_step = STEP_B0 },
+};
+
static const struct intel_step_info icl_revids[] = {
[0] = { .gt_step = STEP_A0 },
[3] = { .gt_step = STEP_B0 },
@@ -112,6 +119,9 @@ void intel_step_init(struct drm_i915_private *i915)
} else if (IS_BROXTON(i915)) {
revids = bxt_revids;
size = ARRAY_SIZE(bxt_revids);
+ } else if (IS_GEMINILAKE(i915)) {
+ revids = glk_revids;
+ size = ARRAY_SIZE(glk_revids);
} else if (IS_ICELAKE(i915)) {
revids = icl_revids;
size = ARRAY_SIZE(icl_revids);
--
2.32.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH 7/8] drm/i915/rkl: s/IS_RKL_REVID/IS_RKL_GT_STEP
2021-07-07 5:06 [Intel-gfx] [PATCH 0/8] Abstract steppings for all platforms Anusha Srivatsa
` (5 preceding siblings ...)
2021-07-07 5:06 ` [Intel-gfx] [PATCH 6/8] drm/i915/glk: s/IS_GLK_REVID/IS_GLK_GT_STEP Anusha Srivatsa
@ 2021-07-07 5:06 ` Anusha Srivatsa
2021-07-07 5:06 ` [Intel-gfx] [PATCH 8/8] drm/i915/dg1: s/IS_DG1_REVID/IS_DG1_GT_STEP Anusha Srivatsa
` (3 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Anusha Srivatsa @ 2021-07-07 5:06 UTC (permalink / raw)
To: intel-gfx
Add stepping info table for RKL.
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 4 ++--
drivers/gpu/drm/i915/i915_drv.h | 9 +++------
drivers/gpu/drm/i915/intel_step.c | 9 +++++++++
3 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 9643624fe160..818153007970 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -594,7 +594,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
if (intel_dp->psr.psr2_sel_fetch_enabled) {
/* WA 1408330847 */
if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0) ||
- IS_RKL_REVID(dev_priv, RKL_REVID_A0, RKL_REVID_A0))
+ IS_RKL_GT_STEP(dev_priv, STEP_A0, STEP_A0))
intel_de_rmw(dev_priv, CHICKEN_PAR1_1,
DIS_RAM_BYPASS_PSR2_MAN_TRACK,
DIS_RAM_BYPASS_PSR2_MAN_TRACK);
@@ -1342,7 +1342,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
/* WA 1408330847 */
if (intel_dp->psr.psr2_sel_fetch_enabled &&
(IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0) ||
- IS_RKL_REVID(dev_priv, RKL_REVID_A0, RKL_REVID_A0)))
+ IS_RKL_GT_STEP(dev_priv, STEP_A0, STEP_A0)))
intel_de_rmw(dev_priv, CHICKEN_PAR1_1,
DIS_RAM_BYPASS_PSR2_MAN_TRACK, 0);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e9156d1a89a7..74a30d55fcb7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1511,12 +1511,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
(IS_TIGERLAKE(__i915) && !(IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \
IS_GT_STEP(__i915, since, until))
-#define RKL_REVID_A0 0x0
-#define RKL_REVID_B0 0x1
-#define RKL_REVID_C0 0x4
-
-#define IS_RKL_REVID(p, since, until) \
- (IS_ROCKETLAKE(p) && IS_REVID(p, since, until))
+#define IS_RKL_GT_STEP(__i915, since, until) \
+ (IS_ROCKETLAKE(__i915) && \
+ IS_GT_STEP(__i915, since, until))
#define DG1_REVID_A0 0x0
#define DG1_REVID_B0 0x1
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index a7144f24921e..2a97d1703e5a 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -76,6 +76,12 @@ static const struct intel_step_info tgl_revids[] = {
[1] = { .gt_step = STEP_B0, .display_step = STEP_D0 },
};
+static const struct intel_step_info rkl_revids[] = {
+ [0x0] = { .gt_step = STEP_A0 },
+ [0x1] = { .gt_step = STEP_B0 },
+ [0x4] = { .gt_step = STEP_C0 },
+};
+
static const struct intel_step_info adls_revids[] = {
[0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
[0x1] = { .gt_step = STEP_A0, .display_step = STEP_A2 },
@@ -107,6 +113,9 @@ void intel_step_init(struct drm_i915_private *i915)
} else if (IS_TGL_U(i915) || IS_TGL_Y(i915)) {
revids = tgl_uy_revids;
size = ARRAY_SIZE(tgl_uy_revids);
+ } else if (IS_ROCKETLAKE(i915)) {
+ revids = rkl_revids;
+ size = ARRAY_SIZE(rkl_revids);
} else if (IS_TIGERLAKE(i915)) {
revids = tgl_revids;
size = ARRAY_SIZE(tgl_revids);
--
2.32.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH 8/8] drm/i915/dg1: s/IS_DG1_REVID/IS_DG1_GT_STEP
2021-07-07 5:06 [Intel-gfx] [PATCH 0/8] Abstract steppings for all platforms Anusha Srivatsa
` (6 preceding siblings ...)
2021-07-07 5:06 ` [Intel-gfx] [PATCH 7/8] drm/i915/rkl: s/IS_RKL_REVID/IS_RKL_GT_STEP Anusha Srivatsa
@ 2021-07-07 5:06 ` Anusha Srivatsa
2021-07-07 5:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Abstract steppings for all platforms Patchwork
` (2 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Anusha Srivatsa @ 2021-07-07 5:06 UTC (permalink / raw)
To: intel-gfx
Add stepping info table for DG1
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
drivers/gpu/drm/i915/gt/intel_region_lmem.c | 2 +-
drivers/gpu/drm/i915/gt/intel_workarounds.c | 10 +++++-----
drivers/gpu/drm/i915/i915_drv.h | 8 +++-----
drivers/gpu/drm/i915/intel_pm.c | 2 +-
drivers/gpu/drm/i915/intel_step.c | 8 ++++++++
6 files changed, 19 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 285380079aab..b3187a866209 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -5799,7 +5799,7 @@ static void tgl_bw_buddy_init(struct drm_i915_private *dev_priv)
int config, i;
if (IS_ALDERLAKE_S(dev_priv) ||
- IS_DG1_REVID(dev_priv, DG1_REVID_A0, DG1_REVID_A0) ||
+ IS_DG1_GT_STEP(dev_priv, STEP_A0, STEP_A0) ||
IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
/* Wa_1409767108:tgl,dg1,adl-s */
table = wa_1409767108_buddy_page_masks;
diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index 1f43aba2e9e2..50d11a84e7a9 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -157,7 +157,7 @@ intel_gt_setup_fake_lmem(struct intel_gt *gt)
static bool get_legacy_lowmem_region(struct intel_uncore *uncore,
u64 *start, u32 *size)
{
- if (!IS_DG1_REVID(uncore->i915, DG1_REVID_A0, DG1_REVID_B0))
+ if (!IS_DG1_GT_STEP(uncore->i915, STEP_A0, STEP_B0))
return false;
*start = 0;
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index e2d8acb8c1c9..51af2529e64c 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1111,7 +1111,7 @@ dg1_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
gen12_gt_workarounds_init(i915, wal);
/* Wa_1607087056:dg1 */
- if (IS_DG1_REVID(i915, DG1_REVID_A0, DG1_REVID_A0))
+ if (IS_DG1_GT_STEP(i915, STEP_A0, STEP_A0))
wa_write_or(wal,
SLICE_UNIT_LEVEL_CLKGATE,
L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS);
@@ -1522,7 +1522,7 @@ static void dg1_whitelist_build(struct intel_engine_cs *engine)
tgl_whitelist_build(engine);
/* GEN:BUG:1409280441:dg1 */
- if (IS_DG1_REVID(engine->i915, DG1_REVID_A0, DG1_REVID_A0) &&
+ if (IS_DG1_GT_STEP(engine->i915, STEP_A0, STEP_A0) &&
(engine->class == RENDER_CLASS ||
engine->class == COPY_ENGINE_CLASS))
whitelist_reg_ext(w, RING_ID(engine->mmio_base),
@@ -1592,7 +1592,7 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
{
struct drm_i915_private *i915 = engine->i915;
- if (IS_DG1_REVID(i915, DG1_REVID_A0, DG1_REVID_A0) ||
+ if (IS_DG1_GT_STEP(i915, STEP_A0, STEP_A0) ||
IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_A0)) {
/*
* Wa_1607138336:tgl[a0],dg1[a0]
@@ -1638,7 +1638,7 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
}
if (IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) ||
- IS_DG1_REVID(i915, DG1_REVID_A0, DG1_REVID_A0) ||
+ IS_DG1_GT_STEP(i915, STEP_A0, STEP_A0) ||
IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) {
/* Wa_1409804808:tgl,rkl,dg1[a0],adl-s,adl-p */
wa_masked_en(wal, GEN7_ROW_CHICKEN2,
@@ -1652,7 +1652,7 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
}
- if (IS_DG1_REVID(i915, DG1_REVID_A0, DG1_REVID_A0) ||
+ if (IS_DG1_GT_STEP(i915, STEP_A0, STEP_A0) ||
IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) {
/*
* Wa_1607030317:tgl
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 74a30d55fcb7..21fa79071f83 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1515,11 +1515,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
(IS_ROCKETLAKE(__i915) && \
IS_GT_STEP(__i915, since, until))
-#define DG1_REVID_A0 0x0
-#define DG1_REVID_B0 0x1
-
-#define IS_DG1_REVID(p, since, until) \
- (IS_DG1(p) && IS_REVID(p, since, until))
+#define IS_DG1_GT_STEP(__i915, since, until) \
+ (IS_DG1(__i915) && \
+ IS_GT_STEP(__i915, since, until))
#define IS_ADLS_DISPLAY_STEP(__i915, since, until) \
(IS_ALDERLAKE_S(__i915) && \
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 5fdb96e7d266..b933c9dc823a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7390,7 +7390,7 @@ static void dg1_init_clock_gating(struct drm_i915_private *dev_priv)
gen12lp_init_clock_gating(dev_priv);
/* Wa_1409836686:dg1[a0] */
- if (IS_DG1_REVID(dev_priv, DG1_REVID_A0, DG1_REVID_A0))
+ if (IS_DG1_GT_STEP(dev_priv, STEP_A0, STEP_A0))
intel_uncore_write(&dev_priv->uncore, GEN9_CLKGATE_DIS_3, intel_uncore_read(&dev_priv->uncore, GEN9_CLKGATE_DIS_3) |
DPT_GATING_DIS);
}
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index 2a97d1703e5a..82aa6c13116f 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -82,6 +82,11 @@ static const struct intel_step_info rkl_revids[] = {
[0x4] = { .gt_step = STEP_C0 },
};
+static const struct intel_step_info dg1_revids[] = {
+ [0x0] = { .gt_step = STEP_A0 },
+ [0x1] = { .gt_step = STEP_B0 },
+};
+
static const struct intel_step_info adls_revids[] = {
[0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 },
[0x1] = { .gt_step = STEP_A0, .display_step = STEP_A2 },
@@ -110,6 +115,9 @@ void intel_step_init(struct drm_i915_private *i915)
} else if (IS_ALDERLAKE_S(i915)) {
revids = adls_revids;
size = ARRAY_SIZE(adls_revids);
+ } else if (IS_DG1(i915)) {
+ revids = dg1_revids;
+ size = ARRAY_SIZE(dg1_revids);
} else if (IS_TGL_U(i915) || IS_TGL_Y(i915)) {
revids = tgl_uy_revids;
size = ARRAY_SIZE(tgl_uy_revids);
--
2.32.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Abstract steppings for all platforms
2021-07-07 5:06 [Intel-gfx] [PATCH 0/8] Abstract steppings for all platforms Anusha Srivatsa
` (7 preceding siblings ...)
2021-07-07 5:06 ` [Intel-gfx] [PATCH 8/8] drm/i915/dg1: s/IS_DG1_REVID/IS_DG1_GT_STEP Anusha Srivatsa
@ 2021-07-07 5:26 ` Patchwork
2021-07-07 5:28 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-07-07 5:57 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
10 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2021-07-07 5:26 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
== Series Details ==
Series: Abstract steppings for all platforms
URL : https://patchwork.freedesktop.org/series/92257/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d2e17a33b144 drm/i915/step: s/<platform>_revid_tbl/<platform>_revids
2df22bd709cb drm/i915/dmc: Use RUNTIME_INFO->step for DMC
-:46: CHECK:BRACES: braces {} should be used on all arms of this statement
#46: FILE: drivers/gpu/drm/i915/display/intel_dmc.c:289:
+ if (IS_ICELAKE(dev_priv) || IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv))
[...]
+ else {
[...]
-:47: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#47: FILE: drivers/gpu/drm/i915/display/intel_dmc.c:290:
+ return INTEL_REVID(dev_priv) < size ? si + INTEL_REVID(dev_priv) : &no_stepping_info;
-:49: CHECK:BRACES: Unbalanced braces around else statement
#49: FILE: drivers/gpu/drm/i915/display/intel_dmc.c:292:
+ else {
total: 0 errors, 1 warnings, 2 checks, 79 lines checked
136910f1ca08 drm/i915/skl: s/IS_SKL_REVID/IS_SKL_GT_STEP
-:113: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#113: FILE: drivers/gpu/drm/i915/i915_drv.h:1465:
+#define IS_SKL_GT_STEP(__i915, since, until) \
+ (IS_SKYLAKE(__i915) && \
+ IS_GT_STEP(__i915, since, until))
total: 0 errors, 0 warnings, 1 checks, 127 lines checked
512ae6c9038f drm/i915/bxt: s/IS_BXT_REVID/IS_BXT_GT_STEP
-:87: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#87: FILE: drivers/gpu/drm/i915/i915_drv.h:1469:
+#define IS_BXT_GT_STEP(__i915, since, until) \
+ (IS_BROXTON(__i915) && \
+ IS_GT_STEP(__i915, since, until))
total: 0 errors, 0 warnings, 1 checks, 105 lines checked
430701f14cab drm/i915/icl: s/IS_ICL_REVID/IS_ICL_GT_STEP
-:254: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#254: FILE: drivers/gpu/drm/i915/i915_drv.h:1494:
+#define IS_ICL_GT_STEP(__i915, since, until) \
+ (IS_ICELAKE(__i915) && \
+ IS_GT_STEP(__i915, since, until))
total: 0 errors, 0 warnings, 1 checks, 260 lines checked
c7cb92db916d drm/i915/glk: s/IS_GLK_REVID/IS_GLK_GT_STEP
-:39: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#39: FILE: drivers/gpu/drm/i915/i915_drv.h:1479:
+#define IS_GLK_GT_STEP(__i915, since, until) \
+ (IS_GEMINILAKE(__i915) && \
+ IS_GT_STEP(__i915, since, until))
total: 0 errors, 0 warnings, 1 checks, 46 lines checked
3866fe5b236c drm/i915/rkl: s/IS_RKL_REVID/IS_RKL_GT_STEP
-:46: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#46: FILE: drivers/gpu/drm/i915/i915_drv.h:1514:
+#define IS_RKL_GT_STEP(__i915, since, until) \
+ (IS_ROCKETLAKE(__i915) && \
+ IS_GT_STEP(__i915, since, until))
total: 0 errors, 0 warnings, 1 checks, 52 lines checked
88c5f0df3313 drm/i915/dg1: s/IS_DG1_REVID/IS_DG1_GT_STEP
-:99: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects?
#99: FILE: drivers/gpu/drm/i915/i915_drv.h:1518:
+#define IS_DG1_GT_STEP(__i915, since, until) \
+ (IS_DG1(__i915) && \
+ IS_GT_STEP(__i915, since, until))
total: 0 errors, 0 warnings, 1 checks, 98 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Abstract steppings for all platforms
2021-07-07 5:06 [Intel-gfx] [PATCH 0/8] Abstract steppings for all platforms Anusha Srivatsa
` (8 preceding siblings ...)
2021-07-07 5:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Abstract steppings for all platforms Patchwork
@ 2021-07-07 5:28 ` Patchwork
2021-07-07 5:57 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
10 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2021-07-07 5:28 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
== Series Details ==
Series: Abstract steppings for all platforms
URL : https://patchwork.freedesktop.org/series/92257/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+drivers/gpu/drm/i915/display/intel_dmc.c:250:22: warning: symbol 'display_step' was not declared. Should it be static?
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for Abstract steppings for all platforms
2021-07-07 5:06 [Intel-gfx] [PATCH 0/8] Abstract steppings for all platforms Anusha Srivatsa
` (9 preceding siblings ...)
2021-07-07 5:28 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2021-07-07 5:57 ` Patchwork
10 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2021-07-07 5:57 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 4133 bytes --]
== Series Details ==
Series: Abstract steppings for all platforms
URL : https://patchwork.freedesktop.org/series/92257/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10308 -> Patchwork_20540
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_20540 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_20540, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20540/index.html
Known issues
------------
Here are the changes found in Patchwork_20540 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_hotunplug@unbind-rebind:
- fi-bdw-5557u: NOTRUN -> [WARN][1] ([i915#3718])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20540/fi-bdw-5557u/igt@core_hotunplug@unbind-rebind.html
* igt@kms_psr@sprite_plane_onoff:
- fi-bdw-5557u: NOTRUN -> [SKIP][2] ([fdo#109271]) +5 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20540/fi-bdw-5557u/igt@kms_psr@sprite_plane_onoff.html
* igt@vgem_basic@unload:
- fi-bdw-5557u: NOTRUN -> [INCOMPLETE][3] ([i915#3744])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20540/fi-bdw-5557u/igt@vgem_basic@unload.html
#### Warnings ####
* igt@runner@aborted:
- fi-bdw-5557u: [FAIL][4] ([i915#1602] / [i915#2029]) -> [FAIL][5] ([i915#2722])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10308/fi-bdw-5557u/igt@runner@aborted.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20540/fi-bdw-5557u/igt@runner@aborted.html
* igt@vgem_basic@unload:
- fi-pnv-d510: [INCOMPLETE][6] ([i915#299]) -> [INCOMPLETE][7] ([i915#299] / [i915#3744])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10308/fi-pnv-d510/igt@vgem_basic@unload.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20540/fi-pnv-d510/igt@vgem_basic@unload.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
[i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#299]: https://gitlab.freedesktop.org/drm/intel/issues/299
[i915#3718]: https://gitlab.freedesktop.org/drm/intel/issues/3718
[i915#3744]: https://gitlab.freedesktop.org/drm/intel/issues/3744
Participating hosts (38 -> 13)
------------------------------
ERROR: It appears as if the changes made in Patchwork_20540 prevented too many machines from booting.
Missing (25): fi-kbl-soraka fi-icl-u2 fi-apl-guc fi-icl-y fi-skl-6600u fi-cml-u2 fi-bxt-dsi fi-cml-s fi-glk-dsi fi-kbl-7500u fi-tgl-y fi-skl-6700k2 fi-kbl-r fi-tgl-dsi fi-cfl-8700k fi-dg1-1 fi-ehl-2 fi-jsl-1 fi-tgl-1115g4 fi-bsw-cyan fi-cfl-guc fi-kbl-guc fi-cfl-8109u fi-kbl-8809g fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_10308 -> Patchwork_20540
CI-20190529: 20190529
CI_DRM_10308: 9d1b5a9bdfbfb97b6e6b7ee3d863ee373ee9fd9e @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6129: 687589e76f787d26ee2b539e551a9be06bd41ce3 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_20540: 88c5f0df33134278c876ce5b40c02004feb0ab92 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
88c5f0df3313 drm/i915/dg1: s/IS_DG1_REVID/IS_DG1_GT_STEP
3866fe5b236c drm/i915/rkl: s/IS_RKL_REVID/IS_RKL_GT_STEP
c7cb92db916d drm/i915/glk: s/IS_GLK_REVID/IS_GLK_GT_STEP
430701f14cab drm/i915/icl: s/IS_ICL_REVID/IS_ICL_GT_STEP
512ae6c9038f drm/i915/bxt: s/IS_BXT_REVID/IS_BXT_GT_STEP
136910f1ca08 drm/i915/skl: s/IS_SKL_REVID/IS_SKL_GT_STEP
2df22bd709cb drm/i915/dmc: Use RUNTIME_INFO->step for DMC
d2e17a33b144 drm/i915/step: s/<platform>_revid_tbl/<platform>_revids
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20540/index.html
[-- Attachment #1.2: Type: text/html, Size: 5045 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 15+ messages in thread