* [Intel-gfx] [PATCH 0/3] drm/i915: Nuke GEN macros
@ 2021-07-07 18:13 ` Lucas De Marchi
0 siblings, 0 replies; 20+ messages in thread
From: Lucas De Marchi @ 2021-07-07 18:13 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: Daniel Vetter
Finish the conversion to the new VER macros and nuke the old macros so
we don't have more changes sneaking in.
Initially I thought about waiting for a backmerge from drm-next in
drm-intel-next so I could use a topic branch to finish the conversion
and nuke the macro, merging the topic branch in both drm-intel-next and
drm-intel-gt-next. After the backmerge landed, I realized that would not
be possible anymore as we already have changes on top preventing the
merge-base to be used for a topic branch.
Therefore the plan is:
- Apply patch 1 in drm-intel-gt-next
- Apply patches 2 and 3 in drm-intel-next
Since patches are tested on drm-tip, CI should flag a build breakage if
someone uses the GEN macros. Another possibility is to simply apply the
3rd patch on both branches, but I don't see a real need for that.
Lucas De Marchi (3):
drm/i915/gt: finish INTEL_GEN and friends conversion
drm/i915: finish INTEL_GEN and friends conversion
gpu/drm/i915: nuke old GEN macros
.../drm/i915/display/intel_display_debugfs.c | 3 ++-
drivers/gpu/drm/i915/gt/intel_migrate.c | 20 +++++++++----------
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 15 --------------
drivers/gpu/drm/i915/intel_uncore.c | 2 +-
5 files changed, 14 insertions(+), 28 deletions(-)
--
2.31.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 1/3] drm/i915/gt: finish INTEL_GEN and friends conversion
2021-07-07 18:13 ` [Intel-gfx] " Lucas De Marchi
@ 2021-07-07 18:13 ` Lucas De Marchi
-1 siblings, 0 replies; 20+ messages in thread
From: Lucas De Marchi @ 2021-07-07 18:13 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: Daniel Vetter
Commit c816723b6b8a ("drm/i915/gt: replace IS_GEN and friends with
GRAPHICS_VER") converted INTEL_GEN and friends to the new version check
macros. Meanwhile, some changes sneaked in to use INTEL_GEN. Remove the
last users so we can remove the macros.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/gt/intel_migrate.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 23c59ce66cee..14afa1974ea5 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -277,7 +277,7 @@ static int emit_pte(struct i915_request *rq,
u32 *hdr, *cs;
int pkt;
- GEM_BUG_ON(INTEL_GEN(rq->engine->i915) < 8);
+ GEM_BUG_ON(GRAPHICS_VER(rq->engine->i915) < 8);
/* Compute the page directory offset for the target address range */
offset += (u64)rq->engine->instance << 32;
@@ -347,11 +347,11 @@ static int emit_pte(struct i915_request *rq,
return total;
}
-static bool wa_1209644611_applies(int gen, u32 size)
+static bool wa_1209644611_applies(int ver, u32 size)
{
u32 height = size >> PAGE_SHIFT;
- if (gen != 11)
+ if (ver != 11)
return false;
return height % 4 == 3 && height <= 8;
@@ -359,15 +359,15 @@ static bool wa_1209644611_applies(int gen, u32 size)
static int emit_copy(struct i915_request *rq, int size)
{
- const int gen = INTEL_GEN(rq->engine->i915);
+ const int ver = GRAPHICS_VER(rq->engine->i915);
u32 instance = rq->engine->instance;
u32 *cs;
- cs = intel_ring_begin(rq, gen >= 8 ? 10 : 6);
+ cs = intel_ring_begin(rq, ver >= 8 ? 10 : 6);
if (IS_ERR(cs))
return PTR_ERR(cs);
- if (gen >= 9 && !wa_1209644611_applies(gen, size)) {
+ if (ver >= 9 && !wa_1209644611_applies(ver, size)) {
*cs++ = GEN9_XY_FAST_COPY_BLT_CMD | (10 - 2);
*cs++ = BLT_DEPTH_32 | PAGE_SIZE;
*cs++ = 0;
@@ -378,7 +378,7 @@ static int emit_copy(struct i915_request *rq, int size)
*cs++ = PAGE_SIZE;
*cs++ = 0; /* src offset */
*cs++ = instance;
- } else if (gen >= 8) {
+ } else if (ver >= 8) {
*cs++ = XY_SRC_COPY_BLT_CMD | BLT_WRITE_RGBA | (10 - 2);
*cs++ = BLT_DEPTH_32 | BLT_ROP_SRC_COPY | PAGE_SIZE;
*cs++ = 0;
@@ -491,17 +491,17 @@ intel_context_migrate_copy(struct intel_context *ce,
static int emit_clear(struct i915_request *rq, int size, u32 value)
{
- const int gen = INTEL_GEN(rq->engine->i915);
+ const int ver = GRAPHICS_VER(rq->engine->i915);
u32 instance = rq->engine->instance;
u32 *cs;
GEM_BUG_ON(size >> PAGE_SHIFT > S16_MAX);
- cs = intel_ring_begin(rq, gen >= 8 ? 8 : 6);
+ cs = intel_ring_begin(rq, ver >= 8 ? 8 : 6);
if (IS_ERR(cs))
return PTR_ERR(cs);
- if (gen >= 8) {
+ if (ver >= 8) {
*cs++ = XY_COLOR_BLT_CMD | BLT_WRITE_RGBA | (7 - 2);
*cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY | PAGE_SIZE;
*cs++ = 0;
--
2.31.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [Intel-gfx] [PATCH 1/3] drm/i915/gt: finish INTEL_GEN and friends conversion
@ 2021-07-07 18:13 ` Lucas De Marchi
0 siblings, 0 replies; 20+ messages in thread
From: Lucas De Marchi @ 2021-07-07 18:13 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: Daniel Vetter
Commit c816723b6b8a ("drm/i915/gt: replace IS_GEN and friends with
GRAPHICS_VER") converted INTEL_GEN and friends to the new version check
macros. Meanwhile, some changes sneaked in to use INTEL_GEN. Remove the
last users so we can remove the macros.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/gt/intel_migrate.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 23c59ce66cee..14afa1974ea5 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -277,7 +277,7 @@ static int emit_pte(struct i915_request *rq,
u32 *hdr, *cs;
int pkt;
- GEM_BUG_ON(INTEL_GEN(rq->engine->i915) < 8);
+ GEM_BUG_ON(GRAPHICS_VER(rq->engine->i915) < 8);
/* Compute the page directory offset for the target address range */
offset += (u64)rq->engine->instance << 32;
@@ -347,11 +347,11 @@ static int emit_pte(struct i915_request *rq,
return total;
}
-static bool wa_1209644611_applies(int gen, u32 size)
+static bool wa_1209644611_applies(int ver, u32 size)
{
u32 height = size >> PAGE_SHIFT;
- if (gen != 11)
+ if (ver != 11)
return false;
return height % 4 == 3 && height <= 8;
@@ -359,15 +359,15 @@ static bool wa_1209644611_applies(int gen, u32 size)
static int emit_copy(struct i915_request *rq, int size)
{
- const int gen = INTEL_GEN(rq->engine->i915);
+ const int ver = GRAPHICS_VER(rq->engine->i915);
u32 instance = rq->engine->instance;
u32 *cs;
- cs = intel_ring_begin(rq, gen >= 8 ? 10 : 6);
+ cs = intel_ring_begin(rq, ver >= 8 ? 10 : 6);
if (IS_ERR(cs))
return PTR_ERR(cs);
- if (gen >= 9 && !wa_1209644611_applies(gen, size)) {
+ if (ver >= 9 && !wa_1209644611_applies(ver, size)) {
*cs++ = GEN9_XY_FAST_COPY_BLT_CMD | (10 - 2);
*cs++ = BLT_DEPTH_32 | PAGE_SIZE;
*cs++ = 0;
@@ -378,7 +378,7 @@ static int emit_copy(struct i915_request *rq, int size)
*cs++ = PAGE_SIZE;
*cs++ = 0; /* src offset */
*cs++ = instance;
- } else if (gen >= 8) {
+ } else if (ver >= 8) {
*cs++ = XY_SRC_COPY_BLT_CMD | BLT_WRITE_RGBA | (10 - 2);
*cs++ = BLT_DEPTH_32 | BLT_ROP_SRC_COPY | PAGE_SIZE;
*cs++ = 0;
@@ -491,17 +491,17 @@ intel_context_migrate_copy(struct intel_context *ce,
static int emit_clear(struct i915_request *rq, int size, u32 value)
{
- const int gen = INTEL_GEN(rq->engine->i915);
+ const int ver = GRAPHICS_VER(rq->engine->i915);
u32 instance = rq->engine->instance;
u32 *cs;
GEM_BUG_ON(size >> PAGE_SHIFT > S16_MAX);
- cs = intel_ring_begin(rq, gen >= 8 ? 8 : 6);
+ cs = intel_ring_begin(rq, ver >= 8 ? 8 : 6);
if (IS_ERR(cs))
return PTR_ERR(cs);
- if (gen >= 8) {
+ if (ver >= 8) {
*cs++ = XY_COLOR_BLT_CMD | BLT_WRITE_RGBA | (7 - 2);
*cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY | PAGE_SIZE;
*cs++ = 0;
--
2.31.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH 1/3] drm/i915/gt: finish INTEL_GEN and friends conversion
2021-07-07 18:13 ` [Intel-gfx] " Lucas De Marchi
@ 2021-07-07 19:36 ` Matt Roper
-1 siblings, 0 replies; 20+ messages in thread
From: Matt Roper @ 2021-07-07 19:36 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: Daniel Vetter, intel-gfx, dri-devel
On Wed, Jul 07, 2021 at 11:13:23AM -0700, Lucas De Marchi wrote:
> Commit c816723b6b8a ("drm/i915/gt: replace IS_GEN and friends with
> GRAPHICS_VER") converted INTEL_GEN and friends to the new version check
> macros. Meanwhile, some changes sneaked in to use INTEL_GEN. Remove the
> last users so we can remove the macros.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_migrate.c | 20 ++++++++++----------
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
> index 23c59ce66cee..14afa1974ea5 100644
> --- a/drivers/gpu/drm/i915/gt/intel_migrate.c
> +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
> @@ -277,7 +277,7 @@ static int emit_pte(struct i915_request *rq,
> u32 *hdr, *cs;
> int pkt;
>
> - GEM_BUG_ON(INTEL_GEN(rq->engine->i915) < 8);
> + GEM_BUG_ON(GRAPHICS_VER(rq->engine->i915) < 8);
>
> /* Compute the page directory offset for the target address range */
> offset += (u64)rq->engine->instance << 32;
> @@ -347,11 +347,11 @@ static int emit_pte(struct i915_request *rq,
> return total;
> }
>
> -static bool wa_1209644611_applies(int gen, u32 size)
> +static bool wa_1209644611_applies(int ver, u32 size)
> {
> u32 height = size >> PAGE_SHIFT;
>
> - if (gen != 11)
> + if (ver != 11)
> return false;
>
> return height % 4 == 3 && height <= 8;
> @@ -359,15 +359,15 @@ static bool wa_1209644611_applies(int gen, u32 size)
>
> static int emit_copy(struct i915_request *rq, int size)
> {
> - const int gen = INTEL_GEN(rq->engine->i915);
> + const int ver = GRAPHICS_VER(rq->engine->i915);
> u32 instance = rq->engine->instance;
> u32 *cs;
>
> - cs = intel_ring_begin(rq, gen >= 8 ? 10 : 6);
> + cs = intel_ring_begin(rq, ver >= 8 ? 10 : 6);
> if (IS_ERR(cs))
> return PTR_ERR(cs);
>
> - if (gen >= 9 && !wa_1209644611_applies(gen, size)) {
> + if (ver >= 9 && !wa_1209644611_applies(ver, size)) {
> *cs++ = GEN9_XY_FAST_COPY_BLT_CMD | (10 - 2);
> *cs++ = BLT_DEPTH_32 | PAGE_SIZE;
> *cs++ = 0;
> @@ -378,7 +378,7 @@ static int emit_copy(struct i915_request *rq, int size)
> *cs++ = PAGE_SIZE;
> *cs++ = 0; /* src offset */
> *cs++ = instance;
> - } else if (gen >= 8) {
> + } else if (ver >= 8) {
> *cs++ = XY_SRC_COPY_BLT_CMD | BLT_WRITE_RGBA | (10 - 2);
> *cs++ = BLT_DEPTH_32 | BLT_ROP_SRC_COPY | PAGE_SIZE;
> *cs++ = 0;
> @@ -491,17 +491,17 @@ intel_context_migrate_copy(struct intel_context *ce,
>
> static int emit_clear(struct i915_request *rq, int size, u32 value)
> {
> - const int gen = INTEL_GEN(rq->engine->i915);
> + const int ver = GRAPHICS_VER(rq->engine->i915);
> u32 instance = rq->engine->instance;
> u32 *cs;
>
> GEM_BUG_ON(size >> PAGE_SHIFT > S16_MAX);
>
> - cs = intel_ring_begin(rq, gen >= 8 ? 8 : 6);
> + cs = intel_ring_begin(rq, ver >= 8 ? 8 : 6);
> if (IS_ERR(cs))
> return PTR_ERR(cs);
>
> - if (gen >= 8) {
> + if (ver >= 8) {
> *cs++ = XY_COLOR_BLT_CMD | BLT_WRITE_RGBA | (7 - 2);
> *cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY | PAGE_SIZE;
> *cs++ = 0;
> --
> 2.31.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [Intel-gfx] [PATCH 1/3] drm/i915/gt: finish INTEL_GEN and friends conversion
@ 2021-07-07 19:36 ` Matt Roper
0 siblings, 0 replies; 20+ messages in thread
From: Matt Roper @ 2021-07-07 19:36 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: Daniel Vetter, intel-gfx, dri-devel
On Wed, Jul 07, 2021 at 11:13:23AM -0700, Lucas De Marchi wrote:
> Commit c816723b6b8a ("drm/i915/gt: replace IS_GEN and friends with
> GRAPHICS_VER") converted INTEL_GEN and friends to the new version check
> macros. Meanwhile, some changes sneaked in to use INTEL_GEN. Remove the
> last users so we can remove the macros.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_migrate.c | 20 ++++++++++----------
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
> index 23c59ce66cee..14afa1974ea5 100644
> --- a/drivers/gpu/drm/i915/gt/intel_migrate.c
> +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
> @@ -277,7 +277,7 @@ static int emit_pte(struct i915_request *rq,
> u32 *hdr, *cs;
> int pkt;
>
> - GEM_BUG_ON(INTEL_GEN(rq->engine->i915) < 8);
> + GEM_BUG_ON(GRAPHICS_VER(rq->engine->i915) < 8);
>
> /* Compute the page directory offset for the target address range */
> offset += (u64)rq->engine->instance << 32;
> @@ -347,11 +347,11 @@ static int emit_pte(struct i915_request *rq,
> return total;
> }
>
> -static bool wa_1209644611_applies(int gen, u32 size)
> +static bool wa_1209644611_applies(int ver, u32 size)
> {
> u32 height = size >> PAGE_SHIFT;
>
> - if (gen != 11)
> + if (ver != 11)
> return false;
>
> return height % 4 == 3 && height <= 8;
> @@ -359,15 +359,15 @@ static bool wa_1209644611_applies(int gen, u32 size)
>
> static int emit_copy(struct i915_request *rq, int size)
> {
> - const int gen = INTEL_GEN(rq->engine->i915);
> + const int ver = GRAPHICS_VER(rq->engine->i915);
> u32 instance = rq->engine->instance;
> u32 *cs;
>
> - cs = intel_ring_begin(rq, gen >= 8 ? 10 : 6);
> + cs = intel_ring_begin(rq, ver >= 8 ? 10 : 6);
> if (IS_ERR(cs))
> return PTR_ERR(cs);
>
> - if (gen >= 9 && !wa_1209644611_applies(gen, size)) {
> + if (ver >= 9 && !wa_1209644611_applies(ver, size)) {
> *cs++ = GEN9_XY_FAST_COPY_BLT_CMD | (10 - 2);
> *cs++ = BLT_DEPTH_32 | PAGE_SIZE;
> *cs++ = 0;
> @@ -378,7 +378,7 @@ static int emit_copy(struct i915_request *rq, int size)
> *cs++ = PAGE_SIZE;
> *cs++ = 0; /* src offset */
> *cs++ = instance;
> - } else if (gen >= 8) {
> + } else if (ver >= 8) {
> *cs++ = XY_SRC_COPY_BLT_CMD | BLT_WRITE_RGBA | (10 - 2);
> *cs++ = BLT_DEPTH_32 | BLT_ROP_SRC_COPY | PAGE_SIZE;
> *cs++ = 0;
> @@ -491,17 +491,17 @@ intel_context_migrate_copy(struct intel_context *ce,
>
> static int emit_clear(struct i915_request *rq, int size, u32 value)
> {
> - const int gen = INTEL_GEN(rq->engine->i915);
> + const int ver = GRAPHICS_VER(rq->engine->i915);
> u32 instance = rq->engine->instance;
> u32 *cs;
>
> GEM_BUG_ON(size >> PAGE_SHIFT > S16_MAX);
>
> - cs = intel_ring_begin(rq, gen >= 8 ? 8 : 6);
> + cs = intel_ring_begin(rq, ver >= 8 ? 8 : 6);
> if (IS_ERR(cs))
> return PTR_ERR(cs);
>
> - if (gen >= 8) {
> + if (ver >= 8) {
> *cs++ = XY_COLOR_BLT_CMD | BLT_WRITE_RGBA | (7 - 2);
> *cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY | PAGE_SIZE;
> *cs++ = 0;
> --
> 2.31.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 2/3] drm/i915: finish INTEL_GEN and friends conversion
2021-07-07 18:13 ` [Intel-gfx] " Lucas De Marchi
@ 2021-07-07 18:13 ` Lucas De Marchi
-1 siblings, 0 replies; 20+ messages in thread
From: Lucas De Marchi @ 2021-07-07 18:13 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: Daniel Vetter
Commit 161058fb899e ("drm/i915: Add remaining conversions to GRAPHICS_VER")
did the last conversions to the new macros for version checks, but some
some changes sneaked in to use INTEL_GEN. Remove the last users so
we can remove the macros.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 3 ++-
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/intel_uncore.c | 2 +-
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index af9e58619667..d5af5708c9da 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -544,7 +544,8 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
seq_printf(m, "fw loaded: %s\n", yesno(intel_dmc_has_payload(dev_priv)));
seq_printf(m, "path: %s\n", dmc->fw_path);
- seq_printf(m, "Pipe A fw support: %s\n", yesno(INTEL_GEN(dev_priv) >= 12));
+ seq_printf(m, "Pipe A fw support: %s\n",
+ yesno(GRAPHICS_VER(dev_priv) >= 12));
seq_printf(m, "Pipe A fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEA].payload));
seq_printf(m, "Pipe B fw support: %s\n", yesno(IS_ALDERLAKE_P(dev_priv)));
seq_printf(m, "Pipe B fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEB].payload));
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index cc745751ac53..0529576f069c 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -636,7 +636,7 @@ static int i915_swizzle_info(struct seq_file *m, void *data)
intel_uncore_read16(uncore, C0DRB3_BW));
seq_printf(m, "C1DRB3 = 0x%04x\n",
intel_uncore_read16(uncore, C1DRB3_BW));
- } else if (INTEL_GEN(dev_priv) >= 6) {
+ } else if (GRAPHICS_VER(dev_priv) >= 6) {
seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
intel_uncore_read(uncore, MAD_DIMM_C0));
seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index d067524f9162..ee1c6fbc3d97 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1929,7 +1929,7 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
return -ENODEV;
}
- if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915))
+ if (GRAPHICS_VER(i915) > 5 && !intel_vgpu_active(i915))
uncore->flags |= UNCORE_HAS_FORCEWAKE;
if (!intel_uncore_has_forcewake(uncore)) {
--
2.31.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [Intel-gfx] [PATCH 2/3] drm/i915: finish INTEL_GEN and friends conversion
@ 2021-07-07 18:13 ` Lucas De Marchi
0 siblings, 0 replies; 20+ messages in thread
From: Lucas De Marchi @ 2021-07-07 18:13 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: Daniel Vetter
Commit 161058fb899e ("drm/i915: Add remaining conversions to GRAPHICS_VER")
did the last conversions to the new macros for version checks, but some
some changes sneaked in to use INTEL_GEN. Remove the last users so
we can remove the macros.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 3 ++-
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/intel_uncore.c | 2 +-
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index af9e58619667..d5af5708c9da 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -544,7 +544,8 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
seq_printf(m, "fw loaded: %s\n", yesno(intel_dmc_has_payload(dev_priv)));
seq_printf(m, "path: %s\n", dmc->fw_path);
- seq_printf(m, "Pipe A fw support: %s\n", yesno(INTEL_GEN(dev_priv) >= 12));
+ seq_printf(m, "Pipe A fw support: %s\n",
+ yesno(GRAPHICS_VER(dev_priv) >= 12));
seq_printf(m, "Pipe A fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEA].payload));
seq_printf(m, "Pipe B fw support: %s\n", yesno(IS_ALDERLAKE_P(dev_priv)));
seq_printf(m, "Pipe B fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEB].payload));
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index cc745751ac53..0529576f069c 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -636,7 +636,7 @@ static int i915_swizzle_info(struct seq_file *m, void *data)
intel_uncore_read16(uncore, C0DRB3_BW));
seq_printf(m, "C1DRB3 = 0x%04x\n",
intel_uncore_read16(uncore, C1DRB3_BW));
- } else if (INTEL_GEN(dev_priv) >= 6) {
+ } else if (GRAPHICS_VER(dev_priv) >= 6) {
seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
intel_uncore_read(uncore, MAD_DIMM_C0));
seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index d067524f9162..ee1c6fbc3d97 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1929,7 +1929,7 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
return -ENODEV;
}
- if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915))
+ if (GRAPHICS_VER(i915) > 5 && !intel_vgpu_active(i915))
uncore->flags |= UNCORE_HAS_FORCEWAKE;
if (!intel_uncore_has_forcewake(uncore)) {
--
2.31.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH 2/3] drm/i915: finish INTEL_GEN and friends conversion
2021-07-07 18:13 ` [Intel-gfx] " Lucas De Marchi
@ 2021-07-07 19:39 ` Matt Roper
-1 siblings, 0 replies; 20+ messages in thread
From: Matt Roper @ 2021-07-07 19:39 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: Daniel Vetter, intel-gfx, dri-devel
On Wed, Jul 07, 2021 at 11:13:24AM -0700, Lucas De Marchi wrote:
> Commit 161058fb899e ("drm/i915: Add remaining conversions to GRAPHICS_VER")
> did the last conversions to the new macros for version checks, but some
> some changes sneaked in to use INTEL_GEN. Remove the last users so
> we can remove the macros.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
I think the third change here is just one we somehow missed during the
previous conversion rather than a new use, right?
> ---
> drivers/gpu/drm/i915/display/intel_display_debugfs.c | 3 ++-
> drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
> drivers/gpu/drm/i915/intel_uncore.c | 2 +-
> 3 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index af9e58619667..d5af5708c9da 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -544,7 +544,8 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
>
> seq_printf(m, "fw loaded: %s\n", yesno(intel_dmc_has_payload(dev_priv)));
> seq_printf(m, "path: %s\n", dmc->fw_path);
> - seq_printf(m, "Pipe A fw support: %s\n", yesno(INTEL_GEN(dev_priv) >= 12));
> + seq_printf(m, "Pipe A fw support: %s\n",
> + yesno(GRAPHICS_VER(dev_priv) >= 12));
> seq_printf(m, "Pipe A fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEA].payload));
> seq_printf(m, "Pipe B fw support: %s\n", yesno(IS_ALDERLAKE_P(dev_priv)));
> seq_printf(m, "Pipe B fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEB].payload));
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index cc745751ac53..0529576f069c 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -636,7 +636,7 @@ static int i915_swizzle_info(struct seq_file *m, void *data)
> intel_uncore_read16(uncore, C0DRB3_BW));
> seq_printf(m, "C1DRB3 = 0x%04x\n",
> intel_uncore_read16(uncore, C1DRB3_BW));
> - } else if (INTEL_GEN(dev_priv) >= 6) {
> + } else if (GRAPHICS_VER(dev_priv) >= 6) {
> seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
> intel_uncore_read(uncore, MAD_DIMM_C0));
> seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index d067524f9162..ee1c6fbc3d97 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1929,7 +1929,7 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
> return -ENODEV;
> }
>
> - if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915))
> + if (GRAPHICS_VER(i915) > 5 && !intel_vgpu_active(i915))
> uncore->flags |= UNCORE_HAS_FORCEWAKE;
>
> if (!intel_uncore_has_forcewake(uncore)) {
> --
> 2.31.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [Intel-gfx] [PATCH 2/3] drm/i915: finish INTEL_GEN and friends conversion
@ 2021-07-07 19:39 ` Matt Roper
0 siblings, 0 replies; 20+ messages in thread
From: Matt Roper @ 2021-07-07 19:39 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: Daniel Vetter, intel-gfx, dri-devel
On Wed, Jul 07, 2021 at 11:13:24AM -0700, Lucas De Marchi wrote:
> Commit 161058fb899e ("drm/i915: Add remaining conversions to GRAPHICS_VER")
> did the last conversions to the new macros for version checks, but some
> some changes sneaked in to use INTEL_GEN. Remove the last users so
> we can remove the macros.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
I think the third change here is just one we somehow missed during the
previous conversion rather than a new use, right?
> ---
> drivers/gpu/drm/i915/display/intel_display_debugfs.c | 3 ++-
> drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
> drivers/gpu/drm/i915/intel_uncore.c | 2 +-
> 3 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index af9e58619667..d5af5708c9da 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -544,7 +544,8 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
>
> seq_printf(m, "fw loaded: %s\n", yesno(intel_dmc_has_payload(dev_priv)));
> seq_printf(m, "path: %s\n", dmc->fw_path);
> - seq_printf(m, "Pipe A fw support: %s\n", yesno(INTEL_GEN(dev_priv) >= 12));
> + seq_printf(m, "Pipe A fw support: %s\n",
> + yesno(GRAPHICS_VER(dev_priv) >= 12));
> seq_printf(m, "Pipe A fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEA].payload));
> seq_printf(m, "Pipe B fw support: %s\n", yesno(IS_ALDERLAKE_P(dev_priv)));
> seq_printf(m, "Pipe B fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEB].payload));
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index cc745751ac53..0529576f069c 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -636,7 +636,7 @@ static int i915_swizzle_info(struct seq_file *m, void *data)
> intel_uncore_read16(uncore, C0DRB3_BW));
> seq_printf(m, "C1DRB3 = 0x%04x\n",
> intel_uncore_read16(uncore, C1DRB3_BW));
> - } else if (INTEL_GEN(dev_priv) >= 6) {
> + } else if (GRAPHICS_VER(dev_priv) >= 6) {
> seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
> intel_uncore_read(uncore, MAD_DIMM_C0));
> seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index d067524f9162..ee1c6fbc3d97 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1929,7 +1929,7 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
> return -ENODEV;
> }
>
> - if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915))
> + if (GRAPHICS_VER(i915) > 5 && !intel_vgpu_active(i915))
> uncore->flags |= UNCORE_HAS_FORCEWAKE;
>
> if (!intel_uncore_has_forcewake(uncore)) {
> --
> 2.31.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH 2/3] drm/i915: finish INTEL_GEN and friends conversion
2021-07-07 19:39 ` [Intel-gfx] " Matt Roper
@ 2021-07-07 21:44 ` Lucas De Marchi
-1 siblings, 0 replies; 20+ messages in thread
From: Lucas De Marchi @ 2021-07-07 21:44 UTC (permalink / raw)
To: Matt Roper; +Cc: Daniel Vetter, intel-gfx, dri-devel
On Wed, Jul 07, 2021 at 12:39:28PM -0700, Matt Roper wrote:
>On Wed, Jul 07, 2021 at 11:13:24AM -0700, Lucas De Marchi wrote:
>> Commit 161058fb899e ("drm/i915: Add remaining conversions to GRAPHICS_VER")
>> did the last conversions to the new macros for version checks, but some
>> some changes sneaked in to use INTEL_GEN. Remove the last users so
>> we can remove the macros.
>>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>
>Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
>
>I think the third change here is just one we somehow missed during the
>previous conversion rather than a new use, right?
yes, looking at git log again, yes. I missed that when doing the
conversion.
thanks
Lucas De Marchi
>
>> ---
>> drivers/gpu/drm/i915/display/intel_display_debugfs.c | 3 ++-
>> drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
>> drivers/gpu/drm/i915/intel_uncore.c | 2 +-
>> 3 files changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
>> index af9e58619667..d5af5708c9da 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
>> @@ -544,7 +544,8 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
>>
>> seq_printf(m, "fw loaded: %s\n", yesno(intel_dmc_has_payload(dev_priv)));
>> seq_printf(m, "path: %s\n", dmc->fw_path);
>> - seq_printf(m, "Pipe A fw support: %s\n", yesno(INTEL_GEN(dev_priv) >= 12));
>> + seq_printf(m, "Pipe A fw support: %s\n",
>> + yesno(GRAPHICS_VER(dev_priv) >= 12));
>> seq_printf(m, "Pipe A fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEA].payload));
>> seq_printf(m, "Pipe B fw support: %s\n", yesno(IS_ALDERLAKE_P(dev_priv)));
>> seq_printf(m, "Pipe B fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEB].payload));
>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
>> index cc745751ac53..0529576f069c 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -636,7 +636,7 @@ static int i915_swizzle_info(struct seq_file *m, void *data)
>> intel_uncore_read16(uncore, C0DRB3_BW));
>> seq_printf(m, "C1DRB3 = 0x%04x\n",
>> intel_uncore_read16(uncore, C1DRB3_BW));
>> - } else if (INTEL_GEN(dev_priv) >= 6) {
>> + } else if (GRAPHICS_VER(dev_priv) >= 6) {
>> seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
>> intel_uncore_read(uncore, MAD_DIMM_C0));
>> seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
>> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
>> index d067524f9162..ee1c6fbc3d97 100644
>> --- a/drivers/gpu/drm/i915/intel_uncore.c
>> +++ b/drivers/gpu/drm/i915/intel_uncore.c
>> @@ -1929,7 +1929,7 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
>> return -ENODEV;
>> }
>>
>> - if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915))
>> + if (GRAPHICS_VER(i915) > 5 && !intel_vgpu_active(i915))
>> uncore->flags |= UNCORE_HAS_FORCEWAKE;
>>
>> if (!intel_uncore_has_forcewake(uncore)) {
>> --
>> 2.31.1
>>
>
>--
>Matt Roper
>Graphics Software Engineer
>VTT-OSGC Platform Enablement
>Intel Corporation
>(916) 356-2795
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [Intel-gfx] [PATCH 2/3] drm/i915: finish INTEL_GEN and friends conversion
@ 2021-07-07 21:44 ` Lucas De Marchi
0 siblings, 0 replies; 20+ messages in thread
From: Lucas De Marchi @ 2021-07-07 21:44 UTC (permalink / raw)
To: Matt Roper; +Cc: Daniel Vetter, intel-gfx, dri-devel
On Wed, Jul 07, 2021 at 12:39:28PM -0700, Matt Roper wrote:
>On Wed, Jul 07, 2021 at 11:13:24AM -0700, Lucas De Marchi wrote:
>> Commit 161058fb899e ("drm/i915: Add remaining conversions to GRAPHICS_VER")
>> did the last conversions to the new macros for version checks, but some
>> some changes sneaked in to use INTEL_GEN. Remove the last users so
>> we can remove the macros.
>>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>
>Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
>
>I think the third change here is just one we somehow missed during the
>previous conversion rather than a new use, right?
yes, looking at git log again, yes. I missed that when doing the
conversion.
thanks
Lucas De Marchi
>
>> ---
>> drivers/gpu/drm/i915/display/intel_display_debugfs.c | 3 ++-
>> drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
>> drivers/gpu/drm/i915/intel_uncore.c | 2 +-
>> 3 files changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
>> index af9e58619667..d5af5708c9da 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
>> @@ -544,7 +544,8 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
>>
>> seq_printf(m, "fw loaded: %s\n", yesno(intel_dmc_has_payload(dev_priv)));
>> seq_printf(m, "path: %s\n", dmc->fw_path);
>> - seq_printf(m, "Pipe A fw support: %s\n", yesno(INTEL_GEN(dev_priv) >= 12));
>> + seq_printf(m, "Pipe A fw support: %s\n",
>> + yesno(GRAPHICS_VER(dev_priv) >= 12));
>> seq_printf(m, "Pipe A fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEA].payload));
>> seq_printf(m, "Pipe B fw support: %s\n", yesno(IS_ALDERLAKE_P(dev_priv)));
>> seq_printf(m, "Pipe B fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEB].payload));
>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
>> index cc745751ac53..0529576f069c 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -636,7 +636,7 @@ static int i915_swizzle_info(struct seq_file *m, void *data)
>> intel_uncore_read16(uncore, C0DRB3_BW));
>> seq_printf(m, "C1DRB3 = 0x%04x\n",
>> intel_uncore_read16(uncore, C1DRB3_BW));
>> - } else if (INTEL_GEN(dev_priv) >= 6) {
>> + } else if (GRAPHICS_VER(dev_priv) >= 6) {
>> seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
>> intel_uncore_read(uncore, MAD_DIMM_C0));
>> seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
>> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
>> index d067524f9162..ee1c6fbc3d97 100644
>> --- a/drivers/gpu/drm/i915/intel_uncore.c
>> +++ b/drivers/gpu/drm/i915/intel_uncore.c
>> @@ -1929,7 +1929,7 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
>> return -ENODEV;
>> }
>>
>> - if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915))
>> + if (GRAPHICS_VER(i915) > 5 && !intel_vgpu_active(i915))
>> uncore->flags |= UNCORE_HAS_FORCEWAKE;
>>
>> if (!intel_uncore_has_forcewake(uncore)) {
>> --
>> 2.31.1
>>
>
>--
>Matt Roper
>Graphics Software Engineer
>VTT-OSGC Platform Enablement
>Intel Corporation
>(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 3/3] gpu/drm/i915: nuke old GEN macros
2021-07-07 18:13 ` [Intel-gfx] " Lucas De Marchi
@ 2021-07-07 18:13 ` Lucas De Marchi
-1 siblings, 0 replies; 20+ messages in thread
From: Lucas De Marchi @ 2021-07-07 18:13 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: Daniel Vetter
Now that all the codebase is converted to the new *VER macros, remove
the old GEN ones.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 15 ---------------
1 file changed, 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6dff4ca01241..bc6799f75670 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1243,21 +1243,6 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev)
#define INTEL_DEVID(dev_priv) (RUNTIME_INFO(dev_priv)->device_id)
-/*
- * Deprecated: this will be replaced by individual IP checks:
- * GRAPHICS_VER(), MEDIA_VER() and DISPLAY_VER()
- */
-#define INTEL_GEN(dev_priv) GRAPHICS_VER(dev_priv)
-/*
- * Deprecated: use IS_GRAPHICS_VER(), IS_MEDIA_VER() and IS_DISPLAY_VER() as
- * appropriate.
- */
-#define IS_GEN_RANGE(dev_priv, s, e) IS_GRAPHICS_VER(dev_priv, (s), (e))
-/*
- * Deprecated: use GRAPHICS_VER(), MEDIA_VER() and DISPLAY_VER() as appropriate.
- */
-#define IS_GEN(dev_priv, n) (GRAPHICS_VER(dev_priv) == (n))
-
#define GRAPHICS_VER(i915) (INTEL_INFO(i915)->graphics_ver)
#define IS_GRAPHICS_VER(i915, from, until) \
(GRAPHICS_VER(i915) >= (from) && GRAPHICS_VER(i915) <= (until))
--
2.31.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [Intel-gfx] [PATCH 3/3] gpu/drm/i915: nuke old GEN macros
@ 2021-07-07 18:13 ` Lucas De Marchi
0 siblings, 0 replies; 20+ messages in thread
From: Lucas De Marchi @ 2021-07-07 18:13 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: Daniel Vetter
Now that all the codebase is converted to the new *VER macros, remove
the old GEN ones.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 15 ---------------
1 file changed, 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6dff4ca01241..bc6799f75670 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1243,21 +1243,6 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev)
#define INTEL_DEVID(dev_priv) (RUNTIME_INFO(dev_priv)->device_id)
-/*
- * Deprecated: this will be replaced by individual IP checks:
- * GRAPHICS_VER(), MEDIA_VER() and DISPLAY_VER()
- */
-#define INTEL_GEN(dev_priv) GRAPHICS_VER(dev_priv)
-/*
- * Deprecated: use IS_GRAPHICS_VER(), IS_MEDIA_VER() and IS_DISPLAY_VER() as
- * appropriate.
- */
-#define IS_GEN_RANGE(dev_priv, s, e) IS_GRAPHICS_VER(dev_priv, (s), (e))
-/*
- * Deprecated: use GRAPHICS_VER(), MEDIA_VER() and DISPLAY_VER() as appropriate.
- */
-#define IS_GEN(dev_priv, n) (GRAPHICS_VER(dev_priv) == (n))
-
#define GRAPHICS_VER(i915) (INTEL_INFO(i915)->graphics_ver)
#define IS_GRAPHICS_VER(i915, from, until) \
(GRAPHICS_VER(i915) >= (from) && GRAPHICS_VER(i915) <= (until))
--
2.31.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH 3/3] gpu/drm/i915: nuke old GEN macros
2021-07-07 18:13 ` [Intel-gfx] " Lucas De Marchi
@ 2021-07-07 19:41 ` Matt Roper
-1 siblings, 0 replies; 20+ messages in thread
From: Matt Roper @ 2021-07-07 19:41 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: Daniel Vetter, intel-gfx, dri-devel
On Wed, Jul 07, 2021 at 11:13:25AM -0700, Lucas De Marchi wrote:
> Now that all the codebase is converted to the new *VER macros, remove
> the old GEN ones.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
We're still going to need another patch or two to kill off
IS_GEN9_{BC,LP}, but we can do that separately. We're less likely to be
adding new instances of those macros now anyway.
> ---
> drivers/gpu/drm/i915/i915_drv.h | 15 ---------------
> 1 file changed, 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 6dff4ca01241..bc6799f75670 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1243,21 +1243,6 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev)
>
> #define INTEL_DEVID(dev_priv) (RUNTIME_INFO(dev_priv)->device_id)
>
> -/*
> - * Deprecated: this will be replaced by individual IP checks:
> - * GRAPHICS_VER(), MEDIA_VER() and DISPLAY_VER()
> - */
> -#define INTEL_GEN(dev_priv) GRAPHICS_VER(dev_priv)
> -/*
> - * Deprecated: use IS_GRAPHICS_VER(), IS_MEDIA_VER() and IS_DISPLAY_VER() as
> - * appropriate.
> - */
> -#define IS_GEN_RANGE(dev_priv, s, e) IS_GRAPHICS_VER(dev_priv, (s), (e))
> -/*
> - * Deprecated: use GRAPHICS_VER(), MEDIA_VER() and DISPLAY_VER() as appropriate.
> - */
> -#define IS_GEN(dev_priv, n) (GRAPHICS_VER(dev_priv) == (n))
> -
> #define GRAPHICS_VER(i915) (INTEL_INFO(i915)->graphics_ver)
> #define IS_GRAPHICS_VER(i915, from, until) \
> (GRAPHICS_VER(i915) >= (from) && GRAPHICS_VER(i915) <= (until))
> --
> 2.31.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [Intel-gfx] [PATCH 3/3] gpu/drm/i915: nuke old GEN macros
@ 2021-07-07 19:41 ` Matt Roper
0 siblings, 0 replies; 20+ messages in thread
From: Matt Roper @ 2021-07-07 19:41 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: Daniel Vetter, intel-gfx, dri-devel
On Wed, Jul 07, 2021 at 11:13:25AM -0700, Lucas De Marchi wrote:
> Now that all the codebase is converted to the new *VER macros, remove
> the old GEN ones.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
We're still going to need another patch or two to kill off
IS_GEN9_{BC,LP}, but we can do that separately. We're less likely to be
adding new instances of those macros now anyway.
> ---
> drivers/gpu/drm/i915/i915_drv.h | 15 ---------------
> 1 file changed, 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 6dff4ca01241..bc6799f75670 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1243,21 +1243,6 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev)
>
> #define INTEL_DEVID(dev_priv) (RUNTIME_INFO(dev_priv)->device_id)
>
> -/*
> - * Deprecated: this will be replaced by individual IP checks:
> - * GRAPHICS_VER(), MEDIA_VER() and DISPLAY_VER()
> - */
> -#define INTEL_GEN(dev_priv) GRAPHICS_VER(dev_priv)
> -/*
> - * Deprecated: use IS_GRAPHICS_VER(), IS_MEDIA_VER() and IS_DISPLAY_VER() as
> - * appropriate.
> - */
> -#define IS_GEN_RANGE(dev_priv, s, e) IS_GRAPHICS_VER(dev_priv, (s), (e))
> -/*
> - * Deprecated: use GRAPHICS_VER(), MEDIA_VER() and DISPLAY_VER() as appropriate.
> - */
> -#define IS_GEN(dev_priv, n) (GRAPHICS_VER(dev_priv) == (n))
> -
> #define GRAPHICS_VER(i915) (INTEL_INFO(i915)->graphics_ver)
> #define IS_GRAPHICS_VER(i915, from, until) \
> (GRAPHICS_VER(i915) >= (from) && GRAPHICS_VER(i915) <= (until))
> --
> 2.31.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 0/3] drm/i915: Nuke GEN macros
2021-07-07 18:13 ` [Intel-gfx] " Lucas De Marchi
@ 2021-07-07 18:27 ` Jani Nikula
-1 siblings, 0 replies; 20+ messages in thread
From: Jani Nikula @ 2021-07-07 18:27 UTC (permalink / raw)
To: Lucas De Marchi, intel-gfx, dri-devel; +Cc: Daniel Vetter
On Wed, 07 Jul 2021, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> Finish the conversion to the new VER macros and nuke the old macros so
> we don't have more changes sneaking in.
>
> Initially I thought about waiting for a backmerge from drm-next in
> drm-intel-next so I could use a topic branch to finish the conversion
> and nuke the macro, merging the topic branch in both drm-intel-next and
> drm-intel-gt-next. After the backmerge landed, I realized that would not
> be possible anymore as we already have changes on top preventing the
> merge-base to be used for a topic branch.
>
> Therefore the plan is:
> - Apply patch 1 in drm-intel-gt-next
> - Apply patches 2 and 3 in drm-intel-next
>
> Since patches are tested on drm-tip, CI should flag a build breakage if
> someone uses the GEN macros. Another possibility is to simply apply the
> 3rd patch on both branches, but I don't see a real need for that.
Acked-by: Jani Nikula <jani.nikula@intel.com>
>
> Lucas De Marchi (3):
> drm/i915/gt: finish INTEL_GEN and friends conversion
> drm/i915: finish INTEL_GEN and friends conversion
> gpu/drm/i915: nuke old GEN macros
>
> .../drm/i915/display/intel_display_debugfs.c | 3 ++-
> drivers/gpu/drm/i915/gt/intel_migrate.c | 20 +++++++++----------
> drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 15 --------------
> drivers/gpu/drm/i915/intel_uncore.c | 2 +-
> 5 files changed, 14 insertions(+), 28 deletions(-)
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-gfx] [PATCH 0/3] drm/i915: Nuke GEN macros
@ 2021-07-07 18:27 ` Jani Nikula
0 siblings, 0 replies; 20+ messages in thread
From: Jani Nikula @ 2021-07-07 18:27 UTC (permalink / raw)
To: Lucas De Marchi, intel-gfx, dri-devel; +Cc: Daniel Vetter
On Wed, 07 Jul 2021, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> Finish the conversion to the new VER macros and nuke the old macros so
> we don't have more changes sneaking in.
>
> Initially I thought about waiting for a backmerge from drm-next in
> drm-intel-next so I could use a topic branch to finish the conversion
> and nuke the macro, merging the topic branch in both drm-intel-next and
> drm-intel-gt-next. After the backmerge landed, I realized that would not
> be possible anymore as we already have changes on top preventing the
> merge-base to be used for a topic branch.
>
> Therefore the plan is:
> - Apply patch 1 in drm-intel-gt-next
> - Apply patches 2 and 3 in drm-intel-next
>
> Since patches are tested on drm-tip, CI should flag a build breakage if
> someone uses the GEN macros. Another possibility is to simply apply the
> 3rd patch on both branches, but I don't see a real need for that.
Acked-by: Jani Nikula <jani.nikula@intel.com>
>
> Lucas De Marchi (3):
> drm/i915/gt: finish INTEL_GEN and friends conversion
> drm/i915: finish INTEL_GEN and friends conversion
> gpu/drm/i915: nuke old GEN macros
>
> .../drm/i915/display/intel_display_debugfs.c | 3 ++-
> drivers/gpu/drm/i915/gt/intel_migrate.c | 20 +++++++++----------
> drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 15 --------------
> drivers/gpu/drm/i915/intel_uncore.c | 2 +-
> 5 files changed, 14 insertions(+), 28 deletions(-)
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Nuke GEN macros
2021-07-07 18:13 ` [Intel-gfx] " Lucas De Marchi
` (4 preceding siblings ...)
(?)
@ 2021-07-07 19:00 ` Patchwork
-1 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2021-07-07 19:00 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 4813 bytes --]
== Series Details ==
Series: drm/i915: Nuke GEN macros
URL : https://patchwork.freedesktop.org/series/92285/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10309 -> Patchwork_20546
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/index.html
Known issues
------------
Here are the changes found in Patchwork_20546 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_huc_copy@huc-copy:
- fi-cfl-8109u: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#2190])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/fi-cfl-8109u/igt@gem_huc_copy@huc-copy.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-cfl-8109u: NOTRUN -> [SKIP][2] ([fdo#109271] / [fdo#111827]) +8 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/fi-cfl-8109u/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-cfl-8109u: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#533])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@kms_psr@primary_mmap_gtt:
- fi-cfl-8109u: NOTRUN -> [SKIP][4] ([fdo#109271]) +6 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/fi-cfl-8109u/igt@kms_psr@primary_mmap_gtt.html
* igt@runner@aborted:
- fi-cfl-8109u: NOTRUN -> [FAIL][5] ([i915#2722] / [i915#3363])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/fi-cfl-8109u/igt@runner@aborted.html
* igt@vgem_basic@unload:
- fi-cfl-8109u: NOTRUN -> [INCOMPLETE][6] ([i915#3744])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/fi-cfl-8109u/igt@vgem_basic@unload.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s0:
- fi-cfl-8109u: [INCOMPLETE][7] ([i915#155]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/fi-cfl-8109u/igt@gem_exec_suspend@basic-s0.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/fi-cfl-8109u/igt@gem_exec_suspend@basic-s0.html
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [FAIL][9] ([i915#1372]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
#### Warnings ####
* igt@runner@aborted:
- fi-bdw-5557u: [FAIL][11] ([i915#2722]) -> [FAIL][12] ([i915#1602] / [i915#2029])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/fi-bdw-5557u/igt@runner@aborted.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/fi-bdw-5557u/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372
[i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
[i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
[i915#1887]: https://gitlab.freedesktop.org/drm/intel/issues/1887
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
[i915#3744]: https://gitlab.freedesktop.org/drm/intel/issues/3744
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Participating hosts (44 -> 40)
------------------------------
Missing (4): fi-ctg-p8600 fi-ilk-m540 fi-bsw-cyan fi-hsw-4200u
Build changes
-------------
* Linux: CI_DRM_10309 -> Patchwork_20546
CI-20190529: 20190529
CI_DRM_10309: 6a5db0d08c45a29cebcfd39b53a15be664b9369c @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6130: 390edfb703c346f06b0850db71bd3cc1342a3c02 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_20546: 23d96a4d67bfb00436cfd1bebccf153d6a32335e @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
23d96a4d67bf gpu/drm/i915: nuke old GEN macros
f9745b901a4e drm/i915: finish INTEL_GEN and friends conversion
8abecae5e8d1 drm/i915/gt: finish INTEL_GEN and friends conversion
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/index.html
[-- Attachment #1.2: Type: text/html, Size: 5774 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Nuke GEN macros
2021-07-07 18:13 ` [Intel-gfx] " Lucas De Marchi
` (5 preceding siblings ...)
(?)
@ 2021-07-07 22:44 ` Patchwork
-1 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2021-07-07 22:44 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 30248 bytes --]
== Series Details ==
Series: drm/i915: Nuke GEN macros
URL : https://patchwork.freedesktop.org/series/92285/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10309_full -> Patchwork_20546_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_20546_full:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_ccs:
- {shard-rkl}: [FAIL][1] ([i915#3678]) -> [SKIP][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-rkl-1/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_ccs.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-rkl-6/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_ccs.html
* igt@kms_flip_tiling@flip-changes-tiling-y:
- {shard-rkl}: NOTRUN -> [SKIP][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-rkl-1/igt@kms_flip_tiling@flip-changes-tiling-y.html
Known issues
------------
Here are the changes found in Patchwork_20546_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@feature_discovery@display-3x:
- shard-iclb: NOTRUN -> [SKIP][4] ([i915#1839])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@feature_discovery@display-3x.html
* igt@gem_ctx_persistence@legacy-engines-mixed:
- shard-snb: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#1099]) +3 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-snb6/igt@gem_ctx_persistence@legacy-engines-mixed.html
* igt@gem_ctx_persistence@many-contexts:
- shard-tglb: [PASS][6] -> [FAIL][7] ([i915#2410])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-tglb3/igt@gem_ctx_persistence@many-contexts.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-tglb2/igt@gem_ctx_persistence@many-contexts.html
* igt@gem_eio@unwedge-stress:
- shard-iclb: [PASS][8] -> [TIMEOUT][9] ([i915#2369] / [i915#2481] / [i915#3070])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-iclb8/igt@gem_eio@unwedge-stress.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb3/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-kbl: NOTRUN -> [FAIL][10] ([i915#2842])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-kbl2/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][11] ([i915#2842])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb2/igt@gem_exec_fair@basic-none@vcs1.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-kbl: [PASS][12] -> [SKIP][13] ([fdo#109271])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-kbl6/igt@gem_exec_fair@basic-pace@rcs0.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-kbl4/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_fence@basic-wait@bcs0:
- shard-kbl: NOTRUN -> [SKIP][14] ([fdo#109271]) +63 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-kbl1/igt@gem_exec_fence@basic-wait@bcs0.html
* igt@gem_exec_flush@basic-batch-kernel-default-cmd:
- shard-snb: NOTRUN -> [SKIP][15] ([fdo#109271]) +282 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-snb2/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
* igt@gem_exec_params@no-blt:
- shard-iclb: NOTRUN -> [SKIP][16] ([fdo#109283])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@gem_exec_params@no-blt.html
* igt@gem_exec_reloc@basic-wide-active@bcs0:
- shard-apl: NOTRUN -> [FAIL][17] ([i915#3633]) +3 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-apl1/igt@gem_exec_reloc@basic-wide-active@bcs0.html
* igt@gem_exec_reloc@basic-wide-active@rcs0:
- shard-snb: NOTRUN -> [FAIL][18] ([i915#3633]) +2 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-snb6/igt@gem_exec_reloc@basic-wide-active@rcs0.html
* igt@gem_exec_reloc@basic-wide-active@vcs1:
- shard-iclb: NOTRUN -> [FAIL][19] ([i915#3633])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb1/igt@gem_exec_reloc@basic-wide-active@vcs1.html
* igt@gem_exec_whisper@basic-contexts-priority:
- shard-glk: [PASS][20] -> [DMESG-WARN][21] ([i915#118] / [i915#95])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-glk6/igt@gem_exec_whisper@basic-contexts-priority.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-glk5/igt@gem_exec_whisper@basic-contexts-priority.html
* igt@gem_huc_copy@huc-copy:
- shard-apl: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#2190])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-apl1/igt@gem_huc_copy@huc-copy.html
* igt@gem_mmap_gtt@big-copy-xy:
- shard-glk: [PASS][23] -> [FAIL][24] ([i915#307])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-glk2/igt@gem_mmap_gtt@big-copy-xy.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-glk1/igt@gem_mmap_gtt@big-copy-xy.html
* igt@gem_pwrite@basic-exhaustion:
- shard-apl: NOTRUN -> [WARN][25] ([i915#2658])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-apl2/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-y-tiled:
- shard-iclb: NOTRUN -> [SKIP][26] ([i915#768])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb1/igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-y-tiled.html
* igt@gem_userptr_blits@unsync-unmap-cycles:
- shard-iclb: NOTRUN -> [SKIP][27] ([i915#3297])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@gem_userptr_blits@unsync-unmap-cycles.html
* igt@gen7_exec_parse@chained-batch:
- shard-iclb: NOTRUN -> [SKIP][28] ([fdo#109289]) +1 similar issue
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@gen7_exec_parse@chained-batch.html
* igt@gen9_exec_parse@allowed-single:
- shard-iclb: NOTRUN -> [SKIP][29] ([fdo#112306])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb1/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_dc@dc9-dpms:
- shard-iclb: NOTRUN -> [FAIL][30] ([i915#3343])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@i915_pm_dc@dc9-dpms.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-iclb: NOTRUN -> [WARN][31] ([i915#2684])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@i915_selftest@live@hangcheck:
- shard-snb: [PASS][32] -> [INCOMPLETE][33] ([i915#2782])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-snb7/igt@i915_selftest@live@hangcheck.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-snb7/igt@i915_selftest@live@hangcheck.html
* igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
- shard-apl: NOTRUN -> [FAIL][34] ([i915#3745])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-apl2/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
* igt@kms_big_fb@linear-16bpp-rotate-90:
- shard-iclb: NOTRUN -> [SKIP][35] ([fdo#110725] / [fdo#111614]) +2 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb1/igt@kms_big_fb@linear-16bpp-rotate-90.html
* igt@kms_big_joiner@basic:
- shard-iclb: NOTRUN -> [SKIP][36] ([i915#2705])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@kms_big_joiner@basic.html
* igt@kms_cdclk@plane-scaling:
- shard-iclb: NOTRUN -> [SKIP][37] ([i915#3742])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@kms_cdclk@plane-scaling.html
* igt@kms_chamelium@dp-hpd-fast:
- shard-kbl: NOTRUN -> [SKIP][38] ([fdo#109271] / [fdo#111827]) +7 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-kbl1/igt@kms_chamelium@dp-hpd-fast.html
* igt@kms_chamelium@hdmi-aspect-ratio:
- shard-skl: NOTRUN -> [SKIP][39] ([fdo#109271] / [fdo#111827])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-skl10/igt@kms_chamelium@hdmi-aspect-ratio.html
* igt@kms_chamelium@hdmi-mode-timings:
- shard-snb: NOTRUN -> [SKIP][40] ([fdo#109271] / [fdo#111827]) +9 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-snb2/igt@kms_chamelium@hdmi-mode-timings.html
* igt@kms_color_chamelium@pipe-a-ctm-red-to-blue:
- shard-iclb: NOTRUN -> [SKIP][41] ([fdo#109284] / [fdo#111827]) +4 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@kms_color_chamelium@pipe-a-ctm-red-to-blue.html
* igt@kms_color_chamelium@pipe-c-ctm-0-25:
- shard-apl: NOTRUN -> [SKIP][42] ([fdo#109271] / [fdo#111827]) +30 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-apl2/igt@kms_color_chamelium@pipe-c-ctm-0-25.html
* igt@kms_content_protection@content_type_change:
- shard-iclb: NOTRUN -> [SKIP][43] ([fdo#109300] / [fdo#111066])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb1/igt@kms_content_protection@content_type_change.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-iclb: NOTRUN -> [SKIP][44] ([i915#3116])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@lic:
- shard-apl: NOTRUN -> [TIMEOUT][45] ([i915#1319]) +1 similar issue
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-apl2/igt@kms_content_protection@lic.html
* igt@kms_cursor_crc@pipe-a-cursor-512x512-offscreen:
- shard-iclb: NOTRUN -> [SKIP][46] ([fdo#109278] / [fdo#109279]) +1 similar issue
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@kms_cursor_crc@pipe-a-cursor-512x512-offscreen.html
* igt@kms_cursor_crc@pipe-a-cursor-max-size-random:
- shard-skl: NOTRUN -> [SKIP][47] ([fdo#109271]) +24 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-skl10/igt@kms_cursor_crc@pipe-a-cursor-max-size-random.html
* igt@kms_cursor_crc@pipe-d-cursor-64x21-sliding:
- shard-iclb: NOTRUN -> [SKIP][48] ([fdo#109278]) +18 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@kms_cursor_crc@pipe-d-cursor-64x21-sliding.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
- shard-iclb: NOTRUN -> [SKIP][49] ([fdo#109274] / [fdo#109278])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb1/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@pipe-d-single-bo:
- shard-skl: NOTRUN -> [SKIP][50] ([fdo#109271] / [i915#533])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-skl7/igt@kms_cursor_legacy@pipe-d-single-bo.html
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: NOTRUN -> [SKIP][51] ([fdo#109349])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb1/igt@kms_dp_dsc@basic-dsc-enable-edp.html
* igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled:
- shard-skl: [PASS][52] -> [DMESG-WARN][53] ([i915#1982])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-skl3/igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-skl1/igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled.html
* igt@kms_flip@2x-flip-vs-modeset-vs-hang:
- shard-iclb: NOTRUN -> [SKIP][54] ([fdo#109274]) +1 similar issue
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html
* igt@kms_flip@flip-vs-suspend@a-dp1:
- shard-apl: [PASS][55] -> [DMESG-WARN][56] ([i915#180]) +2 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-apl2/igt@kms_flip@flip-vs-suspend@a-dp1.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-apl8/igt@kms_flip@flip-vs-suspend@a-dp1.html
* igt@kms_flip@plain-flip-ts-check@b-edp1:
- shard-skl: [PASS][57] -> [FAIL][58] ([i915#2122]) +1 similar issue
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-skl8/igt@kms_flip@plain-flip-ts-check@b-edp1.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-skl2/igt@kms_flip@plain-flip-ts-check@b-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
- shard-apl: NOTRUN -> [SKIP][59] ([fdo#109271] / [i915#2672])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-apl1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs:
- shard-iclb: NOTRUN -> [SKIP][60] ([i915#2587])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [PASS][61] -> [DMESG-WARN][62] ([i915#180]) +6 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-blt:
- shard-iclb: NOTRUN -> [SKIP][63] ([fdo#109280]) +16 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [PASS][64] -> [FAIL][65] ([i915#1188])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-skl3/igt@kms_hdr@bpc-switch-suspend.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-skl1/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_hdr@static-swap:
- shard-iclb: NOTRUN -> [SKIP][66] ([i915#1187])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb1/igt@kms_hdr@static-swap.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d:
- shard-kbl: NOTRUN -> [SKIP][67] ([fdo#109271] / [i915#533])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-kbl1/igt@kms_pipe_crc_basic@read-crc-pipe-d.html
- shard-apl: NOTRUN -> [SKIP][68] ([fdo#109271] / [i915#533]) +1 similar issue
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-apl7/igt@kms_pipe_crc_basic@read-crc-pipe-d.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
- shard-apl: NOTRUN -> [FAIL][69] ([fdo#108145] / [i915#265]) +5 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-apl8/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
- shard-skl: [PASS][70] -> [FAIL][71] ([fdo#108145] / [i915#265])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
- shard-skl: NOTRUN -> [FAIL][72] ([fdo#108145] / [i915#265])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html
* igt@kms_plane_lowres@pipe-c-tiling-x:
- shard-iclb: NOTRUN -> [SKIP][73] ([i915#3536])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@kms_plane_lowres@pipe-c-tiling-x.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
- shard-apl: NOTRUN -> [SKIP][74] ([fdo#109271] / [i915#658]) +5 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-apl8/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2:
- shard-iclb: NOTRUN -> [SKIP][75] ([i915#658]) +1 similar issue
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5:
- shard-skl: NOTRUN -> [SKIP][76] ([fdo#109271] / [i915#658])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-skl1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html
- shard-kbl: NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#658]) +1 similar issue
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-kbl2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html
* igt@kms_psr@psr2_cursor_mmap_cpu:
- shard-iclb: [PASS][78] -> [SKIP][79] ([fdo#109441])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb7/igt@kms_psr@psr2_cursor_mmap_cpu.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: NOTRUN -> [SKIP][80] ([fdo#109441]) +2 similar issues
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_sysfs_edid_timing:
- shard-apl: NOTRUN -> [FAIL][81] ([IGT#2])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-apl1/igt@kms_sysfs_edid_timing.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-kbl: [PASS][82] -> [DMESG-WARN][83] ([i915#180] / [i915#295])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-kbl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-kbl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@kms_vrr@flipline:
- shard-iclb: NOTRUN -> [SKIP][84] ([fdo#109502])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb1/igt@kms_vrr@flipline.html
* igt@kms_writeback@writeback-check-output:
- shard-apl: NOTRUN -> [SKIP][85] ([fdo#109271] / [i915#2437])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-apl7/igt@kms_writeback@writeback-check-output.html
- shard-kbl: NOTRUN -> [SKIP][86] ([fdo#109271] / [i915#2437])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-kbl1/igt@kms_writeback@writeback-check-output.html
* igt@kms_writeback@writeback-fb-id:
- shard-iclb: NOTRUN -> [SKIP][87] ([i915#2437])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@kms_writeback@writeback-fb-id.html
* igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame:
- shard-apl: NOTRUN -> [SKIP][88] ([fdo#109271]) +367 similar issues
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-apl2/igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame.html
* igt@nouveau_crc@pipe-c-ctx-flip-skip-current-frame:
- shard-iclb: NOTRUN -> [SKIP][89] ([i915#2530]) +1 similar issue
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb5/igt@nouveau_crc@pipe-c-ctx-flip-skip-current-frame.html
* igt@prime_nv_api@nv_i915_reimport_twice_check_flink_name:
- shard-iclb: NOTRUN -> [SKIP][90] ([fdo#109291])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb1/igt@prime_nv_api@nv_i915_reimport_twice_check_flink_name.html
* igt@sysfs_clients@busy:
- shard-kbl: NOTRUN -> [SKIP][91] ([fdo#109271] / [i915#2994])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-kbl1/igt@sysfs_clients@busy.html
* igt@sysfs_clients@fair-1:
- shard-apl: NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#2994]) +5 similar issues
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-apl2/igt@sysfs_clients@fair-1.html
* igt@sysfs_clients@pidname:
- shard-iclb: NOTRUN -> [SKIP][93] ([i915#2994])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb1/igt@sysfs_clients@pidname.html
* igt@vgem_basic@unload:
- shard-kbl: NOTRUN -> [INCOMPLETE][94] ([i915#3744])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-kbl2/igt@vgem_basic@unload.html
- shard-snb: NOTRUN -> [INCOMPLETE][95] ([i915#3744])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-snb6/igt@vgem_basic@unload.html
#### Possible fixes ####
* igt@feature_discovery@psr1:
- {shard-rkl}: [SKIP][96] ([i915#658]) -> [PASS][97]
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-rkl-2/igt@feature_discovery@psr1.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-rkl-6/igt@feature_discovery@psr1.html
* igt@gem_create@create-clear:
- shard-glk: [FAIL][98] ([i915#3160]) -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-glk6/igt@gem_create@create-clear.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-glk5/igt@gem_create@create-clear.html
* igt@gem_ctx_isolation@preservation-s3@bcs0:
- shard-kbl: [DMESG-WARN][100] ([i915#180]) -> [PASS][101] +4 similar issues
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-kbl1/igt@gem_ctx_isolation@preservation-s3@bcs0.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-kbl2/igt@gem_ctx_isolation@preservation-s3@bcs0.html
* igt@gem_eio@unwedge-stress:
- shard-tglb: [TIMEOUT][102] ([i915#2369] / [i915#3063] / [i915#3648]) -> [PASS][103]
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-tglb2/igt@gem_eio@unwedge-stress.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-tglb7/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [FAIL][104] ([i915#2842]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-tglb3/igt@gem_exec_fair@basic-pace-share@rcs0.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-tglb2/igt@gem_exec_fair@basic-pace-share@rcs0.html
- shard-glk: [FAIL][106] ([i915#2842]) -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-glk4/igt@gem_exec_fair@basic-pace-share@rcs0.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-glk6/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- {shard-rkl}: [FAIL][108] ([i915#2842]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-rkl-2/igt@gem_exec_fair@basic-throttle@rcs0.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-rkl-1/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_reloc@basic-scanout@vecs0:
- {shard-rkl}: [SKIP][110] ([i915#3639]) -> [PASS][111] +3 similar issues
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-rkl-1/igt@gem_exec_reloc@basic-scanout@vecs0.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-rkl-6/igt@gem_exec_reloc@basic-scanout@vecs0.html
* igt@gem_workarounds@suspend-resume:
- shard-apl: [DMESG-WARN][112] ([i915#180]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-apl1/igt@gem_workarounds@suspend-resume.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-apl1/igt@gem_workarounds@suspend-resume.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [DMESG-WARN][114] ([i915#1436] / [i915#716]) -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-skl7/igt@gen9_exec_parse@allowed-single.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-skl10/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_dc@dc5-psr:
- shard-iclb: [DMESG-WARN][116] ([i915#3698]) -> [PASS][117]
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-iclb5/igt@i915_pm_dc@dc5-psr.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-iclb1/igt@i915_pm_dc@dc5-psr.html
* igt@i915_pm_rpm@modeset-lpsp:
- {shard-rkl}: [SKIP][118] ([i915#1397]) -> [PASS][119] +1 similar issue
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-rkl-1/igt@i915_pm_rpm@modeset-lpsp.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-rkl-6/igt@i915_pm_rpm@modeset-lpsp.html
* igt@kms_big_fb@linear-16bpp-rotate-180:
- {shard-rkl}: [SKIP][120] ([i915#3638]) -> [PASS][121] +2 similar issues
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-rkl-5/igt@kms_big_fb@linear-16bpp-rotate-180.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-rkl-6/igt@kms_big_fb@linear-16bpp-rotate-180.html
* igt@kms_big_fb@linear-32bpp-rotate-0:
- shard-glk: [DMESG-WARN][122] ([i915#118] / [i915#95]) -> [PASS][123]
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-glk6/igt@kms_big_fb@linear-32bpp-rotate-0.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-glk5/igt@kms_big_fb@linear-32bpp-rotate-0.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0:
- {shard-rkl}: [SKIP][124] ([i915#3721]) -> [PASS][125] +3 similar issues
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-rkl-1/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-rkl-6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-270:
- {shard-rkl}: [SKIP][126] ([fdo#111614]) -> [PASS][127]
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-rkl-1/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-rkl-6/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html
* igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
- {shard-rkl}: [FAIL][128] ([i915#3678]) -> [PASS][129] +11 similar issues
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-rkl-5/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-rkl-6/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_color@pipe-c-ctm-max:
- {shard-rkl}: [SKIP][130] ([i915#1149] / [i915#1849]) -> [PASS][131] +3 similar issues
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-rkl-1/igt@kms_color@pipe-c-ctm-max.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-rkl-6/igt@kms_color@pipe-c-ctm-max.html
* igt@kms_concurrent@pipe-a:
- {shard-rkl}: [SKIP][132] ([i915#1845]) -> [PASS][133] +29 similar issues
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-rkl-5/igt@kms_concurrent@pipe-a.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-rkl-6/igt@kms_concurrent@pipe-a.html
* igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen:
- {shard-rkl}: [SKIP][134] ([fdo#112022]) -> [PASS][135] +19 similar issues
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-rkl-1/igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-rkl-6/igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen.html
* igt@kms_cursor_legacy@cursor-vs-flip-atomic:
- {shard-rkl}: [SKIP][136] ([fdo#111825]) -> [PASS][137] +5 similar issues
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-rkl-2/igt@kms_cursor_legacy@cursor-vs-flip-atomic.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-rkl-6/igt@kms_cursor_legacy@cursor-vs-flip-atomic.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-skl: [FAIL][138] ([i915#2346] / [i915#533]) -> [PASS][139]
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_dp_aux_dev:
- {shard-rkl}: [SKIP][140] ([i915#1257]) -> [PASS][141]
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10309/shard-rkl-1/igt@kms_dp_aux_dev.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/shard-rkl-6/igt@kms_dp_aux_dev.html
* igt@kms_draw_crc@draw-method-xrgb8888-pwrite-ytiled:
- {shard-rkl
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20546/index.html
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