Re: [PATCH 6/9] irqchip/loongson-liointc: Add ACPI init support

[kernel test robot <lkp@intel.com>]

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Hi Huacai,

I love your patch! Yet something to improve:

[auto build test ERROR on tip/irq/core]
[also build test ERROR on linux/master linus/master v5.13 next-20210708]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Huacai-Chen/irqchip-Add-LoongArch-related-irqchip-drivers/20210706-111309
base:   https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 3d2ce675aba7e2425710e23268579a5d76c7e725
config: mips-loongson2k_defconfig (attached as .config)
compiler: mips64el-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/a2475c3e53e0055e6eb1842fe58dec0f4e453f82
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Huacai-Chen/irqchip-Add-LoongArch-related-irqchip-drivers/20210706-111309
        git checkout a2475c3e53e0055e6eb1842fe58dec0f4e453f82
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=mips 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   drivers/irqchip/irq-loongson-liointc.c: In function 'liointc_chained_handle_irq':
>> drivers/irqchip/irq-loongson-liointc.c:58:13: error: implicit declaration of function 'cpu_logical_map' [-Werror=implicit-function-declaration]
      58 |  int core = cpu_logical_map(smp_processor_id()) % LIOINTC_NUM_CORES;
         |             ^~~~~~~~~~~~~~~
   cc1: some warnings being treated as errors


vim +/cpu_logical_map +58 drivers/irqchip/irq-loongson-liointc.c

    52	
    53	static void liointc_chained_handle_irq(struct irq_desc *desc)
    54	{
    55		struct liointc_handler_data *handler = irq_desc_get_handler_data(desc);
    56		struct irq_chip *chip = irq_desc_get_chip(desc);
    57		struct irq_chip_generic *gc = handler->priv->gc;
  > 58		int core = cpu_logical_map(smp_processor_id()) % LIOINTC_NUM_CORES;
    59		u32 pending;
    60	
    61		chained_irq_enter(chip, desc);
    62	
    63		pending = readl(handler->priv->core_isr[core]);
    64	
    65		if (!pending) {
    66			/* Always blame LPC IRQ if we have that bug */
    67			if (handler->priv->has_lpc_irq_errata &&
    68				(handler->parent_int_map & gc->mask_cache &
    69				BIT(LIOINTC_ERRATA_IRQ)))
    70				pending = BIT(LIOINTC_ERRATA_IRQ);
    71			else
    72				spurious_interrupt();
    73		}
    74	
    75		while (pending) {
    76			int bit = __ffs(pending);
    77	
    78			generic_handle_domain_irq(gc->domain, bit);
    79			pending &= ~BIT(bit);
    80		}
    81	
    82		chained_irq_exit(chip, desc);
    83	}
    84	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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