* [RFC PATCH v1 0/6] add rk3318 A95X Z2 board
@ 2021-06-30 16:22 ` Johan Jonker
0 siblings, 0 replies; 24+ messages in thread
From: Johan Jonker @ 2021-06-30 16:22 UTC (permalink / raw)
To: kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
With a new board from a recent Linux DT the U-boot rk3328.dtsi
is in need for an update.
Please advise what to do with usb3 regulators, aliases and
other stuff that has to change.
Also some of the U-boot board files could use some
dtbs_check for bogus properties and restyling... ;)
rk3328 USB2 and USB3 only roughly tested.
===
Howto use:
Compile bl31.elf:
git clone --depth 1 https://github.com/ARM-software/arm-trusted-firmware.git
cd arm-trusted-firmware
make realclean
make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3328
export BL31=/<path-to>/arm-trusted-firmware/build/rk3328/release/bl31/bl31.elf
cd ..
Compile U-boot:
git clone --depth 1 https://github.com/u-boot/u-boot.git uboot
cd uboot
make CROSS_COMPILE=aarch64-linux-gnu- a95x-z2-rk3318_defconfig all
===
Use U-boot to create a GPT on a SD card,
because of partition GUID and sizes.
mmc dev 0
mmc info
gpt write mmc 0 $partitions
mmc part
===
Write to SD card:
export DISK=/dev/mmcblk0
sudo dd if=./idbloader.img of=${DISK} seek=64
sudo dd if=./u-boot.itb of=${DISK} seek=16384
sync
===
Format boot partition with fat16.
Add /Image and /rk3318-a95x-z2.dtb
Add extlinux dir with extlinux.conf
label kernel
kernel /Image
fdt /rk3318-a95x-z2.dtb
append root=/dev/mmcblk0p5 rw console=tty0 console=ttyS2,1500000n8 earlycon=uart8250,mmio32,0xff130000,keep $
===
Use fastboot:
Hit any key to stop autoboot:
usb start
usb dev 1
fastboot usb 1
=
sudo fastboot devices -l
sudo fastboot erase loader1
sudo fastboot erase loader2
sudo fastboot flash loader1 idbloader.img
sudo fastboot flash loader2 u-boot.itb
=
ctrl-c
reset
===
Johan Jonker (6):
arm: dts: rockchip: update rk3328.dtsi
arm: dts: rockchip: remove usb_host0_xhci node from rk3328-u-boot.dtsi
arm: dts: rockchip: move mmc aliases to board files
arm: dts: rockchip: move spi0 u-boot,dm-pre-reloc and alias to rk3328
board files
rockchip: rk3318: add a95x-z2-rk3318_defconfig file
arm: dts: rockchip: add rk3318 A95X Z2 board
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi | 59 +++++
arch/arm/dts/rk3318-a95x-z2.dts | 384 +++++++++++++++++++++++++++++
arch/arm/dts/rk3328-evb-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-evb.dts | 8 +-
arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-nanopi-r2s.dts | 6 +-
arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 4 +-
arch/arm/dts/rk3328-roc-cc.dts | 7 +-
arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 4 +-
arch/arm/dts/rk3328-rock-pi-e.dts | 7 +-
arch/arm/dts/rk3328-rock64-u-boot.dtsi | 10 +-
arch/arm/dts/rk3328-rock64.dts | 7 +-
arch/arm/dts/rk3328-u-boot.dtsi | 21 --
arch/arm/dts/rk3328.dtsi | 109 ++++----
board/rockchip/evb_rk3328/MAINTAINERS | 6 +
configs/a95x-z2-rk3318_defconfig | 102 ++++++++
doc/board/rockchip/rockchip.rst | 2 +
18 files changed, 661 insertions(+), 80 deletions(-)
create mode 100644 arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3318-a95x-z2.dts
create mode 100644 configs/a95x-z2-rk3318_defconfig
--
2.11.0
^ permalink raw reply [flat|nested] 24+ messages in thread* [RFC PATCH v1 1/6] arm: dts: rockchip: update rk3328.dtsi
2021-06-30 16:22 ` Johan Jonker
@ 2021-06-30 16:22 ` Johan Jonker
-1 siblings, 0 replies; 24+ messages in thread
From: Johan Jonker @ 2021-06-30 16:22 UTC (permalink / raw)
To: kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
In the Linux DT the file rk3328.dtsi has recently had
some updates. Update this for U-boot as well.
The rk3328 usb3 port has now support in the Linux DT.
Rename node names ending on 'gpio' to 'pin' or 'pins'.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm/dts/rk3328-evb.dts | 2 +-
arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-nanopi-r2s.dts | 2 +-
arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-roc-cc.dts | 2 +-
arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-rock-pi-e.dts | 2 +-
arch/arm/dts/rk3328-rock64-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-rock64.dts | 2 +-
arch/arm/dts/rk3328.dtsi | 109 +++++++++++++++++------------
10 files changed, 72 insertions(+), 55 deletions(-)
diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 6abc6f4a86..a0000d072c 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -41,7 +41,7 @@
compatible = "regulator-fixed";
gpio = <&gpio0 30 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0m1_gpio>;
+ pinctrl-0 = <&sdmmc0m1_pin>;
regulator-name = "vcc_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
index 9e2ced1541..8db5e55af6 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
@@ -20,7 +20,7 @@
u-boot,dm-spl;
};
-&sdmmc0m1_gpio {
+&sdmmc0m1_pin {
u-boot,dm-spl;
};
diff --git a/arch/arm/dts/rk3328-nanopi-r2s.dts b/arch/arm/dts/rk3328-nanopi-r2s.dts
index 5445c5cb3d..b1e45c01a9 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s.dts
+++ b/arch/arm/dts/rk3328-nanopi-r2s.dts
@@ -79,7 +79,7 @@
vcc_sd: sdmmc-regulator {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
- pinctrl-0 = <&sdmmc0m1_gpio>;
+ pinctrl-0 = <&sdmmc0m1_pin>;
pinctrl-names = "default";
regulator-name = "vcc_sd";
regulator-boot-on;
diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
index 08806dfc0f..20a62134a0 100644
--- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
@@ -40,7 +40,7 @@
u-boot,dm-spl;
};
-&sdmmc0m1_gpio {
+&sdmmc0m1_pin {
u-boot,dm-spl;
};
diff --git a/arch/arm/dts/rk3328-roc-cc.dts b/arch/arm/dts/rk3328-roc-cc.dts
index 8d553c9218..8dc4c57fbb 100644
--- a/arch/arm/dts/rk3328-roc-cc.dts
+++ b/arch/arm/dts/rk3328-roc-cc.dts
@@ -34,7 +34,7 @@
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0m1_gpio>;
+ pinctrl-0 = <&sdmmc0m1_pin>;
regulator-boot-on;
regulator-name = "vcc_sd";
regulator-min-microvolt = <3300000>;
diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
index 4fc055eacb..0b1a42c49f 100644
--- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
@@ -37,7 +37,7 @@
u-boot,dm-spl;
};
-&sdmmc0m1_gpio {
+&sdmmc0m1_pin {
u-boot,dm-spl;
};
diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts b/arch/arm/dts/rk3328-rock-pi-e.dts
index 4b9f9a8248..57e36ec609 100644
--- a/arch/arm/dts/rk3328-rock-pi-e.dts
+++ b/arch/arm/dts/rk3328-rock-pi-e.dts
@@ -25,7 +25,7 @@
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0m1_gpio>;
+ pinctrl-0 = <&sdmmc0m1_pin>;
regulator-name = "vcc_sd";
regulator-always-on;
regulator-boot-on;
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index 2af32aea05..3c3b1370e3 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -40,7 +40,7 @@
u-boot,dm-spl;
};
-&sdmmc0m1_gpio {
+&sdmmc0m1_pin {
u-boot,dm-spl;
};
diff --git a/arch/arm/dts/rk3328-rock64.dts b/arch/arm/dts/rk3328-rock64.dts
index ebf3eb222e..7a78255f52 100644
--- a/arch/arm/dts/rk3328-rock64.dts
+++ b/arch/arm/dts/rk3328-rock64.dts
@@ -25,7 +25,7 @@
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0m1_gpio>;
+ pinctrl-0 = <&sdmmc0m1_pin>;
regulator-name = "vcc_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 945387e579..95c7c70ca0 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -142,23 +142,6 @@
};
};
- amba: bus {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- dmac: dmac@ff1f0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xff1f0000 0x0 0x4000>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_DMAC>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- };
- };
-
analog_sound: analog-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
@@ -305,7 +288,7 @@
status = "disabled";
};
- grf_gpio: grf-gpio {
+ grf_gpio: gpio {
compatible = "rockchip,rk3328-grf-gpio";
gpio-controller;
#gpio-cells = <2>;
@@ -317,15 +300,18 @@
#address-cells = <1>;
#size-cells = <0>;
- pd_hevc@RK3328_PD_HEVC {
+ power-domain@RK3328_PD_HEVC {
reg = <RK3328_PD_HEVC>;
+ #power-domain-cells = <0>;
};
- pd_video@RK3328_PD_VIDEO {
+ power-domain@RK3328_PD_VIDEO {
reg = <RK3328_PD_VIDEO>;
+ #power-domain-cells = <0>;
};
- pd_vpu@RK3328_PD_VPU {
+ power-domain@RK3328_PD_VPU {
reg = <RK3328_PD_VPU>;
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+ #power-domain-cells = <0>;
};
};
@@ -452,7 +438,7 @@
};
wdt: watchdog@ff1a0000 {
- compatible = "snps,dw-wdt";
+ compatible = "rockchip,rk3328-wdt", "snps,dw-wdt";
reg = <0x0 0xff1a0000 0x0 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_WDT>;
@@ -503,6 +489,17 @@
status = "disabled";
};
+ dmac: dmac@ff1f0000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x0 0xff1f0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ arm,pl330-periph-burst;
+ clocks = <&cru ACLK_DMAC>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ };
+
thermal-zones {
soc_thermal: soc-thermal {
polling-delay-passive = <20>;
@@ -552,9 +549,9 @@
clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
clock-names = "tsadc", "apb_pclk";
pinctrl-names = "init", "default", "sleep";
- pinctrl-0 = <&otp_gpio>;
+ pinctrl-0 = <&otp_pin>;
pinctrl-1 = <&otp_out>;
- pinctrl-2 = <&otp_gpio>;
+ pinctrl-2 = <&otp_pin>;
resets = <&cru SRST_TSADC>;
reset-names = "tsadc-apb";
rockchip,grf = <&grf>;
@@ -822,7 +819,7 @@
#address-cells = <1>;
#size-cells = <1>;
- u2phy: usb2-phy@100 {
+ u2phy: usb2phy@100 {
compatible = "rockchip,rk3328-usb2phy";
reg = <0x100 0x10>;
clocks = <&xin24m>;
@@ -922,11 +919,12 @@
"mac_clk_tx", "clk_mac_ref",
"aclk_mac", "pclk_mac",
"clk_macphy";
- resets = <&cru SRST_GMAC2PHY_A>, <&cru SRST_MACPHY>;
- reset-names = "stmmaceth", "mac-phy";
+ resets = <&cru SRST_GMAC2PHY_A>;
+ reset-names = "stmmaceth";
phy-mode = "rmii";
phy-handle = <&phy>;
snps,txpbl = <0x4>;
+ clock_in_out = "output";
status = "disabled";
mdio {
@@ -934,7 +932,7 @@
#address-cells = <1>;
#size-cells = <0>;
- phy: phy@0 {
+ phy: ethernet-phy@0 {
compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22";
reg = <0>;
clocks = <&cru SCLK_MAC2PHY_OUT>;
@@ -991,6 +989,25 @@
status = "disabled";
};
+ usbdrd3: usb@ff600000 {
+ compatible = "rockchip,rk3328-dwc3", "snps,dwc3";
+ reg = <0x0 0xff600000 0x0 0x100000>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
+ <&cru ACLK_USB3OTG>;
+ clock-names = "ref_clk", "suspend_clk",
+ "bus_clk";
+ dr_mode = "otg";
+ phy_type = "utmi_wide";
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis_enblslpm_quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ status = "disabled";
+ };
+
gic: interrupt-controller@ff811000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
@@ -1163,7 +1180,7 @@
rockchip,pins = <0 RK_PA5 2 &pcfg_pull_none>,
<0 RK_PA6 2 &pcfg_pull_none>;
};
- i2c3_gpio: i2c3-gpio {
+ i2c3_pins: i2c3-pins {
rockchip,pins =
<0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>,
<0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -1234,7 +1251,7 @@
};
tsadc {
- otp_gpio: otp-gpio {
+ otp_pin: otp-pin {
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
@@ -1245,8 +1262,8 @@
uart0 {
uart0_xfer: uart0-xfer {
- rockchip,pins = <1 RK_PB1 1 &pcfg_pull_up>,
- <1 RK_PB0 1 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PB1 1 &pcfg_pull_none>,
+ <1 RK_PB0 1 &pcfg_pull_up>;
};
uart0_cts: uart0-cts {
@@ -1257,15 +1274,15 @@
rockchip,pins = <1 RK_PB2 1 &pcfg_pull_none>;
};
- uart0_rts_gpio: uart0-rts-gpio {
+ uart0_rts_pin: uart0-rts-pin {
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
- rockchip,pins = <3 RK_PA4 4 &pcfg_pull_up>,
- <3 RK_PA6 4 &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PA4 4 &pcfg_pull_none>,
+ <3 RK_PA6 4 &pcfg_pull_up>;
};
uart1_cts: uart1-cts {
@@ -1276,22 +1293,22 @@
rockchip,pins = <3 RK_PA5 4 &pcfg_pull_none>;
};
- uart1_rts_gpio: uart1-rts-gpio {
+ uart1_rts_pin: uart1-rts-pin {
rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
uart2-0 {
uart2m0_xfer: uart2m0-xfer {
- rockchip,pins = <1 RK_PA0 2 &pcfg_pull_up>,
- <1 RK_PA1 2 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PA0 2 &pcfg_pull_none>,
+ <1 RK_PA1 2 &pcfg_pull_up>;
};
};
uart2-1 {
uart2m1_xfer: uart2m1-xfer {
- rockchip,pins = <2 RK_PA0 1 &pcfg_pull_up>,
- <2 RK_PA1 1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PA0 1 &pcfg_pull_none>,
+ <2 RK_PA1 1 &pcfg_pull_up>;
};
};
@@ -1502,7 +1519,7 @@
rockchip,pins = <2 RK_PA7 1 &pcfg_pull_up_4ma>;
};
- sdmmc0m0_gpio: sdmmc0m0-gpio {
+ sdmmc0m0_pin: sdmmc0m0-pin {
rockchip,pins = <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
};
};
@@ -1512,7 +1529,7 @@
rockchip,pins = <0 RK_PD6 3 &pcfg_pull_up_4ma>;
};
- sdmmc0m1_gpio: sdmmc0m1-gpio {
+ sdmmc0m1_pin: sdmmc0m1-pin {
rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
};
};
@@ -1545,7 +1562,7 @@
<1 RK_PA3 1 &pcfg_pull_up_8ma>;
};
- sdmmc0_gpio: sdmmc0-gpio {
+ sdmmc0_pins: sdmmc0-pins {
rockchip,pins =
<1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
@@ -1587,7 +1604,7 @@
<3 RK_PA7 3 &pcfg_pull_up_4ma>;
};
- sdmmc0ext_gpio: sdmmc0ext-gpio {
+ sdmmc0ext_pins: sdmmc0ext-pins {
rockchip,pins =
<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
<3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
@@ -1632,7 +1649,7 @@
<1 RK_PC1 1 &pcfg_pull_up_8ma>;
};
- sdmmc1_gpio: sdmmc1-gpio {
+ sdmmc1_pins: sdmmc1-pins {
rockchip,pins =
<1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
@@ -1826,7 +1843,7 @@
tsadc_int: tsadc-int {
rockchip,pins = <2 RK_PB5 2 &pcfg_pull_none>;
};
- tsadc_gpio: tsadc-gpio {
+ tsadc_pin: tsadc-pin {
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
--
2.11.0
_______________________________________________
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^ permalink raw reply related [flat|nested] 24+ messages in thread* [RFC PATCH v1 1/6] arm: dts: rockchip: update rk3328.dtsi
@ 2021-06-30 16:22 ` Johan Jonker
0 siblings, 0 replies; 24+ messages in thread
From: Johan Jonker @ 2021-06-30 16:22 UTC (permalink / raw)
To: kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
In the Linux DT the file rk3328.dtsi has recently had
some updates. Update this for U-boot as well.
The rk3328 usb3 port has now support in the Linux DT.
Rename node names ending on 'gpio' to 'pin' or 'pins'.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm/dts/rk3328-evb.dts | 2 +-
arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-nanopi-r2s.dts | 2 +-
arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-roc-cc.dts | 2 +-
arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-rock-pi-e.dts | 2 +-
arch/arm/dts/rk3328-rock64-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-rock64.dts | 2 +-
arch/arm/dts/rk3328.dtsi | 109 +++++++++++++++++------------
10 files changed, 72 insertions(+), 55 deletions(-)
diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 6abc6f4a86..a0000d072c 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -41,7 +41,7 @@
compatible = "regulator-fixed";
gpio = <&gpio0 30 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0m1_gpio>;
+ pinctrl-0 = <&sdmmc0m1_pin>;
regulator-name = "vcc_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
index 9e2ced1541..8db5e55af6 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
@@ -20,7 +20,7 @@
u-boot,dm-spl;
};
-&sdmmc0m1_gpio {
+&sdmmc0m1_pin {
u-boot,dm-spl;
};
diff --git a/arch/arm/dts/rk3328-nanopi-r2s.dts b/arch/arm/dts/rk3328-nanopi-r2s.dts
index 5445c5cb3d..b1e45c01a9 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s.dts
+++ b/arch/arm/dts/rk3328-nanopi-r2s.dts
@@ -79,7 +79,7 @@
vcc_sd: sdmmc-regulator {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
- pinctrl-0 = <&sdmmc0m1_gpio>;
+ pinctrl-0 = <&sdmmc0m1_pin>;
pinctrl-names = "default";
regulator-name = "vcc_sd";
regulator-boot-on;
diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
index 08806dfc0f..20a62134a0 100644
--- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
@@ -40,7 +40,7 @@
u-boot,dm-spl;
};
-&sdmmc0m1_gpio {
+&sdmmc0m1_pin {
u-boot,dm-spl;
};
diff --git a/arch/arm/dts/rk3328-roc-cc.dts b/arch/arm/dts/rk3328-roc-cc.dts
index 8d553c9218..8dc4c57fbb 100644
--- a/arch/arm/dts/rk3328-roc-cc.dts
+++ b/arch/arm/dts/rk3328-roc-cc.dts
@@ -34,7 +34,7 @@
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0m1_gpio>;
+ pinctrl-0 = <&sdmmc0m1_pin>;
regulator-boot-on;
regulator-name = "vcc_sd";
regulator-min-microvolt = <3300000>;
diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
index 4fc055eacb..0b1a42c49f 100644
--- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
@@ -37,7 +37,7 @@
u-boot,dm-spl;
};
-&sdmmc0m1_gpio {
+&sdmmc0m1_pin {
u-boot,dm-spl;
};
diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts b/arch/arm/dts/rk3328-rock-pi-e.dts
index 4b9f9a8248..57e36ec609 100644
--- a/arch/arm/dts/rk3328-rock-pi-e.dts
+++ b/arch/arm/dts/rk3328-rock-pi-e.dts
@@ -25,7 +25,7 @@
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0m1_gpio>;
+ pinctrl-0 = <&sdmmc0m1_pin>;
regulator-name = "vcc_sd";
regulator-always-on;
regulator-boot-on;
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index 2af32aea05..3c3b1370e3 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -40,7 +40,7 @@
u-boot,dm-spl;
};
-&sdmmc0m1_gpio {
+&sdmmc0m1_pin {
u-boot,dm-spl;
};
diff --git a/arch/arm/dts/rk3328-rock64.dts b/arch/arm/dts/rk3328-rock64.dts
index ebf3eb222e..7a78255f52 100644
--- a/arch/arm/dts/rk3328-rock64.dts
+++ b/arch/arm/dts/rk3328-rock64.dts
@@ -25,7 +25,7 @@
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0m1_gpio>;
+ pinctrl-0 = <&sdmmc0m1_pin>;
regulator-name = "vcc_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 945387e579..95c7c70ca0 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -142,23 +142,6 @@
};
};
- amba: bus {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- dmac: dmac@ff1f0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xff1f0000 0x0 0x4000>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_DMAC>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- };
- };
-
analog_sound: analog-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
@@ -305,7 +288,7 @@
status = "disabled";
};
- grf_gpio: grf-gpio {
+ grf_gpio: gpio {
compatible = "rockchip,rk3328-grf-gpio";
gpio-controller;
#gpio-cells = <2>;
@@ -317,15 +300,18 @@
#address-cells = <1>;
#size-cells = <0>;
- pd_hevc@RK3328_PD_HEVC {
+ power-domain@RK3328_PD_HEVC {
reg = <RK3328_PD_HEVC>;
+ #power-domain-cells = <0>;
};
- pd_video@RK3328_PD_VIDEO {
+ power-domain@RK3328_PD_VIDEO {
reg = <RK3328_PD_VIDEO>;
+ #power-domain-cells = <0>;
};
- pd_vpu@RK3328_PD_VPU {
+ power-domain@RK3328_PD_VPU {
reg = <RK3328_PD_VPU>;
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+ #power-domain-cells = <0>;
};
};
@@ -452,7 +438,7 @@
};
wdt: watchdog@ff1a0000 {
- compatible = "snps,dw-wdt";
+ compatible = "rockchip,rk3328-wdt", "snps,dw-wdt";
reg = <0x0 0xff1a0000 0x0 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_WDT>;
@@ -503,6 +489,17 @@
status = "disabled";
};
+ dmac: dmac@ff1f0000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x0 0xff1f0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ arm,pl330-periph-burst;
+ clocks = <&cru ACLK_DMAC>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ };
+
thermal-zones {
soc_thermal: soc-thermal {
polling-delay-passive = <20>;
@@ -552,9 +549,9 @@
clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
clock-names = "tsadc", "apb_pclk";
pinctrl-names = "init", "default", "sleep";
- pinctrl-0 = <&otp_gpio>;
+ pinctrl-0 = <&otp_pin>;
pinctrl-1 = <&otp_out>;
- pinctrl-2 = <&otp_gpio>;
+ pinctrl-2 = <&otp_pin>;
resets = <&cru SRST_TSADC>;
reset-names = "tsadc-apb";
rockchip,grf = <&grf>;
@@ -822,7 +819,7 @@
#address-cells = <1>;
#size-cells = <1>;
- u2phy: usb2-phy@100 {
+ u2phy: usb2phy@100 {
compatible = "rockchip,rk3328-usb2phy";
reg = <0x100 0x10>;
clocks = <&xin24m>;
@@ -922,11 +919,12 @@
"mac_clk_tx", "clk_mac_ref",
"aclk_mac", "pclk_mac",
"clk_macphy";
- resets = <&cru SRST_GMAC2PHY_A>, <&cru SRST_MACPHY>;
- reset-names = "stmmaceth", "mac-phy";
+ resets = <&cru SRST_GMAC2PHY_A>;
+ reset-names = "stmmaceth";
phy-mode = "rmii";
phy-handle = <&phy>;
snps,txpbl = <0x4>;
+ clock_in_out = "output";
status = "disabled";
mdio {
@@ -934,7 +932,7 @@
#address-cells = <1>;
#size-cells = <0>;
- phy: phy@0 {
+ phy: ethernet-phy@0 {
compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22";
reg = <0>;
clocks = <&cru SCLK_MAC2PHY_OUT>;
@@ -991,6 +989,25 @@
status = "disabled";
};
+ usbdrd3: usb@ff600000 {
+ compatible = "rockchip,rk3328-dwc3", "snps,dwc3";
+ reg = <0x0 0xff600000 0x0 0x100000>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
+ <&cru ACLK_USB3OTG>;
+ clock-names = "ref_clk", "suspend_clk",
+ "bus_clk";
+ dr_mode = "otg";
+ phy_type = "utmi_wide";
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis_enblslpm_quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ status = "disabled";
+ };
+
gic: interrupt-controller@ff811000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
@@ -1163,7 +1180,7 @@
rockchip,pins = <0 RK_PA5 2 &pcfg_pull_none>,
<0 RK_PA6 2 &pcfg_pull_none>;
};
- i2c3_gpio: i2c3-gpio {
+ i2c3_pins: i2c3-pins {
rockchip,pins =
<0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>,
<0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -1234,7 +1251,7 @@
};
tsadc {
- otp_gpio: otp-gpio {
+ otp_pin: otp-pin {
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
@@ -1245,8 +1262,8 @@
uart0 {
uart0_xfer: uart0-xfer {
- rockchip,pins = <1 RK_PB1 1 &pcfg_pull_up>,
- <1 RK_PB0 1 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PB1 1 &pcfg_pull_none>,
+ <1 RK_PB0 1 &pcfg_pull_up>;
};
uart0_cts: uart0-cts {
@@ -1257,15 +1274,15 @@
rockchip,pins = <1 RK_PB2 1 &pcfg_pull_none>;
};
- uart0_rts_gpio: uart0-rts-gpio {
+ uart0_rts_pin: uart0-rts-pin {
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
- rockchip,pins = <3 RK_PA4 4 &pcfg_pull_up>,
- <3 RK_PA6 4 &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PA4 4 &pcfg_pull_none>,
+ <3 RK_PA6 4 &pcfg_pull_up>;
};
uart1_cts: uart1-cts {
@@ -1276,22 +1293,22 @@
rockchip,pins = <3 RK_PA5 4 &pcfg_pull_none>;
};
- uart1_rts_gpio: uart1-rts-gpio {
+ uart1_rts_pin: uart1-rts-pin {
rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
uart2-0 {
uart2m0_xfer: uart2m0-xfer {
- rockchip,pins = <1 RK_PA0 2 &pcfg_pull_up>,
- <1 RK_PA1 2 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PA0 2 &pcfg_pull_none>,
+ <1 RK_PA1 2 &pcfg_pull_up>;
};
};
uart2-1 {
uart2m1_xfer: uart2m1-xfer {
- rockchip,pins = <2 RK_PA0 1 &pcfg_pull_up>,
- <2 RK_PA1 1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PA0 1 &pcfg_pull_none>,
+ <2 RK_PA1 1 &pcfg_pull_up>;
};
};
@@ -1502,7 +1519,7 @@
rockchip,pins = <2 RK_PA7 1 &pcfg_pull_up_4ma>;
};
- sdmmc0m0_gpio: sdmmc0m0-gpio {
+ sdmmc0m0_pin: sdmmc0m0-pin {
rockchip,pins = <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
};
};
@@ -1512,7 +1529,7 @@
rockchip,pins = <0 RK_PD6 3 &pcfg_pull_up_4ma>;
};
- sdmmc0m1_gpio: sdmmc0m1-gpio {
+ sdmmc0m1_pin: sdmmc0m1-pin {
rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
};
};
@@ -1545,7 +1562,7 @@
<1 RK_PA3 1 &pcfg_pull_up_8ma>;
};
- sdmmc0_gpio: sdmmc0-gpio {
+ sdmmc0_pins: sdmmc0-pins {
rockchip,pins =
<1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
@@ -1587,7 +1604,7 @@
<3 RK_PA7 3 &pcfg_pull_up_4ma>;
};
- sdmmc0ext_gpio: sdmmc0ext-gpio {
+ sdmmc0ext_pins: sdmmc0ext-pins {
rockchip,pins =
<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
<3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
@@ -1632,7 +1649,7 @@
<1 RK_PC1 1 &pcfg_pull_up_8ma>;
};
- sdmmc1_gpio: sdmmc1-gpio {
+ sdmmc1_pins: sdmmc1-pins {
rockchip,pins =
<1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
@@ -1826,7 +1843,7 @@
tsadc_int: tsadc-int {
rockchip,pins = <2 RK_PB5 2 &pcfg_pull_none>;
};
- tsadc_gpio: tsadc-gpio {
+ tsadc_pin: tsadc-pin {
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [RFC PATCH v1 1/6] arm: dts: rockchip: update rk3328.dtsi
2021-06-30 16:22 ` Johan Jonker
@ 2022-03-11 19:29 ` Jagan Teki
-1 siblings, 0 replies; 24+ messages in thread
From: Jagan Teki @ 2022-03-11 19:29 UTC (permalink / raw)
To: Johan Jonker
Cc: kever.yang, sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
On Thu, Jul 1, 2021 at 12:19 AM Johan Jonker <jbx6244@gmail.com> wrote:
>
> In the Linux DT the file rk3328.dtsi has recently had
> some updates. Update this for U-boot as well.
> The rk3328 usb3 port has now support in the Linux DT.
> Rename node names ending on 'gpio' to 'pin' or 'pins'.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
This patch needs to squash 3/6 and adds a commit tag from Linux Sync.
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [RFC PATCH v1 1/6] arm: dts: rockchip: update rk3328.dtsi
@ 2022-03-11 19:29 ` Jagan Teki
0 siblings, 0 replies; 24+ messages in thread
From: Jagan Teki @ 2022-03-11 19:29 UTC (permalink / raw)
To: Johan Jonker
Cc: kever.yang, sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
On Thu, Jul 1, 2021 at 12:19 AM Johan Jonker <jbx6244@gmail.com> wrote:
>
> In the Linux DT the file rk3328.dtsi has recently had
> some updates. Update this for U-boot as well.
> The rk3328 usb3 port has now support in the Linux DT.
> Rename node names ending on 'gpio' to 'pin' or 'pins'.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
This patch needs to squash 3/6 and adds a commit tag from Linux Sync.
^ permalink raw reply [flat|nested] 24+ messages in thread
* [RFC PATCH v1 2/6] arm: dts: rockchip: remove usb_host0_xhci node from rk3328-u-boot.dtsi
2021-06-30 16:22 ` Johan Jonker
@ 2021-06-30 16:22 ` Johan Jonker
-1 siblings, 0 replies; 24+ messages in thread
From: Johan Jonker @ 2021-06-30 16:22 UTC (permalink / raw)
To: kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
The rk3328.dtsi file was updated with a usbdrd3 node.
Remove the usb_host0_xhci node from rk3328-u-boot.dtsi,
because it's deprecated now the driver is removed.
Add usbdrd3 as place holder in existing dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm/dts/rk3328-evb-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-rock64-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-u-boot.dtsi | 11 -----------
5 files changed, 4 insertions(+), 15 deletions(-)
diff --git a/arch/arm/dts/rk3328-evb-u-boot.dtsi b/arch/arm/dts/rk3328-evb-u-boot.dtsi
index 4bfa0c2330..bab0187f01 100644
--- a/arch/arm/dts/rk3328-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-evb-u-boot.dtsi
@@ -45,7 +45,7 @@
status = "broken";
};
-&usb_host0_xhci {
+&usbdrd3 {
vbus-supply = <&vcc5v0_host_xhci>;
status = "okay";
};
diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
index 20a62134a0..4d59e35788 100644
--- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
@@ -48,7 +48,7 @@
u-boot,dm-spl;
};
-&usb_host0_xhci {
+&usbdrd3 {
vbus-supply = <&vcc_host1_5v>;
status = "okay";
};
diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
index 0b1a42c49f..028919d9b3 100644
--- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
@@ -45,7 +45,7 @@
u-boot,dm-spl;
};
-&usb_host0_xhci {
+&usbdrd3 {
vbus-supply = <&vcc5v0_host_xhci>;
status = "okay";
};
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index 3c3b1370e3..37ecc6a753 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -48,7 +48,7 @@
u-boot,dm-spl;
};
-&usb_host0_xhci {
+&usbdrd3 {
vbus-supply = <&vcc_host_5v>;
status = "okay";
};
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index 1633558264..1d7bf19192 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -24,17 +24,6 @@
0x0 0xff720000 0x0 0x1000
0x0 0xff798000 0x0 0x1000>;
};
-
- usb_host0_xhci: usb@ff600000 {
- compatible = "rockchip,rk3328-xhci";
- reg = <0x0 0xff600000 0x0 0x100000>;
- interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
- snps,dis-enblslpm-quirk;
- snps,phyif-utmi-bits = <16>;
- snps,dis-u2-freeclk-exists-quirk;
- snps,dis-u2-susphy-quirk;
- status = "disabled";
- };
};
&cru {
--
2.11.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 24+ messages in thread* [RFC PATCH v1 2/6] arm: dts: rockchip: remove usb_host0_xhci node from rk3328-u-boot.dtsi
@ 2021-06-30 16:22 ` Johan Jonker
0 siblings, 0 replies; 24+ messages in thread
From: Johan Jonker @ 2021-06-30 16:22 UTC (permalink / raw)
To: kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
The rk3328.dtsi file was updated with a usbdrd3 node.
Remove the usb_host0_xhci node from rk3328-u-boot.dtsi,
because it's deprecated now the driver is removed.
Add usbdrd3 as place holder in existing dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm/dts/rk3328-evb-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-rock64-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-u-boot.dtsi | 11 -----------
5 files changed, 4 insertions(+), 15 deletions(-)
diff --git a/arch/arm/dts/rk3328-evb-u-boot.dtsi b/arch/arm/dts/rk3328-evb-u-boot.dtsi
index 4bfa0c2330..bab0187f01 100644
--- a/arch/arm/dts/rk3328-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-evb-u-boot.dtsi
@@ -45,7 +45,7 @@
status = "broken";
};
-&usb_host0_xhci {
+&usbdrd3 {
vbus-supply = <&vcc5v0_host_xhci>;
status = "okay";
};
diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
index 20a62134a0..4d59e35788 100644
--- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
@@ -48,7 +48,7 @@
u-boot,dm-spl;
};
-&usb_host0_xhci {
+&usbdrd3 {
vbus-supply = <&vcc_host1_5v>;
status = "okay";
};
diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
index 0b1a42c49f..028919d9b3 100644
--- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
@@ -45,7 +45,7 @@
u-boot,dm-spl;
};
-&usb_host0_xhci {
+&usbdrd3 {
vbus-supply = <&vcc5v0_host_xhci>;
status = "okay";
};
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index 3c3b1370e3..37ecc6a753 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -48,7 +48,7 @@
u-boot,dm-spl;
};
-&usb_host0_xhci {
+&usbdrd3 {
vbus-supply = <&vcc_host_5v>;
status = "okay";
};
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index 1633558264..1d7bf19192 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -24,17 +24,6 @@
0x0 0xff720000 0x0 0x1000
0x0 0xff798000 0x0 0x1000>;
};
-
- usb_host0_xhci: usb@ff600000 {
- compatible = "rockchip,rk3328-xhci";
- reg = <0x0 0xff600000 0x0 0x100000>;
- interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
- snps,dis-enblslpm-quirk;
- snps,phyif-utmi-bits = <16>;
- snps,dis-u2-freeclk-exists-quirk;
- snps,dis-u2-susphy-quirk;
- status = "disabled";
- };
};
&cru {
--
2.11.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [RFC PATCH v1 3/6] arm: dts: rockchip: move mmc aliases to board files
2021-06-30 16:22 ` Johan Jonker
@ 2021-06-30 16:22 ` Johan Jonker
-1 siblings, 0 replies; 24+ messages in thread
From: Johan Jonker @ 2021-06-30 16:22 UTC (permalink / raw)
To: kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
In the Linux DT the recently introduced async probe on mmc devices
can shuffle block IDs. Pin them to fixed values to ease booting
in environments where UUIDs are not practical.
The newly added mmc aliases should be board specific,
so move them from the general dtsi to the individual boards.
Sort aliases on reg order when available and without number gap.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm/dts/rk3328-evb.dts | 6 ++++++
arch/arm/dts/rk3328-nanopi-r2s.dts | 4 ++++
arch/arm/dts/rk3328-roc-cc.dts | 5 +++++
arch/arm/dts/rk3328-rock-pi-e.dts | 5 +++++
arch/arm/dts/rk3328-rock64.dts | 5 +++++
arch/arm/dts/rk3328-u-boot.dtsi | 2 --
6 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index a0000d072c..832773d0fd 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -10,6 +10,12 @@
model = "Rockchip RK3328 EVB";
compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
+ aliases {
+ mmc0 = &sdmmc;
+ mmc1 = &sdio;
+ mmc2 = &emmc;
+ };
+
chosen {
stdout-path = "serial2:1500000n8";
};
diff --git a/arch/arm/dts/rk3328-nanopi-r2s.dts b/arch/arm/dts/rk3328-nanopi-r2s.dts
index b1e45c01a9..92bb282ed9 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s.dts
+++ b/arch/arm/dts/rk3328-nanopi-r2s.dts
@@ -13,6 +13,10 @@
model = "FriendlyElec NanoPi R2S";
compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
+ aliases {
+ mmc0 = &sdmmc;
+ };
+
chosen {
stdout-path = "serial2:1500000n8";
};
diff --git a/arch/arm/dts/rk3328-roc-cc.dts b/arch/arm/dts/rk3328-roc-cc.dts
index 8dc4c57fbb..401be93364 100644
--- a/arch/arm/dts/rk3328-roc-cc.dts
+++ b/arch/arm/dts/rk3328-roc-cc.dts
@@ -10,6 +10,11 @@
model = "Firefly roc-rk3328-cc";
compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";
+ aliases {
+ mmc0 = &sdmmc;
+ mmc1 = &emmc;
+ };
+
chosen {
stdout-path = "serial2:1500000n8";
};
diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts b/arch/arm/dts/rk3328-rock-pi-e.dts
index 57e36ec609..63e73781f1 100644
--- a/arch/arm/dts/rk3328-rock-pi-e.dts
+++ b/arch/arm/dts/rk3328-rock-pi-e.dts
@@ -10,6 +10,11 @@
model = "Radxa Rockpi E";
compatible = "radxa,rock-pi-e", "rockchip,rk3328";
+ aliases {
+ mmc0 = &sdmmc;
+ mmc1 = &emmc;
+ };
+
chosen {
stdout-path = "serial2:1500000n8";
};
diff --git a/arch/arm/dts/rk3328-rock64.dts b/arch/arm/dts/rk3328-rock64.dts
index 7a78255f52..57a796e220 100644
--- a/arch/arm/dts/rk3328-rock64.dts
+++ b/arch/arm/dts/rk3328-rock64.dts
@@ -10,6 +10,11 @@
model = "Pine64 Rock64";
compatible = "pine64,rock64", "rockchip,rk3328";
+ aliases {
+ mmc0 = &sdmmc;
+ mmc1 = &emmc;
+ };
+
chosen {
stdout-path = "serial2:1500000n8";
};
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index 1d7bf19192..e00e466d8d 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -5,8 +5,6 @@
/ {
aliases {
- mmc0 = &emmc;
- mmc1 = &sdmmc;
spi0 = &spi0;
};
--
2.11.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 24+ messages in thread* [RFC PATCH v1 3/6] arm: dts: rockchip: move mmc aliases to board files
@ 2021-06-30 16:22 ` Johan Jonker
0 siblings, 0 replies; 24+ messages in thread
From: Johan Jonker @ 2021-06-30 16:22 UTC (permalink / raw)
To: kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
In the Linux DT the recently introduced async probe on mmc devices
can shuffle block IDs. Pin them to fixed values to ease booting
in environments where UUIDs are not practical.
The newly added mmc aliases should be board specific,
so move them from the general dtsi to the individual boards.
Sort aliases on reg order when available and without number gap.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm/dts/rk3328-evb.dts | 6 ++++++
arch/arm/dts/rk3328-nanopi-r2s.dts | 4 ++++
arch/arm/dts/rk3328-roc-cc.dts | 5 +++++
arch/arm/dts/rk3328-rock-pi-e.dts | 5 +++++
arch/arm/dts/rk3328-rock64.dts | 5 +++++
arch/arm/dts/rk3328-u-boot.dtsi | 2 --
6 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index a0000d072c..832773d0fd 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -10,6 +10,12 @@
model = "Rockchip RK3328 EVB";
compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
+ aliases {
+ mmc0 = &sdmmc;
+ mmc1 = &sdio;
+ mmc2 = &emmc;
+ };
+
chosen {
stdout-path = "serial2:1500000n8";
};
diff --git a/arch/arm/dts/rk3328-nanopi-r2s.dts b/arch/arm/dts/rk3328-nanopi-r2s.dts
index b1e45c01a9..92bb282ed9 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s.dts
+++ b/arch/arm/dts/rk3328-nanopi-r2s.dts
@@ -13,6 +13,10 @@
model = "FriendlyElec NanoPi R2S";
compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
+ aliases {
+ mmc0 = &sdmmc;
+ };
+
chosen {
stdout-path = "serial2:1500000n8";
};
diff --git a/arch/arm/dts/rk3328-roc-cc.dts b/arch/arm/dts/rk3328-roc-cc.dts
index 8dc4c57fbb..401be93364 100644
--- a/arch/arm/dts/rk3328-roc-cc.dts
+++ b/arch/arm/dts/rk3328-roc-cc.dts
@@ -10,6 +10,11 @@
model = "Firefly roc-rk3328-cc";
compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";
+ aliases {
+ mmc0 = &sdmmc;
+ mmc1 = &emmc;
+ };
+
chosen {
stdout-path = "serial2:1500000n8";
};
diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts b/arch/arm/dts/rk3328-rock-pi-e.dts
index 57e36ec609..63e73781f1 100644
--- a/arch/arm/dts/rk3328-rock-pi-e.dts
+++ b/arch/arm/dts/rk3328-rock-pi-e.dts
@@ -10,6 +10,11 @@
model = "Radxa Rockpi E";
compatible = "radxa,rock-pi-e", "rockchip,rk3328";
+ aliases {
+ mmc0 = &sdmmc;
+ mmc1 = &emmc;
+ };
+
chosen {
stdout-path = "serial2:1500000n8";
};
diff --git a/arch/arm/dts/rk3328-rock64.dts b/arch/arm/dts/rk3328-rock64.dts
index 7a78255f52..57a796e220 100644
--- a/arch/arm/dts/rk3328-rock64.dts
+++ b/arch/arm/dts/rk3328-rock64.dts
@@ -10,6 +10,11 @@
model = "Pine64 Rock64";
compatible = "pine64,rock64", "rockchip,rk3328";
+ aliases {
+ mmc0 = &sdmmc;
+ mmc1 = &emmc;
+ };
+
chosen {
stdout-path = "serial2:1500000n8";
};
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index 1d7bf19192..e00e466d8d 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -5,8 +5,6 @@
/ {
aliases {
- mmc0 = &emmc;
- mmc1 = &sdmmc;
spi0 = &spi0;
};
--
2.11.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [RFC PATCH v1 4/6] arm: dts: rockchip: move spi0 u-boot, dm-pre-reloc and alias to rk3328 board files
2021-06-30 16:22 ` Johan Jonker
@ 2021-06-30 16:22 ` Johan Jonker
-1 siblings, 0 replies; 24+ messages in thread
From: Johan Jonker @ 2021-06-30 16:22 UTC (permalink / raw)
To: kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
The spi0 node has a common u-boot,dm-pre-reloc property and
an alias in rk3328-u-boot.dtsi, so all boards contain this
as well in u-boot-tpl.dtb. Clean it up a bit and move it
to only boards that use it.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm/dts/rk3328-rock64-u-boot.dtsi | 6 ++++++
arch/arm/dts/rk3328-u-boot.dtsi | 8 --------
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index 37ecc6a753..dae79d6268 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -6,6 +6,10 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-lpddr3-1600.dtsi"
/ {
+ aliases {
+ spi0 = &spi0;
+ };
+
chosen {
u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
};
@@ -69,6 +73,8 @@
};
&spi0 {
+ u-boot,dm-pre-reloc;
+
spi_flash: spiflash@0 {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index e00e466d8d..03e5f18f1a 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -4,10 +4,6 @@
*/
/ {
- aliases {
- spi0 = &spi0;
- };
-
chosen {
u-boot,spl-boot-order = &emmc, &sdmmc;
};
@@ -54,7 +50,3 @@
&usb20_otg {
hnp-srp-disable;
};
-
-&spi0 {
- u-boot,dm-pre-reloc;
-};
--
2.11.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 24+ messages in thread* [RFC PATCH v1 4/6] arm: dts: rockchip: move spi0 u-boot, dm-pre-reloc and alias to rk3328 board files
@ 2021-06-30 16:22 ` Johan Jonker
0 siblings, 0 replies; 24+ messages in thread
From: Johan Jonker @ 2021-06-30 16:22 UTC (permalink / raw)
To: kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
The spi0 node has a common u-boot,dm-pre-reloc property and
an alias in rk3328-u-boot.dtsi, so all boards contain this
as well in u-boot-tpl.dtb. Clean it up a bit and move it
to only boards that use it.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm/dts/rk3328-rock64-u-boot.dtsi | 6 ++++++
arch/arm/dts/rk3328-u-boot.dtsi | 8 --------
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index 37ecc6a753..dae79d6268 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -6,6 +6,10 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-lpddr3-1600.dtsi"
/ {
+ aliases {
+ spi0 = &spi0;
+ };
+
chosen {
u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
};
@@ -69,6 +73,8 @@
};
&spi0 {
+ u-boot,dm-pre-reloc;
+
spi_flash: spiflash@0 {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index e00e466d8d..03e5f18f1a 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -4,10 +4,6 @@
*/
/ {
- aliases {
- spi0 = &spi0;
- };
-
chosen {
u-boot,spl-boot-order = &emmc, &sdmmc;
};
@@ -54,7 +50,3 @@
&usb20_otg {
hnp-srp-disable;
};
-
-&spi0 {
- u-boot,dm-pre-reloc;
-};
--
2.11.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [RFC PATCH v1 5/6] rockchip: rk3318: add a95x-z2-rk3318_defconfig file
2021-06-30 16:22 ` Johan Jonker
@ 2021-06-30 16:22 ` Johan Jonker
-1 siblings, 0 replies; 24+ messages in thread
From: Johan Jonker @ 2021-06-30 16:22 UTC (permalink / raw)
To: kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
This commit adds the default configuration file and relevant description
for A95X Z2 board
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
board/rockchip/evb_rk3328/MAINTAINERS | 6 ++
configs/a95x-z2-rk3318_defconfig | 102 ++++++++++++++++++++++++++++++++++
doc/board/rockchip/rockchip.rst | 2 +
3 files changed, 110 insertions(+)
create mode 100644 configs/a95x-z2-rk3318_defconfig
diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
index 14fda46e8f..a4573c2ff9 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -1,3 +1,9 @@
+A95X-Z2-RK3318
+M: Johan Jonker <jbx6244@gmail.com>
+S: Maintained
+F: configs/a95x-z2-rk3318_defconfig
+F: arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
+
EVB-RK3328
M: Kever Yang <kever.yang@rock-chips.com>
S: Maintained
diff --git a/configs/a95x-z2-rk3318_defconfig b/configs/a95x-z2-rk3318_defconfig
new file mode 100644
index 0000000000..cba0f6c659
--- /dev/null
+++ b/configs/a95x-z2-rk3318_defconfig
@@ -0,0 +1,102 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ROCKCHIP_RK3328=y
+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_DEBUG_UART_BASE=0xFF130000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEFAULT_DEVICE_TREE="rk3318-a95x-z2"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3318-a95x-z2.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET is not set
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
+CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_DM_REGULATOR=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSINFO=y
+CONFIG_SYSINFO_SMBIOS=y
+CONFIG_SYSRESET=y
+# CONFIG_TPL_SYSRESET is not set
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index fbb9983988..49a2dd2dd3 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -44,6 +44,8 @@ List of mainline supported rockchip boards:
* rk3308
- Rockchip Evb-RK3308 (evb-rk3308)
- Roc-cc-RK3308 (roc-cc-rk3308)
+* rk3318
+ - A95X Z2 (a95x-z2-rk3318)
* rk3328
- Rockchip Evb-RK3328 (evb-rk3328)
- Pine64 Rock64 (rock64-rk3328)
--
2.11.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 24+ messages in thread* [RFC PATCH v1 5/6] rockchip: rk3318: add a95x-z2-rk3318_defconfig file
@ 2021-06-30 16:22 ` Johan Jonker
0 siblings, 0 replies; 24+ messages in thread
From: Johan Jonker @ 2021-06-30 16:22 UTC (permalink / raw)
To: kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
This commit adds the default configuration file and relevant description
for A95X Z2 board
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
board/rockchip/evb_rk3328/MAINTAINERS | 6 ++
configs/a95x-z2-rk3318_defconfig | 102 ++++++++++++++++++++++++++++++++++
doc/board/rockchip/rockchip.rst | 2 +
3 files changed, 110 insertions(+)
create mode 100644 configs/a95x-z2-rk3318_defconfig
diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
index 14fda46e8f..a4573c2ff9 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -1,3 +1,9 @@
+A95X-Z2-RK3318
+M: Johan Jonker <jbx6244@gmail.com>
+S: Maintained
+F: configs/a95x-z2-rk3318_defconfig
+F: arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
+
EVB-RK3328
M: Kever Yang <kever.yang@rock-chips.com>
S: Maintained
diff --git a/configs/a95x-z2-rk3318_defconfig b/configs/a95x-z2-rk3318_defconfig
new file mode 100644
index 0000000000..cba0f6c659
--- /dev/null
+++ b/configs/a95x-z2-rk3318_defconfig
@@ -0,0 +1,102 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ROCKCHIP_RK3328=y
+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_DEBUG_UART_BASE=0xFF130000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEFAULT_DEVICE_TREE="rk3318-a95x-z2"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3318-a95x-z2.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET is not set
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
+CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_DM_REGULATOR=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSINFO=y
+CONFIG_SYSINFO_SMBIOS=y
+CONFIG_SYSRESET=y
+# CONFIG_TPL_SYSRESET is not set
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index fbb9983988..49a2dd2dd3 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -44,6 +44,8 @@ List of mainline supported rockchip boards:
* rk3308
- Rockchip Evb-RK3308 (evb-rk3308)
- Roc-cc-RK3308 (roc-cc-rk3308)
+* rk3318
+ - A95X Z2 (a95x-z2-rk3318)
* rk3328
- Rockchip Evb-RK3328 (evb-rk3328)
- Pine64 Rock64 (rock64-rk3328)
--
2.11.0
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [RFC PATCH v1 5/6] rockchip: rk3318: add a95x-z2-rk3318_defconfig file
2021-06-30 16:22 ` Johan Jonker
@ 2022-03-11 19:30 ` Jagan Teki
-1 siblings, 0 replies; 24+ messages in thread
From: Jagan Teki @ 2022-03-11 19:30 UTC (permalink / raw)
To: Johan Jonker
Cc: kever.yang, sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
On Thu, Jul 1, 2021 at 12:20 AM Johan Jonker <jbx6244@gmail.com> wrote:
>
> This commit adds the default configuration file and relevant description
> for A95X Z2 board
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
> board/rockchip/evb_rk3328/MAINTAINERS | 6 ++
> configs/a95x-z2-rk3318_defconfig | 102 ++++++++++++++++++++++++++++++++++
> doc/board/rockchip/rockchip.rst | 2 +
> 3 files changed, 110 insertions(+)
> create mode 100644 configs/a95x-z2-rk3318_defconfig
>
> diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
> index 14fda46e8f..a4573c2ff9 100644
> --- a/board/rockchip/evb_rk3328/MAINTAINERS
> +++ b/board/rockchip/evb_rk3328/MAINTAINERS
> @@ -1,3 +1,9 @@
> +A95X-Z2-RK3318
> +M: Johan Jonker <jbx6244@gmail.com>
> +S: Maintained
> +F: configs/a95x-z2-rk3318_defconfig
> +F: arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
> +
> EVB-RK3328
> M: Kever Yang <kever.yang@rock-chips.com>
> S: Maintained
> diff --git a/configs/a95x-z2-rk3318_defconfig b/configs/a95x-z2-rk3318_defconfig
> new file mode 100644
> index 0000000000..cba0f6c659
> --- /dev/null
> +++ b/configs/a95x-z2-rk3318_defconfig
> @@ -0,0 +1,102 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_ROCKCHIP=y
> +CONFIG_SYS_TEXT_BASE=0x00200000
> +CONFIG_SPL_GPIO_SUPPORT=y
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_ENV_OFFSET=0x3F8000
> +CONFIG_ROCKCHIP_RK3328=y
> +CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
> +CONFIG_TPL_LIBCOMMON_SUPPORT=y
> +CONFIG_TPL_LIBGENERIC_SUPPORT=y
> +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
> +CONFIG_SPL_STACK_R_ADDR=0x600000
> +CONFIG_DEBUG_UART_BASE=0xFF130000
> +CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_DEFAULT_DEVICE_TREE="rk3318-a95x-z2"
> +CONFIG_DEBUG_UART=y
> +CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
> +# CONFIG_ANDROID_BOOT_IMAGE is not set
> +CONFIG_FIT=y
> +CONFIG_FIT_VERBOSE=y
> +CONFIG_SPL_LOAD_FIT=y
> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3318-a95x-z2.dtb"
This would eventually break the build as the dts added in the next
patch, squash both.
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [RFC PATCH v1 5/6] rockchip: rk3318: add a95x-z2-rk3318_defconfig file
@ 2022-03-11 19:30 ` Jagan Teki
0 siblings, 0 replies; 24+ messages in thread
From: Jagan Teki @ 2022-03-11 19:30 UTC (permalink / raw)
To: Johan Jonker
Cc: kever.yang, sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
On Thu, Jul 1, 2021 at 12:20 AM Johan Jonker <jbx6244@gmail.com> wrote:
>
> This commit adds the default configuration file and relevant description
> for A95X Z2 board
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
> board/rockchip/evb_rk3328/MAINTAINERS | 6 ++
> configs/a95x-z2-rk3318_defconfig | 102 ++++++++++++++++++++++++++++++++++
> doc/board/rockchip/rockchip.rst | 2 +
> 3 files changed, 110 insertions(+)
> create mode 100644 configs/a95x-z2-rk3318_defconfig
>
> diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
> index 14fda46e8f..a4573c2ff9 100644
> --- a/board/rockchip/evb_rk3328/MAINTAINERS
> +++ b/board/rockchip/evb_rk3328/MAINTAINERS
> @@ -1,3 +1,9 @@
> +A95X-Z2-RK3318
> +M: Johan Jonker <jbx6244@gmail.com>
> +S: Maintained
> +F: configs/a95x-z2-rk3318_defconfig
> +F: arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
> +
> EVB-RK3328
> M: Kever Yang <kever.yang@rock-chips.com>
> S: Maintained
> diff --git a/configs/a95x-z2-rk3318_defconfig b/configs/a95x-z2-rk3318_defconfig
> new file mode 100644
> index 0000000000..cba0f6c659
> --- /dev/null
> +++ b/configs/a95x-z2-rk3318_defconfig
> @@ -0,0 +1,102 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_ROCKCHIP=y
> +CONFIG_SYS_TEXT_BASE=0x00200000
> +CONFIG_SPL_GPIO_SUPPORT=y
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_ENV_OFFSET=0x3F8000
> +CONFIG_ROCKCHIP_RK3328=y
> +CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
> +CONFIG_TPL_LIBCOMMON_SUPPORT=y
> +CONFIG_TPL_LIBGENERIC_SUPPORT=y
> +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
> +CONFIG_SPL_STACK_R_ADDR=0x600000
> +CONFIG_DEBUG_UART_BASE=0xFF130000
> +CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_DEFAULT_DEVICE_TREE="rk3318-a95x-z2"
> +CONFIG_DEBUG_UART=y
> +CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
> +# CONFIG_ANDROID_BOOT_IMAGE is not set
> +CONFIG_FIT=y
> +CONFIG_FIT_VERBOSE=y
> +CONFIG_SPL_LOAD_FIT=y
> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3318-a95x-z2.dtb"
This would eventually break the build as the dts added in the next
patch, squash both.
^ permalink raw reply [flat|nested] 24+ messages in thread
* [RFC PATCH v1 6/6] arm: dts: rockchip: add rk3318 A95X Z2 board
2021-06-30 16:22 ` Johan Jonker
@ 2021-06-30 16:22 ` Johan Jonker
-1 siblings, 0 replies; 24+ messages in thread
From: Johan Jonker @ 2021-06-30 16:22 UTC (permalink / raw)
To: kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
The rk3318 A95X Z2 boards are sold as TV box.
No further documentation is given, but from the dts files
extracted it seems that the rk3318 processor is simulair
to the rk3328. This dts file contains only the basic nodes
that have support in the mainline kernel. Included extra
dtsi file for U-boot specific properties.
Features:
CPU: RK3318 Quad-Core Cortex-A53
GPU: Mali-450
RAM: 2/4GB DDR3
ROM: EMMC 16/32/64GB
HDMI: HDMI 2.0a for 4k@60Hz
Ethernet: 10/100M standard RJ-45
WiFi: 2.4G+5G WIFI, 802.11 b/g/n
Bluetooth: 4.0
1 x USB 3.0
1 x USB 2.0
1 x Micro SD card slot
1 x SPDIF
1 x AV
1 x DC IN
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi | 59 +++++
arch/arm/dts/rk3318-a95x-z2.dts | 384 ++++++++++++++++++++++++++++++++
3 files changed, 444 insertions(+)
create mode 100644 arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3318-a95x-z2.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9918e46633..3e1e2209b7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -107,6 +107,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
rk3308-roc-cc.dtb
dtb-$(CONFIG_ROCKCHIP_RK3328) += \
+ rk3318-a95x-z2.dtb \
rk3328-evb.dtb \
rk3328-nanopi-r2s.dtb \
rk3328-roc-cc.dtb \
diff --git a/arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi b/arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
new file mode 100644
index 0000000000..5010925e9a
--- /dev/null
+++ b/arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "rk3328-u-boot.dtsi"
+#include "rk3328-sdram-ddr3-666.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
+ };
+
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ manufacturer = "zkmagic";
+ product = "a95x-z2_rk3318";
+ };
+
+ baseboard {
+ manufacturer = "zkmagic";
+ product = "a95x-z2_rk3318";
+ };
+
+ chassis {
+ manufacturer = "zkmagic";
+ product = "a95x-z2_rk3318";
+ };
+ };
+ };
+};
+
+&gmac2phy {
+ status = "broken";
+};
+
+&gpio0 {
+ u-boot,dm-spl;
+};
+
+&pcfg_pull_up_4ma {
+ u-boot,dm-spl;
+};
+
+&pinctrl {
+ u-boot,dm-spl;
+};
+
+&sdmmc0m1_pin {
+ u-boot,dm-spl;
+};
+
+&usb20_otg {
+ dr_mode = "otg";
+};
+
+&vcc_sd {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/rk3318-a95x-z2.dts b/arch/arm/dts/rk3318-a95x-z2.dts
new file mode 100644
index 0000000000..d41f786b2f
--- /dev/null
+++ b/arch/arm/dts/rk3318-a95x-z2.dts
@@ -0,0 +1,384 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include "rk3328.dtsi"
+
+/ {
+ model = "A95X Z2";
+ compatible = "zkmagic,a95x-z2", "rockchip,rk3318";
+
+ aliases {
+ mmc0 = &sdmmc;
+ mmc1 = &sdio;
+ mmc2 = &emmc;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ recovery {
+ label = "recovery";
+ linux,code = <KEY_VENDOR>;
+ press-threshold-microvolt = <17000>;
+ };
+ };
+
+ ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&ir_int>;
+ pinctrl-names = "default";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&cyx_led_pin>;
+ pinctrl-names = "default";
+
+ cyx_led: led-0 {
+ default-state = "on";
+ gpios = <&gpio2 RK_PC7 GPIO_ACTIVE_LOW>;
+ label = "CYX_LED";
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-0 = <&wifi_enable_h>;
+ pinctrl-names = "default";
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+
+ spdif-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "SPDIF";
+
+ simple-audio-card,cpu {
+ sound-dai = <&spdif>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&spdif_out>;
+ };
+ };
+
+ spdif_out: spdif-out {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+ };
+
+ /* Power tree */
+ vccio_1v8: vccio-1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ vccio_3v3: vccio-3v3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ vcc_otg_vbus: otg-vbus-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&otg_vbus_drv>;
+ pinctrl-names = "default";
+ regulator-name = "vcc_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ };
+
+ vcc_sd: sdmmc-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&sdmmc0m1_pin>;
+ pinctrl-names = "default";
+ regulator-name = "vcc_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vccio_3v3>;
+ };
+
+ vdd_arm: vdd-arm {
+ compatible = "pwm-regulator";
+ pwms = <&pwm0 0 5000 1>;
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-settling-time-up-us = <250>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vdd_log: vdd-log {
+ compatible = "pwm-regulator";
+ pwms = <&pwm1 0 5000 1>;
+ regulator-name = "vdd_log";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-settling-time-up-us = <250>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+&analog_sound {
+ status = "okay";
+};
+
+&codec {
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu0_opp_table {
+ opp-1200000000 {
+ status = "disabled";
+ };
+
+ opp-1296000000 {
+ status = "disabled";
+ };
+};
+
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ non-removable;
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&gmac2phy {
+ assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>;
+ assigned-clock-rate = <50000000>;
+ assigned-clocks = <&cru SCLK_MAC2PHY>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_log>;
+};
+
+&hdmi {
+ ddc-i2c-scl-high-time-ns = <9625>;
+ ddc-i2c-scl-low-time-ns = <10000>;
+ status = "okay";
+};
+
+&hdmiphy {
+ status = "okay";
+};
+
+&hdmi_sound {
+ status = "okay";
+};
+
+&i2s0 {
+ status = "okay";
+};
+
+&i2s1 {
+ status = "okay";
+};
+
+&io_domains {
+ pmuio-supply = <&vccio_3v3>;
+ vccio1-supply = <&vccio_3v3>;
+ vccio2-supply = <&vccio_1v8>;
+ vccio3-supply = <&vccio_3v3>;
+ vccio4-supply = <&vccio_1v8>;
+ vccio5-supply = <&vccio_3v3>;
+ vccio6-supply = <&vccio_3v3>;
+ status = "okay";
+};
+
+&pinctrl {
+ ir {
+ ir_int: ir-int {
+ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ leds {
+ cyx_led_pin: cyx-led-pin {
+ rockchip,pins = <2 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pwm0 {
+ pwm0_pin_pull_up: pwm0-pin-pull-up {
+ rockchip,pins = <2 RK_PA4 1 &pcfg_pull_up>;
+ };
+ };
+
+ pwm1 {
+ pwm1_pin_pull_up: pwm1-pin-pull-up {
+ rockchip,pins = <2 RK_PA5 1 &pcfg_pull_up>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sdmmc1 {
+ clk_32k_out: clk-32k-out {
+ rockchip,pins = <1 RK_PD4 1 &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ host_vbus_drv: host-vbus-drv {
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ otg_vbus_drv: otg-vbus-drv {
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pwm0 {
+ pinctrl-0 = <&pwm0_pin_pull_up>;
+ pinctrl-names = "active";
+ status = "okay";
+};
+
+&pwm1 {
+ pinctrl-0 = <&pwm1_pin_pull_up>;
+ pinctrl-names = "active";
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vccio_1v8>;
+ status = "okay";
+};
+
+&sdio {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ max-frequency = <125000000>;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk &clk_32k_out>;
+ pinctrl-names = "default";
+ sd-uhs-sdr104;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
+ pinctrl-names = "default";
+ vmmc-supply = <&vcc_sd>;
+ status = "okay";
+};
+
+&spdif {
+ pinctrl-0 = <&spdifm0_tx>;
+ status = "okay";
+};
+
+&soc_crit {
+ temperature = <115000>; /* millicelsius */
+};
+
+&target {
+ temperature = <105000>; /* millicelsius */
+};
+
+&threshold {
+ temperature = <90000>; /* millicelsius */
+};
+
+&tsadc {
+ rockchip,hw-tshut-temp = <120000>;
+ status = "okay";
+};
+
+&u2phy {
+ status = "okay";
+};
+
+&u2phy_host {
+ status = "okay";
+};
+
+&u2phy_otg {
+ phy-supply = <&vcc_otg_vbus>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-0 = <&uart0_xfer &uart0_cts>;
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb20_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbdrd3 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&vop {
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
--
2.11.0
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 24+ messages in thread* [RFC PATCH v1 6/6] arm: dts: rockchip: add rk3318 A95X Z2 board
@ 2021-06-30 16:22 ` Johan Jonker
0 siblings, 0 replies; 24+ messages in thread
From: Johan Jonker @ 2021-06-30 16:22 UTC (permalink / raw)
To: kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
The rk3318 A95X Z2 boards are sold as TV box.
No further documentation is given, but from the dts files
extracted it seems that the rk3318 processor is simulair
to the rk3328. This dts file contains only the basic nodes
that have support in the mainline kernel. Included extra
dtsi file for U-boot specific properties.
Features:
CPU: RK3318 Quad-Core Cortex-A53
GPU: Mali-450
RAM: 2/4GB DDR3
ROM: EMMC 16/32/64GB
HDMI: HDMI 2.0a for 4k@60Hz
Ethernet: 10/100M standard RJ-45
WiFi: 2.4G+5G WIFI, 802.11 b/g/n
Bluetooth: 4.0
1 x USB 3.0
1 x USB 2.0
1 x Micro SD card slot
1 x SPDIF
1 x AV
1 x DC IN
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi | 59 +++++
arch/arm/dts/rk3318-a95x-z2.dts | 384 ++++++++++++++++++++++++++++++++
3 files changed, 444 insertions(+)
create mode 100644 arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3318-a95x-z2.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9918e46633..3e1e2209b7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -107,6 +107,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
rk3308-roc-cc.dtb
dtb-$(CONFIG_ROCKCHIP_RK3328) += \
+ rk3318-a95x-z2.dtb \
rk3328-evb.dtb \
rk3328-nanopi-r2s.dtb \
rk3328-roc-cc.dtb \
diff --git a/arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi b/arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
new file mode 100644
index 0000000000..5010925e9a
--- /dev/null
+++ b/arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "rk3328-u-boot.dtsi"
+#include "rk3328-sdram-ddr3-666.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
+ };
+
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ manufacturer = "zkmagic";
+ product = "a95x-z2_rk3318";
+ };
+
+ baseboard {
+ manufacturer = "zkmagic";
+ product = "a95x-z2_rk3318";
+ };
+
+ chassis {
+ manufacturer = "zkmagic";
+ product = "a95x-z2_rk3318";
+ };
+ };
+ };
+};
+
+&gmac2phy {
+ status = "broken";
+};
+
+&gpio0 {
+ u-boot,dm-spl;
+};
+
+&pcfg_pull_up_4ma {
+ u-boot,dm-spl;
+};
+
+&pinctrl {
+ u-boot,dm-spl;
+};
+
+&sdmmc0m1_pin {
+ u-boot,dm-spl;
+};
+
+&usb20_otg {
+ dr_mode = "otg";
+};
+
+&vcc_sd {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/rk3318-a95x-z2.dts b/arch/arm/dts/rk3318-a95x-z2.dts
new file mode 100644
index 0000000000..d41f786b2f
--- /dev/null
+++ b/arch/arm/dts/rk3318-a95x-z2.dts
@@ -0,0 +1,384 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include "rk3328.dtsi"
+
+/ {
+ model = "A95X Z2";
+ compatible = "zkmagic,a95x-z2", "rockchip,rk3318";
+
+ aliases {
+ mmc0 = &sdmmc;
+ mmc1 = &sdio;
+ mmc2 = &emmc;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ recovery {
+ label = "recovery";
+ linux,code = <KEY_VENDOR>;
+ press-threshold-microvolt = <17000>;
+ };
+ };
+
+ ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&ir_int>;
+ pinctrl-names = "default";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&cyx_led_pin>;
+ pinctrl-names = "default";
+
+ cyx_led: led-0 {
+ default-state = "on";
+ gpios = <&gpio2 RK_PC7 GPIO_ACTIVE_LOW>;
+ label = "CYX_LED";
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-0 = <&wifi_enable_h>;
+ pinctrl-names = "default";
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+
+ spdif-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "SPDIF";
+
+ simple-audio-card,cpu {
+ sound-dai = <&spdif>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&spdif_out>;
+ };
+ };
+
+ spdif_out: spdif-out {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+ };
+
+ /* Power tree */
+ vccio_1v8: vccio-1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ vccio_3v3: vccio-3v3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ vcc_otg_vbus: otg-vbus-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&otg_vbus_drv>;
+ pinctrl-names = "default";
+ regulator-name = "vcc_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ };
+
+ vcc_sd: sdmmc-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&sdmmc0m1_pin>;
+ pinctrl-names = "default";
+ regulator-name = "vcc_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vccio_3v3>;
+ };
+
+ vdd_arm: vdd-arm {
+ compatible = "pwm-regulator";
+ pwms = <&pwm0 0 5000 1>;
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-settling-time-up-us = <250>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vdd_log: vdd-log {
+ compatible = "pwm-regulator";
+ pwms = <&pwm1 0 5000 1>;
+ regulator-name = "vdd_log";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-settling-time-up-us = <250>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+&analog_sound {
+ status = "okay";
+};
+
+&codec {
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu0_opp_table {
+ opp-1200000000 {
+ status = "disabled";
+ };
+
+ opp-1296000000 {
+ status = "disabled";
+ };
+};
+
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ non-removable;
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&gmac2phy {
+ assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>;
+ assigned-clock-rate = <50000000>;
+ assigned-clocks = <&cru SCLK_MAC2PHY>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_log>;
+};
+
+&hdmi {
+ ddc-i2c-scl-high-time-ns = <9625>;
+ ddc-i2c-scl-low-time-ns = <10000>;
+ status = "okay";
+};
+
+&hdmiphy {
+ status = "okay";
+};
+
+&hdmi_sound {
+ status = "okay";
+};
+
+&i2s0 {
+ status = "okay";
+};
+
+&i2s1 {
+ status = "okay";
+};
+
+&io_domains {
+ pmuio-supply = <&vccio_3v3>;
+ vccio1-supply = <&vccio_3v3>;
+ vccio2-supply = <&vccio_1v8>;
+ vccio3-supply = <&vccio_3v3>;
+ vccio4-supply = <&vccio_1v8>;
+ vccio5-supply = <&vccio_3v3>;
+ vccio6-supply = <&vccio_3v3>;
+ status = "okay";
+};
+
+&pinctrl {
+ ir {
+ ir_int: ir-int {
+ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ leds {
+ cyx_led_pin: cyx-led-pin {
+ rockchip,pins = <2 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pwm0 {
+ pwm0_pin_pull_up: pwm0-pin-pull-up {
+ rockchip,pins = <2 RK_PA4 1 &pcfg_pull_up>;
+ };
+ };
+
+ pwm1 {
+ pwm1_pin_pull_up: pwm1-pin-pull-up {
+ rockchip,pins = <2 RK_PA5 1 &pcfg_pull_up>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sdmmc1 {
+ clk_32k_out: clk-32k-out {
+ rockchip,pins = <1 RK_PD4 1 &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ host_vbus_drv: host-vbus-drv {
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ otg_vbus_drv: otg-vbus-drv {
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pwm0 {
+ pinctrl-0 = <&pwm0_pin_pull_up>;
+ pinctrl-names = "active";
+ status = "okay";
+};
+
+&pwm1 {
+ pinctrl-0 = <&pwm1_pin_pull_up>;
+ pinctrl-names = "active";
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vccio_1v8>;
+ status = "okay";
+};
+
+&sdio {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ max-frequency = <125000000>;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk &clk_32k_out>;
+ pinctrl-names = "default";
+ sd-uhs-sdr104;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
+ pinctrl-names = "default";
+ vmmc-supply = <&vcc_sd>;
+ status = "okay";
+};
+
+&spdif {
+ pinctrl-0 = <&spdifm0_tx>;
+ status = "okay";
+};
+
+&soc_crit {
+ temperature = <115000>; /* millicelsius */
+};
+
+&target {
+ temperature = <105000>; /* millicelsius */
+};
+
+&threshold {
+ temperature = <90000>; /* millicelsius */
+};
+
+&tsadc {
+ rockchip,hw-tshut-temp = <120000>;
+ status = "okay";
+};
+
+&u2phy {
+ status = "okay";
+};
+
+&u2phy_host {
+ status = "okay";
+};
+
+&u2phy_otg {
+ phy-supply = <&vcc_otg_vbus>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-0 = <&uart0_xfer &uart0_cts>;
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb20_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbdrd3 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&vop {
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 24+ messages in thread* [RESEND RFC PATCH v1 6/6] arm: dts: rockchip: add rk3318 A95X Z2 board
2021-06-30 16:22 ` Johan Jonker
(?)
@ 2021-07-09 11:17 ` Johan Jonker
-1 siblings, 0 replies; 24+ messages in thread
From: Johan Jonker @ 2021-07-09 11:17 UTC (permalink / raw)
To: kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot
The rk3318 A95X Z2 boards are sold as TV box.
No further documentation is given, but from the dts files
extracted it seems that the rk3318 processor is simulair
to the rk3328. This dts file contains only the basic nodes
that have support in the mainline kernel. Included extra
dtsi file for U-boot specific properties.
Features:
CPU: RK3318 Quad-Core Cortex-A53
GPU: Mali-450
RAM: 2/4GB DDR3
ROM: EMMC 16/32/64GB
HDMI: HDMI 2.0a for 4k@60Hz
Ethernet: 10/100M standard RJ-45
WiFi: 2.4G+5G WIFI, 802.11 b/g/n
Bluetooth: 4.0
1 x USB 3.0
1 x USB 2.0
1 x Micro SD card slot
1 x SPDIF
1 x AV
1 x DC IN
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
Changed V2:
remove ddc-i2c-scl-*
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi | 59 +++++
arch/arm/dts/rk3318-a95x-z2.dts | 382 ++++++++++++++++++++++++++++++++
3 files changed, 442 insertions(+)
create mode 100644 arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3318-a95x-z2.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9918e46633..3e1e2209b7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -107,6 +107,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
rk3308-roc-cc.dtb
dtb-$(CONFIG_ROCKCHIP_RK3328) += \
+ rk3318-a95x-z2.dtb \
rk3328-evb.dtb \
rk3328-nanopi-r2s.dtb \
rk3328-roc-cc.dtb \
diff --git a/arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi b/arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
new file mode 100644
index 0000000000..5010925e9a
--- /dev/null
+++ b/arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "rk3328-u-boot.dtsi"
+#include "rk3328-sdram-ddr3-666.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
+ };
+
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ manufacturer = "zkmagic";
+ product = "a95x-z2_rk3318";
+ };
+
+ baseboard {
+ manufacturer = "zkmagic";
+ product = "a95x-z2_rk3318";
+ };
+
+ chassis {
+ manufacturer = "zkmagic";
+ product = "a95x-z2_rk3318";
+ };
+ };
+ };
+};
+
+&gmac2phy {
+ status = "broken";
+};
+
+&gpio0 {
+ u-boot,dm-spl;
+};
+
+&pcfg_pull_up_4ma {
+ u-boot,dm-spl;
+};
+
+&pinctrl {
+ u-boot,dm-spl;
+};
+
+&sdmmc0m1_pin {
+ u-boot,dm-spl;
+};
+
+&usb20_otg {
+ dr_mode = "otg";
+};
+
+&vcc_sd {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/rk3318-a95x-z2.dts b/arch/arm/dts/rk3318-a95x-z2.dts
new file mode 100644
index 0000000000..43c928ac98
--- /dev/null
+++ b/arch/arm/dts/rk3318-a95x-z2.dts
@@ -0,0 +1,382 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include "rk3328.dtsi"
+
+/ {
+ model = "A95X Z2";
+ compatible = "zkmagic,a95x-z2", "rockchip,rk3318";
+
+ aliases {
+ mmc0 = &sdmmc;
+ mmc1 = &sdio;
+ mmc2 = &emmc;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ recovery {
+ label = "recovery";
+ linux,code = <KEY_VENDOR>;
+ press-threshold-microvolt = <17000>;
+ };
+ };
+
+ ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&ir_int>;
+ pinctrl-names = "default";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&cyx_led_pin>;
+ pinctrl-names = "default";
+
+ cyx_led: led-0 {
+ default-state = "on";
+ gpios = <&gpio2 RK_PC7 GPIO_ACTIVE_LOW>;
+ label = "CYX_LED";
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-0 = <&wifi_enable_h>;
+ pinctrl-names = "default";
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+
+ spdif-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "SPDIF";
+
+ simple-audio-card,cpu {
+ sound-dai = <&spdif>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&spdif_out>;
+ };
+ };
+
+ spdif_out: spdif-out {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+ };
+
+ /* Power tree */
+ vccio_1v8: vccio-1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ vccio_3v3: vccio-3v3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ vcc_otg_vbus: otg-vbus-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&otg_vbus_drv>;
+ pinctrl-names = "default";
+ regulator-name = "vcc_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ };
+
+ vcc_sd: sdmmc-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&sdmmc0m1_pin>;
+ pinctrl-names = "default";
+ regulator-name = "vcc_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vccio_3v3>;
+ };
+
+ vdd_arm: vdd-arm {
+ compatible = "pwm-regulator";
+ pwms = <&pwm0 0 5000 1>;
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-settling-time-up-us = <250>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vdd_log: vdd-log {
+ compatible = "pwm-regulator";
+ pwms = <&pwm1 0 5000 1>;
+ regulator-name = "vdd_log";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-settling-time-up-us = <250>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+&analog_sound {
+ status = "okay";
+};
+
+&codec {
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu0_opp_table {
+ opp-1200000000 {
+ status = "disabled";
+ };
+
+ opp-1296000000 {
+ status = "disabled";
+ };
+};
+
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ non-removable;
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&gmac2phy {
+ assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>;
+ assigned-clock-rate = <50000000>;
+ assigned-clocks = <&cru SCLK_MAC2PHY>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_log>;
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmiphy {
+ status = "okay";
+};
+
+&hdmi_sound {
+ status = "okay";
+};
+
+&i2s0 {
+ status = "okay";
+};
+
+&i2s1 {
+ status = "okay";
+};
+
+&io_domains {
+ pmuio-supply = <&vccio_3v3>;
+ vccio1-supply = <&vccio_3v3>;
+ vccio2-supply = <&vccio_1v8>;
+ vccio3-supply = <&vccio_3v3>;
+ vccio4-supply = <&vccio_1v8>;
+ vccio5-supply = <&vccio_3v3>;
+ vccio6-supply = <&vccio_3v3>;
+ status = "okay";
+};
+
+&pinctrl {
+ ir {
+ ir_int: ir-int {
+ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ leds {
+ cyx_led_pin: cyx-led-pin {
+ rockchip,pins = <2 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pwm0 {
+ pwm0_pin_pull_up: pwm0-pin-pull-up {
+ rockchip,pins = <2 RK_PA4 1 &pcfg_pull_up>;
+ };
+ };
+
+ pwm1 {
+ pwm1_pin_pull_up: pwm1-pin-pull-up {
+ rockchip,pins = <2 RK_PA5 1 &pcfg_pull_up>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sdmmc1 {
+ clk_32k_out: clk-32k-out {
+ rockchip,pins = <1 RK_PD4 1 &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ host_vbus_drv: host-vbus-drv {
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ otg_vbus_drv: otg-vbus-drv {
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pwm0 {
+ pinctrl-0 = <&pwm0_pin_pull_up>;
+ pinctrl-names = "active";
+ status = "okay";
+};
+
+&pwm1 {
+ pinctrl-0 = <&pwm1_pin_pull_up>;
+ pinctrl-names = "active";
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vccio_1v8>;
+ status = "okay";
+};
+
+&sdio {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ max-frequency = <125000000>;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk &clk_32k_out>;
+ pinctrl-names = "default";
+ sd-uhs-sdr104;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
+ pinctrl-names = "default";
+ vmmc-supply = <&vcc_sd>;
+ status = "okay";
+};
+
+&spdif {
+ pinctrl-0 = <&spdifm0_tx>;
+ status = "okay";
+};
+
+&soc_crit {
+ temperature = <115000>; /* millicelsius */
+};
+
+&target {
+ temperature = <105000>; /* millicelsius */
+};
+
+&threshold {
+ temperature = <90000>; /* millicelsius */
+};
+
+&tsadc {
+ rockchip,hw-tshut-temp = <120000>;
+ status = "okay";
+};
+
+&u2phy {
+ status = "okay";
+};
+
+&u2phy_host {
+ status = "okay";
+};
+
+&u2phy_otg {
+ phy-supply = <&vcc_otg_vbus>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-0 = <&uart0_xfer &uart0_cts>;
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb20_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbdrd3 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&vop {
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [RFC PATCH v1 0/6] add rk3318 A95X Z2 board
2021-06-30 16:22 ` Johan Jonker
@ 2021-07-01 11:46 ` Alex Bee
-1 siblings, 0 replies; 24+ messages in thread
From: Alex Bee @ 2021-07-01 11:46 UTC (permalink / raw)
To: Johan Jonker, kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
Hi Johan,
Am 30.06.21 um 18:22 schrieb Johan Jonker:
> With a new board from a recent Linux DT the U-boot rk3328.dtsi
> is in need for an update.
>
> Please advise what to do with usb3 regulators, aliases and
> other stuff that has to change.
>
> Also some of the U-boot board files could use some
> dtbs_check for bogus properties and restyling... ;)
While at bogus properties:
The ddc-i2c-scl-* properties you are defining in the hdmi node of
rk3318-a95x-z2.dts look like an leftover from vendor kernel: they do not
exist for the upstream dw-hdmi driver in neither u-boot nor kernel.
(Not sure this would pop up with dtbs_check currently)
Alex.
>
> rk3328 USB2 and USB3 only roughly tested.
>
> ===
>
> Howto use:
>
> Compile bl31.elf:
>
> git clone --depth 1 https://github.com/ARM-software/arm-trusted-firmware.git
> cd arm-trusted-firmware
> make realclean
> make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3328
>
> export BL31=/<path-to>/arm-trusted-firmware/build/rk3328/release/bl31/bl31.elf
> cd ..
>
> Compile U-boot:
>
> git clone --depth 1 https://github.com/u-boot/u-boot.git uboot
> cd uboot
> make CROSS_COMPILE=aarch64-linux-gnu- a95x-z2-rk3318_defconfig all
>
> ===
>
> Use U-boot to create a GPT on a SD card,
> because of partition GUID and sizes.
>
> mmc dev 0
> mmc info
> gpt write mmc 0 $partitions
> mmc part
>
> ===
>
> Write to SD card:
>
> export DISK=/dev/mmcblk0
> sudo dd if=./idbloader.img of=${DISK} seek=64
> sudo dd if=./u-boot.itb of=${DISK} seek=16384
> sync
>
> ===
>
> Format boot partition with fat16.
> Add /Image and /rk3318-a95x-z2.dtb
> Add extlinux dir with extlinux.conf
>
> label kernel
> kernel /Image
> fdt /rk3318-a95x-z2.dtb
> append root=/dev/mmcblk0p5 rw console=tty0 console=ttyS2,1500000n8 earlycon=uart8250,mmio32,0xff130000,keep $
>
> ===
>
> Use fastboot:
>
> Hit any key to stop autoboot:
> usb start
> usb dev 1
> fastboot usb 1
> =
> sudo fastboot devices -l
> sudo fastboot erase loader1
> sudo fastboot erase loader2
> sudo fastboot flash loader1 idbloader.img
> sudo fastboot flash loader2 u-boot.itb
> =
> ctrl-c
> reset
>
> ===
>
> Johan Jonker (6):
> arm: dts: rockchip: update rk3328.dtsi
> arm: dts: rockchip: remove usb_host0_xhci node from rk3328-u-boot.dtsi
> arm: dts: rockchip: move mmc aliases to board files
> arm: dts: rockchip: move spi0 u-boot,dm-pre-reloc and alias to rk3328
> board files
> rockchip: rk3318: add a95x-z2-rk3318_defconfig file
> arm: dts: rockchip: add rk3318 A95X Z2 board
>
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi | 59 +++++
> arch/arm/dts/rk3318-a95x-z2.dts | 384 +++++++++++++++++++++++++++++
> arch/arm/dts/rk3328-evb-u-boot.dtsi | 2 +-
> arch/arm/dts/rk3328-evb.dts | 8 +-
> arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 2 +-
> arch/arm/dts/rk3328-nanopi-r2s.dts | 6 +-
> arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 4 +-
> arch/arm/dts/rk3328-roc-cc.dts | 7 +-
> arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 4 +-
> arch/arm/dts/rk3328-rock-pi-e.dts | 7 +-
> arch/arm/dts/rk3328-rock64-u-boot.dtsi | 10 +-
> arch/arm/dts/rk3328-rock64.dts | 7 +-
> arch/arm/dts/rk3328-u-boot.dtsi | 21 --
> arch/arm/dts/rk3328.dtsi | 109 ++++----
> board/rockchip/evb_rk3328/MAINTAINERS | 6 +
> configs/a95x-z2-rk3318_defconfig | 102 ++++++++
> doc/board/rockchip/rockchip.rst | 2 +
> 18 files changed, 661 insertions(+), 80 deletions(-)
> create mode 100644 arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
> create mode 100644 arch/arm/dts/rk3318-a95x-z2.dts
> create mode 100644 configs/a95x-z2-rk3318_defconfig
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [RFC PATCH v1 0/6] add rk3318 A95X Z2 board
@ 2021-07-01 11:46 ` Alex Bee
0 siblings, 0 replies; 24+ messages in thread
From: Alex Bee @ 2021-07-01 11:46 UTC (permalink / raw)
To: Johan Jonker, kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
Hi Johan,
Am 30.06.21 um 18:22 schrieb Johan Jonker:
> With a new board from a recent Linux DT the U-boot rk3328.dtsi
> is in need for an update.
>
> Please advise what to do with usb3 regulators, aliases and
> other stuff that has to change.
>
> Also some of the U-boot board files could use some
> dtbs_check for bogus properties and restyling... ;)
While at bogus properties:
The ddc-i2c-scl-* properties you are defining in the hdmi node of
rk3318-a95x-z2.dts look like an leftover from vendor kernel: they do not
exist for the upstream dw-hdmi driver in neither u-boot nor kernel.
(Not sure this would pop up with dtbs_check currently)
Alex.
>
> rk3328 USB2 and USB3 only roughly tested.
>
> ===
>
> Howto use:
>
> Compile bl31.elf:
>
> git clone --depth 1 https://github.com/ARM-software/arm-trusted-firmware.git
> cd arm-trusted-firmware
> make realclean
> make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3328
>
> export BL31=/<path-to>/arm-trusted-firmware/build/rk3328/release/bl31/bl31.elf
> cd ..
>
> Compile U-boot:
>
> git clone --depth 1 https://github.com/u-boot/u-boot.git uboot
> cd uboot
> make CROSS_COMPILE=aarch64-linux-gnu- a95x-z2-rk3318_defconfig all
>
> ===
>
> Use U-boot to create a GPT on a SD card,
> because of partition GUID and sizes.
>
> mmc dev 0
> mmc info
> gpt write mmc 0 $partitions
> mmc part
>
> ===
>
> Write to SD card:
>
> export DISK=/dev/mmcblk0
> sudo dd if=./idbloader.img of=${DISK} seek=64
> sudo dd if=./u-boot.itb of=${DISK} seek=16384
> sync
>
> ===
>
> Format boot partition with fat16.
> Add /Image and /rk3318-a95x-z2.dtb
> Add extlinux dir with extlinux.conf
>
> label kernel
> kernel /Image
> fdt /rk3318-a95x-z2.dtb
> append root=/dev/mmcblk0p5 rw console=tty0 console=ttyS2,1500000n8 earlycon=uart8250,mmio32,0xff130000,keep $
>
> ===
>
> Use fastboot:
>
> Hit any key to stop autoboot:
> usb start
> usb dev 1
> fastboot usb 1
> =
> sudo fastboot devices -l
> sudo fastboot erase loader1
> sudo fastboot erase loader2
> sudo fastboot flash loader1 idbloader.img
> sudo fastboot flash loader2 u-boot.itb
> =
> ctrl-c
> reset
>
> ===
>
> Johan Jonker (6):
> arm: dts: rockchip: update rk3328.dtsi
> arm: dts: rockchip: remove usb_host0_xhci node from rk3328-u-boot.dtsi
> arm: dts: rockchip: move mmc aliases to board files
> arm: dts: rockchip: move spi0 u-boot,dm-pre-reloc and alias to rk3328
> board files
> rockchip: rk3318: add a95x-z2-rk3318_defconfig file
> arm: dts: rockchip: add rk3318 A95X Z2 board
>
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi | 59 +++++
> arch/arm/dts/rk3318-a95x-z2.dts | 384 +++++++++++++++++++++++++++++
> arch/arm/dts/rk3328-evb-u-boot.dtsi | 2 +-
> arch/arm/dts/rk3328-evb.dts | 8 +-
> arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 2 +-
> arch/arm/dts/rk3328-nanopi-r2s.dts | 6 +-
> arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 4 +-
> arch/arm/dts/rk3328-roc-cc.dts | 7 +-
> arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 4 +-
> arch/arm/dts/rk3328-rock-pi-e.dts | 7 +-
> arch/arm/dts/rk3328-rock64-u-boot.dtsi | 10 +-
> arch/arm/dts/rk3328-rock64.dts | 7 +-
> arch/arm/dts/rk3328-u-boot.dtsi | 21 --
> arch/arm/dts/rk3328.dtsi | 109 ++++----
> board/rockchip/evb_rk3328/MAINTAINERS | 6 +
> configs/a95x-z2-rk3318_defconfig | 102 ++++++++
> doc/board/rockchip/rockchip.rst | 2 +
> 18 files changed, 661 insertions(+), 80 deletions(-)
> create mode 100644 arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
> create mode 100644 arch/arm/dts/rk3318-a95x-z2.dts
> create mode 100644 configs/a95x-z2-rk3318_defconfig
>
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [RFC PATCH v1 0/6] add rk3318 A95X Z2 board
2021-07-01 11:46 ` Alex Bee
@ 2021-07-01 12:47 ` Johan Jonker
-1 siblings, 0 replies; 24+ messages in thread
From: Johan Jonker @ 2021-07-01 12:47 UTC (permalink / raw)
To: Alex Bee, kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
Hi Alex,
Thanks for reporting!
With rockchip,dw-hdmi.yaml all kind notifications rk3328/rk3399 but not
for ddc-i2c-scl-*
Submitted by Laurent, but not reviewed/fixed nodes together with the
Rockchip mail group. Someone has to look at/fix it...
dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
https://patchwork.kernel.org/project/linux-renesas-soc/patch/20210114064437.5793-6-laurent.pinchart+renesas@ideasonboard.com/
Will change that for A95X-Z2. Waiting for some more comments... ;)
Johan
On 7/1/21 1:46 PM, Alex Bee wrote:
> Hi Johan,
>
> Am 30.06.21 um 18:22 schrieb Johan Jonker:
>> With a new board from a recent Linux DT the U-boot rk3328.dtsi
>> is in need for an update.
>>
>> Please advise what to do with usb3 regulators, aliases and
>> other stuff that has to change.
>>
>> Also some of the U-boot board files could use some
>> dtbs_check for bogus properties and restyling... ;)
>
> While at bogus properties:
> The ddc-i2c-scl-* properties you are defining in the hdmi node of
> rk3318-a95x-z2.dts look like an leftover from vendor kernel: they do not
> exist for the upstream dw-hdmi driver in neither u-boot nor kernel.
> (Not sure this would pop up with dtbs_check currently)
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dt.yaml: hdmi@ff3c0000:
interrupts: [[0, 35, 4], [0, 71, 4]] is too long
From schema:
/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dt.yaml: hdmi@ff3c0000:
pinctrl-names: ['default'] is too short
From schema:
/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dt.yaml: hdmi@ff3c0000:
ports:port: 'endpoint@0' is a required property
From schema:
/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dt.yaml: hdmi@ff3c0000:
ports:port: 'endpoint@1' is a required property
From schema:
/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
>
> Alex.
>>
>> rk3328 USB2 and USB3 only roughly tested.
>>
>> ===
>>
>> Howto use:
>>
>> Compile bl31.elf:
>>
>> git clone --depth 1
>> https://github.com/ARM-software/arm-trusted-firmware.git
>> cd arm-trusted-firmware
>> make realclean
>> make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3328
>>
>> export
>> BL31=/<path-to>/arm-trusted-firmware/build/rk3328/release/bl31/bl31.elf
>> cd ..
>>
>> Compile U-boot:
>>
>> git clone --depth 1 https://github.com/u-boot/u-boot.git uboot
>> cd uboot
>> make CROSS_COMPILE=aarch64-linux-gnu- a95x-z2-rk3318_defconfig all
>>
>> ===
>>
>> Use U-boot to create a GPT on a SD card,
>> because of partition GUID and sizes.
>>
>> mmc dev 0
>> mmc info
>> gpt write mmc 0 $partitions
>> mmc part
>>
>> ===
>>
>> Write to SD card:
>>
>> export DISK=/dev/mmcblk0
>> sudo dd if=./idbloader.img of=${DISK} seek=64
>> sudo dd if=./u-boot.itb of=${DISK} seek=16384
>> sync
>>
>> ===
>>
>> Format boot partition with fat16.
>> Add /Image and /rk3318-a95x-z2.dtb
>> Add extlinux dir with extlinux.conf
>>
>> label kernel
>> kernel /Image
>> fdt /rk3318-a95x-z2.dtb
>> append root=/dev/mmcblk0p5 rw console=tty0
>> console=ttyS2,1500000n8 earlycon=uart8250,mmio32,0xff130000,keep $
>>
>> ===
>>
>> Use fastboot:
>>
>> Hit any key to stop autoboot:
>> usb start
>> usb dev 1
>> fastboot usb 1
>> =
>> sudo fastboot devices -l
>> sudo fastboot erase loader1
>> sudo fastboot erase loader2
>> sudo fastboot flash loader1 idbloader.img
>> sudo fastboot flash loader2 u-boot.itb
>> =
>> ctrl-c
>> reset
>>
>> ===
>>
>> Johan Jonker (6):
>> arm: dts: rockchip: update rk3328.dtsi
>> arm: dts: rockchip: remove usb_host0_xhci node from rk3328-u-boot.dtsi
>> arm: dts: rockchip: move mmc aliases to board files
>> arm: dts: rockchip: move spi0 u-boot,dm-pre-reloc and alias to rk3328
>> board files
>> rockchip: rk3318: add a95x-z2-rk3318_defconfig file
>> arm: dts: rockchip: add rk3318 A95X Z2 board
>>
>> arch/arm/dts/Makefile | 1 +
>> arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi | 59 +++++
>> arch/arm/dts/rk3318-a95x-z2.dts | 384
>> +++++++++++++++++++++++++++++
>> arch/arm/dts/rk3328-evb-u-boot.dtsi | 2 +-
>> arch/arm/dts/rk3328-evb.dts | 8 +-
>> arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 2 +-
>> arch/arm/dts/rk3328-nanopi-r2s.dts | 6 +-
>> arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 4 +-
>> arch/arm/dts/rk3328-roc-cc.dts | 7 +-
>> arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 4 +-
>> arch/arm/dts/rk3328-rock-pi-e.dts | 7 +-
>> arch/arm/dts/rk3328-rock64-u-boot.dtsi | 10 +-
>> arch/arm/dts/rk3328-rock64.dts | 7 +-
>> arch/arm/dts/rk3328-u-boot.dtsi | 21 --
>> arch/arm/dts/rk3328.dtsi | 109 ++++----
>> board/rockchip/evb_rk3328/MAINTAINERS | 6 +
>> configs/a95x-z2-rk3318_defconfig | 102 ++++++++
>> doc/board/rockchip/rockchip.rst | 2 +
>> 18 files changed, 661 insertions(+), 80 deletions(-)
>> create mode 100644 arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
>> create mode 100644 arch/arm/dts/rk3318-a95x-z2.dts
>> create mode 100644 configs/a95x-z2-rk3318_defconfig
>>
>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [RFC PATCH v1 0/6] add rk3318 A95X Z2 board
@ 2021-07-01 12:47 ` Johan Jonker
0 siblings, 0 replies; 24+ messages in thread
From: Johan Jonker @ 2021-07-01 12:47 UTC (permalink / raw)
To: Alex Bee, kever.yang
Cc: sjg, philipp.tomsich, heiko, mail, ldevulder, wens,
banglang.huang, matwey.kornilov, u-boot, linux-rockchip
Hi Alex,
Thanks for reporting!
With rockchip,dw-hdmi.yaml all kind notifications rk3328/rk3399 but not
for ddc-i2c-scl-*
Submitted by Laurent, but not reviewed/fixed nodes together with the
Rockchip mail group. Someone has to look at/fix it...
dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
https://patchwork.kernel.org/project/linux-renesas-soc/patch/20210114064437.5793-6-laurent.pinchart+renesas@ideasonboard.com/
Will change that for A95X-Z2. Waiting for some more comments... ;)
Johan
On 7/1/21 1:46 PM, Alex Bee wrote:
> Hi Johan,
>
> Am 30.06.21 um 18:22 schrieb Johan Jonker:
>> With a new board from a recent Linux DT the U-boot rk3328.dtsi
>> is in need for an update.
>>
>> Please advise what to do with usb3 regulators, aliases and
>> other stuff that has to change.
>>
>> Also some of the U-boot board files could use some
>> dtbs_check for bogus properties and restyling... ;)
>
> While at bogus properties:
> The ddc-i2c-scl-* properties you are defining in the hdmi node of
> rk3318-a95x-z2.dts look like an leftover from vendor kernel: they do not
> exist for the upstream dw-hdmi driver in neither u-boot nor kernel.
> (Not sure this would pop up with dtbs_check currently)
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dt.yaml: hdmi@ff3c0000:
interrupts: [[0, 35, 4], [0, 71, 4]] is too long
From schema:
/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dt.yaml: hdmi@ff3c0000:
pinctrl-names: ['default'] is too short
From schema:
/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dt.yaml: hdmi@ff3c0000:
ports:port: 'endpoint@0' is a required property
From schema:
/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dt.yaml: hdmi@ff3c0000:
ports:port: 'endpoint@1' is a required property
From schema:
/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
>
> Alex.
>>
>> rk3328 USB2 and USB3 only roughly tested.
>>
>> ===
>>
>> Howto use:
>>
>> Compile bl31.elf:
>>
>> git clone --depth 1
>> https://github.com/ARM-software/arm-trusted-firmware.git
>> cd arm-trusted-firmware
>> make realclean
>> make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3328
>>
>> export
>> BL31=/<path-to>/arm-trusted-firmware/build/rk3328/release/bl31/bl31.elf
>> cd ..
>>
>> Compile U-boot:
>>
>> git clone --depth 1 https://github.com/u-boot/u-boot.git uboot
>> cd uboot
>> make CROSS_COMPILE=aarch64-linux-gnu- a95x-z2-rk3318_defconfig all
>>
>> ===
>>
>> Use U-boot to create a GPT on a SD card,
>> because of partition GUID and sizes.
>>
>> mmc dev 0
>> mmc info
>> gpt write mmc 0 $partitions
>> mmc part
>>
>> ===
>>
>> Write to SD card:
>>
>> export DISK=/dev/mmcblk0
>> sudo dd if=./idbloader.img of=${DISK} seek=64
>> sudo dd if=./u-boot.itb of=${DISK} seek=16384
>> sync
>>
>> ===
>>
>> Format boot partition with fat16.
>> Add /Image and /rk3318-a95x-z2.dtb
>> Add extlinux dir with extlinux.conf
>>
>> label kernel
>> kernel /Image
>> fdt /rk3318-a95x-z2.dtb
>> append root=/dev/mmcblk0p5 rw console=tty0
>> console=ttyS2,1500000n8 earlycon=uart8250,mmio32,0xff130000,keep $
>>
>> ===
>>
>> Use fastboot:
>>
>> Hit any key to stop autoboot:
>> usb start
>> usb dev 1
>> fastboot usb 1
>> =
>> sudo fastboot devices -l
>> sudo fastboot erase loader1
>> sudo fastboot erase loader2
>> sudo fastboot flash loader1 idbloader.img
>> sudo fastboot flash loader2 u-boot.itb
>> =
>> ctrl-c
>> reset
>>
>> ===
>>
>> Johan Jonker (6):
>> arm: dts: rockchip: update rk3328.dtsi
>> arm: dts: rockchip: remove usb_host0_xhci node from rk3328-u-boot.dtsi
>> arm: dts: rockchip: move mmc aliases to board files
>> arm: dts: rockchip: move spi0 u-boot,dm-pre-reloc and alias to rk3328
>> board files
>> rockchip: rk3318: add a95x-z2-rk3318_defconfig file
>> arm: dts: rockchip: add rk3318 A95X Z2 board
>>
>> arch/arm/dts/Makefile | 1 +
>> arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi | 59 +++++
>> arch/arm/dts/rk3318-a95x-z2.dts | 384
>> +++++++++++++++++++++++++++++
>> arch/arm/dts/rk3328-evb-u-boot.dtsi | 2 +-
>> arch/arm/dts/rk3328-evb.dts | 8 +-
>> arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 2 +-
>> arch/arm/dts/rk3328-nanopi-r2s.dts | 6 +-
>> arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 4 +-
>> arch/arm/dts/rk3328-roc-cc.dts | 7 +-
>> arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 4 +-
>> arch/arm/dts/rk3328-rock-pi-e.dts | 7 +-
>> arch/arm/dts/rk3328-rock64-u-boot.dtsi | 10 +-
>> arch/arm/dts/rk3328-rock64.dts | 7 +-
>> arch/arm/dts/rk3328-u-boot.dtsi | 21 --
>> arch/arm/dts/rk3328.dtsi | 109 ++++----
>> board/rockchip/evb_rk3328/MAINTAINERS | 6 +
>> configs/a95x-z2-rk3318_defconfig | 102 ++++++++
>> doc/board/rockchip/rockchip.rst | 2 +
>> 18 files changed, 661 insertions(+), 80 deletions(-)
>> create mode 100644 arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
>> create mode 100644 arch/arm/dts/rk3318-a95x-z2.dts
>> create mode 100644 configs/a95x-z2-rk3318_defconfig
>>
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [RFC PATCH v1 0/6] add rk3318 A95X Z2 board
2021-06-30 16:22 ` Johan Jonker
` (7 preceding siblings ...)
(?)
@ 2021-07-02 6:56 ` Matwey V. Kornilov
-1 siblings, 0 replies; 24+ messages in thread
From: Matwey V. Kornilov @ 2021-07-02 6:56 UTC (permalink / raw)
To: Johan Jonker
Cc: Kever Yang, Simon Glass, Philipp Tomsich, Heiko Stübner,
mail, Loic Devulder, Chen-Yu Tsai, banglang.huang,
U-Boot Mailing List, open list:ARM/Rockchip SoC support
Hi,
Generally, I like idea of keeping rk3328.dtsi in sync with the Linux kernel
source.
ср, 30 июн. 2021 г., 19:23 Johan Jonker <jbx6244@gmail.com>:
> With a new board from a recent Linux DT the U-boot rk3328.dtsi
> is in need for an update.
>
> Please advise what to do with usb3 regulators, aliases and
> other stuff that has to change.
>
> Also some of the U-boot board files could use some
> dtbs_check for bogus properties and restyling... ;)
>
> rk3328 USB2 and USB3 only roughly tested.
>
> ===
>
> Howto use:
>
> Compile bl31.elf:
>
> git clone --depth 1
> https://github.com/ARM-software/arm-trusted-firmware.git
> cd arm-trusted-firmware
> make realclean
> make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3328
>
> export
> BL31=/<path-to>/arm-trusted-firmware/build/rk3328/release/bl31/bl31.elf
> cd ..
>
> Compile U-boot:
>
> git clone --depth 1 https://github.com/u-boot/u-boot.git uboot
> cd uboot
> make CROSS_COMPILE=aarch64-linux-gnu- a95x-z2-rk3318_defconfig all
>
> ===
>
> Use U-boot to create a GPT on a SD card,
> because of partition GUID and sizes.
>
> mmc dev 0
> mmc info
> gpt write mmc 0 $partitions
> mmc part
>
> ===
>
> Write to SD card:
>
> export DISK=/dev/mmcblk0
> sudo dd if=./idbloader.img of=${DISK} seek=64
> sudo dd if=./u-boot.itb of=${DISK} seek=16384
> sync
>
> ===
>
> Format boot partition with fat16.
> Add /Image and /rk3318-a95x-z2.dtb
> Add extlinux dir with extlinux.conf
>
> label kernel
> kernel /Image
> fdt /rk3318-a95x-z2.dtb
> append root=/dev/mmcblk0p5 rw console=tty0 console=ttyS2,1500000n8
> earlycon=uart8250,mmio32,0xff130000,keep $
>
> ===
>
> Use fastboot:
>
> Hit any key to stop autoboot:
> usb start
> usb dev 1
> fastboot usb 1
> =
> sudo fastboot devices -l
> sudo fastboot erase loader1
> sudo fastboot erase loader2
> sudo fastboot flash loader1 idbloader.img
> sudo fastboot flash loader2 u-boot.itb
> =
> ctrl-c
> reset
>
> ===
>
> Johan Jonker (6):
> arm: dts: rockchip: update rk3328.dtsi
> arm: dts: rockchip: remove usb_host0_xhci node from rk3328-u-boot.dtsi
> arm: dts: rockchip: move mmc aliases to board files
> arm: dts: rockchip: move spi0 u-boot,dm-pre-reloc and alias to rk3328
> board files
> rockchip: rk3318: add a95x-z2-rk3318_defconfig file
> arm: dts: rockchip: add rk3318 A95X Z2 board
>
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi | 59 +++++
> arch/arm/dts/rk3318-a95x-z2.dts | 384
> +++++++++++++++++++++++++++++
> arch/arm/dts/rk3328-evb-u-boot.dtsi | 2 +-
> arch/arm/dts/rk3328-evb.dts | 8 +-
> arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 2 +-
> arch/arm/dts/rk3328-nanopi-r2s.dts | 6 +-
> arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 4 +-
> arch/arm/dts/rk3328-roc-cc.dts | 7 +-
> arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 4 +-
> arch/arm/dts/rk3328-rock-pi-e.dts | 7 +-
> arch/arm/dts/rk3328-rock64-u-boot.dtsi | 10 +-
> arch/arm/dts/rk3328-rock64.dts | 7 +-
> arch/arm/dts/rk3328-u-boot.dtsi | 21 --
> arch/arm/dts/rk3328.dtsi | 109 ++++----
> board/rockchip/evb_rk3328/MAINTAINERS | 6 +
> configs/a95x-z2-rk3318_defconfig | 102 ++++++++
> doc/board/rockchip/rockchip.rst | 2 +
> 18 files changed, 661 insertions(+), 80 deletions(-)
> create mode 100644 arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
> create mode 100644 arch/arm/dts/rk3318-a95x-z2.dts
> create mode 100644 configs/a95x-z2-rk3318_defconfig
>
> --
> 2.11.0
>
>
^ permalink raw reply [flat|nested] 24+ messages in thread