From: Matthew Brost <matthew.brost@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>
Subject: [PATCH 00/18] Series to merge a subset of GuC submission
Date: Wed, 21 Jul 2021 14:50:43 -0700 [thread overview]
Message-ID: <20210721215101.139794-1-matthew.brost@intel.com> (raw)
The first 18 patches [1] are basically ready to merge.
v2: Address NITs, add missing RBs, fix checkpatch warnings
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
[1] https://patchwork.freedesktop.org/series/91840/
Matthew Brost (18):
drm/i915/guc: Add new GuC interface defines and structures
drm/i915/guc: Remove GuC stage descriptor, add LRC descriptor
drm/i915/guc: Add LRC descriptor context lookup array
drm/i915/guc: Implement GuC submission tasklet
drm/i915/guc: Add bypass tasklet submission path to GuC
drm/i915/guc: Implement GuC context operations for new inteface
drm/i915/guc: Insert fence on context when deregistering
drm/i915/guc: Defer context unpin until scheduling is disabled
drm/i915/guc: Disable engine barriers with GuC during unpin
drm/i915/guc: Extend deregistration fence to schedule disable
drm/i915: Disable preempt busywait when using GuC scheduling
drm/i915/guc: Ensure request ordering via completion fences
drm/i915/guc: Disable semaphores when using GuC scheduling
drm/i915/guc: Ensure G2H response has space in buffer
drm/i915/guc: Update intel_gt_wait_for_idle to work with GuC
drm/i915/guc: Update GuC debugfs to support new GuC
drm/i915/guc: Add trace point for GuC submit
drm/i915: Add intel_context tracing
drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 +-
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 3 +-
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 6 +-
drivers/gpu/drm/i915/gt/intel_context.c | 18 +-
drivers/gpu/drm/i915/gt/intel_context.h | 27 +-
drivers/gpu/drm/i915/gt/intel_context_types.h | 32 +
drivers/gpu/drm/i915/gt/intel_gt.c | 19 +
drivers/gpu/drm/i915/gt/intel_gt.h | 2 +
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 21 +-
drivers/gpu/drm/i915/gt/intel_gt_requests.h | 9 +-
drivers/gpu/drm/i915/gt/intel_lrc_reg.h | 1 -
drivers/gpu/drm/i915/gt/selftest_context.c | 10 +
.../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 14 +
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 72 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 124 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 18 +-
.../gpu/drm/i915/gt/uc/intel_guc_debugfs.c | 23 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 89 +-
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 1290 ++++++++++++++---
.../gpu/drm/i915/gt/uc/intel_guc_submission.h | 5 +
drivers/gpu/drm/i915/gt/uc/intel_uc.h | 5 +
drivers/gpu/drm/i915/i915_gem_evict.c | 1 +
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/i915_request.c | 11 +-
drivers/gpu/drm/i915/i915_request.h | 8 +
drivers/gpu/drm/i915/i915_trace.h | 168 ++-
.../gpu/drm/i915/selftests/igt_live_test.c | 2 +-
.../gpu/drm/i915/selftests/mock_gem_device.c | 3 +-
28 files changed, 1707 insertions(+), 281 deletions(-)
--
2.28.0
WARNING: multiple messages have this Message-ID (diff)
From: Matthew Brost <matthew.brost@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>
Subject: [Intel-gfx] [PATCH 00/18] Series to merge a subset of GuC submission
Date: Wed, 21 Jul 2021 14:50:43 -0700 [thread overview]
Message-ID: <20210721215101.139794-1-matthew.brost@intel.com> (raw)
The first 18 patches [1] are basically ready to merge.
v2: Address NITs, add missing RBs, fix checkpatch warnings
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
[1] https://patchwork.freedesktop.org/series/91840/
Matthew Brost (18):
drm/i915/guc: Add new GuC interface defines and structures
drm/i915/guc: Remove GuC stage descriptor, add LRC descriptor
drm/i915/guc: Add LRC descriptor context lookup array
drm/i915/guc: Implement GuC submission tasklet
drm/i915/guc: Add bypass tasklet submission path to GuC
drm/i915/guc: Implement GuC context operations for new inteface
drm/i915/guc: Insert fence on context when deregistering
drm/i915/guc: Defer context unpin until scheduling is disabled
drm/i915/guc: Disable engine barriers with GuC during unpin
drm/i915/guc: Extend deregistration fence to schedule disable
drm/i915: Disable preempt busywait when using GuC scheduling
drm/i915/guc: Ensure request ordering via completion fences
drm/i915/guc: Disable semaphores when using GuC scheduling
drm/i915/guc: Ensure G2H response has space in buffer
drm/i915/guc: Update intel_gt_wait_for_idle to work with GuC
drm/i915/guc: Update GuC debugfs to support new GuC
drm/i915/guc: Add trace point for GuC submit
drm/i915: Add intel_context tracing
drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 +-
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 3 +-
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 6 +-
drivers/gpu/drm/i915/gt/intel_context.c | 18 +-
drivers/gpu/drm/i915/gt/intel_context.h | 27 +-
drivers/gpu/drm/i915/gt/intel_context_types.h | 32 +
drivers/gpu/drm/i915/gt/intel_gt.c | 19 +
drivers/gpu/drm/i915/gt/intel_gt.h | 2 +
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 21 +-
drivers/gpu/drm/i915/gt/intel_gt_requests.h | 9 +-
drivers/gpu/drm/i915/gt/intel_lrc_reg.h | 1 -
drivers/gpu/drm/i915/gt/selftest_context.c | 10 +
.../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 14 +
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 72 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 124 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 18 +-
.../gpu/drm/i915/gt/uc/intel_guc_debugfs.c | 23 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 89 +-
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 1290 ++++++++++++++---
.../gpu/drm/i915/gt/uc/intel_guc_submission.h | 5 +
drivers/gpu/drm/i915/gt/uc/intel_uc.h | 5 +
drivers/gpu/drm/i915/i915_gem_evict.c | 1 +
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/i915_request.c | 11 +-
drivers/gpu/drm/i915/i915_request.h | 8 +
drivers/gpu/drm/i915/i915_trace.h | 168 ++-
.../gpu/drm/i915/selftests/igt_live_test.c | 2 +-
.../gpu/drm/i915/selftests/mock_gem_device.c | 3 +-
28 files changed, 1707 insertions(+), 281 deletions(-)
--
2.28.0
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next reply other threads:[~2021-07-21 21:33 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-21 21:50 Matthew Brost [this message]
2021-07-21 21:50 ` [Intel-gfx] [PATCH 00/18] Series to merge a subset of GuC submission Matthew Brost
2021-07-21 21:50 ` [PATCH 01/18] drm/i915/guc: Add new GuC interface defines and structures Matthew Brost
2021-07-21 21:50 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:50 ` [PATCH 02/18] drm/i915/guc: Remove GuC stage descriptor, add LRC descriptor Matthew Brost
2021-07-21 21:50 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:50 ` [PATCH 03/18] drm/i915/guc: Add LRC descriptor context lookup array Matthew Brost
2021-07-21 21:50 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:50 ` [PATCH 04/18] drm/i915/guc: Implement GuC submission tasklet Matthew Brost
2021-07-21 21:50 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:50 ` [PATCH 05/18] drm/i915/guc: Add bypass tasklet submission path to GuC Matthew Brost
2021-07-21 21:50 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:50 ` [PATCH 06/18] drm/i915/guc: Implement GuC context operations for new inteface Matthew Brost
2021-07-21 21:50 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:50 ` [PATCH 07/18] drm/i915/guc: Insert fence on context when deregistering Matthew Brost
2021-07-21 21:50 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:50 ` [PATCH 08/18] drm/i915/guc: Defer context unpin until scheduling is disabled Matthew Brost
2021-07-21 21:50 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:50 ` [PATCH 09/18] drm/i915/guc: Disable engine barriers with GuC during unpin Matthew Brost
2021-07-21 21:50 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:50 ` [PATCH 10/18] drm/i915/guc: Extend deregistration fence to schedule disable Matthew Brost
2021-07-21 21:50 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:50 ` [PATCH 11/18] drm/i915: Disable preempt busywait when using GuC scheduling Matthew Brost
2021-07-21 21:50 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:50 ` [PATCH 12/18] drm/i915/guc: Ensure request ordering via completion fences Matthew Brost
2021-07-21 21:50 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:50 ` [PATCH 13/18] drm/i915/guc: Disable semaphores when using GuC scheduling Matthew Brost
2021-07-21 21:50 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:50 ` [PATCH 14/18] drm/i915/guc: Ensure G2H response has space in buffer Matthew Brost
2021-07-21 21:50 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:50 ` [PATCH 15/18] drm/i915/guc: Update intel_gt_wait_for_idle to work with GuC Matthew Brost
2021-07-21 21:50 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:50 ` [PATCH 16/18] drm/i915/guc: Update GuC debugfs to support new GuC Matthew Brost
2021-07-21 21:50 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:51 ` [PATCH 17/18] drm/i915/guc: Add trace point for GuC submit Matthew Brost
2021-07-21 21:51 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:51 ` [PATCH 18/18] drm/i915: Add intel_context tracing Matthew Brost
2021-07-21 21:51 ` [Intel-gfx] " Matthew Brost
2021-07-21 21:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Series to merge a subset of GuC submission (rev2) Patchwork
2021-07-21 21:56 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-07-21 22:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-22 4:15 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2021-07-20 22:39 [PATCH 00/18] Series to merge a subset of GuC submission Matthew Brost
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