[PATCH-for-6.1] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6

[PATCH-for-6.1] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6

[Philippe Mathieu-Daudé]

Per the "MIPS Architecture Extension: nanoMIPS32 DSP TRM" rev 0.04,
MULT and MULTU opcodes:

  The value of ac selects an accumulator numbered from 0 to 3.
  When ac=0, this refers to the original HI/LO register pair of the
  MIPS32 architecture.

  In Release 6 of the MIPS Architecture, accumulators are eliminated
  from MIPS32.

Ensure pre-Release 6 is restricted to HI/LO registers pair.

Fixes: 8b3698b2947 ("target/mips: Add emulation of DSP ASE for nanoMIPS - part 4")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/tcg/nanomips_translate.c.inc | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/target/mips/tcg/nanomips_translate.c.inc b/target/mips/tcg/nanomips_translate.c.inc
index 09e64a69480..1275e6a495e 100644
--- a/target/mips/tcg/nanomips_translate.c.inc
+++ b/target/mips/tcg/nanomips_translate.c.inc
@@ -1868,6 +1868,9 @@ static void gen_pool32axf_2_nanomips_insn(DisasContext *ctx, uint32_t opc,
                 TCGv_i32 t2 = tcg_temp_new_i32();
                 TCGv_i32 t3 = tcg_temp_new_i32();
 
+                if (acc || ctx->insn_flags & ISA_MIPS_R6) {
+                    check_dsp_r2(ctx);
+                }
                 gen_load_gpr(t0, rs);
                 gen_load_gpr(t1, rt);
                 tcg_gen_trunc_tl_i32(t2, t0);
@@ -1925,6 +1928,9 @@ static void gen_pool32axf_2_nanomips_insn(DisasContext *ctx, uint32_t opc,
                 TCGv_i32 t2 = tcg_temp_new_i32();
                 TCGv_i32 t3 = tcg_temp_new_i32();
 
+                if (acc || ctx->insn_flags & ISA_MIPS_R6) {
+                    check_dsp_r2(ctx);
+                }
                 gen_load_gpr(t0, rs);
                 gen_load_gpr(t1, rt);
                 tcg_gen_trunc_tl_i32(t2, t0);
-- 
2.31.1

Re: [PATCH-for-6.1] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6

[Richard Henderson]

On 7/26/21 10:30 PM, Philippe Mathieu-Daudé wrote:
> Per the "MIPS Architecture Extension: nanoMIPS32 DSP TRM" rev 0.04,
> MULT and MULTU opcodes:
> 
>    The value of ac selects an accumulator numbered from 0 to 3.
>    When ac=0, this refers to the original HI/LO register pair of the
>    MIPS32 architecture.
> 
>    In Release 6 of the MIPS Architecture, accumulators are eliminated
>    from MIPS32.
> 
> Ensure pre-Release 6 is restricted to HI/LO registers pair.
> 
> Fixes: 8b3698b2947 ("target/mips: Add emulation of DSP ASE for nanoMIPS - part 4")
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
>   target/mips/tcg/nanomips_translate.c.inc | 6 ++++++
>   1 file changed, 6 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

Re: [PATCH-for-6.1] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6

[Philippe Mathieu-Daudé]

On 7/27/21 18:38, Richard Henderson wrote:
> On 7/26/21 10:30 PM, Philippe Mathieu-Daudé wrote:
>> Per the "MIPS Architecture Extension: nanoMIPS32 DSP TRM" rev 0.04,
>> MULT and MULTU opcodes:
>>
>>    The value of ac selects an accumulator numbered from 0 to 3.
>>    When ac=0, this refers to the original HI/LO register pair of the
>>    MIPS32 architecture.
>>
>>    In Release 6 of the MIPS Architecture, accumulators are eliminated
>>    from MIPS32.
>>
>> Ensure pre-Release 6 is restricted to HI/LO registers pair.
>>
>> Fixes: 8b3698b2947 ("target/mips: Add emulation of DSP ASE for
>> nanoMIPS - part 4")
>> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
>> ---
>>   target/mips/tcg/nanomips_translate.c.inc | 6 ++++++
>>   1 file changed, 6 insertions(+)
> 
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Thanks, applied to mips-next.