* [PATCH] sunxi: Load sun8i secure monitor to SRAM A2
@ 2021-04-19 3:21 Samuel Holland
2021-07-10 23:51 ` Andre Przywara
2021-07-27 12:12 ` Andre Przywara
0 siblings, 2 replies; 4+ messages in thread
From: Samuel Holland @ 2021-04-19 3:21 UTC (permalink / raw)
To: u-boot
Most sun6i-derived SoCs contain SRAM A2, a secure SRAM area for ARISC
SCP firmware. H3 has a smaller SRAM than other SoCs (A31/A33/A23/A83T).
On sun8i SoCs which do not have SRAM B, we can use part of this SRAM for
the secure monitor. Follow the design of 64-bit SoCs and use the first
part for the monitor, and the last 16 KiB for the SCP firmware. With
this change, the monitor no longer needs to reserve a region in DRAM.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 11 +++++++++++
include/configs/sun8i.h | 7 +++++++
2 files changed, 18 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index 02ce73954d..d4c795d89c 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -11,7 +11,18 @@
#define SUNXI_SRAM_A1_BASE 0x00000000
#define SUNXI_SRAM_A1_SIZE (16 * 1024) /* 16 kiB */
+#if defined(CONFIG_SUNXI_GEN_SUN6I) && \
+ !defined(CONFIG_MACH_SUN8I_R40) && \
+ !defined(CONFIG_MACH_SUN8I_V3S)
+#define SUNXI_SRAM_A2_BASE 0x00040000
+#ifdef CONFIG_MACH_SUN8I_H3
+#define SUNXI_SRAM_A2_SIZE (48 * 1024) /* 16+32 kiB */
+#else
+#define SUNXI_SRAM_A2_SIZE (80 * 1024) /* 16+64 kiB */
+#endif
+#else
#define SUNXI_SRAM_A2_BASE 0x00004000 /* 16 kiB */
+#endif
#define SUNXI_SRAM_A3_BASE 0x00008000 /* 13 kiB */
#define SUNXI_SRAM_A4_BASE 0x0000b400 /* 3 kiB */
#define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */
diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h
index 9b4675e4c3..545d27996c 100644
--- a/include/configs/sun8i.h
+++ b/include/configs/sun8i.h
@@ -12,6 +12,13 @@
* A23 specific configuration
*/
+/*
+ * Skip the first 16 KiB of SRAM A2, which is not usable, as only certain bytes
+ * are writable. Reserve the last 17 KiB for the resume shim and SCP firmware.
+ */
+#define CONFIG_ARMV7_SECURE_BASE (SUNXI_SRAM_A2_BASE + 16 * 1024)
+#define CONFIG_ARMV7_SECURE_MAX_SIZE (SUNXI_SRAM_A2_SIZE - 33 * 1024)
+
/*
* Include common sunxi configuration where most the settings are
*/
--
2.26.3
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] sunxi: Load sun8i secure monitor to SRAM A2
2021-04-19 3:21 [PATCH] sunxi: Load sun8i secure monitor to SRAM A2 Samuel Holland
@ 2021-07-10 23:51 ` Andre Przywara
2021-07-27 12:12 ` Andre Przywara
1 sibling, 0 replies; 4+ messages in thread
From: Andre Przywara @ 2021-07-10 23:51 UTC (permalink / raw)
To: Samuel Holland; +Cc: Jagan Teki, Hans de Goede, u-boot
On Sun, 18 Apr 2021 22:21:41 -0500
Samuel Holland <samuel@sholland.org> wrote:
Hi Samuel,
> Most sun6i-derived SoCs contain SRAM A2, a secure SRAM area for ARISC
> SCP firmware. H3 has a smaller SRAM than other SoCs (A31/A33/A23/A83T).
>
> On sun8i SoCs which do not have SRAM B, we can use part of this SRAM for
> the secure monitor. Follow the design of 64-bit SoCs and use the first
> part for the monitor, and the last 16 KiB for the SCP firmware. With
> this change, the monitor no longer needs to reserve a region in DRAM.
So this commit message reads a bit more innocent than the patch is, can
you amend this? It took me a while to see what it really does ...
For a start, I'd suggest to rename the subject to "Move secure
monitor...".
And it's good to explain where we come from (SRAM B vs. SRAM A2), but I
would like to see an explicit list of SoCs that get changed, because
all those different sun8i.h, cpu_sun4i.h and CONFIG_SUN8I parts are
super confusing to the casual reader.
Maybe something along the lines of:
So far for the H3, A23, and A33 SoCs, we use DRAM to hold the secure
monitor. And while those SoCs do not have the secure SRAM B like older
SoCs, there is enough (secure) SRAM A2 to put the monitor code and data
in there instead ....
Regardless of that, the patch is nice, I always disliked reserving a
small piece of DRAM somewhere in the middle of it.
If I see this correctly, this just leaves the R40 using DRAM for the
secure monitor (with V3s and A83T not using PSCI)?
Cheers,
Andre
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 11 +++++++++++
> include/configs/sun8i.h | 7 +++++++
> 2 files changed, 18 insertions(+)
>
> diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
> index 02ce73954d..d4c795d89c 100644
> --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
> +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
> @@ -11,7 +11,18 @@
> #define SUNXI_SRAM_A1_BASE 0x00000000
> #define SUNXI_SRAM_A1_SIZE (16 * 1024) /* 16 kiB */
>
> +#if defined(CONFIG_SUNXI_GEN_SUN6I) && \
> + !defined(CONFIG_MACH_SUN8I_R40) && \
> + !defined(CONFIG_MACH_SUN8I_V3S)
> +#define SUNXI_SRAM_A2_BASE 0x00040000
> +#ifdef CONFIG_MACH_SUN8I_H3
> +#define SUNXI_SRAM_A2_SIZE (48 * 1024) /* 16+32 kiB */
> +#else
> +#define SUNXI_SRAM_A2_SIZE (80 * 1024) /* 16+64 kiB */
> +#endif
> +#else
> #define SUNXI_SRAM_A2_BASE 0x00004000 /* 16 kiB */
> +#endif
> #define SUNXI_SRAM_A3_BASE 0x00008000 /* 13 kiB */
> #define SUNXI_SRAM_A4_BASE 0x0000b400 /* 3 kiB */
> #define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */
> diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h
> index 9b4675e4c3..545d27996c 100644
> --- a/include/configs/sun8i.h
> +++ b/include/configs/sun8i.h
> @@ -12,6 +12,13 @@
> * A23 specific configuration
> */
>
> +/*
> + * Skip the first 16 KiB of SRAM A2, which is not usable, as only certain bytes
> + * are writable. Reserve the last 17 KiB for the resume shim and SCP firmware.
> + */
> +#define CONFIG_ARMV7_SECURE_BASE (SUNXI_SRAM_A2_BASE + 16 * 1024)
> +#define CONFIG_ARMV7_SECURE_MAX_SIZE (SUNXI_SRAM_A2_SIZE - 33 * 1024)
> +
> /*
> * Include common sunxi configuration where most the settings are
> */
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] sunxi: Load sun8i secure monitor to SRAM A2
2021-04-19 3:21 [PATCH] sunxi: Load sun8i secure monitor to SRAM A2 Samuel Holland
2021-07-10 23:51 ` Andre Przywara
@ 2021-07-27 12:12 ` Andre Przywara
2021-07-27 12:34 ` Samuel Holland
1 sibling, 1 reply; 4+ messages in thread
From: Andre Przywara @ 2021-07-27 12:12 UTC (permalink / raw)
To: Samuel Holland; +Cc: Jagan Teki, Hans de Goede, u-boot
On Sun, 18 Apr 2021 22:21:41 -0500
Samuel Holland <samuel@sholland.org> wrote:
Hi,
> Most sun6i-derived SoCs contain SRAM A2, a secure SRAM area for ARISC
> SCP firmware. H3 has a smaller SRAM than other SoCs (A31/A33/A23/A83T).
>
> On sun8i SoCs which do not have SRAM B, we can use part of this SRAM for
> the secure monitor. Follow the design of 64-bit SoCs and use the first
> part for the monitor, and the last 16 KiB for the SCP firmware. With
> this change, the monitor no longer needs to reserve a region in DRAM.
I was about to merge this, but this breaks the build of R40 and V3s boards:
arm: + Bananapi_M2_Ultra
+u-boot.lds:51: undefined symbol `SUNXI_SRAM_A2_SIZE' referenced in expression
+make[1]: *** [u-boot] Error 1
+make: *** [sub-make] Error 2
...
I fixed it by protecting the parts in sun8i.h with #ifdef
SUNXI_SRAM_A2_SIZE, please yell if you disagree:
https://source.denx.de/u-boot/custodians/u-boot-sunxi/-/commit/488397ea3801a27f6cba38bbf09a7ac7c6747c3f
Otherwise I will send a PR soonish.
Cheers,
Andre
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 11 +++++++++++
> include/configs/sun8i.h | 7 +++++++
> 2 files changed, 18 insertions(+)
>
> diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
> index 02ce73954d..d4c795d89c 100644
> --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
> +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
> @@ -11,7 +11,18 @@
> #define SUNXI_SRAM_A1_BASE 0x00000000
> #define SUNXI_SRAM_A1_SIZE (16 * 1024) /* 16 kiB */
>
> +#if defined(CONFIG_SUNXI_GEN_SUN6I) && \
> + !defined(CONFIG_MACH_SUN8I_R40) && \
> + !defined(CONFIG_MACH_SUN8I_V3S)
> +#define SUNXI_SRAM_A2_BASE 0x00040000
> +#ifdef CONFIG_MACH_SUN8I_H3
> +#define SUNXI_SRAM_A2_SIZE (48 * 1024) /* 16+32 kiB */
> +#else
> +#define SUNXI_SRAM_A2_SIZE (80 * 1024) /* 16+64 kiB */
> +#endif
> +#else
> #define SUNXI_SRAM_A2_BASE 0x00004000 /* 16 kiB */
> +#endif
> #define SUNXI_SRAM_A3_BASE 0x00008000 /* 13 kiB */
> #define SUNXI_SRAM_A4_BASE 0x0000b400 /* 3 kiB */
> #define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */
> diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h
> index 9b4675e4c3..545d27996c 100644
> --- a/include/configs/sun8i.h
> +++ b/include/configs/sun8i.h
> @@ -12,6 +12,13 @@
> * A23 specific configuration
> */
>
> +/*
> + * Skip the first 16 KiB of SRAM A2, which is not usable, as only certain bytes
> + * are writable. Reserve the last 17 KiB for the resume shim and SCP firmware.
> + */
> +#define CONFIG_ARMV7_SECURE_BASE (SUNXI_SRAM_A2_BASE + 16 * 1024)
> +#define CONFIG_ARMV7_SECURE_MAX_SIZE (SUNXI_SRAM_A2_SIZE - 33 * 1024)
> +
> /*
> * Include common sunxi configuration where most the settings are
> */
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] sunxi: Load sun8i secure monitor to SRAM A2
2021-07-27 12:12 ` Andre Przywara
@ 2021-07-27 12:34 ` Samuel Holland
0 siblings, 0 replies; 4+ messages in thread
From: Samuel Holland @ 2021-07-27 12:34 UTC (permalink / raw)
To: Andre Przywara; +Cc: Jagan Teki, Hans de Goede, u-boot
Andre,
On 7/27/21 7:12 AM, Andre Przywara wrote:
> On Sun, 18 Apr 2021 22:21:41 -0500
> Samuel Holland <samuel@sholland.org> wrote:
>
> Hi,
>
>> Most sun6i-derived SoCs contain SRAM A2, a secure SRAM area for ARISC
>> SCP firmware. H3 has a smaller SRAM than other SoCs (A31/A33/A23/A83T).
>>
>> On sun8i SoCs which do not have SRAM B, we can use part of this SRAM for
>> the secure monitor. Follow the design of 64-bit SoCs and use the first
>> part for the monitor, and the last 16 KiB for the SCP firmware. With
>> this change, the monitor no longer needs to reserve a region in DRAM.
>
> I was about to merge this, but this breaks the build of R40 and V3s boards:
> arm: + Bananapi_M2_Ultra
> +u-boot.lds:51: undefined symbol `SUNXI_SRAM_A2_SIZE' referenced in expression
> +make[1]: *** [u-boot] Error 1
> +make: *** [sub-make] Error 2
> ...
>
> I fixed it by protecting the parts in sun8i.h with #ifdef
> SUNXI_SRAM_A2_SIZE, please yell if you disagree:
> https://source.denx.de/u-boot/custodians/u-boot-sunxi/-/commit/488397ea3801a27f6cba38bbf09a7ac7c6747c3f
This looks fine. Thanks for taking care of it.
Cheers,
Samuel
> Otherwise I will send a PR soonish.
>
> Cheers,
> Andre
>
>
>> Signed-off-by: Samuel Holland <samuel@sholland.org>
>> ---
>> arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 11 +++++++++++
>> include/configs/sun8i.h | 7 +++++++
>> 2 files changed, 18 insertions(+)
>>
>> diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
>> index 02ce73954d..d4c795d89c 100644
>> --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
>> +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
>> @@ -11,7 +11,18 @@
>> #define SUNXI_SRAM_A1_BASE 0x00000000
>> #define SUNXI_SRAM_A1_SIZE (16 * 1024) /* 16 kiB */
>>
>> +#if defined(CONFIG_SUNXI_GEN_SUN6I) && \
>> + !defined(CONFIG_MACH_SUN8I_R40) && \
>> + !defined(CONFIG_MACH_SUN8I_V3S)
>> +#define SUNXI_SRAM_A2_BASE 0x00040000
>> +#ifdef CONFIG_MACH_SUN8I_H3
>> +#define SUNXI_SRAM_A2_SIZE (48 * 1024) /* 16+32 kiB */
>> +#else
>> +#define SUNXI_SRAM_A2_SIZE (80 * 1024) /* 16+64 kiB */
>> +#endif
>> +#else
>> #define SUNXI_SRAM_A2_BASE 0x00004000 /* 16 kiB */
>> +#endif
>> #define SUNXI_SRAM_A3_BASE 0x00008000 /* 13 kiB */
>> #define SUNXI_SRAM_A4_BASE 0x0000b400 /* 3 kiB */
>> #define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */
>> diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h
>> index 9b4675e4c3..545d27996c 100644
>> --- a/include/configs/sun8i.h
>> +++ b/include/configs/sun8i.h
>> @@ -12,6 +12,13 @@
>> * A23 specific configuration
>> */
>>
>> +/*
>> + * Skip the first 16 KiB of SRAM A2, which is not usable, as only certain bytes
>> + * are writable. Reserve the last 17 KiB for the resume shim and SCP firmware.
>> + */
>> +#define CONFIG_ARMV7_SECURE_BASE (SUNXI_SRAM_A2_BASE + 16 * 1024)
>> +#define CONFIG_ARMV7_SECURE_MAX_SIZE (SUNXI_SRAM_A2_SIZE - 33 * 1024)
>> +
>> /*
>> * Include common sunxi configuration where most the settings are
>> */
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-07-27 12:34 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2021-04-19 3:21 [PATCH] sunxi: Load sun8i secure monitor to SRAM A2 Samuel Holland
2021-07-10 23:51 ` Andre Przywara
2021-07-27 12:12 ` Andre Przywara
2021-07-27 12:34 ` Samuel Holland
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