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* [PATCH] drm/amdgpu: adjust fence driver enable sequence
@ 2021-07-28  4:07 Likun Gao
  2021-07-28  5:56 ` Zhang, Hawking
  2021-08-01 11:56 ` Mike Lothian
  0 siblings, 2 replies; 4+ messages in thread
From: Likun Gao @ 2021-07-28  4:07 UTC (permalink / raw)
  To: amd-gfx; +Cc: Likun Gao, Hawking Zhang

From: Likun Gao <Likun.Gao@amd.com>

Fence driver was enabled per ring when sw init on per IP block before.
Change to enable all the fence driver at the same time after
amdgpu_device_ip_init finished.
Rename some function related to fence to make it reasonable for read.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  6 ++++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c  | 15 ++++++---------
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h   |  4 ++--
 3 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index d3a4299b1f30..77195a4e5c59 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3675,6 +3675,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
 		goto release_ras_con;
 	}
 
+	amdgpu_fence_driver_hw_init(adev);
+
 	dev_info(adev->dev,
 		"SE %d, SH per SE %d, CU per SH %d, active_cu_number %d\n",
 			adev->gfx.config.max_shader_engines,
@@ -3939,7 +3941,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
 	/* evict vram memory */
 	amdgpu_bo_evict_vram(adev);
 
-	amdgpu_fence_driver_suspend(adev);
+	amdgpu_fence_driver_hw_fini(adev);
 
 	amdgpu_device_ip_suspend_phase2(adev);
 	/* evict remaining vram memory
@@ -3984,7 +3986,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon)
 		dev_err(adev->dev, "amdgpu_device_ip_resume failed (%d).\n", r);
 		return r;
 	}
-	amdgpu_fence_driver_resume(adev);
+	amdgpu_fence_driver_hw_init(adev);
 
 
 	r = amdgpu_device_ip_late_init(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index 72d9b92b1754..e2f606bca779 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -417,9 +417,6 @@ int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
 	}
 	amdgpu_fence_write(ring, atomic_read(&ring->fence_drv.last_seq));
 
-	if (irq_src)
-		amdgpu_irq_get(adev, irq_src, irq_type);
-
 	ring->fence_drv.irq_src = irq_src;
 	ring->fence_drv.irq_type = irq_type;
 	ring->fence_drv.initialized = true;
@@ -572,14 +569,14 @@ void amdgpu_fence_driver_fini_sw(struct amdgpu_device *adev)
 }
 
 /**
- * amdgpu_fence_driver_suspend - suspend the fence driver
+ * amdgpu_fence_driver_hw_fini - disable the fence driver
  * for all possible rings.
  *
  * @adev: amdgpu device pointer
  *
- * Suspend the fence driver for all possible rings (all asics).
+ * Disable the fence driver for all possible rings (all asics).
  */
-void amdgpu_fence_driver_suspend(struct amdgpu_device *adev)
+void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev)
 {
 	int i, r;
 
@@ -603,18 +600,18 @@ void amdgpu_fence_driver_suspend(struct amdgpu_device *adev)
 }
 
 /**
- * amdgpu_fence_driver_resume - resume the fence driver
+ * amdgpu_fence_driver_hw_init - enable the fence driver
  * for all possible rings.
  *
  * @adev: amdgpu device pointer
  *
- * Resume the fence driver for all possible rings (all asics).
+ * Enable the fence driver for all possible rings (all asics).
  * Not all asics have all rings, so each asic will only
  * start the fence driver on the rings it has using
  * amdgpu_fence_driver_start_ring().
  * Returns 0 for success.
  */
-void amdgpu_fence_driver_resume(struct amdgpu_device *adev)
+void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev)
 {
 	int i;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index e7d3d0dbdd96..64471018f5e6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -117,8 +117,8 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
 int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
 				   struct amdgpu_irq_src *irq_src,
 				   unsigned irq_type);
-void amdgpu_fence_driver_suspend(struct amdgpu_device *adev);
-void amdgpu_fence_driver_resume(struct amdgpu_device *adev);
+void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev);
+void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev);
 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence,
 		      unsigned flags);
 int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s,
-- 
2.25.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread
* RE: [PATCH] drm/amdgpu: adjust fence driver enable sequence
  2021-07-28  4:07 [PATCH] drm/amdgpu: adjust fence driver enable sequence Likun Gao
@ 2021-07-28  5:56 ` Zhang, Hawking
  2021-08-01 11:56 ` Mike Lothian
  1 sibling, 0 replies; 4+ messages in thread
From: Zhang, Hawking @ 2021-07-28  5:56 UTC (permalink / raw)
  To: Gao, Likun, amd-gfx

[AMD Official Use Only]

Per discussion, please reuse existing amdgpu_fence_driver_fini_hw/fini_sw by changing their name to hw_fini/sw_fini as the patch you worked out in topic branch.

With that addressed, the patch is

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>

Regards,
Hawking
-----Original Message-----
From: Gao, Likun <Likun.Gao@amd.com> 
Sent: Wednesday, July 28, 2021 12:08
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking <Hawking.Zhang@amd.com>; Gao, Likun <Likun.Gao@amd.com>
Subject: [PATCH] drm/amdgpu: adjust fence driver enable sequence

From: Likun Gao <Likun.Gao@amd.com>

Fence driver was enabled per ring when sw init on per IP block before.
Change to enable all the fence driver at the same time after amdgpu_device_ip_init finished.
Rename some function related to fence to make it reasonable for read.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  6 ++++--  drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c  | 15 ++++++---------
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h   |  4 ++--
 3 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index d3a4299b1f30..77195a4e5c59 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3675,6 +3675,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
 		goto release_ras_con;
 	}
 
+	amdgpu_fence_driver_hw_init(adev);
+
 	dev_info(adev->dev,
 		"SE %d, SH per SE %d, CU per SH %d, active_cu_number %d\n",
 			adev->gfx.config.max_shader_engines,
@@ -3939,7 +3941,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
 	/* evict vram memory */
 	amdgpu_bo_evict_vram(adev);
 
-	amdgpu_fence_driver_suspend(adev);
+	amdgpu_fence_driver_hw_fini(adev);
 
 	amdgpu_device_ip_suspend_phase2(adev);
 	/* evict remaining vram memory
@@ -3984,7 +3986,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon)
 		dev_err(adev->dev, "amdgpu_device_ip_resume failed (%d).\n", r);
 		return r;
 	}
-	amdgpu_fence_driver_resume(adev);
+	amdgpu_fence_driver_hw_init(adev);
 
 
 	r = amdgpu_device_ip_late_init(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index 72d9b92b1754..e2f606bca779 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -417,9 +417,6 @@ int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
 	}
 	amdgpu_fence_write(ring, atomic_read(&ring->fence_drv.last_seq));
 
-	if (irq_src)
-		amdgpu_irq_get(adev, irq_src, irq_type);
-
 	ring->fence_drv.irq_src = irq_src;
 	ring->fence_drv.irq_type = irq_type;
 	ring->fence_drv.initialized = true;
@@ -572,14 +569,14 @@ void amdgpu_fence_driver_fini_sw(struct amdgpu_device *adev)  }
 
 /**
- * amdgpu_fence_driver_suspend - suspend the fence driver
+ * amdgpu_fence_driver_hw_fini - disable the fence driver
  * for all possible rings.
  *
  * @adev: amdgpu device pointer
  *
- * Suspend the fence driver for all possible rings (all asics).
+ * Disable the fence driver for all possible rings (all asics).
  */
-void amdgpu_fence_driver_suspend(struct amdgpu_device *adev)
+void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev)
 {
 	int i, r;
 
@@ -603,18 +600,18 @@ void amdgpu_fence_driver_suspend(struct amdgpu_device *adev)  }
 
 /**
- * amdgpu_fence_driver_resume - resume the fence driver
+ * amdgpu_fence_driver_hw_init - enable the fence driver
  * for all possible rings.
  *
  * @adev: amdgpu device pointer
  *
- * Resume the fence driver for all possible rings (all asics).
+ * Enable the fence driver for all possible rings (all asics).
  * Not all asics have all rings, so each asic will only
  * start the fence driver on the rings it has using
  * amdgpu_fence_driver_start_ring().
  * Returns 0 for success.
  */
-void amdgpu_fence_driver_resume(struct amdgpu_device *adev)
+void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev)
 {
 	int i;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index e7d3d0dbdd96..64471018f5e6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -117,8 +117,8 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,  int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
 				   struct amdgpu_irq_src *irq_src,
 				   unsigned irq_type);
-void amdgpu_fence_driver_suspend(struct amdgpu_device *adev); -void amdgpu_fence_driver_resume(struct amdgpu_device *adev);
+void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev); void 
+amdgpu_fence_driver_hw_init(struct amdgpu_device *adev);
 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence,
 		      unsigned flags);
 int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s,
--
2.25.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread
* Re: [PATCH] drm/amdgpu: adjust fence driver enable sequence
  2021-07-28  4:07 [PATCH] drm/amdgpu: adjust fence driver enable sequence Likun Gao
  2021-07-28  5:56 ` Zhang, Hawking
@ 2021-08-01 11:56 ` Mike Lothian
  2021-08-02  3:54   ` Chen, Guchun
  1 sibling, 1 reply; 4+ messages in thread
From: Mike Lothian @ 2021-08-01 11:56 UTC (permalink / raw)
  To: Likun Gao; +Cc: amd-gfx list, Hawking Zhang

[-- Attachment #1: Type: text/plain, Size: 5268 bytes --]

Hi

This patch is causing me issues on my Skylake/Tonga PRIME laptop, reverting
sorts it

More details here: https://gitlab.freedesktop.org/drm/amd/-/issues/1668

Cheers

Mike

On Wed, 28 Jul 2021 at 05:07, Likun Gao <likun.gao@amd.com> wrote:

> From: Likun Gao <Likun.Gao@amd.com>
>
> Fence driver was enabled per ring when sw init on per IP block before.
> Change to enable all the fence driver at the same time after
> amdgpu_device_ip_init finished.
> Rename some function related to fence to make it reasonable for read.
>
> Signed-off-by: Likun Gao <Likun.Gao@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  6 ++++--
>  drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c  | 15 ++++++---------
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h   |  4 ++--
>  3 files changed, 12 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index d3a4299b1f30..77195a4e5c59 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -3675,6 +3675,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
>                 goto release_ras_con;
>         }
>
> +       amdgpu_fence_driver_hw_init(adev);
> +
>         dev_info(adev->dev,
>                 "SE %d, SH per SE %d, CU per SH %d, active_cu_number %d\n",
>                         adev->gfx.config.max_shader_engines,
> @@ -3939,7 +3941,7 @@ int amdgpu_device_suspend(struct drm_device *dev,
> bool fbcon)
>         /* evict vram memory */
>         amdgpu_bo_evict_vram(adev);
>
> -       amdgpu_fence_driver_suspend(adev);
> +       amdgpu_fence_driver_hw_fini(adev);
>
>         amdgpu_device_ip_suspend_phase2(adev);
>         /* evict remaining vram memory
> @@ -3984,7 +3986,7 @@ int amdgpu_device_resume(struct drm_device *dev,
> bool fbcon)
>                 dev_err(adev->dev, "amdgpu_device_ip_resume failed
> (%d).\n", r);
>                 return r;
>         }
> -       amdgpu_fence_driver_resume(adev);
> +       amdgpu_fence_driver_hw_init(adev);
>
>
>         r = amdgpu_device_ip_late_init(adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
> index 72d9b92b1754..e2f606bca779 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
> @@ -417,9 +417,6 @@ int amdgpu_fence_driver_start_ring(struct amdgpu_ring
> *ring,
>         }
>         amdgpu_fence_write(ring, atomic_read(&ring->fence_drv.last_seq));
>
> -       if (irq_src)
> -               amdgpu_irq_get(adev, irq_src, irq_type);
> -
>         ring->fence_drv.irq_src = irq_src;
>         ring->fence_drv.irq_type = irq_type;
>         ring->fence_drv.initialized = true;
> @@ -572,14 +569,14 @@ void amdgpu_fence_driver_fini_sw(struct
> amdgpu_device *adev)
>  }
>
>  /**
> - * amdgpu_fence_driver_suspend - suspend the fence driver
> + * amdgpu_fence_driver_hw_fini - disable the fence driver
>   * for all possible rings.
>   *
>   * @adev: amdgpu device pointer
>   *
> - * Suspend the fence driver for all possible rings (all asics).
> + * Disable the fence driver for all possible rings (all asics).
>   */
> -void amdgpu_fence_driver_suspend(struct amdgpu_device *adev)
> +void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev)
>  {
>         int i, r;
>
> @@ -603,18 +600,18 @@ void amdgpu_fence_driver_suspend(struct
> amdgpu_device *adev)
>  }
>
>  /**
> - * amdgpu_fence_driver_resume - resume the fence driver
> + * amdgpu_fence_driver_hw_init - enable the fence driver
>   * for all possible rings.
>   *
>   * @adev: amdgpu device pointer
>   *
> - * Resume the fence driver for all possible rings (all asics).
> + * Enable the fence driver for all possible rings (all asics).
>   * Not all asics have all rings, so each asic will only
>   * start the fence driver on the rings it has using
>   * amdgpu_fence_driver_start_ring().
>   * Returns 0 for success.
>   */
> -void amdgpu_fence_driver_resume(struct amdgpu_device *adev)
> +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev)
>  {
>         int i;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> index e7d3d0dbdd96..64471018f5e6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> @@ -117,8 +117,8 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring
> *ring,
>  int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
>                                    struct amdgpu_irq_src *irq_src,
>                                    unsigned irq_type);
> -void amdgpu_fence_driver_suspend(struct amdgpu_device *adev);
> -void amdgpu_fence_driver_resume(struct amdgpu_device *adev);
> +void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev);
> +void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev);
>  int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence,
>                       unsigned flags);
>  int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s,
> --
> 2.25.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>

[-- Attachment #2: Type: text/html, Size: 6619 bytes --]

^ permalink raw reply	[flat|nested] 4+ messages in thread
* RE: [PATCH] drm/amdgpu: adjust fence driver enable sequence
  2021-08-01 11:56 ` Mike Lothian
@ 2021-08-02  3:54   ` Chen, Guchun
  0 siblings, 0 replies; 4+ messages in thread
From: Chen, Guchun @ 2021-08-02  3:54 UTC (permalink / raw)
  To: Mike Lothian, Gao, Likun; +Cc: amd-gfx list, Zhang, Hawking

[-- Attachment #1: Type: text/plain, Size: 6581 bytes --]

[Public]

Hi Lothian,

Thanks for your report. I have a following fix for this problem, will send it out soon for review.

Regards,
Guchun

From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Mike Lothian
Sent: Sunday, August 1, 2021 7:57 PM
To: Gao, Likun <Likun.Gao@amd.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Zhang, Hawking <Hawking.Zhang@amd.com>
Subject: Re: [PATCH] drm/amdgpu: adjust fence driver enable sequence

Hi

This patch is causing me issues on my Skylake/Tonga PRIME laptop, reverting sorts it

More details here: https://gitlab.freedesktop.org/drm/amd/-/issues/1668<https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1668&data=04%7C01%7Cguchun.chen%40amd.com%7C858e6bd7d2da4e442f0308d954e380e8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637634159140610948%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=aDq%2F%2Fiyqn32JZXJ%2Fet9HGZWIen%2FeRhBBd%2FXJ4Wgv5Ds%3D&reserved=0>

Cheers

Mike

On Wed, 28 Jul 2021 at 05:07, Likun Gao <likun.gao@amd.com<mailto:likun.gao@amd.com>> wrote:
From: Likun Gao <Likun.Gao@amd.com<mailto:Likun.Gao@amd.com>>

Fence driver was enabled per ring when sw init on per IP block before.
Change to enable all the fence driver at the same time after
amdgpu_device_ip_init finished.
Rename some function related to fence to make it reasonable for read.

Signed-off-by: Likun Gao <Likun.Gao@amd.com<mailto:Likun.Gao@amd.com>>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  6 ++++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c  | 15 ++++++---------
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h   |  4 ++--
 3 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index d3a4299b1f30..77195a4e5c59 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3675,6 +3675,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
                goto release_ras_con;
        }

+       amdgpu_fence_driver_hw_init(adev);
+
        dev_info(adev->dev,
                "SE %d, SH per SE %d, CU per SH %d, active_cu_number %d\n",
                        adev->gfx.config.max_shader_engines,
@@ -3939,7 +3941,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
        /* evict vram memory */
        amdgpu_bo_evict_vram(adev);

-       amdgpu_fence_driver_suspend(adev);
+       amdgpu_fence_driver_hw_fini(adev);

        amdgpu_device_ip_suspend_phase2(adev);
        /* evict remaining vram memory
@@ -3984,7 +3986,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon)
                dev_err(adev->dev, "amdgpu_device_ip_resume failed (%d).\n", r);
                return r;
        }
-       amdgpu_fence_driver_resume(adev);
+       amdgpu_fence_driver_hw_init(adev);


        r = amdgpu_device_ip_late_init(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index 72d9b92b1754..e2f606bca779 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -417,9 +417,6 @@ int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
        }
        amdgpu_fence_write(ring, atomic_read(&ring->fence_drv.last_seq));

-       if (irq_src)
-               amdgpu_irq_get(adev, irq_src, irq_type);
-
        ring->fence_drv.irq_src = irq_src;
        ring->fence_drv.irq_type = irq_type;
        ring->fence_drv.initialized = true;
@@ -572,14 +569,14 @@ void amdgpu_fence_driver_fini_sw(struct amdgpu_device *adev)
 }

 /**
- * amdgpu_fence_driver_suspend - suspend the fence driver
+ * amdgpu_fence_driver_hw_fini - disable the fence driver
  * for all possible rings.
  *
  * @adev: amdgpu device pointer
  *
- * Suspend the fence driver for all possible rings (all asics).
+ * Disable the fence driver for all possible rings (all asics).
  */
-void amdgpu_fence_driver_suspend(struct amdgpu_device *adev)
+void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev)
 {
        int i, r;

@@ -603,18 +600,18 @@ void amdgpu_fence_driver_suspend(struct amdgpu_device *adev)
 }

 /**
- * amdgpu_fence_driver_resume - resume the fence driver
+ * amdgpu_fence_driver_hw_init - enable the fence driver
  * for all possible rings.
  *
  * @adev: amdgpu device pointer
  *
- * Resume the fence driver for all possible rings (all asics).
+ * Enable the fence driver for all possible rings (all asics).
  * Not all asics have all rings, so each asic will only
  * start the fence driver on the rings it has using
  * amdgpu_fence_driver_start_ring().
  * Returns 0 for success.
  */
-void amdgpu_fence_driver_resume(struct amdgpu_device *adev)
+void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev)
 {
        int i;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index e7d3d0dbdd96..64471018f5e6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -117,8 +117,8 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
 int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
                                   struct amdgpu_irq_src *irq_src,
                                   unsigned irq_type);
-void amdgpu_fence_driver_suspend(struct amdgpu_device *adev);
-void amdgpu_fence_driver_resume(struct amdgpu_device *adev);
+void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev);
+void amdgpu_fence_driver_hw_init(struct amdgpu_device *adev);
 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence,
                      unsigned flags);
 int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s,
--
2.25.1

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^ permalink raw reply related	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-08-02  3:55 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-07-28  4:07 [PATCH] drm/amdgpu: adjust fence driver enable sequence Likun Gao
2021-07-28  5:56 ` Zhang, Hawking
2021-08-01 11:56 ` Mike Lothian
2021-08-02  3:54   ` Chen, Guchun

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