* [PATCH] ARM: Fix Keystone 2 kernel mapping regression
@ 2021-08-04 13:57 Linus Walleij
2021-08-04 14:10 ` Russell King (Oracle)
2021-08-04 16:40 ` Nishanth Menon
0 siblings, 2 replies; 4+ messages in thread
From: Linus Walleij @ 2021-08-04 13:57 UTC (permalink / raw)
To: Russell King; +Cc: linux-arm-kernel, Linus Walleij, Nishanth Menon
This fixes a Keystone 2 regression discovered as a side effect of
defining an passing the physical start/end sections of the kernel
to the MMU remapping code.
As the Keystone applies an offset to all physical addresses,
including those identified and patches by phys2virt, we fail to
account for this offset in the kernel_sec_start and kernel_sec_end
variables.
Further these offsets can extend into the 64bit range on LPAE
systems such as the Keystone 2.
Fix it like this:
- Extend kernel_sec_start and kernel_sec_end to be 64bit
- Add the offset also to kernel_sec_start and kernel_sec_end
As passing kernel_sec_start and kernel_sec_end as 64bit invariably
incurs endianness issues I have attempted to dry-code around
these. Please review.
Tested on the Vexpress QEMU model both with and without LPAE
enabled.
Fixes: 6e121df14ccd ("ARM: 9090/1: Map the lowmem and kernel separately")
Reported-by: Nishanth Menon <nmenon@kernel.org>
Suggested-by: Russell King <linux@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
Nishanth: Please test!
Other smart folks: please have a look at my endianness compensation
assembly.
---
arch/arm/include/asm/memory.h | 7 ++++---
arch/arm/kernel/head.S | 19 ++++++++++++++++---
arch/arm/mm/mmu.c | 9 ++++++++-
arch/arm/mm/pv-fixup-asm.S | 2 +-
4 files changed, 29 insertions(+), 8 deletions(-)
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index cfc9dfd70aad..f673e13e0f94 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -160,10 +160,11 @@ extern unsigned long vectors_base;
/*
* Physical start and end address of the kernel sections. These addresses are
- * 2MB-aligned to match the section mappings placed over the kernel.
+ * 2MB-aligned to match the section mappings placed over the kernel. We use
+ * u64 so that LPAE mappings beyond the 32bit limit will work out as well.
*/
-extern u32 kernel_sec_start;
-extern u32 kernel_sec_end;
+extern u64 kernel_sec_start;
+extern u64 kernel_sec_end;
/*
* Physical vs virtual RAM address space conversion. These are
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 9eb0b4dbcc12..49f5e04cf7e0 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -49,7 +49,8 @@
/*
* This needs to be assigned at runtime when the linker symbols are
- * resolved.
+ * resolved. These are unsigned 64bit really, but in this assembly code
+ * We store them as 32bit.
*/
.pushsection .data
.align 2
@@ -57,7 +58,9 @@
.globl kernel_sec_end
kernel_sec_start:
.long 0
+ .long 0
kernel_sec_end:
+ .long 0
.long 0
.popsection
@@ -250,7 +253,12 @@ __create_page_tables:
add r0, r4, #KERNEL_OFFSET >> (SECTION_SHIFT - PMD_ORDER)
ldr r6, =(_end - 1)
adr_l r5, kernel_sec_start @ _pa(kernel_sec_start)
- str r8, [r5] @ Save physical start of kernel
+#ifdef CONFIG_CPU_ENDIAN_BE8
+ add r5, r5, #4 @ Move to the upper 32bit word
+ str r8, [r5] @ Save physical start of kernel (BE)
+#else
+ str r8, [r5] @ Save physical start of kernel (LE)
+#endif
orr r3, r8, r7 @ Add the MMU flags
add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER)
1: str r3, [r0], #1 << PMD_ORDER
@@ -259,7 +267,12 @@ __create_page_tables:
bls 1b
eor r3, r3, r7 @ Remove the MMU flags
adr_l r5, kernel_sec_end @ _pa(kernel_sec_end)
- str r3, [r5] @ Save physical end of kernel
+#ifdef CONFIG_CPU_ENDIAN_BE8
+ add r5, r5, #4 @ Move to the upper 32bit word
+ str r8, [r5] @ Save physical end of kernel (BE)
+#else
+ str r3, [r5] @ Save physical end of kernel (LE)
+#endif
#ifdef CONFIG_XIP_KERNEL
/*
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 7583bda5ea7d..a4e006005107 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -1608,6 +1608,13 @@ static void __init early_paging_init(const struct machine_desc *mdesc)
if (offset == 0)
return;
+ /*
+ * Offset the kernel section physical offsets so that the kernel
+ * mapping will work out later on.
+ */
+ kernel_sec_start += offset;
+ kernel_sec_end += offset;
+
/*
* Get the address of the remap function in the 1:1 identity
* mapping setup by the early page table assembly code. We
@@ -1716,7 +1723,7 @@ void __init paging_init(const struct machine_desc *mdesc)
{
void *zero_page;
- pr_debug("physical kernel sections: 0x%08x-0x%08x\n",
+ pr_debug("physical kernel sections: 0x%08llx-0x%08llx\n",
kernel_sec_start, kernel_sec_end);
prepare_page_table();
diff --git a/arch/arm/mm/pv-fixup-asm.S b/arch/arm/mm/pv-fixup-asm.S
index 5c5e1952000a..f8e11f7c7880 100644
--- a/arch/arm/mm/pv-fixup-asm.S
+++ b/arch/arm/mm/pv-fixup-asm.S
@@ -29,7 +29,7 @@ ENTRY(lpae_pgtables_remap_asm)
ldr r6, =(_end - 1)
add r7, r2, #0x1000
add r6, r7, r6, lsr #SECTION_SHIFT - L2_ORDER
- add r7, r7, #PAGE_OFFSET >> (SECTION_SHIFT - L2_ORDER)
+ add r7, r7, #KERNEL_OFFSET >> (SECTION_SHIFT - L2_ORDER)
1: ldrd r4, r5, [r7]
adds r4, r4, r0
adc r5, r5, r1
--
2.31.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] ARM: Fix Keystone 2 kernel mapping regression
2021-08-04 13:57 [PATCH] ARM: Fix Keystone 2 kernel mapping regression Linus Walleij
@ 2021-08-04 14:10 ` Russell King (Oracle)
2021-08-04 16:23 ` Grygorii Strashko
2021-08-04 16:40 ` Nishanth Menon
1 sibling, 1 reply; 4+ messages in thread
From: Russell King (Oracle) @ 2021-08-04 14:10 UTC (permalink / raw)
To: Linus Walleij; +Cc: linux-arm-kernel, Nishanth Menon
Hi Linus,
Looks fine. An improvement:
On Wed, Aug 04, 2021 at 03:57:47PM +0200, Linus Walleij wrote:
> @@ -250,7 +253,12 @@ __create_page_tables:
> add r0, r4, #KERNEL_OFFSET >> (SECTION_SHIFT - PMD_ORDER)
> ldr r6, =(_end - 1)
> adr_l r5, kernel_sec_start @ _pa(kernel_sec_start)
> - str r8, [r5] @ Save physical start of kernel
> +#ifdef CONFIG_CPU_ENDIAN_BE8
> + add r5, r5, #4 @ Move to the upper 32bit word
> + str r8, [r5] @ Save physical start of kernel (BE)
These two instructions can simply be replaced with:
str r8, [r5, #4]
> +#else
> + str r8, [r5] @ Save physical start of kernel (LE)
> +#endif
> orr r3, r8, r7 @ Add the MMU flags
> add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER)
> 1: str r3, [r0], #1 << PMD_ORDER
> @@ -259,7 +267,12 @@ __create_page_tables:
> bls 1b
> eor r3, r3, r7 @ Remove the MMU flags
> adr_l r5, kernel_sec_end @ _pa(kernel_sec_end)
> - str r3, [r5] @ Save physical end of kernel
> +#ifdef CONFIG_CPU_ENDIAN_BE8
> + add r5, r5, #4 @ Move to the upper 32bit word
> + str r8, [r5] @ Save physical end of kernel (BE)
Same here.
The patch can still usefully be tested by Nishanth without these
changes... it'll tell us if this was indeed the issue.
Thanks!
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] ARM: Fix Keystone 2 kernel mapping regression
2021-08-04 14:10 ` Russell King (Oracle)
@ 2021-08-04 16:23 ` Grygorii Strashko
0 siblings, 0 replies; 4+ messages in thread
From: Grygorii Strashko @ 2021-08-04 16:23 UTC (permalink / raw)
To: Russell King (Oracle), Linus Walleij; +Cc: linux-arm-kernel, Nishanth Menon
On 04/08/2021 17:10, Russell King (Oracle) wrote:
> Hi Linus,
>
> Looks fine. An improvement:
>
> On Wed, Aug 04, 2021 at 03:57:47PM +0200, Linus Walleij wrote:
>> @@ -250,7 +253,12 @@ __create_page_tables:
>> add r0, r4, #KERNEL_OFFSET >> (SECTION_SHIFT - PMD_ORDER)
>> ldr r6, =(_end - 1)
>> adr_l r5, kernel_sec_start @ _pa(kernel_sec_start)
>> - str r8, [r5] @ Save physical start of kernel
>> +#ifdef CONFIG_CPU_ENDIAN_BE8
>> + add r5, r5, #4 @ Move to the upper 32bit word
>> + str r8, [r5] @ Save physical start of kernel (BE)
>
> These two instructions can simply be replaced with:
>
> str r8, [r5, #4]
>
>> +#else
>> + str r8, [r5] @ Save physical start of kernel (LE)
>> +#endif
>> orr r3, r8, r7 @ Add the MMU flags
>> add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER)
>> 1: str r3, [r0], #1 << PMD_ORDER
>> @@ -259,7 +267,12 @@ __create_page_tables:
>> bls 1b
>> eor r3, r3, r7 @ Remove the MMU flags
>> adr_l r5, kernel_sec_end @ _pa(kernel_sec_end)
>> - str r3, [r5] @ Save physical end of kernel
>> +#ifdef CONFIG_CPU_ENDIAN_BE8
>> + add r5, r5, #4 @ Move to the upper 32bit word
>> + str r8, [r5] @ Save physical end of kernel (BE)
>
> Same here.
>
> The patch can still usefully be tested by Nishanth without these
> changes... it'll tell us if this was indeed the issue.
>
> Thanks!
>
with
903101cbc1f6 (HEAD -> next-master) ARM: Fix Keystone 2 kernel mapping regression
c3f7b3be172b (tag: next-20210803, linux-next/master) Add linux-next specific files for 20210803
eaf554c397cd Merge branch 'akpm/master'
can boot to console.
https://pastebin.ubuntu.com/p/fPJPQWxwkT/
--
Best regards,
grygorii
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] ARM: Fix Keystone 2 kernel mapping regression
2021-08-04 13:57 [PATCH] ARM: Fix Keystone 2 kernel mapping regression Linus Walleij
2021-08-04 14:10 ` Russell King (Oracle)
@ 2021-08-04 16:40 ` Nishanth Menon
1 sibling, 0 replies; 4+ messages in thread
From: Nishanth Menon @ 2021-08-04 16:40 UTC (permalink / raw)
To: Linus Walleij; +Cc: Russell King, linux-arm-kernel, Nishanth Menon
On 15:57-20210804, Linus Walleij wrote:
> This fixes a Keystone 2 regression discovered as a side effect of
> defining an passing the physical start/end sections of the kernel
> to the MMU remapping code.
>
> As the Keystone applies an offset to all physical addresses,
> including those identified and patches by phys2virt, we fail to
> account for this offset in the kernel_sec_start and kernel_sec_end
> variables.
>
> Further these offsets can extend into the 64bit range on LPAE
> systems such as the Keystone 2.
>
> Fix it like this:
> - Extend kernel_sec_start and kernel_sec_end to be 64bit
> - Add the offset also to kernel_sec_start and kernel_sec_end
>
> As passing kernel_sec_start and kernel_sec_end as 64bit invariably
> incurs endianness issues I have attempted to dry-code around
> these. Please review.
>
> Tested on the Vexpress QEMU model both with and without LPAE
> enabled.
>
> Fixes: 6e121df14ccd ("ARM: 9090/1: Map the lowmem and kernel separately")
> Reported-by: Nishanth Menon <nmenon@kernel.org>
> Suggested-by: Russell King <linux@armlinux.org.uk>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> Signed-off-by: Nishanth Menon <nm@ti.com>
> Link: https://lore.kernel.org/r/20210804135747.737233-1-linus.walleij@linaro.org
> ---
> Nishanth: Please test!
> Other smart folks: please have a look at my endianness compensation
> assembly.
Russell, Linus - awesome. thanks for looking at the right problem.
test log (two k2 platforms from two generations):
Baseline(good): v5.13
k2g-evm: https://pastebin.ubuntu.com/p/xnGy9fM6mj/
k2hk-evm: https://pastebin.ubuntu.com/p/gpX6bPsF2R/
Check base(bad): v5.14-rc4
k2g-evm:
k2hk-evm: https://pastebin.ubuntu.com/p/ht7sTjyTD2/
k2g-evm: https://pastebin.ubuntu.com/p/skf8nsGqPZ/
Check patch: v5.14-rc4 + 20210804135747.737233-1-linus.walleij@linaro.org
k2hk-evm: https://pastebin.ubuntu.com/p/ycX7bmgcyT/
k2g-evm: https://pastebin.ubuntu.com/p/FgfZSwg7fY/
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
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2021-08-04 13:57 [PATCH] ARM: Fix Keystone 2 kernel mapping regression Linus Walleij
2021-08-04 14:10 ` Russell King (Oracle)
2021-08-04 16:23 ` Grygorii Strashko
2021-08-04 16:40 ` Nishanth Menon
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