From: Clark Wang <xiaoning.wang@nxp.com> To: miquel.raynal@bootlin.com, conor.culhane@silvaco.com, alexandre.belloni@bootlin.com Cc: linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com Subject: [PATCH V4 3/8] i3c: master: svc: separate err, fifo and disable interrupt of reset function Date: Mon, 9 Aug 2021 14:36:40 +0800 [thread overview] Message-ID: <20210809063645.2289988-4-xiaoning.wang@nxp.com> (raw) In-Reply-To: <20210809063645.2289988-1-xiaoning.wang@nxp.com> Sometimes only need to reset err and fifo regs, so split the origin reset function to three functions. Put them at the top of the file, to let more functions can call them. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Reviewed-by: Jun Li <jun.li@nxp.com> --- V4: New patch in this patchset --- drivers/i3c/master/svc-i3c-master.c | 59 +++++++++++++++++------------ 1 file changed, 34 insertions(+), 25 deletions(-) diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c index 47c02a60cf62..4e69c691253d 100644 --- a/drivers/i3c/master/svc-i3c-master.c +++ b/drivers/i3c/master/svc-i3c-master.c @@ -236,6 +236,40 @@ static void svc_i3c_master_disable_interrupts(struct svc_i3c_master *master) writel(mask, master->regs + SVC_I3C_MINTCLR); } +static void svc_i3c_master_clear_merrwarn(struct svc_i3c_master *master) +{ + /* Clear pending warnings */ + writel(readl(master->regs + SVC_I3C_MERRWARN), + master->regs + SVC_I3C_MERRWARN); +} + +static void svc_i3c_master_flush_fifo(struct svc_i3c_master *master) +{ + /* Flush FIFOs */ + writel(SVC_I3C_MDATACTRL_FLUSHTB | SVC_I3C_MDATACTRL_FLUSHRB, + master->regs + SVC_I3C_MDATACTRL); +} + +static void svc_i3c_master_reset_fifo_trigger(struct svc_i3c_master *master) +{ + u32 reg; + + /* Set RX and TX tigger levels, flush FIFOs */ + reg = SVC_I3C_MDATACTRL_FLUSHTB | + SVC_I3C_MDATACTRL_FLUSHRB | + SVC_I3C_MDATACTRL_UNLOCK_TRIG | + SVC_I3C_MDATACTRL_TXTRIG_FIFO_NOT_FULL | + SVC_I3C_MDATACTRL_RXTRIG_FIFO_NOT_EMPTY; + writel(reg, master->regs + SVC_I3C_MDATACTRL); +} + +static void svc_i3c_master_reset(struct svc_i3c_master *master) +{ + svc_i3c_master_clear_merrwarn(master); + svc_i3c_master_reset_fifo_trigger(master); + svc_i3c_master_disable_interrupts(master); +} + static inline struct svc_i3c_master * to_svc_i3c_master(struct i3c_master_controller *master) { @@ -279,12 +313,6 @@ static void svc_i3c_master_emit_stop(struct svc_i3c_master *master) udelay(1); } -static void svc_i3c_master_clear_merrwarn(struct svc_i3c_master *master) -{ - writel(readl(master->regs + SVC_I3C_MERRWARN), - master->regs + SVC_I3C_MERRWARN); -} - static int svc_i3c_master_handle_ibi(struct svc_i3c_master *master, struct i3c_dev_desc *dev) { @@ -1334,25 +1362,6 @@ static const struct i3c_master_controller_ops svc_i3c_master_ops = { .disable_ibi = svc_i3c_master_disable_ibi, }; -static void svc_i3c_master_reset(struct svc_i3c_master *master) -{ - u32 reg; - - /* Clear pending warnings */ - writel(readl(master->regs + SVC_I3C_MERRWARN), - master->regs + SVC_I3C_MERRWARN); - - /* Set RX and TX tigger levels, flush FIFOs */ - reg = SVC_I3C_MDATACTRL_FLUSHTB | - SVC_I3C_MDATACTRL_FLUSHRB | - SVC_I3C_MDATACTRL_UNLOCK_TRIG | - SVC_I3C_MDATACTRL_TXTRIG_FIFO_NOT_FULL | - SVC_I3C_MDATACTRL_RXTRIG_FIFO_NOT_EMPTY; - writel(reg, master->regs + SVC_I3C_MDATACTRL); - - svc_i3c_master_disable_interrupts(master); -} - static int svc_i3c_master_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Clark Wang <xiaoning.wang@nxp.com> To: miquel.raynal@bootlin.com, conor.culhane@silvaco.com, alexandre.belloni@bootlin.com Cc: linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com Subject: [PATCH V4 3/8] i3c: master: svc: separate err, fifo and disable interrupt of reset function Date: Mon, 9 Aug 2021 14:36:40 +0800 [thread overview] Message-ID: <20210809063645.2289988-4-xiaoning.wang@nxp.com> (raw) In-Reply-To: <20210809063645.2289988-1-xiaoning.wang@nxp.com> Sometimes only need to reset err and fifo regs, so split the origin reset function to three functions. Put them at the top of the file, to let more functions can call them. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Reviewed-by: Jun Li <jun.li@nxp.com> --- V4: New patch in this patchset --- drivers/i3c/master/svc-i3c-master.c | 59 +++++++++++++++++------------ 1 file changed, 34 insertions(+), 25 deletions(-) diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c index 47c02a60cf62..4e69c691253d 100644 --- a/drivers/i3c/master/svc-i3c-master.c +++ b/drivers/i3c/master/svc-i3c-master.c @@ -236,6 +236,40 @@ static void svc_i3c_master_disable_interrupts(struct svc_i3c_master *master) writel(mask, master->regs + SVC_I3C_MINTCLR); } +static void svc_i3c_master_clear_merrwarn(struct svc_i3c_master *master) +{ + /* Clear pending warnings */ + writel(readl(master->regs + SVC_I3C_MERRWARN), + master->regs + SVC_I3C_MERRWARN); +} + +static void svc_i3c_master_flush_fifo(struct svc_i3c_master *master) +{ + /* Flush FIFOs */ + writel(SVC_I3C_MDATACTRL_FLUSHTB | SVC_I3C_MDATACTRL_FLUSHRB, + master->regs + SVC_I3C_MDATACTRL); +} + +static void svc_i3c_master_reset_fifo_trigger(struct svc_i3c_master *master) +{ + u32 reg; + + /* Set RX and TX tigger levels, flush FIFOs */ + reg = SVC_I3C_MDATACTRL_FLUSHTB | + SVC_I3C_MDATACTRL_FLUSHRB | + SVC_I3C_MDATACTRL_UNLOCK_TRIG | + SVC_I3C_MDATACTRL_TXTRIG_FIFO_NOT_FULL | + SVC_I3C_MDATACTRL_RXTRIG_FIFO_NOT_EMPTY; + writel(reg, master->regs + SVC_I3C_MDATACTRL); +} + +static void svc_i3c_master_reset(struct svc_i3c_master *master) +{ + svc_i3c_master_clear_merrwarn(master); + svc_i3c_master_reset_fifo_trigger(master); + svc_i3c_master_disable_interrupts(master); +} + static inline struct svc_i3c_master * to_svc_i3c_master(struct i3c_master_controller *master) { @@ -279,12 +313,6 @@ static void svc_i3c_master_emit_stop(struct svc_i3c_master *master) udelay(1); } -static void svc_i3c_master_clear_merrwarn(struct svc_i3c_master *master) -{ - writel(readl(master->regs + SVC_I3C_MERRWARN), - master->regs + SVC_I3C_MERRWARN); -} - static int svc_i3c_master_handle_ibi(struct svc_i3c_master *master, struct i3c_dev_desc *dev) { @@ -1334,25 +1362,6 @@ static const struct i3c_master_controller_ops svc_i3c_master_ops = { .disable_ibi = svc_i3c_master_disable_ibi, }; -static void svc_i3c_master_reset(struct svc_i3c_master *master) -{ - u32 reg; - - /* Clear pending warnings */ - writel(readl(master->regs + SVC_I3C_MERRWARN), - master->regs + SVC_I3C_MERRWARN); - - /* Set RX and TX tigger levels, flush FIFOs */ - reg = SVC_I3C_MDATACTRL_FLUSHTB | - SVC_I3C_MDATACTRL_FLUSHRB | - SVC_I3C_MDATACTRL_UNLOCK_TRIG | - SVC_I3C_MDATACTRL_TXTRIG_FIFO_NOT_FULL | - SVC_I3C_MDATACTRL_RXTRIG_FIFO_NOT_EMPTY; - writel(reg, master->regs + SVC_I3C_MDATACTRL); - - svc_i3c_master_disable_interrupts(master); -} - static int svc_i3c_master_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; -- 2.25.1 -- linux-i3c mailing list linux-i3c@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-i3c
next prev parent reply other threads:[~2021-08-09 6:36 UTC|newest] Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-09 6:36 [PATCH V4 0/8] i3c: master: svc: some bug fixes and add runtime pm support Clark Wang 2021-08-09 6:36 ` Clark Wang 2021-08-09 6:36 ` [PATCH V4 1/8] i3c: master: svc: move module reset behind clk enable Clark Wang 2021-08-09 6:36 ` Clark Wang 2021-08-09 6:36 ` [PATCH V4 2/8] i3c: master: svc: fix atomic issue Clark Wang 2021-08-09 6:36 ` Clark Wang 2021-08-09 6:36 ` Clark Wang [this message] 2021-08-09 6:36 ` [PATCH V4 3/8] i3c: master: svc: separate err, fifo and disable interrupt of reset function Clark Wang 2021-08-16 6:52 ` Miquel Raynal 2021-08-16 6:52 ` Miquel Raynal 2021-08-09 6:36 ` [PATCH V4 4/8] i3c: master: svc: add support for slave to stop returning data Clark Wang 2021-08-09 6:36 ` Clark Wang 2021-08-16 7:15 ` Miquel Raynal 2021-08-16 7:15 ` Miquel Raynal 2021-08-09 6:36 ` [PATCH V4 5/8] i3c: master: svc: set ODSTOP to let I2C device see the STOP signal Clark Wang 2021-08-09 6:36 ` Clark Wang 2021-08-09 6:36 ` [PATCH V4 6/8] i3c: master: svc: add runtime pm support Clark Wang 2021-08-09 6:36 ` Clark Wang 2021-08-16 6:59 ` Miquel Raynal 2021-08-16 6:59 ` Miquel Raynal 2021-08-09 6:36 ` [PATCH V4 7/8] i3c: master: svc: add the missing module device table Clark Wang 2021-08-09 6:36 ` Clark Wang 2021-08-16 7:00 ` Miquel Raynal 2021-08-16 7:00 ` Miquel Raynal 2021-08-09 6:36 ` [PATCH V4 8/8] i3c: master: svc: enable the interrupt in the enable ibi function Clark Wang 2021-08-09 6:36 ` Clark Wang 2021-08-16 7:02 ` Miquel Raynal 2021-08-16 7:02 ` Miquel Raynal
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