From: Wong Vee Khee <vee.khee.wong@linux.intel.com> To: Andrew Lunn <andrew@lunn.ch>, Vivien Didelot <vivien.didelot@gmail.com>, Florian Fainelli <f.fainelli@gmail.com>, "David S . Miller" <davem@davemloft.net>, Jakub Kicinski <kuba@kernel.org>, Giuseppe Cavallaro <peppe.cavallaro@st.com>, Alexandre Torgue <alexandre.torgue@foss.st.com>, Jose Abreu <joabreu@synopsys.com>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Heiner Kallweit <hkallweit1@gmail.com>, Russell King <linux@armlinux.org.uk> Cc: Voon Weifeng <weifeng.voon@intel.com>, Wong Vee Khee <vee.khee.wong@linux.intel.com>, Michael Sit Wei Hong <michael.wei.hong.sit@intel.com>, Vladimir Oltean <olteanv@gmail.com>, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 2/2] stmmac: intel: Enable 2.5Gbps on Intel AlderLake-S Date: Mon, 9 Aug 2021 18:22:29 +0800 [thread overview] Message-ID: <20210809102229.933748-3-vee.khee.wong@linux.intel.com> (raw) In-Reply-To: <20210809102229.933748-1-vee.khee.wong@linux.intel.com> From: Michael Sit Wei Hong <michael.wei.hong.sit@intel.com> Intel AlderLake-S platform is capable of 2.5Gbps link speed. This patch enables the 2.5Gbps link speed by adding the callback function in the AlderLake-S PCI info struct. Signed-off-by: Michael Sit Wei Hong <michael.wei.hong.sit@intel.com> Signed-off-by: Wong Vee Khee <vee.khee.wong@intel.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 8e8778cfbbad..c1db7e53e78f 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -770,6 +770,8 @@ static int adls_sgmii_phy0_data(struct pci_dev *pdev, { plat->bus_id = 1; plat->phy_interface = PHY_INTERFACE_MODE_SGMII; + plat->speed_mode_2500 = intel_speed_mode_2500; + plat->skip_xpcs_soft_reset = 1; /* SerDes power up and power down are done in BIOS for ADL */ @@ -785,6 +787,8 @@ static int adls_sgmii_phy1_data(struct pci_dev *pdev, { plat->bus_id = 2; plat->phy_interface = PHY_INTERFACE_MODE_SGMII; + plat->speed_mode_2500 = intel_speed_mode_2500; + plat->skip_xpcs_soft_reset = 1; /* SerDes power up and power down are done in BIOS for ADL */ -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Wong Vee Khee <vee.khee.wong@linux.intel.com> To: Andrew Lunn <andrew@lunn.ch>, Vivien Didelot <vivien.didelot@gmail.com>, Florian Fainelli <f.fainelli@gmail.com>, "David S . Miller" <davem@davemloft.net>, Jakub Kicinski <kuba@kernel.org>, Giuseppe Cavallaro <peppe.cavallaro@st.com>, Alexandre Torgue <alexandre.torgue@foss.st.com>, Jose Abreu <joabreu@synopsys.com>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Heiner Kallweit <hkallweit1@gmail.com>, Russell King <linux@armlinux.org.uk> Cc: Voon Weifeng <weifeng.voon@intel.com>, Wong Vee Khee <vee.khee.wong@linux.intel.com>, Michael Sit Wei Hong <michael.wei.hong.sit@intel.com>, Vladimir Oltean <olteanv@gmail.com>, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 2/2] stmmac: intel: Enable 2.5Gbps on Intel AlderLake-S Date: Mon, 9 Aug 2021 18:22:29 +0800 [thread overview] Message-ID: <20210809102229.933748-3-vee.khee.wong@linux.intel.com> (raw) In-Reply-To: <20210809102229.933748-1-vee.khee.wong@linux.intel.com> From: Michael Sit Wei Hong <michael.wei.hong.sit@intel.com> Intel AlderLake-S platform is capable of 2.5Gbps link speed. This patch enables the 2.5Gbps link speed by adding the callback function in the AlderLake-S PCI info struct. Signed-off-by: Michael Sit Wei Hong <michael.wei.hong.sit@intel.com> Signed-off-by: Wong Vee Khee <vee.khee.wong@intel.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 8e8778cfbbad..c1db7e53e78f 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -770,6 +770,8 @@ static int adls_sgmii_phy0_data(struct pci_dev *pdev, { plat->bus_id = 1; plat->phy_interface = PHY_INTERFACE_MODE_SGMII; + plat->speed_mode_2500 = intel_speed_mode_2500; + plat->skip_xpcs_soft_reset = 1; /* SerDes power up and power down are done in BIOS for ADL */ @@ -785,6 +787,8 @@ static int adls_sgmii_phy1_data(struct pci_dev *pdev, { plat->bus_id = 2; plat->phy_interface = PHY_INTERFACE_MODE_SGMII; + plat->speed_mode_2500 = intel_speed_mode_2500; + plat->skip_xpcs_soft_reset = 1; /* SerDes power up and power down are done in BIOS for ADL */ -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-08-09 10:17 UTC|newest] Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-09 10:22 [PATCH net-next 0/2] Intel AlderLake-S 2.5Gbps link speed support Wong Vee Khee 2021-08-09 10:22 ` Wong Vee Khee 2021-08-09 10:22 ` [PATCH net-next 1/2] net: pcs: xpcs: enable skip xPCS soft reset Wong Vee Khee 2021-08-09 10:22 ` Wong Vee Khee 2021-08-09 11:06 ` Vladimir Oltean 2021-08-09 11:06 ` Vladimir Oltean 2021-08-10 23:50 ` Wong Vee Khee 2021-08-10 23:50 ` Wong Vee Khee 2021-08-09 13:35 ` Andrew Lunn 2021-08-09 13:35 ` Andrew Lunn 2021-08-10 23:55 ` Wong Vee Khee 2021-08-10 23:55 ` Wong Vee Khee 2021-08-11 8:36 ` Florian Fainelli 2021-08-11 8:36 ` Florian Fainelli 2021-08-11 14:20 ` Andrew Lunn 2021-08-11 14:20 ` Andrew Lunn 2021-08-26 11:50 ` Wong Vee Khee 2021-08-26 11:50 ` Wong Vee Khee 2021-08-09 10:22 ` Wong Vee Khee [this message] 2021-08-09 10:22 ` [PATCH net-next 2/2] stmmac: intel: Enable 2.5Gbps on Intel AlderLake-S Wong Vee Khee
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20210809102229.933748-3-vee.khee.wong@linux.intel.com \ --to=vee.khee.wong@linux.intel.com \ --cc=alexandre.torgue@foss.st.com \ --cc=andrew@lunn.ch \ --cc=davem@davemloft.net \ --cc=f.fainelli@gmail.com \ --cc=hkallweit1@gmail.com \ --cc=joabreu@synopsys.com \ --cc=kuba@kernel.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-stm32@st-md-mailman.stormreply.com \ --cc=linux@armlinux.org.uk \ --cc=mcoquelin.stm32@gmail.com \ --cc=michael.wei.hong.sit@intel.com \ --cc=netdev@vger.kernel.org \ --cc=olteanv@gmail.com \ --cc=peppe.cavallaro@st.com \ --cc=vivien.didelot@gmail.com \ --cc=weifeng.voon@intel.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.