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From: Nancy.Lin <nancy.lin@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>
Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	"jason-jh . lin" <jason-jh.lin@mediatek.com>,
	"Nancy . Lin" <nancy.lin@mediatek.com>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	<dri-devel@lists.freedesktop.org>,
	<linux-mediatek@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<singo.chang@mediatek.com>, <srv_heupstream@mediatek.com>
Subject: [PATCH v3 05/15] dt-bindings: reset: mt8195: add vdosys1 reset control bit
Date: Wed, 18 Aug 2021 17:18:37 +0800	[thread overview]
Message-ID: <20210818091847.8060-6-nancy.lin@mediatek.com> (raw)
In-Reply-To: <20210818091847.8060-1-nancy.lin@mediatek.com>

Add vdosys1 reset control bit for MT8195 platform.

Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
---
 include/dt-bindings/reset/mt8195-resets.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/include/dt-bindings/reset/mt8195-resets.h b/include/dt-bindings/reset/mt8195-resets.h
index a26bccc8b957..eaaa882c09bd 100644
--- a/include/dt-bindings/reset/mt8195-resets.h
+++ b/include/dt-bindings/reset/mt8195-resets.h
@@ -26,4 +26,16 @@
 
 #define MT8195_TOPRGU_SW_RST_NUM               16
 
+/* VDOSYS1 */
+#define MT8195_VDOSYS1_SW0_RST_B_MERGE0_DL_ASYNC 25
+#define MT8195_VDOSYS1_SW0_RST_B_MERGE1_DL_ASYNC 26
+#define MT8195_VDOSYS1_SW0_RST_B_MERGE2_DL_ASYNC 27
+#define MT8195_VDOSYS1_SW0_RST_B_MERGE3_DL_ASYNC 28
+#define MT8195_VDOSYS1_SW0_RST_B_MERGE4_DL_ASYNC 29
+#define MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_FE0_DL_ASYNC 51
+#define MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_FE1_DL_ASYNC 52
+#define MT8195_VDOSYS1_SW1_RST_B_HDR_GFX_FE0_DL_ASYNC 53
+#define MT8195_VDOSYS1_SW1_RST_B_HDR_GFX_FE1_DL_ASYNC 54
+#define MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_BE_DL_ASYNC 55
+
 #endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */
-- 
2.18.0


WARNING: multiple messages have this Message-ID (diff)
From: Nancy.Lin <nancy.lin@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>
Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	"jason-jh . lin" <jason-jh.lin@mediatek.com>,
	"Nancy . Lin" <nancy.lin@mediatek.com>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	<dri-devel@lists.freedesktop.org>,
	<linux-mediatek@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<singo.chang@mediatek.com>, <srv_heupstream@mediatek.com>
Subject: [PATCH v3 05/15] dt-bindings: reset: mt8195: add vdosys1 reset control bit
Date: Wed, 18 Aug 2021 17:18:37 +0800	[thread overview]
Message-ID: <20210818091847.8060-6-nancy.lin@mediatek.com> (raw)
In-Reply-To: <20210818091847.8060-1-nancy.lin@mediatek.com>

Add vdosys1 reset control bit for MT8195 platform.

Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
---
 include/dt-bindings/reset/mt8195-resets.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/include/dt-bindings/reset/mt8195-resets.h b/include/dt-bindings/reset/mt8195-resets.h
index a26bccc8b957..eaaa882c09bd 100644
--- a/include/dt-bindings/reset/mt8195-resets.h
+++ b/include/dt-bindings/reset/mt8195-resets.h
@@ -26,4 +26,16 @@
 
 #define MT8195_TOPRGU_SW_RST_NUM               16
 
+/* VDOSYS1 */
+#define MT8195_VDOSYS1_SW0_RST_B_MERGE0_DL_ASYNC 25
+#define MT8195_VDOSYS1_SW0_RST_B_MERGE1_DL_ASYNC 26
+#define MT8195_VDOSYS1_SW0_RST_B_MERGE2_DL_ASYNC 27
+#define MT8195_VDOSYS1_SW0_RST_B_MERGE3_DL_ASYNC 28
+#define MT8195_VDOSYS1_SW0_RST_B_MERGE4_DL_ASYNC 29
+#define MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_FE0_DL_ASYNC 51
+#define MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_FE1_DL_ASYNC 52
+#define MT8195_VDOSYS1_SW1_RST_B_HDR_GFX_FE0_DL_ASYNC 53
+#define MT8195_VDOSYS1_SW1_RST_B_HDR_GFX_FE1_DL_ASYNC 54
+#define MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_BE_DL_ASYNC 55
+
 #endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */
-- 
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Nancy.Lin <nancy.lin@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>
Cc: Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	"jason-jh . lin" <jason-jh.lin@mediatek.com>,
	"Nancy . Lin" <nancy.lin@mediatek.com>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	<dri-devel@lists.freedesktop.org>,
	<linux-mediatek@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<singo.chang@mediatek.com>, <srv_heupstream@mediatek.com>
Subject: [PATCH v3 05/15] dt-bindings: reset: mt8195: add vdosys1 reset control bit
Date: Wed, 18 Aug 2021 17:18:37 +0800	[thread overview]
Message-ID: <20210818091847.8060-6-nancy.lin@mediatek.com> (raw)
In-Reply-To: <20210818091847.8060-1-nancy.lin@mediatek.com>

Add vdosys1 reset control bit for MT8195 platform.

Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
---
 include/dt-bindings/reset/mt8195-resets.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/include/dt-bindings/reset/mt8195-resets.h b/include/dt-bindings/reset/mt8195-resets.h
index a26bccc8b957..eaaa882c09bd 100644
--- a/include/dt-bindings/reset/mt8195-resets.h
+++ b/include/dt-bindings/reset/mt8195-resets.h
@@ -26,4 +26,16 @@
 
 #define MT8195_TOPRGU_SW_RST_NUM               16
 
+/* VDOSYS1 */
+#define MT8195_VDOSYS1_SW0_RST_B_MERGE0_DL_ASYNC 25
+#define MT8195_VDOSYS1_SW0_RST_B_MERGE1_DL_ASYNC 26
+#define MT8195_VDOSYS1_SW0_RST_B_MERGE2_DL_ASYNC 27
+#define MT8195_VDOSYS1_SW0_RST_B_MERGE3_DL_ASYNC 28
+#define MT8195_VDOSYS1_SW0_RST_B_MERGE4_DL_ASYNC 29
+#define MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_FE0_DL_ASYNC 51
+#define MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_FE1_DL_ASYNC 52
+#define MT8195_VDOSYS1_SW1_RST_B_HDR_GFX_FE0_DL_ASYNC 53
+#define MT8195_VDOSYS1_SW1_RST_B_HDR_GFX_FE1_DL_ASYNC 54
+#define MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_BE_DL_ASYNC 55
+
 #endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */
-- 
2.18.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

  parent reply	other threads:[~2021-08-18  9:20 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-18  9:18 [PATCH v3 00/15] Add MediaTek SoC DRM (vdosys1) support for mt8195 Nancy.Lin
2021-08-18  9:18 ` Nancy.Lin
2021-08-18  9:18 ` Nancy.Lin
2021-08-18  9:18 ` [PATCH v3 01/15] dt-bindings: mediatek: add vdosys1 RDMA definition " Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18 ` [PATCH v3 02/15] dt-bindings: mediatek: add vdosys1 MERGE " Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-19 23:25   ` Chun-Kuang Hu
2021-08-19 23:25     ` Chun-Kuang Hu
2021-08-19 23:25     ` Chun-Kuang Hu
2021-08-19 23:25     ` Chun-Kuang Hu
2021-08-24  5:07     ` Nancy.Lin
2021-08-24  5:07       ` Nancy.Lin
2021-08-24  5:07       ` Nancy.Lin
2021-08-18  9:18 ` [PATCH v3 03/15] dt-bindings: mediatek: add ethdr " Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18 ` [PATCH v3 04/15] dt-bindings: mediatek: Add #reset-cells to mmsys system controller Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18 ` Nancy.Lin [this message]
2021-08-18  9:18   ` [PATCH v3 05/15] dt-bindings: reset: mt8195: add vdosys1 reset control bit Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18 ` [PATCH v3 06/15] arm64: dts: mt8195: add display node for vdosys1 Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18 ` [PATCH v3 07/15] soc: mediatek: add mtk-mmsys support for mt8195 vdosys1 Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18 ` [PATCH v3 08/15] soc: mediatek: add mtk-mmsys config API " Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18 ` [PATCH v3 09/15] soc: mediatek: add cmdq support of " Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18 ` [PATCH v3 10/15] soc: mediatek: mmsys: Add reset controller support for MT8195 vdosys1 Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18 ` [PATCH v3 11/15] soc: mediatek: add mtk-mutex support for mt8195 vdosys1 Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18 ` [PATCH v3 12/15] drm/mediatek: add display MDP RDMA support for MT8195 Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-20 10:25   ` CK Hu
2021-08-20 10:25     ` CK Hu
2021-08-20 10:25     ` CK Hu
2021-08-18  9:18 ` [PATCH v3 13/15] drm/mediatek: add ovl_adaptor " Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-21 23:47   ` Chun-Kuang Hu
2021-08-21 23:47     ` Chun-Kuang Hu
2021-08-21 23:47     ` Chun-Kuang Hu
2021-08-24  4:58     ` Nancy.Lin
2021-08-24  4:58       ` Nancy.Lin
2021-08-24  4:58       ` Nancy.Lin
2021-08-18  9:18 ` [PATCH v3 14/15] drm/mediatek: add ETHDR " Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18 ` [PATCH v3 15/15] drm/mediatek: add mediatek-drm of vdosys1 " Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-18  9:18   ` Nancy.Lin
2021-08-20 23:37   ` Chun-Kuang Hu
2021-08-20 23:37     ` Chun-Kuang Hu
2021-08-20 23:37     ` Chun-Kuang Hu
2021-08-20 23:37     ` Chun-Kuang Hu
2021-08-24  4:53     ` Nancy.Lin
2021-08-24  4:53       ` Nancy.Lin
2021-08-24  4:53       ` Nancy.Lin
2021-08-22  1:14   ` Chun-Kuang Hu
2021-08-22  1:14     ` Chun-Kuang Hu
2021-08-22  1:14     ` Chun-Kuang Hu
2021-08-22  1:14     ` Chun-Kuang Hu
2021-08-24  4:52     ` Nancy.Lin
2021-08-24  4:52       ` Nancy.Lin
2021-08-24  4:52       ` Nancy.Lin

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