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* [PATCH 00/10] DC Patches Aug 23, 2021
@ 2021-08-20 22:53 Qingqing Zhuo
  2021-08-23 13:47 ` Wheeler, Daniel
  0 siblings, 1 reply; 2+ messages in thread
From: Qingqing Zhuo @ 2021-08-20 22:53 UTC (permalink / raw)
  To: amd-gfx
  Cc: Harry.Wentland, Sunpeng.Li, Bhawanpreet.Lakha, Rodrigo.Siqueira,
	Aurabindo.Pillai, qingqing.zhuo, mikita.lipski, roman.li,
	Anson.Jacob

This DC patchset brings improvements in multiple areas. In summary, we highlight:

  - DC version 3.2.150
  - FW promotion 0.0.80
  - Add missing ABM register offsets
  - Fix in swizzle mode mapping
  - Emulated sink support for freesync
  - Improvoments in max target bpp

---

Alvin Lee (1):
  drm/amd/display: Update swizzle mode enums

Anthony Koo (1):
  drm/amd/display: [FW Promotion] Release 0.0.80

Aric Cyr (1):
  drm/amd/display: 3.2.150

Aurabindo Pillai (1):
  drm/amd/display: Add emulated sink support for updating FS

Josip Pavic (1):
  drm/amd/display: add missing ABM register offsets

Jude Shih (1):
  drm/amd/display: Support for DMUB HPD interrupt handling

Michael Strauss (1):
  drm/amd/display: Set min dcfclk if pipe count is 0

Roman Li (2):
  drm/amd/display: Use max target bpp override option
  drm/amd/display: Limit max DSC target bpp for specific monitors

Wyatt Wood (1):
  drm/amd/display: Initialize GSP1 SDP header

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 199 ++++++++++++++++--
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |  40 ++++
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |  35 +++
 .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |   4 +-
 drivers/gpu/drm/amd/display/dc/dc.h           |   2 +-
 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h  |  16 ++
 .../display/dc/dcn10/dcn10_stream_encoder.c   |  10 +
 .../drm/amd/display/dc/dcn20/dcn20_resource.c |   4 +-
 .../drm/amd/display/dc/dcn30/dcn30_resource.c |   2 +-
 .../drm/amd/display/dc/dcn30/dcn30_resource.h |   7 +
 .../amd/display/dc/dcn302/dcn302_resource.c   |   2 +-
 .../amd/display/dc/dcn303/dcn303_resource.c   |   2 +-
 .../drm/amd/display/dc/dcn31/dcn31_resource.c |  65 +++++-
 .../amd/display/dc/dml/display_mode_enums.h   |   4 +-
 .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h   |  29 ++-
 15 files changed, 382 insertions(+), 39 deletions(-)

-- 
2.25.1


^ permalink raw reply	[flat|nested] 2+ messages in thread
* RE: [PATCH 00/10] DC Patches Aug 23, 2021
  2021-08-20 22:53 [PATCH 00/10] DC Patches Aug 23, 2021 Qingqing Zhuo
@ 2021-08-23 13:47 ` Wheeler, Daniel
  0 siblings, 0 replies; 2+ messages in thread
From: Wheeler, Daniel @ 2021-08-23 13:47 UTC (permalink / raw)
  To: Zhuo, Qingqing, amd-gfx
  Cc: Wentland, Harry, Li, Sun peng (Leo),
	Lakha, Bhawanpreet, Siqueira, Rodrigo, Pillai, Aurabindo, Zhuo,
	Qingqing, Lipski, Mikita, Li, Roman, Jacob, Anson

[Public]

Hi all,
 
This week this patchset was tested on the following systems:
 
HP Envy 360, with Ryzen 5 4500U, with the following display types: eDP 1080p 60hz, 4k 60hz  (via USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI), 1680*1050 60hz (via USB-C to DP and then DP to DVI/VGA)
 
AMD Ryzen 9 5900H, with the following display types: eDP 1080p 60hz, 4k 60hz  (via USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI), 1680*1050 60hz (via USB-C to DP and then DP to DVI/VGA)
 
Sapphire Pulse RX5700XT with the following display types:
4k 60hz  (via DP/HDMI), 1440p 144hz (via DP/HDMI), 1680*1050 60hz (via DP to DVI/VGA)
 
Reference AMD RX6800 with the following display types:
4k 60hz  (via DP/HDMI and USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI and USB-C to DP/HDMI), 1680*1050 60hz (via DP to DVI/VGA)
 
Included testing using a Startech DP 1.4 MST hub at 2x 4k 60hz, and 3x 1080p 60hz on all systems.
 
 
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
 
 
Thank you,
 
Dan Wheeler
Technologist  |  AMD
SW Display
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
Facebook |  Twitter |  amd.com  

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Qingqing Zhuo
Sent: August 20, 2021 6:53 PM
To: amd-gfx@lists.freedesktop.org
Cc: Wentland, Harry <Harry.Wentland@amd.com>; Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@amd.com>; Siqueira, Rodrigo <Rodrigo.Siqueira@amd.com>; Pillai, Aurabindo <Aurabindo.Pillai@amd.com>; Zhuo, Qingqing <Qingqing.Zhuo@amd.com>; Lipski, Mikita <Mikita.Lipski@amd.com>; Li, Roman <Roman.Li@amd.com>; Jacob, Anson <Anson.Jacob@amd.com>
Subject: [PATCH 00/10] DC Patches Aug 23, 2021

This DC patchset brings improvements in multiple areas. In summary, we highlight:

  - DC version 3.2.150
  - FW promotion 0.0.80
  - Add missing ABM register offsets
  - Fix in swizzle mode mapping
  - Emulated sink support for freesync
  - Improvoments in max target bpp

---

Alvin Lee (1):
  drm/amd/display: Update swizzle mode enums

Anthony Koo (1):
  drm/amd/display: [FW Promotion] Release 0.0.80

Aric Cyr (1):
  drm/amd/display: 3.2.150

Aurabindo Pillai (1):
  drm/amd/display: Add emulated sink support for updating FS

Josip Pavic (1):
  drm/amd/display: add missing ABM register offsets

Jude Shih (1):
  drm/amd/display: Support for DMUB HPD interrupt handling

Michael Strauss (1):
  drm/amd/display: Set min dcfclk if pipe count is 0

Roman Li (2):
  drm/amd/display: Use max target bpp override option
  drm/amd/display: Limit max DSC target bpp for specific monitors

Wyatt Wood (1):
  drm/amd/display: Initialize GSP1 SDP header

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 199 ++++++++++++++++--  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |  40 ++++  .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |  35 +++
 .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |   4 +-
 drivers/gpu/drm/amd/display/dc/dc.h           |   2 +-
 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h  |  16 ++
 .../display/dc/dcn10/dcn10_stream_encoder.c   |  10 +
 .../drm/amd/display/dc/dcn20/dcn20_resource.c |   4 +-
 .../drm/amd/display/dc/dcn30/dcn30_resource.c |   2 +-
 .../drm/amd/display/dc/dcn30/dcn30_resource.h |   7 +
 .../amd/display/dc/dcn302/dcn302_resource.c   |   2 +-
 .../amd/display/dc/dcn303/dcn303_resource.c   |   2 +-
 .../drm/amd/display/dc/dcn31/dcn31_resource.c |  65 +++++-
 .../amd/display/dc/dml/display_mode_enums.h   |   4 +-
 .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h   |  29 ++-
 15 files changed, 382 insertions(+), 39 deletions(-)

--
2.25.1

^ permalink raw reply	[flat|nested] 2+ messages in thread
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2021-08-23 13:47 ` Wheeler, Daniel

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