From: kernel test robot <lkp@intel.com> To: Vandita Kulkarni <vandita.kulkarni@intel.com>, intel-gfx@lists.freedesktop.org Cc: kbuild-all@lists.01.org, jani.nikula@intel.com, Vandita Kulkarni <vandita.kulkarni@intel.com> Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband Date: Mon, 23 Aug 2021 14:54:00 +0800 [thread overview] Message-ID: <202108231410.laVlad31-lkp@intel.com> (raw) In-Reply-To: <20210823032136.2564-2-vandita.kulkarni@intel.com> [-- Attachment #1: Type: text/plain, Size: 6431 bytes --] Hi Vandita, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on drm-tip/drm-tip next-20210820] [cannot apply to v5.14-rc7] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Vandita-Kulkarni/Enable-mipi-dsi-on-XELPD/20210823-112313 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: x86_64-randconfig-a006-20210822 (attached as .config) compiler: gcc-9 (Debian 9.3.0-22) 9.3.0 reproduce (this is a W=1 build): # https://github.com/0day-ci/linux/commit/d75ce0657c5bed32b206ab0461ea42eea7514436 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Vandita-Kulkarni/Enable-mipi-dsi-on-XELPD/20210823-112313 git checkout d75ce0657c5bed32b206ab0461ea42eea7514436 # save the attached .config to linux build tree make W=1 ARCH=x86_64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): In file included from drivers/gpu/drm/i915/display/intel_ddi.h:10, from drivers/gpu/drm/i915/display/icl_dsi.c:35: drivers/gpu/drm/i915/display/icl_dsi.c: In function 'adlp_set_lp_hs_wakeup_gb': drivers/gpu/drm/i915/i915_reg.h:11619:11: error: '_TGL_DSI_CHKN_REG_0' undeclared (first use in this function); did you mean 'TGL_DSI_CHKN_REG_0'? 11619 | _TGL_DSI_CHKN_REG_0, \ | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO' 185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) }) | ^ drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN' 231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b) | ^~~~~~~~~~ drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT' 238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b)) | ^~~~~ drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT' 11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \ | ^~~~~~~~~~ drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG' 1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port), | ^~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/i915_reg.h:11619:11: note: each undeclared identifier is reported only once for each function it appears in 11619 | _TGL_DSI_CHKN_REG_0, \ | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO' 185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) }) | ^ drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN' 231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b) | ^~~~~~~~~~ drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT' 238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b)) | ^~~~~ drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT' 11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \ | ^~~~~~~~~~ drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG' 1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port), | ^~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/i915_reg.h:11620:11: error: '_TGL_DSI_CHKN_REG_1' undeclared (first use in this function); did you mean 'TGL_DSI_CHKN_REG_1'? 11620 | _TGL_DSI_CHKN_REG_1) | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO' 185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) }) | ^ drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN' 231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b) | ^~~~~~~~~~ drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT' 238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b)) | ^~~~~ drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT' 11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \ | ^~~~~~~~~~ drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG' 1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port), | ^~~~~~~~~~~~~~~~ >> drivers/gpu/drm/i915/display/icl_dsi.c:1288:5: error: suggest explicit braces to avoid ambiguous 'else' [-Werror=dangling-else] 1288 | if (DISPLAY_VER(dev_priv) == 13) | ^ cc1: all warnings being treated as errors vim +/else +1288 drivers/gpu/drm/i915/display/icl_dsi.c 1273 1274 /* 1275 * Wa_16012360555:ADLP 1276 * SW will have to program the "LP to HS Wakeup Guardband" 1277 * field (bits 15:12) of register offset 0x6B0C0 (DSI0) 1278 * and 0x6B8C0 (DSI1) to a value of 4 to account for the repeaters 1279 * on the HS Request/Ready PPI signaling between 1280 * the Display engine and the DPHY. 1281 */ 1282 static void adlp_set_lp_hs_wakeup_gb(struct intel_encoder *encoder) 1283 { 1284 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 1285 struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); 1286 enum port port; 1287 > 1288 if (DISPLAY_VER(dev_priv) == 13) 1289 for_each_dsi_port(port, intel_dsi->ports) > 1290 intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port), 1291 TGL_DSI_CHKN_LSHS_GB, 0x4); 1292 } 1293 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org [-- Attachment #2: .config.gz --] [-- Type: application/gzip, Size: 39156 bytes --]
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From: kernel test robot <lkp@intel.com> To: kbuild-all@lists.01.org Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband Date: Mon, 23 Aug 2021 14:54:00 +0800 [thread overview] Message-ID: <202108231410.laVlad31-lkp@intel.com> (raw) In-Reply-To: <20210823032136.2564-2-vandita.kulkarni@intel.com> [-- Attachment #1: Type: text/plain, Size: 6551 bytes --] Hi Vandita, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on drm-tip/drm-tip next-20210820] [cannot apply to v5.14-rc7] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Vandita-Kulkarni/Enable-mipi-dsi-on-XELPD/20210823-112313 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: x86_64-randconfig-a006-20210822 (attached as .config) compiler: gcc-9 (Debian 9.3.0-22) 9.3.0 reproduce (this is a W=1 build): # https://github.com/0day-ci/linux/commit/d75ce0657c5bed32b206ab0461ea42eea7514436 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Vandita-Kulkarni/Enable-mipi-dsi-on-XELPD/20210823-112313 git checkout d75ce0657c5bed32b206ab0461ea42eea7514436 # save the attached .config to linux build tree make W=1 ARCH=x86_64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): In file included from drivers/gpu/drm/i915/display/intel_ddi.h:10, from drivers/gpu/drm/i915/display/icl_dsi.c:35: drivers/gpu/drm/i915/display/icl_dsi.c: In function 'adlp_set_lp_hs_wakeup_gb': drivers/gpu/drm/i915/i915_reg.h:11619:11: error: '_TGL_DSI_CHKN_REG_0' undeclared (first use in this function); did you mean 'TGL_DSI_CHKN_REG_0'? 11619 | _TGL_DSI_CHKN_REG_0, \ | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO' 185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) }) | ^ drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN' 231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b) | ^~~~~~~~~~ drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT' 238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b)) | ^~~~~ drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT' 11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \ | ^~~~~~~~~~ drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG' 1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port), | ^~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/i915_reg.h:11619:11: note: each undeclared identifier is reported only once for each function it appears in 11619 | _TGL_DSI_CHKN_REG_0, \ | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO' 185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) }) | ^ drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN' 231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b) | ^~~~~~~~~~ drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT' 238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b)) | ^~~~~ drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT' 11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \ | ^~~~~~~~~~ drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG' 1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port), | ^~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/i915_reg.h:11620:11: error: '_TGL_DSI_CHKN_REG_1' undeclared (first use in this function); did you mean 'TGL_DSI_CHKN_REG_1'? 11620 | _TGL_DSI_CHKN_REG_1) | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO' 185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) }) | ^ drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN' 231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b) | ^~~~~~~~~~ drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT' 238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b)) | ^~~~~ drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT' 11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \ | ^~~~~~~~~~ drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG' 1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port), | ^~~~~~~~~~~~~~~~ >> drivers/gpu/drm/i915/display/icl_dsi.c:1288:5: error: suggest explicit braces to avoid ambiguous 'else' [-Werror=dangling-else] 1288 | if (DISPLAY_VER(dev_priv) == 13) | ^ cc1: all warnings being treated as errors vim +/else +1288 drivers/gpu/drm/i915/display/icl_dsi.c 1273 1274 /* 1275 * Wa_16012360555:ADLP 1276 * SW will have to program the "LP to HS Wakeup Guardband" 1277 * field (bits 15:12) of register offset 0x6B0C0 (DSI0) 1278 * and 0x6B8C0 (DSI1) to a value of 4 to account for the repeaters 1279 * on the HS Request/Ready PPI signaling between 1280 * the Display engine and the DPHY. 1281 */ 1282 static void adlp_set_lp_hs_wakeup_gb(struct intel_encoder *encoder) 1283 { 1284 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 1285 struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); 1286 enum port port; 1287 > 1288 if (DISPLAY_VER(dev_priv) == 13) 1289 for_each_dsi_port(port, intel_dsi->ports) > 1290 intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port), 1291 TGL_DSI_CHKN_LSHS_GB, 0x4); 1292 } 1293 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org [-- Attachment #2: config.gz --] [-- Type: application/gzip, Size: 39156 bytes --]
next prev parent reply other threads:[~2021-08-23 6:54 UTC|newest] Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-23 3:21 [Intel-gfx] [PATCH 0/2] Enable mipi dsi on XELPD Vandita Kulkarni 2021-08-23 3:21 ` [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband Vandita Kulkarni 2021-08-23 4:38 ` [Intel-gfx] [v2] " Vandita Kulkarni 2021-08-25 14:08 ` Jani Nikula 2021-08-26 5:59 ` Kulkarni, Vandita 2021-09-01 7:45 ` Kulkarni, Vandita 2021-08-23 6:54 ` kernel test robot [this message] 2021-08-23 6:54 ` [Intel-gfx] [PATCH 1/2] " kernel test robot 2021-08-23 7:40 ` kernel test robot 2021-08-23 7:40 ` kernel test robot 2021-08-23 7:47 ` kernel test robot 2021-08-23 7:47 ` kernel test robot 2021-08-23 3:21 ` [Intel-gfx] [PATCH 2/2] drm/i915/dsi/xelpd: Enable mipi dsi support Vandita Kulkarni 2021-08-25 12:07 ` Jani Nikula 2021-08-23 3:58 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Enable mipi dsi on XELPD Patchwork 2021-08-23 4:59 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable mipi dsi on XELPD (rev2) Patchwork 2021-08-23 5:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-08-23 6:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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