* [RESEND v8,0/2] watchdog: mt8195: add wdt support
@ 2021-08-24 6:26 ` Christine Zhu
0 siblings, 0 replies; 11+ messages in thread
From: Christine Zhu @ 2021-08-24 6:26 UTC (permalink / raw)
To: wim, linux, robh+dt, matthias.bgg
Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel,
linux-watchdog, devicetree, seiya.wang
Supports MT8195 watchdog device. Supports MT8195 watchdog reset-controller feature.
Change since v7:
-remove "[v7,1/3] dt-bindings: mediatek: mt8195: update mtk-wdt document", because the patch has been applied.
Change since v6:
-move the reset-controller header file to 'include/dt-bindings/reset', in order to be consistent with [1]
[1] https://patchwork.kernel.org/project/linux-mediatek/patch/20210714121116.v2.1.I514d9aafff3a062f751b37d3fea7402f67595b86@changeid/
Change since v5:
-fix author and license in [v5,2/3].
Change since v4:
-fix name formatting in Signed-off-bys and author in [v4,3/3].
Change since v3:
-fix name formatting in Signed-off-bys and author for all the patches.
Change since v2:
-fix typos in [v2,0/3] [v2,1/3] [v2,2/3].
Change since v1:
-Remove the unneeded tag in [v1,1/3] [v1,2/3] [v1,3/3]
-Add of_device_id of MT8195 in [v1,3/3]
-use more proper prefixes, such as "dt-bindings: mediatek: mt8195:"
-provide more information in the cover letter
Christine Zhu (2):
dt-bindings: reset: mt8195: add toprgu reset-controller header file
watchdog: mediatek: mt8195: add wdt support
drivers/watchdog/mtk_wdt.c | 6 +++++
include/dt-bindings/reset/mt8195-resets.h | 29 +++++++++++++++++++++++
2 files changed, 35 insertions(+)
create mode 100644 include/dt-bindings/reset/mt8195-resets.h
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^ permalink raw reply [flat|nested] 11+ messages in thread
* [RESEND v8,1/2] dt-bindings: reset: mt8195: add toprgu reset-controller header file
2021-08-24 6:26 ` Christine Zhu
(?)
@ 2021-08-24 6:26 ` Christine Zhu
-1 siblings, 0 replies; 11+ messages in thread
From: Christine Zhu @ 2021-08-24 6:26 UTC (permalink / raw)
To: wim, linux, robh+dt, matthias.bgg
Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel,
linux-watchdog, devicetree, seiya.wang, Christine Zhu
Add toprgu reset-controller header file for MT8195 platform.
Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
---
include/dt-bindings/reset/mt8195-resets.h | 29 +++++++++++++++++++++++
1 file changed, 29 insertions(+)
create mode 100644 include/dt-bindings/reset/mt8195-resets.h
diff --git a/include/dt-bindings/reset/mt8195-resets.h b/include/dt-bindings/reset/mt8195-resets.h
new file mode 100644
index 000000000000..a26bccc8b957
--- /dev/null
+++ b/include/dt-bindings/reset/mt8195-resets.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)*/
+/*
+ * Copyright (c) 2021 MediaTek Inc.
+ * Author: Christine Zhu <christine.zhu@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8195
+#define _DT_BINDINGS_RESET_CONTROLLER_MT8195
+
+#define MT8195_TOPRGU_CONN_MCU_SW_RST 0
+#define MT8195_TOPRGU_INFRA_GRST_SW_RST 1
+#define MT8195_TOPRGU_APU_SW_RST 2
+#define MT8195_TOPRGU_INFRA_AO_GRST_SW_RST 6
+#define MT8195_TOPRGU_MMSYS_SW_RST 7
+#define MT8195_TOPRGU_MFG_SW_RST 8
+#define MT8195_TOPRGU_VENC_SW_RST 9
+#define MT8195_TOPRGU_VDEC_SW_RST 10
+#define MT8195_TOPRGU_IMG_SW_RST 11
+#define MT8195_TOPRGU_APMIXEDSYS_SW_RST 13
+#define MT8195_TOPRGU_AUDIO_SW_RST 14
+#define MT8195_TOPRGU_CAMSYS_SW_RST 15
+#define MT8195_TOPRGU_EDPTX_SW_RST 16
+#define MT8195_TOPRGU_ADSPSYS_SW_RST 21
+#define MT8195_TOPRGU_DPTX_SW_RST 22
+#define MT8195_TOPRGU_SPMI_MST_SW_RST 23
+
+#define MT8195_TOPRGU_SW_RST_NUM 16
+
+#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */
--
2.18.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [RESEND v8, 1/2] dt-bindings: reset: mt8195: add toprgu reset-controller header file
@ 2021-08-24 6:26 ` Christine Zhu
0 siblings, 0 replies; 11+ messages in thread
From: Christine Zhu @ 2021-08-24 6:26 UTC (permalink / raw)
To: wim, linux, robh+dt, matthias.bgg
Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel,
linux-watchdog, devicetree, seiya.wang, Christine Zhu
Add toprgu reset-controller header file for MT8195 platform.
Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
---
include/dt-bindings/reset/mt8195-resets.h | 29 +++++++++++++++++++++++
1 file changed, 29 insertions(+)
create mode 100644 include/dt-bindings/reset/mt8195-resets.h
diff --git a/include/dt-bindings/reset/mt8195-resets.h b/include/dt-bindings/reset/mt8195-resets.h
new file mode 100644
index 000000000000..a26bccc8b957
--- /dev/null
+++ b/include/dt-bindings/reset/mt8195-resets.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)*/
+/*
+ * Copyright (c) 2021 MediaTek Inc.
+ * Author: Christine Zhu <christine.zhu@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8195
+#define _DT_BINDINGS_RESET_CONTROLLER_MT8195
+
+#define MT8195_TOPRGU_CONN_MCU_SW_RST 0
+#define MT8195_TOPRGU_INFRA_GRST_SW_RST 1
+#define MT8195_TOPRGU_APU_SW_RST 2
+#define MT8195_TOPRGU_INFRA_AO_GRST_SW_RST 6
+#define MT8195_TOPRGU_MMSYS_SW_RST 7
+#define MT8195_TOPRGU_MFG_SW_RST 8
+#define MT8195_TOPRGU_VENC_SW_RST 9
+#define MT8195_TOPRGU_VDEC_SW_RST 10
+#define MT8195_TOPRGU_IMG_SW_RST 11
+#define MT8195_TOPRGU_APMIXEDSYS_SW_RST 13
+#define MT8195_TOPRGU_AUDIO_SW_RST 14
+#define MT8195_TOPRGU_CAMSYS_SW_RST 15
+#define MT8195_TOPRGU_EDPTX_SW_RST 16
+#define MT8195_TOPRGU_ADSPSYS_SW_RST 21
+#define MT8195_TOPRGU_DPTX_SW_RST 22
+#define MT8195_TOPRGU_SPMI_MST_SW_RST 23
+
+#define MT8195_TOPRGU_SW_RST_NUM 16
+
+#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */
--
2.18.0
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [RESEND v8, 1/2] dt-bindings: reset: mt8195: add toprgu reset-controller header file
@ 2021-08-24 6:26 ` Christine Zhu
0 siblings, 0 replies; 11+ messages in thread
From: Christine Zhu @ 2021-08-24 6:26 UTC (permalink / raw)
To: wim, linux, robh+dt, matthias.bgg
Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel,
linux-watchdog, devicetree, seiya.wang, Christine Zhu
Add toprgu reset-controller header file for MT8195 platform.
Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
---
include/dt-bindings/reset/mt8195-resets.h | 29 +++++++++++++++++++++++
1 file changed, 29 insertions(+)
create mode 100644 include/dt-bindings/reset/mt8195-resets.h
diff --git a/include/dt-bindings/reset/mt8195-resets.h b/include/dt-bindings/reset/mt8195-resets.h
new file mode 100644
index 000000000000..a26bccc8b957
--- /dev/null
+++ b/include/dt-bindings/reset/mt8195-resets.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)*/
+/*
+ * Copyright (c) 2021 MediaTek Inc.
+ * Author: Christine Zhu <christine.zhu@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8195
+#define _DT_BINDINGS_RESET_CONTROLLER_MT8195
+
+#define MT8195_TOPRGU_CONN_MCU_SW_RST 0
+#define MT8195_TOPRGU_INFRA_GRST_SW_RST 1
+#define MT8195_TOPRGU_APU_SW_RST 2
+#define MT8195_TOPRGU_INFRA_AO_GRST_SW_RST 6
+#define MT8195_TOPRGU_MMSYS_SW_RST 7
+#define MT8195_TOPRGU_MFG_SW_RST 8
+#define MT8195_TOPRGU_VENC_SW_RST 9
+#define MT8195_TOPRGU_VDEC_SW_RST 10
+#define MT8195_TOPRGU_IMG_SW_RST 11
+#define MT8195_TOPRGU_APMIXEDSYS_SW_RST 13
+#define MT8195_TOPRGU_AUDIO_SW_RST 14
+#define MT8195_TOPRGU_CAMSYS_SW_RST 15
+#define MT8195_TOPRGU_EDPTX_SW_RST 16
+#define MT8195_TOPRGU_ADSPSYS_SW_RST 21
+#define MT8195_TOPRGU_DPTX_SW_RST 22
+#define MT8195_TOPRGU_SPMI_MST_SW_RST 23
+
+#define MT8195_TOPRGU_SW_RST_NUM 16
+
+#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */
--
2.18.0
_______________________________________________
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Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [RESEND v8,2/2] watchdog: mediatek: mt8195: add wdt support
2021-08-24 6:26 ` Christine Zhu
(?)
@ 2021-08-24 6:26 ` Christine Zhu
-1 siblings, 0 replies; 11+ messages in thread
From: Christine Zhu @ 2021-08-24 6:26 UTC (permalink / raw)
To: wim, linux, robh+dt, matthias.bgg
Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel,
linux-watchdog, devicetree, seiya.wang, Christine Zhu
Support MT8195 watchdog device.
Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Tzung-Bi Shih <tzungbi@google.com>
---
drivers/watchdog/mtk_wdt.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
index 16b6aff324a7..796fbb048cbe 100644
--- a/drivers/watchdog/mtk_wdt.c
+++ b/drivers/watchdog/mtk_wdt.c
@@ -12,6 +12,7 @@
#include <dt-bindings/reset-controller/mt2712-resets.h>
#include <dt-bindings/reset-controller/mt8183-resets.h>
#include <dt-bindings/reset-controller/mt8192-resets.h>
+#include <dt-bindings/reset/mt8195-resets.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/init.h>
@@ -82,6 +83,10 @@ static const struct mtk_wdt_data mt8192_data = {
.toprgu_sw_rst_num = MT8192_TOPRGU_SW_RST_NUM,
};
+static const struct mtk_wdt_data mt8195_data = {
+ .toprgu_sw_rst_num = MT8195_TOPRGU_SW_RST_NUM,
+};
+
static int toprgu_reset_update(struct reset_controller_dev *rcdev,
unsigned long id, bool assert)
{
@@ -408,6 +413,7 @@ static const struct of_device_id mtk_wdt_dt_ids[] = {
{ .compatible = "mediatek,mt6589-wdt" },
{ .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
{ .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data },
+ { .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);
--
2.18.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [RESEND v8,2/2] watchdog: mediatek: mt8195: add wdt support
@ 2021-08-24 6:26 ` Christine Zhu
0 siblings, 0 replies; 11+ messages in thread
From: Christine Zhu @ 2021-08-24 6:26 UTC (permalink / raw)
To: wim, linux, robh+dt, matthias.bgg
Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel,
linux-watchdog, devicetree, seiya.wang, Christine Zhu
Support MT8195 watchdog device.
Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Tzung-Bi Shih <tzungbi@google.com>
---
drivers/watchdog/mtk_wdt.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
index 16b6aff324a7..796fbb048cbe 100644
--- a/drivers/watchdog/mtk_wdt.c
+++ b/drivers/watchdog/mtk_wdt.c
@@ -12,6 +12,7 @@
#include <dt-bindings/reset-controller/mt2712-resets.h>
#include <dt-bindings/reset-controller/mt8183-resets.h>
#include <dt-bindings/reset-controller/mt8192-resets.h>
+#include <dt-bindings/reset/mt8195-resets.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/init.h>
@@ -82,6 +83,10 @@ static const struct mtk_wdt_data mt8192_data = {
.toprgu_sw_rst_num = MT8192_TOPRGU_SW_RST_NUM,
};
+static const struct mtk_wdt_data mt8195_data = {
+ .toprgu_sw_rst_num = MT8195_TOPRGU_SW_RST_NUM,
+};
+
static int toprgu_reset_update(struct reset_controller_dev *rcdev,
unsigned long id, bool assert)
{
@@ -408,6 +413,7 @@ static const struct of_device_id mtk_wdt_dt_ids[] = {
{ .compatible = "mediatek,mt6589-wdt" },
{ .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
{ .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data },
+ { .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);
--
2.18.0
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 11+ messages in thread* [RESEND v8,2/2] watchdog: mediatek: mt8195: add wdt support
@ 2021-08-24 6:26 ` Christine Zhu
0 siblings, 0 replies; 11+ messages in thread
From: Christine Zhu @ 2021-08-24 6:26 UTC (permalink / raw)
To: wim, linux, robh+dt, matthias.bgg
Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel,
linux-watchdog, devicetree, seiya.wang, Christine Zhu
Support MT8195 watchdog device.
Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Tzung-Bi Shih <tzungbi@google.com>
---
drivers/watchdog/mtk_wdt.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
index 16b6aff324a7..796fbb048cbe 100644
--- a/drivers/watchdog/mtk_wdt.c
+++ b/drivers/watchdog/mtk_wdt.c
@@ -12,6 +12,7 @@
#include <dt-bindings/reset-controller/mt2712-resets.h>
#include <dt-bindings/reset-controller/mt8183-resets.h>
#include <dt-bindings/reset-controller/mt8192-resets.h>
+#include <dt-bindings/reset/mt8195-resets.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/init.h>
@@ -82,6 +83,10 @@ static const struct mtk_wdt_data mt8192_data = {
.toprgu_sw_rst_num = MT8192_TOPRGU_SW_RST_NUM,
};
+static const struct mtk_wdt_data mt8195_data = {
+ .toprgu_sw_rst_num = MT8195_TOPRGU_SW_RST_NUM,
+};
+
static int toprgu_reset_update(struct reset_controller_dev *rcdev,
unsigned long id, bool assert)
{
@@ -408,6 +413,7 @@ static const struct of_device_id mtk_wdt_dt_ids[] = {
{ .compatible = "mediatek,mt6589-wdt" },
{ .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
{ .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data },
+ { .compatible = "mediatek,mt8195-wdt", .data = &mt8195_data },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);
--
2.18.0
_______________________________________________
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Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [RESEND v8,0/2] watchdog: mt8195: add wdt support
2021-08-24 6:26 ` Christine Zhu
(?)
@ 2021-08-24 15:06 ` Guenter Roeck
-1 siblings, 0 replies; 11+ messages in thread
From: Guenter Roeck @ 2021-08-24 15:06 UTC (permalink / raw)
To: Christine Zhu
Cc: wim, robh+dt, matthias.bgg, srv_heupstream, linux-mediatek,
linux-arm-kernel, linux-kernel, linux-watchdog, devicetree,
seiya.wang
Hi,
On Tue, Aug 24, 2021 at 02:26:32PM +0800, Christine Zhu wrote:
> Supports MT8195 watchdog device. Supports MT8195 watchdog reset-controller feature.
>
The series is already queued in my watchdog-next branch; no need to resend.
We'll have to wait for Wim to pick it up from there.
Thanks,
Guenter
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [RESEND v8,0/2] watchdog: mt8195: add wdt support
@ 2021-08-24 15:06 ` Guenter Roeck
0 siblings, 0 replies; 11+ messages in thread
From: Guenter Roeck @ 2021-08-24 15:06 UTC (permalink / raw)
To: Christine Zhu
Cc: wim, robh+dt, matthias.bgg, srv_heupstream, linux-mediatek,
linux-arm-kernel, linux-kernel, linux-watchdog, devicetree,
seiya.wang
Hi,
On Tue, Aug 24, 2021 at 02:26:32PM +0800, Christine Zhu wrote:
> Supports MT8195 watchdog device. Supports MT8195 watchdog reset-controller feature.
>
The series is already queued in my watchdog-next branch; no need to resend.
We'll have to wait for Wim to pick it up from there.
Thanks,
Guenter
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [RESEND v8,0/2] watchdog: mt8195: add wdt support
@ 2021-08-24 15:06 ` Guenter Roeck
0 siblings, 0 replies; 11+ messages in thread
From: Guenter Roeck @ 2021-08-24 15:06 UTC (permalink / raw)
To: Christine Zhu
Cc: wim, robh+dt, matthias.bgg, srv_heupstream, linux-mediatek,
linux-arm-kernel, linux-kernel, linux-watchdog, devicetree,
seiya.wang
Hi,
On Tue, Aug 24, 2021 at 02:26:32PM +0800, Christine Zhu wrote:
> Supports MT8195 watchdog device. Supports MT8195 watchdog reset-controller feature.
>
The series is already queued in my watchdog-next branch; no need to resend.
We'll have to wait for Wim to pick it up from there.
Thanks,
Guenter
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 11+ messages in thread